feat: Migrate isArch16Bit

[Pivnoy]

Summary

Started refactor the Triple class to convert it to data class

[Pivnoy]

Add deprecated attribute

[Pivnoy]

Fix some format mistake

[Pivnoy]

Add test for isArch32Bit to TripleUtilsTest

[Pivnoy]

Migrate isArch64Bit to TripleUtils

[Pivnoy]

Fix clang-format issues

[asb]

Is there some separate discussion thread or proposal about this refactoring and its motivations?

[Pivnoy]

This discussion was the main motivation for this change.
https://discourse.llvm.org/t/rfc-refactor-triple-related-classes/70410/11
As a result, Triple should become a data class, and its dependencies such as Architecture, Operating System etc. represent in the form of interfaces that can be implemented for the necessary instances.

[Pivnoy]

clang-format fix

[MaskRay]

In D157497#4584621, @Pivnoy wrote:

This discussion was the main motivation for this change.
https://discourse.llvm.org/t/rfc-refactor-triple-related-classes/70410/11
As a result, Triple should become a data class, and its dependencies such as Architecture, Operating System etc. represent in the form of interfaces that can be implemented for the necessary instances.

FWIW I still don't see advantages by switching to the new llvm::TripleUtils::isArch32Bit style. How is it better than the current way?

[bulbazord]

In D157497#4586165, @MaskRay wrote:

In D157497#4584621, @Pivnoy wrote:

This discussion was the main motivation for this change.
https://discourse.llvm.org/t/rfc-refactor-triple-related-classes/70410/11
As a result, Triple should become a data class, and its dependencies such as Architecture, Operating System etc. represent in the form of interfaces that can be implemented for the necessary instances.

FWIW I still don't see advantages by switching to the new llvm::TripleUtils::isArch32Bit style. How is it better than the current way?

+1
What advantages does this approach bring? I re-read the RFC in the discourse link you posted and I'm still not sure why this approach is desirable. Happy to discuss further either on this PR or in the discourse thread.

[Pivnoy]

At the moment, the TargetParser architecture is extensible. This complicates the addition of new architectures, operating systems, and so on.
In the main discussion, it was proposed to redesign the architecture of this module in order to increase the possibility of adding new architectures, etc.
The main idea of the rework was to separate the Triple entity into a data-class, and create a number of interfaces from components that would include Triple, through the implementation of which it would be possible to represent various data bindings of the components. At the moment, Triple is overflowing with various methods that do not fully meet the ideas of OOP.
Since the TargetParser module is quite large and has many dependencies throughout the llvm-project, it was first of all supposed to remove these methods from Triple, since they would not correspond to OOP ideas.
This would help to gradually rid Triple of unnecessary dependencies, and gradually change the architecture inside Triple, without breaking code of another LLVM developers.

[Pivnoy]

@bulbazord
@MaskRay

[nikic]

This change looks strictly worse in isolation, the proposal on discourse did not reach consensus, and looking at the diagram in https://discourse.llvm.org/t/rfc-refactor-triple-related-classes/70410/11 there is zero chance that it is ever going to be accepted.

[bulbazord]

In D157497#4592330, @Pivnoy wrote:

At the moment, the TargetParser architecture is extensible. This complicates the addition of new architectures, operating systems, and so on.
In the main discussion, it was proposed to redesign the architecture of this module in order to increase the possibility of adding new architectures, etc.
The main idea of the rework was to separate the Triple entity into a data-class, and create a number of interfaces from components that would include Triple, through the implementation of which it would be possible to represent various data bindings of the components. At the moment, Triple is overflowing with various methods that do not fully meet the ideas of OOP.
Since the TargetParser module is quite large and has many dependencies throughout the llvm-project, it was first of all supposed to remove these methods from Triple, since they would not correspond to OOP ideas.
This would help to gradually rid Triple of unnecessary dependencies, and gradually change the architecture inside Triple, without breaking code of another LLVM developers.

I'm still not sure how this would make things simpler. I'll be as specific is possible in what does not click for me.

There is an inherent complexity in parsing triples. Architectures can have variants and subvariants, compilers and other tools do different things for the same architecture and OS when there are different vendors, the environment can subtly change things like ABI, the list goes on. I don't think you're going to be able to wholesale reduce complexity here. The proposal you've laid out here is certainly very OOP-like (in some sense of the phrase "OOP") but you present your ideas under the assumption that this style of OOP is the ideal to strive for. Why is that? Why is this better than what exists today? Is it easier to debug? Is it more performant? Is it easier to maintain? I personally do not think it will be better than what already exists in any of those ways.

In the original discourse thread, you also made the argument that the potential performance overhead and binary size increase should be unnoticeable and that with modern machines we do not need to fight for each microsecond. Without any numbers for performance or size, this is not an argument I can accept. Knowingly adding a performance/size regression to your build tools without an appropriate tradeoff does not make sense to do.

If you want to do this, please provide a concrete argument for what benefit this brings.

clang/lib/AST/ASTContext.cpp

 #include "llvm/Support/Capacity.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MD5.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <algorithm>
 #include <cassert>
 #include <cstddef>
 #include <cstdint>
 #include <cstdlib>
 #include <map>
 #include <memory>
 #include <optional>
bool ASTContext::getByrefLifetime(QualType Ty,
   }
   return true;
 }
 
 CanQualType ASTContext::getNSUIntegerType() const {
   assert(Target && "Expected target to be initialized");
   const llvm::Triple &T = Target->getTriple();
   // Windows is LLP64 rather than LP64
-  if (T.isOSWindows() && T.isArch64Bit())
+  if (T.isOSWindows() && llvm::TripleUtils::isArch64Bit(T))
     return UnsignedLongLongTy;
   return UnsignedLongTy;
 }
 
 CanQualType ASTContext::getNSIntegerType() const {
   assert(Target && "Expected target to be initialized");
   const llvm::Triple &T = Target->getTriple();
   // Windows is LLP64 rather than LP64
-  if (T.isOSWindows() && T.isArch64Bit())
+  if (T.isOSWindows() && llvm::TripleUtils::isArch64Bit(T))
     return LongLongTy;
   return LongTy;
 }
 
 TypedefDecl *ASTContext::getObjCInstanceTypeDecl() {
   if (!ObjCInstanceTypeDecl)
     ObjCInstanceTypeDecl =
         buildImplicitTypedef(getObjCIdType(), "instancetype");

clang/lib/AST/MicrosoftCXXABI.cpp

 #include "clang/AST/Attr.h"
 #include "clang/AST/CXXInheritance.h"
 #include "clang/AST/DeclCXX.h"
 #include "clang/AST/Mangle.h"
 #include "clang/AST/MangleNumberingContext.h"
 #include "clang/AST/RecordLayout.h"
 #include "clang/AST/Type.h"
 #include "clang/Basic/TargetInfo.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace clang;
 
 namespace {
 
 /// Numbers things which need to correspond across multiple TUs.
 /// Typically these are things like static locals, lambdas, or blocks.
 class MicrosoftNumberingContext : public MangleNumberingContext {
CXXABI::MemberPointerInfo MicrosoftCXXABI::getMemberPointerInfo(
   std::tie(Ptrs, Ints) = getMSMemberPointerSlots(MPT);
   MemberPointerInfo MPI;
   MPI.HasPadding = false;
   MPI.Width = Ptrs * PtrSize + Ints * IntSize;
 
   // When MSVC does x86_32 record layout, it aligns aggregate member pointers to
   // 8 bytes.  However, __alignof usually returns 4 for data memptrs and 8 for
   // function memptrs.
-  if (Ptrs + Ints > 1 && Target.getTriple().isArch32Bit())
+  if (Ptrs + Ints > 1 && llvm::TripleUtils::isArch32Bit(Target.getTriple()))
     MPI.Align = 64;
   else if (Ptrs)
     MPI.Align = Target.getPointerAlign(LangAS::Default);
   else
     MPI.Align = Target.getIntAlign();
 
-  if (Target.getTriple().isArch64Bit()) {
+  if (llvm::TripleUtils::isArch64Bit(Target.getTriple())) {
     MPI.Width = llvm::alignTo(MPI.Width, MPI.Align);
     MPI.HasPadding = MPI.Width != (Ptrs * PtrSize + Ints * IntSize);
   }
   return MPI;
 }
 
 CXXABI *clang::CreateMicrosoftCXXABI(ASTContext &Ctx) {
   return new MicrosoftCXXABI(Ctx);
 }

clang/lib/AST/PrintfFormatString.cpp

 //
 //===----------------------------------------------------------------------===//
 
 #include "FormatStringParsing.h"
 #include "clang/AST/FormatString.h"
 #include "clang/AST/OSLog.h"
 #include "clang/Basic/TargetInfo.h"
 #include "llvm/Support/Regex.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using clang::analyze_format_string::ArgType;
 using clang::analyze_format_string::FormatStringHandler;
 using clang::analyze_format_string::LengthModifier;
 using clang::analyze_format_string::OptionalAmount;
 using clang::analyze_format_string::ConversionSpecifier;
 using clang::analyze_printf::PrintfSpecifier;
 
switch (LM.getKind()) {
         return Ctx.LongLongTy;
       case LengthModifier::AsInt64:
         return ArgType(Ctx.LongLongTy, "__int64");
       case LengthModifier::AsIntMax:
         return ArgType(Ctx.getIntMaxType(), "intmax_t");
       case LengthModifier::AsSizeT:
         return ArgType::makeSizeT(ArgType(Ctx.getSignedSizeType(), "ssize_t"));
       case LengthModifier::AsInt3264:
-        return Ctx.getTargetInfo().getTriple().isArch64Bit()
+        return llvm::TripleUtils::isArch64Bit(Ctx.getTargetInfo().getTriple())
                    ? ArgType(Ctx.LongLongTy, "__int64")
                    : ArgType(Ctx.IntTy, "__int32");
       case LengthModifier::AsPtrDiff:
         return ArgType::makePtrdiffT(
             ArgType(Ctx.getPointerDiffType(), "ptrdiff_t"));
       case LengthModifier::AsAllocate:
       case LengthModifier::AsMAllocate:
       case LengthModifier::AsWide:
switch (LM.getKind()) {
         return Ctx.UnsignedLongLongTy;
       case LengthModifier::AsInt64:
         return ArgType(Ctx.UnsignedLongLongTy, "unsigned __int64");
       case LengthModifier::AsIntMax:
         return ArgType(Ctx.getUIntMaxType(), "uintmax_t");
       case LengthModifier::AsSizeT:
         return ArgType::makeSizeT(ArgType(Ctx.getSizeType(), "size_t"));
       case LengthModifier::AsInt3264:
-        return Ctx.getTargetInfo().getTriple().isArch64Bit()
+        return llvm::TripleUtils::isArch64Bit(Ctx.getTargetInfo().getTriple())
                    ? ArgType(Ctx.UnsignedLongLongTy, "unsigned __int64")
                    : ArgType(Ctx.UnsignedIntTy, "unsigned __int32");
       case LengthModifier::AsPtrDiff:
         return ArgType::makePtrdiffT(
             ArgType(Ctx.getUnsignedPointerDiffType(), "unsigned ptrdiff_t"));
       case LengthModifier::AsAllocate:
       case LengthModifier::AsMAllocate:
       case LengthModifier::AsWide:

clang/lib/AST/RecordLayoutBuilder.cpp

 //=== RecordLayoutBuilder.cpp - Helper class for building record layouts ---==//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "clang/AST/ASTContext.h"
 #include "clang/AST/ASTDiagnostic.h"
 #include "clang/AST/Attr.h"
 #include "clang/AST/CXXInheritance.h"
 #include "clang/AST/Decl.h"
 #include "clang/AST/DeclCXX.h"
 #include "clang/AST/DeclObjC.h"
 #include "clang/AST/Expr.h"
-#include "clang/AST/VTableBuilder.h"
 #include "clang/AST/RecordLayout.h"
+#include "clang/AST/VTableBuilder.h"
 #include "clang/Basic/TargetInfo.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/Support/Format.h"
 #include "llvm/Support/MathExtras.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace clang;
 
 namespace {
 
 /// BaseSubobjectInfo - Represents a single base subobject in a complete class.
 /// For a class hierarchy like
 ///
void ItaniumRecordLayoutBuilder::LayoutBitField(const FieldDecl *D) {
   }
 
   if (isAIXLayout(Context)) {
     if (StorageUnitSize < Context.getTypeSize(Context.UnsignedIntTy)) {
       // On AIX, [bool, char, short] bitfields have the same alignment
       // as [unsigned].
       StorageUnitSize = Context.getTypeSize(Context.UnsignedIntTy);
     } else if (StorageUnitSize > Context.getTypeSize(Context.UnsignedIntTy) &&
-               Context.getTargetInfo().getTriple().isArch32Bit() &&
+               llvm::TripleUtils::isArch32Bit(
+                   Context.getTargetInfo().getTriple()) &&
                FieldSize <= 32) {
       // Under 32-bit compile mode, the bitcontainer is 32 bits if a single
       // long long bitfield has length no greater than 32 bits.
       StorageUnitSize = 32;
 
       if (!AlignIsRequired)
         FieldAlign = 32;
     }

 
 void MicrosoftRecordLayoutBuilder::initializeLayout(const RecordDecl *RD) {
   IsUnion = RD->isUnion();
   Size = CharUnits::Zero();
   Alignment = CharUnits::One();
   // In 64-bit mode we always perform an alignment step after laying out vbases.
   // In 32-bit mode we do not.  The check to see if we need to perform alignment
   // checks the RequiredAlignment field and performs alignment if it isn't 0.
-  RequiredAlignment = Context.getTargetInfo().getTriple().isArch64Bit()
-                          ? CharUnits::One()
-                          : CharUnits::Zero();
+  RequiredAlignment =
+      llvm::TripleUtils::isArch64Bit(Context.getTargetInfo().getTriple())
   // Compute the maximum field alignment.
   MaxFieldAlignment = CharUnits::Zero();
   // Honor the default struct packing maximum alignment flag.
   if (unsigned DefaultMaxFieldAlignment = Context.getLangOpts().PackStruct)
       MaxFieldAlignment = CharUnits::fromQuantity(DefaultMaxFieldAlignment);
   // Honor the packing attribute.  The MS-ABI ignores pragma pack if its larger
   // than the pointer size.
   if (const MaxFieldAlignmentAttr *MFAA = RD->getAttr<MaxFieldAlignmentAttr>()){

clang/lib/Basic/TargetInfo.cpp

 #include "clang/Basic/CharInfo.h"
 #include "clang/Basic/Diagnostic.h"
 #include "clang/Basic/DiagnosticFrontend.h"
 #include "clang/Basic/LangOptions.h"
 #include "llvm/ADT/APFloat.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/TargetParser/TargetParser.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <cstdlib>
 using namespace clang;
 
 static const LangASMap DefaultAddrSpaceMap = {0};
 // The fake address space map must have a distinct entry for each
 // language-specific address space.
 static const LangASMap FakeAddrSpaceMap = {
     0,  // Default
TargetInfo::TargetInfo(const llvm::Triple &T) : Triple(T) {
   MinGlobalAlign = 0;
   // From the glibc documentation, on GNU systems, malloc guarantees 16-byte
   // alignment on 64-bit systems and 8-byte alignment on 32-bit systems. See
   // https://www.gnu.org/software/libc/manual/html_node/Malloc-Examples.html.
   // This alignment guarantee also applies to Windows and Android. On Darwin
   // and OpenBSD, the alignment is 16 bytes on both 64-bit and 32-bit systems.
   if (T.isGNUEnvironment() || T.isWindowsMSVCEnvironment() || T.isAndroid() ||
       T.isOHOSFamily())
-    NewAlign = Triple.isArch64Bit() ? 128 : Triple.isArch32Bit() ? 64 : 0;
+    NewAlign = llvm::TripleUtils::isArch64Bit(Triple)   ? 128
+               : llvm::TripleUtils::isArch32Bit(Triple) ? 64
+                                                        : 0;
   else if (T.isOSDarwin() || T.isOSOpenBSD())
     NewAlign = 128;
   else
     NewAlign = 0; // Infer from basic type alignment.
   HalfWidth = 16;
   HalfAlign = 16;
   FloatWidth = 32;
   FloatAlign = 32;

clang/lib/Basic/Targets/AArch64.cpp

 #include "clang/Basic/LangOptions.h"
 #include "clang/Basic/TargetBuiltins.h"
 #include "clang/Basic/TargetInfo.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/TargetParser/AArch64TargetParser.h"
 #include "llvm/TargetParser/ARMTargetParserCommon.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <optional>
 
 using namespace clang;
 using namespace clang::targets;
 
 static constexpr Builtin::Info BuiltinInfo[] = {
 #define BUILTIN(ID, TYPE, ATTRS)                                               \
   {#ID, TYPE, ATTRS, nullptr, HeaderDesc::NO_HEADER, ALL_LANGUAGES},
AArch64TargetInfo::AArch64TargetInfo(const llvm::Triple &Triple,
   }
 
   // All AArch64 implementations support ARMv8 FP, which makes half a legal type.
   HasLegalHalfType = true;
   HalfArgsAndReturns = true;
   HasFloat16 = true;
   HasStrictFP = true;
 
-  if (Triple.isArch64Bit())
+  if (llvm::TripleUtils::isArch64Bit(Triple))
     LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
   else
     LongWidth = LongAlign = PointerWidth = PointerAlign = 32;
 
   MaxVectorAlign = 128;
   MaxAtomicInlineWidth = 128;
   MaxAtomicPromoteWidth = 128;
 

 bool AArch64TargetInfo::hasInt128Type() const { return true; }
 
 AArch64leTargetInfo::AArch64leTargetInfo(const llvm::Triple &Triple,
                                          const TargetOptions &Opts)
     : AArch64TargetInfo(Triple, Opts) {}
 
 void AArch64leTargetInfo::setDataLayout() {
   if (getTriple().isOSBinFormatMachO()) {
-    if(getTriple().isArch32Bit())
+    if (llvm::TripleUtils::isArch32Bit(getTriple()))
       resetDataLayout("e-m:o-p:32:32-i64:64-i128:128-n32:64-S128", "_");
     else
       resetDataLayout("e-m:o-i64:64-i128:128-n32:64-S128", "_");
   } else
     resetDataLayout("e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128");
 }
 
 void AArch64leTargetInfo::getTargetDefines(const LangOptions &Opts,
MinGWARM64TargetInfo::MinGWARM64TargetInfo(const llvm::Triple &Triple,
     : WindowsARM64TargetInfo(Triple, Opts) {
   TheCXXABI.set(TargetCXXABI::GenericAArch64);
 }
 
 DarwinAArch64TargetInfo::DarwinAArch64TargetInfo(const llvm::Triple &Triple,
                                                  const TargetOptions &Opts)
     : DarwinTargetInfo<AArch64leTargetInfo>(Triple, Opts) {
   Int64Type = SignedLongLong;
-  if (getTriple().isArch32Bit())
+  if (llvm::TripleUtils::isArch32Bit(getTriple()))
     IntMaxType = SignedLongLong;
 
   WCharType = SignedInt;
   UseSignedCharForObjCBool = false;
 
   LongDoubleWidth = LongDoubleAlign = SuitableAlign = 64;
   LongDoubleFormat = &llvm::APFloat::IEEEdouble();
 
   UseZeroLengthBitfieldAlignment = false;
 
-  if (getTriple().isArch32Bit()) {
+  if (llvm::TripleUtils::isArch32Bit(getTriple())) {
     UseBitFieldTypeAlignment = false;
     ZeroLengthBitfieldBoundary = 32;
     UseZeroLengthBitfieldAlignment = true;
     TheCXXABI.set(TargetCXXABI::WatchOS);
   } else
     TheCXXABI.set(TargetCXXABI::AppleARM64);
 }
 
 void DarwinAArch64TargetInfo::getOSDefines(const LangOptions &Opts,
                                            const llvm::Triple &Triple,
                                            MacroBuilder &Builder) const {
   Builder.defineMacro("__AARCH64_SIMD__");
-  if (Triple.isArch32Bit())
+  if (llvm::TripleUtils::isArch32Bit(Triple))
     Builder.defineMacro("__ARM64_ARCH_8_32__");
   else
     Builder.defineMacro("__ARM64_ARCH_8__");
   Builder.defineMacro("__ARM_NEON__");
   Builder.defineMacro("__REGISTER_PREFIX__", "");
   Builder.defineMacro("__arm64", "1");
   Builder.defineMacro("__arm64__", "1");
 

clang/lib/Basic/Targets/OSTargets.h

 //===--- OSTargets.h - Declare OS target feature support --------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file declares OS specific TargetInfo types.
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_OSTARGETS_H
 #define LLVM_CLANG_LIB_BASIC_TARGETS_OSTARGETS_H
 
 #include "Targets.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 namespace clang {
 namespace targets {
 
 template <typename TgtInfo>
 class LLVM_LIBRARY_VISIBILITY OSTargetInfo : public TgtInfo {
 protected:
   virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
DarwinTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
     // combinations.
     this->TLSSupported = false;
 
     if (Triple.isMacOSX())
       this->TLSSupported = !Triple.isMacOSXVersionLT(10, 7);
     else if (Triple.isiOS()) {
       // 64-bit iOS supported it from 8 onwards, 32-bit device from 9 onwards,
       // 32-bit simulator from 10 onwards.
-      if (Triple.isArch64Bit())
+      if (llvm::TripleUtils::isArch64Bit(Triple))
         this->TLSSupported = !Triple.isOSVersionLT(8);
-      else if (Triple.isArch32Bit()) {
+      else if (llvm::TripleUtils::isArch32Bit(Triple)) {
         if (!Triple.isSimulatorEnvironment())
           this->TLSSupported = !Triple.isOSVersionLT(9);
         else
           this->TLSSupported = !Triple.isOSVersionLT(10);
       }
     } else if (Triple.isWatchOS()) {
       if (!Triple.isSimulatorEnvironment())
         this->TLSSupported = !Triple.isOSVersionLT(2);

clang/lib/Basic/Targets/OSTargets.cpp

void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
 
   PlatformMinVersion = OsVersion;
 }
 
 static void addMinGWDefines(const llvm::Triple &Triple, const LangOptions &Opts,
                             MacroBuilder &Builder) {
   DefineStd(Builder, "WIN32", Opts);
   DefineStd(Builder, "WINNT", Opts);
-  if (Triple.isArch64Bit()) {
+  if (llvm::TripleUtils::isArch64Bit(Triple)) {
     DefineStd(Builder, "WIN64", Opts);
     Builder.defineMacro("__MINGW64__");
   }
   Builder.defineMacro("__MSVCRT__");
   Builder.defineMacro("__MINGW32__");
   addCygMingDefines(Opts, Builder);
 }
 
static void addVisualCDefines(const LangOptions &Opts, MacroBuilder &Builder) {
   //
   // Clang currently only supports UTF-8, so we'll use 65001
   Builder.defineMacro("_MSVC_EXECUTION_CHARACTER_SET", "65001");
 }
 
 void addWindowsDefines(const llvm::Triple &Triple, const LangOptions &Opts,
                        MacroBuilder &Builder) {
   Builder.defineMacro("_WIN32");
-  if (Triple.isArch64Bit())
+  if (llvm::TripleUtils::isArch64Bit(Triple))
     Builder.defineMacro("_WIN64");
   if (Triple.isWindowsGNUEnvironment())
     addMinGWDefines(Triple, Opts, Builder);
   else if (Triple.isKnownWindowsMSVCEnvironment() ||
            (Triple.isWindowsItaniumEnvironment() && Opts.MSVCCompat))
     addVisualCDefines(Opts, Builder);
 }
 
 } // namespace targets
 } // namespace clang

clang/lib/Basic/Targets/PPC.cpp

Features["isa-v207-instructions"] = llvm::StringSwitch<bool>(CPU)
                                           .Case("ppc64le", true)
                                           .Case("pwr9", true)
                                           .Case("pwr8", true)
                                           .Default(false);
 
   Features["isa-v30-instructions"] =
       llvm::StringSwitch<bool>(CPU).Case("pwr9", true).Default(false);
 
-  Features["quadword-atomics"] =
-      getTriple().isArch64Bit() && llvm::StringSwitch<bool>(CPU)
-                                       .Case("pwr9", true)
-                                       .Case("pwr8", true)
-                                       .Default(false);
+  Features["quadword-atomics"] = llvm::TripleUtils::isArch64Bit(getTriple()) &&
+                                 llvm::StringSwitch<bool>(CPU)
 
   // Power10 includes all the same features as Power9 plus any features specific
   // to the Power10 core.
   if (CPU == "pwr10" || CPU == "power10") {
     initFeatureMap(Features, Diags, "pwr9", FeaturesVec);
     addP10SpecificFeatures(Features);
   }
 

clang/lib/Basic/Targets/RISCV.cpp

 
 #include "RISCV.h"
 #include "clang/Basic/Diagnostic.h"
 #include "clang/Basic/MacroBuilder.h"
 #include "clang/Basic/TargetBuiltins.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/TargetParser/RISCVTargetParser.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <optional>
 
 using namespace clang;
 using namespace clang::targets;
 
 ArrayRef<const char *> RISCVTargetInfo::getGCCRegNames() const {
   static const char *const GCCRegNames[] = {
       // Integer registers
if (ISAInfo->isSupportedExtensionFeature(Feature))
     return ISAInfo->hasExtension(Feature);
 
   return false;
 }
 
 /// Perform initialization based on the user configured set of features.
 bool RISCVTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
                                            DiagnosticsEngine &Diags) {
-  unsigned XLen = getTriple().isArch64Bit() ? 64 : 32;
+  unsigned XLen = llvm::TripleUtils::isArch64Bit(getTriple()) ? 64 : 32;
   auto ParseResult = llvm::RISCVISAInfo::parseFeatures(XLen, Features);
   if (!ParseResult) {
     std::string Buffer;
     llvm::raw_string_ostream OutputErrMsg(Buffer);
     handleAllErrors(ParseResult.takeError(), [&](llvm::StringError &ErrMsg) {
       OutputErrMsg << ErrMsg.getMessage();
     });
     Diags.Report(diag::err_invalid_feature_combination) << OutputErrMsg.str();
     return false;
   } else {
     ISAInfo = std::move(*ParseResult);
   }
 
   if (ABI.empty())
     ABI = ISAInfo->computeDefaultABI().str();
 
   if (ISAInfo->hasExtension("zfh") || ISAInfo->hasExtension("zhinx"))
     HasLegalHalfType = true;
 
   return true;
 }
 
 bool RISCVTargetInfo::isValidCPUName(StringRef Name) const {
-  bool Is64Bit = getTriple().isArch64Bit();
+  bool Is64Bit = llvm::TripleUtils::isArch64Bit(getTriple());
   return llvm::RISCV::parseCPU(Name, Is64Bit);
 }
 
 void RISCVTargetInfo::fillValidCPUList(
     SmallVectorImpl<StringRef> &Values) const {
-  bool Is64Bit = getTriple().isArch64Bit();
+  bool Is64Bit = llvm::TripleUtils::isArch64Bit(getTriple());
   llvm::RISCV::fillValidCPUArchList(Values, Is64Bit);
 }
 
 bool RISCVTargetInfo::isValidTuneCPUName(StringRef Name) const {
-  bool Is64Bit = getTriple().isArch64Bit();
+  bool Is64Bit = llvm::TripleUtils::isArch64Bit(getTriple());
   return llvm::RISCV::parseTuneCPU(Name, Is64Bit);
 }
 
 void RISCVTargetInfo::fillValidTuneCPUList(
     SmallVectorImpl<StringRef> &Values) const {
-  bool Is64Bit = getTriple().isArch64Bit();
+  bool Is64Bit = llvm::TripleUtils::isArch64Bit(getTriple());
   llvm::RISCV::fillValidTuneCPUArchList(Values, Is64Bit);
 }

clang/lib/Driver/Driver.cpp

static std::optional<llvm::Triple> getOffloadTargetTriple(const Driver &D,
   }
   return llvm::Triple(OffloadTargets[0]);
 }
 
 static std::optional<llvm::Triple>
 getNVIDIAOffloadTargetTriple(const Driver &D, const ArgList &Args,
                              const llvm::Triple &HostTriple) {
   if (!Args.hasArg(options::OPT_offload_EQ)) {
-    return llvm::Triple(HostTriple.isArch64Bit() ? "nvptx64-nvidia-cuda"
-                                                 : "nvptx-nvidia-cuda");
+    return llvm::Triple(llvm::TripleUtils::isArch64Bit(HostTriple)
+                            ? "nvptx64-nvidia-cuda"
   }
   auto TT = getOffloadTargetTriple(D, Args);
   if (TT && (TT->getArch() == llvm::Triple::spirv32 ||
              TT->getArch() == llvm::Triple::spirv64)) {
     if (Args.hasArg(options::OPT_emit_llvm))
       return TT;
     D.Diag(diag::err_drv_cuda_offload_only_emit_bc);
     return std::nullopt;

clang/lib/Driver/ToolChains/AIX.cpp

 #include "CommonArgs.h"
 #include "clang/Driver/Compilation.h"
 #include "clang/Driver/Options.h"
 #include "clang/Driver/SanitizerArgs.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/ProfileData/InstrProf.h"
 #include "llvm/Support/Path.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using AIX = clang::driver::toolchains::AIX;
 using namespace clang::driver;
 using namespace clang::driver::tools;
 using namespace clang::driver::toolchains;
 
 using namespace llvm::opt;
 using namespace llvm::sys;
 
 void aix::Assembler::ConstructJob(Compilation &C, const JobAction &JA,
                                   const InputInfo &Output,
                                   const InputInfoList &Inputs,
                                   const ArgList &Args,
                                   const char *LinkingOutput) const {
   ArgStringList CmdArgs;
 
-  const bool IsArch32Bit = getToolChain().getTriple().isArch32Bit();
-  const bool IsArch64Bit = getToolChain().getTriple().isArch64Bit();
+  const bool IsArch32Bit =
+      llvm::TripleUtils::isArch32Bit(getToolChain().getTriple());
+  const bool IsArch64Bit =
+      llvm::TripleUtils::isArch64Bit(getToolChain().getTriple());
   // Only support 32 and 64 bit.
   if (!IsArch32Bit && !IsArch64Bit)
     llvm_unreachable("Unsupported bit width value.");
 
   // Specify the mode in which the as(1) command operates.
   if (IsArch32Bit) {
     CmdArgs.push_back("-a32");
   } else {

 void aix::Linker::ConstructJob(Compilation &C, const JobAction &JA,
                                const InputInfo &Output,
                                const InputInfoList &Inputs, const ArgList &Args,
                                const char *LinkingOutput) const {
   const AIX &ToolChain = static_cast<const AIX &>(getToolChain());
   const Driver &D = ToolChain.getDriver();
   ArgStringList CmdArgs;
 
-  const bool IsArch32Bit = ToolChain.getTriple().isArch32Bit();
-  const bool IsArch64Bit = ToolChain.getTriple().isArch64Bit();
+  const bool IsArch32Bit =
+      llvm::TripleUtils::isArch32Bit(ToolChain.getTriple());
+  const bool IsArch64Bit =
+      llvm::TripleUtils::isArch64Bit(ToolChain.getTriple());
   // Only support 32 and 64 bit.
   if (!(IsArch32Bit || IsArch64Bit))
     llvm_unreachable("Unsupported bit width value.");
 
   if (Arg *A = C.getArgs().getLastArg(options::OPT_G)) {
     D.Diag(diag::err_drv_unsupported_opt_for_target)
         << A->getSpelling() << D.getTargetTriple();
   }

clang/lib/Driver/ToolChains/AMDGPU.cpp

AMDGPUToolChain::TranslateArgs(const DerivedArgList &Args, StringRef BoundArch,
 
   checkTargetID(*DAL);
 
   if (!Args.getLastArgValue(options::OPT_x).equals("cl"))
     return DAL;
 
   // Phase 1 (.cl -> .bc)
   if (Args.hasArg(options::OPT_c) && Args.hasArg(options::OPT_emit_llvm)) {
-    DAL->AddFlagArg(nullptr, Opts.getOption(getTriple().isArch64Bit()
-                                                ? options::OPT_m64
-                                                : options::OPT_m32));
+    DAL->AddFlagArg(nullptr,
+                    Opts.getOption(llvm::TripleUtils::isArch64Bit(getTriple())
 
     // Have to check OPT_O4, OPT_O0 & OPT_Ofast separately
     // as they defined that way in Options.td
     if (!Args.hasArg(options::OPT_O, options::OPT_O0, options::OPT_O4,
                      options::OPT_Ofast))
       DAL->AddJoinedArg(nullptr, Opts.getOption(options::OPT_O),
                         getOptionDefault(options::OPT_O));
   }

clang/lib/Driver/ToolChains/Clang.cpp

auto *DwarfFormatArg =
       Args.getLastArg(options::OPT_gdwarf64, options::OPT_gdwarf32);
   if (!DwarfFormatArg)
     return;
 
   if (DwarfFormatArg->getOption().matches(options::OPT_gdwarf64)) {
     if (DwarfVersion < 3)
       D.Diag(diag::err_drv_argument_only_allowed_with)
           << DwarfFormatArg->getAsString(Args) << "DWARFv3 or greater";
-    else if (!T.isArch64Bit())
+    else if (!llvm::TripleUtils::isArch64Bit(T))
       D.Diag(diag::err_drv_argument_only_allowed_with)
           << DwarfFormatArg->getAsString(Args) << "64 bit architecture";
     else if (!T.isOSBinFormatELF())
       D.Diag(diag::err_drv_argument_only_allowed_with)
           << DwarfFormatArg->getAsString(Args) << "ELF platforms";
   }
 
   DwarfFormatArg->render(Args, CmdArgs);

clang/lib/Driver/ToolChains/Cuda.cpp

 #include "llvm/Support/FormatAdapters.h"
 #include "llvm/Support/FormatVariadic.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/Process.h"
 #include "llvm/Support/Program.h"
 #include "llvm/Support/VirtualFileSystem.h"
 #include "llvm/TargetParser/Host.h"
 #include "llvm/TargetParser/TargetParser.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <system_error>
 
 using namespace clang::driver;
 using namespace clang::driver::toolchains;
 using namespace clang::driver::tools;
 using namespace clang;
 using namespace llvm::opt;
 
assert(gpu_arch != CudaArch::UNKNOWN &&
          "Device action expected to have an architecture.");
 
   // Check that our installation's ptxas supports gpu_arch.
   if (!Args.hasArg(options::OPT_no_cuda_version_check)) {
     TC.CudaInstallation.CheckCudaVersionSupportsArch(gpu_arch);
   }
 
   ArgStringList CmdArgs;
-  CmdArgs.push_back(TC.getTriple().isArch64Bit() ? "-m64" : "-m32");
+  CmdArgs.push_back(llvm::TripleUtils::isArch64Bit(TC.getTriple()) ? "-m64"
+                                                                   : "-m32");
   DeviceDebugInfoLevel DIKind = mustEmitDebugInfo(Args);
   if (DIKind == EmitSameDebugInfoAsHost) {
     // ptxas does not accept -g option if optimization is enabled, so
     // we ignore the compiler's -O* options if we want debug info.
     CmdArgs.push_back("-g");
     CmdArgs.push_back("--dont-merge-basicblocks");
     CmdArgs.push_back("--return-at-end");
   } else if (Arg *A = Args.getLastArg(options::OPT_O_Group)) {
void NVPTX::FatBinary::ConstructJob(Compilation &C, const JobAction &JA,
                                     const char *LinkingOutput) const {
   const auto &TC =
       static_cast<const toolchains::CudaToolChain &>(getToolChain());
   assert(TC.getTriple().isNVPTX() && "Wrong platform");
 
   ArgStringList CmdArgs;
   if (TC.CudaInstallation.version() <= CudaVersion::CUDA_100)
     CmdArgs.push_back("--cuda");
-  CmdArgs.push_back(TC.getTriple().isArch64Bit() ? "-64" : "-32");
+  CmdArgs.push_back(llvm::TripleUtils::isArch64Bit(TC.getTriple()) ? "-64"
+                                                                   : "-32");
   CmdArgs.push_back(Args.MakeArgString("--create"));
   CmdArgs.push_back(Args.MakeArgString(Output.getFilename()));
   if (mustEmitDebugInfo(Args) == EmitSameDebugInfoAsHost)
     CmdArgs.push_back("-g");
 
   for (const auto &II : Inputs) {
     auto *A = II.getAction();
     assert(A->getInputs().size() == 1 &&

clang/lib/Driver/ToolChains/Darwin.cpp

 #include "llvm/Option/ArgList.h"
 #include "llvm/ProfileData/InstrProf.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/ScopedPrinter.h"
 #include "llvm/Support/Threading.h"
 #include "llvm/Support/VirtualFileSystem.h"
 #include "llvm/TargetParser/TargetParser.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <cstdlib> // ::getenv
 
 using namespace clang::driver;
 using namespace clang::driver::tools;
 using namespace clang::driver::toolchains;
 using namespace clang;
 using namespace llvm::opt;
 
DarwinClang::DarwinClang(const Driver &D, const llvm::Triple &Triple,
     : Darwin(D, Triple, Args) {}
 
 void DarwinClang::addClangWarningOptions(ArgStringList &CC1Args) const {
   // Always error about undefined 'TARGET_OS_*' macros.
   CC1Args.push_back("-Wundef-prefix=TARGET_OS_");
   CC1Args.push_back("-Werror=undef-prefix");
 
   // For modern targets, promote certain warnings to errors.
-  if (isTargetWatchOSBased() || getTriple().isArch64Bit()) {
+  if (isTargetWatchOSBased() || llvm::TripleUtils::isArch64Bit(getTriple())) {
     // Always enable -Wdeprecated-objc-isa-usage and promote it
     // to an error.
     CC1Args.push_back("-Wdeprecated-objc-isa-usage");
     CC1Args.push_back("-Werror=deprecated-objc-isa-usage");
 
     // For iOS and watchOS, also error about implicit function declarations,
     // as that can impact calling conventions.
     if (!isTargetMacOS())
if (OSTarget->getEnvironment() == MacCatalyst &&
       getDriver().Diag(diag::err_drv_invalid_version_number)
           << OSTarget->getAsString(Args, Opts);
       Major = 13;
       Minor = 1;
       Micro = 0;
     }
     // For 32-bit targets, the deployment target for iOS has to be earlier than
     // iOS 11.
-    if (getTriple().isArch32Bit() && Major >= 11) {
+    if (llvm::TripleUtils::isArch32Bit(getTriple()) && Major >= 11) {
       // If the deployment target is explicitly specified, print a diagnostic.
       if (OSTarget->isExplicitlySpecified()) {
         if (OSTarget->getEnvironment() == MacCatalyst)
           getDriver().Diag(diag::err_invalid_macos_32bit_deployment_target);
         else
           getDriver().Diag(diag::warn_invalid_ios_deployment_target)
               << OSTarget->getAsString(Args, Opts);
         // Otherwise, set it to 10.99.99.

clang/lib/Driver/ToolChains/FreeBSD.cpp

 #include "CommonArgs.h"
 #include "clang/Config/config.h"
 #include "clang/Driver/Compilation.h"
 #include "clang/Driver/DriverDiagnostic.h"
 #include "clang/Driver/Options.h"
 #include "clang/Driver/SanitizerArgs.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/Support/VirtualFileSystem.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace clang::driver;
 using namespace clang::driver::tools;
 using namespace clang::driver::toolchains;
 using namespace clang;
 using namespace llvm::opt;
 
 void freebsd::Assembler::ConstructJob(Compilation &C, const JobAction &JA,

 /// FreeBSD - FreeBSD tool chain which can call as(1) and ld(1) directly.
 
 FreeBSD::FreeBSD(const Driver &D, const llvm::Triple &Triple,
                  const ArgList &Args)
     : Generic_ELF(D, Triple, Args) {
 
   // When targeting 32-bit platforms, look for '/usr/lib32/crt1.o' and fall
   // back to '/usr/lib' if it doesn't exist.
-  if (Triple.isArch32Bit() &&
+  if (llvm::TripleUtils::isArch32Bit(Triple) &&
       D.getVFS().exists(concat(getDriver().SysRoot, "/usr/lib32/crt1.o")))
     getFilePaths().push_back(concat(getDriver().SysRoot, "/usr/lib32"));
   else
     getFilePaths().push_back(concat(getDriver().SysRoot, "/usr/lib"));
 }
 
 unsigned FreeBSD::GetDefaultDwarfVersion() const {
   unsigned Major = getTriple().getOSMajorVersion();

clang/lib/Driver/ToolChains/Gnu.h

 //===--- Gnu.h - Gnu Tool and ToolChain Implementations ---------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_GNU_H
 #define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_GNU_H
 
 #include "Cuda.h"
 #include "LazyDetector.h"
 #include "ROCm.h"
 #include "clang/Driver/Tool.h"
 #include "clang/Driver/ToolChain.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <set>
 
 namespace clang {
 namespace driver {
 
 struct DetectedMultilibs {
   /// The set of multilibs that the detected installation supports.
   MultilibSet Multilibs;
protected:
   Tool *getTool(Action::ActionClass AC) const override;
   Tool *buildAssembler() const override;
   Tool *buildLinker() const override;
 
   /// \name ToolChain Implementation Helper Functions
   /// @{
 
   /// Check whether the target triple's architecture is 64-bits.
-  bool isTarget64Bit() const { return getTriple().isArch64Bit(); }
+  bool isTarget64Bit() const {
+    return llvm::TripleUtils::isArch64Bit(getTriple());
+  }
 
   /// Check whether the target triple's architecture is 32-bits.
-  bool isTarget32Bit() const { return getTriple().isArch32Bit(); }
+  bool isTarget32Bit() const {
+    return llvm::TripleUtils::isArch32Bit(getTriple());
+  }
 
   void PushPPaths(ToolChain::path_list &PPaths);
   void AddMultilibPaths(const Driver &D, const std::string &SysRoot,
                         const std::string &OSLibDir,
                         const std::string &MultiarchTriple,
                         path_list &Paths);
   void AddMultiarchPaths(const Driver &D, const std::string &SysRoot,
                          const std::string &OSLibDir, path_list &Paths);

clang/lib/Driver/ToolChains/Gnu.cpp

static bool findBiarchMultilibs(const Driver &D,
   // GCC toolchain for IAMCU doesn't have crtbegin.o, so look for libgcc.a.
   FilterNonExistent NonExistent(
       Path, TargetTriple.isOSIAMCU() ? "/libgcc.a" : "/crtbegin.o", D.getVFS());
 
   // Determine default multilib from: 32, 64, x32
   // Also handle cases such as 64 on 32, 32 on 64, etc.
   enum { UNKNOWN, WANT32, WANT64, WANTX32 } Want = UNKNOWN;
   const bool IsX32 = TargetTriple.isX32();
-  if (TargetTriple.isArch32Bit() && !NonExistent(Alt32))
+  if (llvm::TripleUtils::isArch32Bit(TargetTriple) && !NonExistent(Alt32))
     Want = WANT64;
-  if (TargetTriple.isArch32Bit() && !NonExistent(Alt32sparc))
+  if (llvm::TripleUtils::isArch32Bit(TargetTriple) && !NonExistent(Alt32sparc))
     Want = WANT64;
-  else if (TargetTriple.isArch64Bit() && IsX32 && !NonExistent(Altx32))
+  else if (llvm::TripleUtils::isArch64Bit(TargetTriple) && IsX32 &&
+           !NonExistent(Altx32))
     Want = WANT64;
-  else if (TargetTriple.isArch64Bit() && !IsX32 && !NonExistent(Alt64))
+  else if (llvm::TripleUtils::isArch64Bit(TargetTriple) && !IsX32 &&
+           !NonExistent(Alt64))
     Want = WANT32;
-  else if (TargetTriple.isArch64Bit() && !NonExistent(Alt32sparc))
+  else if (llvm::TripleUtils::isArch64Bit(TargetTriple) &&
+           !NonExistent(Alt32sparc))
     Want = WANT64;
   else {
-    if (TargetTriple.isArch32Bit())
+    if (llvm::TripleUtils::isArch32Bit(TargetTriple))
       Want = NeedsBiarchSuffix ? WANT64 : WANT32;
     else if (IsX32)
       Want = NeedsBiarchSuffix ? WANT64 : WANTX32;
     else
       Want = NeedsBiarchSuffix ? WANT32 : WANT64;
   }
 
   if (Want == WANT32)
static bool findBiarchMultilibs(const Driver &D,
   Result.Multilibs.push_back(Alt64);
   Result.Multilibs.push_back(Alt32);
   Result.Multilibs.push_back(Altx32);
   Result.Multilibs.push_back(Alt32sparc);
 
   Result.Multilibs.FilterOut(NonExistent);
 
   Multilib::flags_list Flags;
-  addMultilibFlag(TargetTriple.isArch64Bit() && !IsX32, "-m64", Flags);
-  addMultilibFlag(TargetTriple.isArch32Bit(), "-m32", Flags);
-  addMultilibFlag(TargetTriple.isArch64Bit() && IsX32, "-mx32", Flags);
+  addMultilibFlag(llvm::TripleUtils::isArch64Bit(TargetTriple) && !IsX32,
+                  "-m64", Flags);
+  addMultilibFlag(llvm::TripleUtils::isArch32Bit(TargetTriple), "-m32", Flags);
+  addMultilibFlag(llvm::TripleUtils::isArch64Bit(TargetTriple) && IsX32,
+                  "-mx32", Flags);
 
   if (!Result.Multilibs.select(Flags, Result.SelectedMultilibs))
     return false;
 
   if (Result.SelectedMultilibs.back() == Alt64 ||
       Result.SelectedMultilibs.back() == Alt32 ||
       Result.SelectedMultilibs.back() == Altx32 ||
       Result.SelectedMultilibs.back() == Alt32sparc)

 ///
 /// FIXME: We shouldn't need an explicit TargetTriple parameter here, and
 /// should instead pull the target out of the driver. This is currently
 /// necessary because the driver doesn't store the final version of the target
 /// triple.
 void Generic_GCC::GCCInstallationDetector::init(
     const llvm::Triple &TargetTriple, const ArgList &Args,
     ArrayRef<std::string> ExtraTripleAliases) {
-  llvm::Triple BiarchVariantTriple = TargetTriple.isArch32Bit()
-                                         ? TargetTriple.get64BitArchVariant()
-                                         : TargetTriple.get32BitArchVariant();
+  llvm::Triple BiarchVariantTriple =
+      llvm::TripleUtils::isArch32Bit(TargetTriple)
   // The library directories which may contain GCC installations.
   SmallVector<StringRef, 4> CandidateLibDirs, CandidateBiarchLibDirs;
   // The compatible GCC triples for this particular architecture.
   SmallVector<StringRef, 16> CandidateTripleAliases;
   SmallVector<StringRef, 16> CandidateBiarchTripleAliases;
   CollectLibDirsAndTriples(TargetTriple, BiarchVariantTriple, CandidateLibDirs,
                            CandidateTripleAliases, CandidateBiarchLibDirs,
                            CandidateBiarchTripleAliases);

clang/lib/Driver/ToolChains/Hurd.cpp

 //===--- Hurd.cpp - Hurd ToolChain Implementations --------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "Hurd.h"
 #include "CommonArgs.h"
 #include "clang/Config/config.h"
 #include "clang/Driver/Driver.h"
 #include "clang/Driver/Options.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/VirtualFileSystem.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace clang::driver;
 using namespace clang::driver::toolchains;
 using namespace clang;
 using namespace llvm::opt;
 
 using tools::addPathIfExists;
 
static StringRef getOSLibDir(const llvm::Triple &Triple, const ArgList &Args) {
   //
   // FIXME: This is a bit of a hack. We should really unify this code for
   // reasoning about oslibdir spellings with the lib dir spellings in the
   // GCCInstallationDetector, but that is a more significant refactoring.
 
   if (Triple.getArch() == llvm::Triple::x86)
     return "lib32";
 
-  return Triple.isArch32Bit() ? "lib" : "lib64";
+  return llvm::TripleUtils::isArch32Bit(Triple) ? "lib" : "lib64";
 }
 
 Hurd::Hurd(const Driver &D, const llvm::Triple &Triple, const ArgList &Args)
     : Generic_ELF(D, Triple, Args) {
   GCCInstallation.init(Triple, Args);
   Multilibs = GCCInstallation.getMultilibs();
   SelectedMultilibs.assign({GCCInstallation.getMultilib()});
   std::string SysRoot = computeSysRoot();

clang/lib/Driver/ToolChains/Linux.cpp

 #include "clang/Driver/Driver.h"
 #include "clang/Driver/Options.h"
 #include "clang/Driver/SanitizerArgs.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/ProfileData/InstrProf.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/ScopedPrinter.h"
 #include "llvm/Support/VirtualFileSystem.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <system_error>
 
 using namespace clang::driver;
 using namespace clang::driver::toolchains;
 using namespace clang;
 using namespace llvm::opt;
 
 using tools::addPathIfExists;
if (Triple.isAndroid()) {
       if (CPUName == "mips32r2")
         return "libr2";
     }
     // lib32 directory has a special meaning on MIPS targets.
     // It contains N32 ABI binaries. Use this folder if produce
     // code for N32 ABI only.
     if (tools::mips::hasMipsAbiArg(Args, "n32"))
       return "lib32";
-    return Triple.isArch32Bit() ? "lib" : "lib64";
+    return llvm::TripleUtils::isArch32Bit(Triple) ? "lib" : "lib64";
   }
 
   // It happens that only x86, PPC and SPARC use the 'lib32' variant of
   // oslibdir, and using that variant while targeting other architectures causes
   // problems because the libraries are laid out in shared system roots that
   // can't cope with a 'lib32' library search path being considered. So we only
   // enable them when we know we may need it.
   //
   // FIXME: This is a bit of a hack. We should really unify this code for
   // reasoning about oslibdir spellings with the lib dir spellings in the
   // GCCInstallationDetector, but that is a more significant refactoring.
   if (Triple.getArch() == llvm::Triple::x86 || Triple.isPPC32() ||
       Triple.getArch() == llvm::Triple::sparc)
     return "lib32";
 
   if (Triple.getArch() == llvm::Triple::x86_64 && Triple.isX32())
     return "libx32";
 
   if (Triple.getArch() == llvm::Triple::riscv32)
     return "lib32";
 
-  return Triple.isArch32Bit() ? "lib" : "lib64";
+  return llvm::TripleUtils::isArch32Bit(Triple) ? "lib" : "lib64";
 }
 
 Linux::Linux(const Driver &D, const llvm::Triple &Triple, const ArgList &Args)
     : Generic_ELF(D, Triple, Args) {
   GCCInstallation.init(Triple, Args);
   Multilibs = GCCInstallation.getMultilibs();
   SelectedMultilibs.assign({GCCInstallation.getMultilib()});
   llvm::Triple::ArchType Arch = Triple.getArch();
addPathIfExists(
         Paths);
   }
 
   addPathIfExists(D, concat(SysRoot, "/usr/lib", MultiarchTriple), Paths);
   // 64-bit OpenEmbedded sysroots may not have a /usr/lib dir. So they cannot
   // find /usr/lib64 as it is referenced as /usr/lib/../lib64. So we handle
   // this here.
   if (Triple.getVendor() == llvm::Triple::OpenEmbedded &&
-      Triple.isArch64Bit())
+      llvm::TripleUtils::isArch64Bit(Triple))
     addPathIfExists(D, concat(SysRoot, "/usr", OSLibDir), Paths);
   else
     addPathIfExists(D, concat(SysRoot, "/usr/lib/..", OSLibDir), Paths);
   if (IsRISCV) {
     StringRef ABIName = tools::riscv::getRISCVABI(Args, Triple);
     addPathIfExists(D, concat(SysRoot, "/", OSLibDir, ABIName), Paths);
     addPathIfExists(D, concat(SysRoot, "/usr", OSLibDir, ABIName), Paths);
   }

 std::string Linux::getDynamicLinker(const ArgList &Args) const {
   const llvm::Triple::ArchType Arch = getArch();
   const llvm::Triple &Triple = getTriple();
 
   const Distro Distro(getDriver().getVFS(), Triple);
 
   if (Triple.isAndroid()) {
     if (getSanitizerArgs(Args).needsHwasanRt() &&
-        !Triple.isAndroidVersionLT(34) && Triple.isArch64Bit()) {
+        !Triple.isAndroidVersionLT(34) &&
+        llvm::TripleUtils::isArch64Bit(Triple)) {
       // On Android 14 and newer, there is a special linker_hwasan64 that
       // allows to run HWASan binaries on non-HWASan system images. This
       // is also available on HWASan system images, so we can just always
       // use that instead.
       return "/system/bin/linker_hwasan64";
     }
-    return Triple.isArch64Bit() ? "/system/bin/linker64" : "/system/bin/linker";
+    return llvm::TripleUtils::isArch64Bit(Triple) ? "/system/bin/linker64"
+                                                  : "/system/bin/linker";
   }
   if (Triple.isMusl()) {
     std::string ArchName;
     bool IsArm = false;
 
     switch (Arch) {
     case llvm::Triple::arm:
     case llvm::Triple::thumb:

clang/lib/Driver/ToolChains/WebAssembly.cpp

 #include "clang/Driver/Compilation.h"
 #include "clang/Driver/Driver.h"
 #include "clang/Driver/DriverDiagnostic.h"
 #include "clang/Driver/Options.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/VirtualFileSystem.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace clang::driver;
 using namespace clang::driver::tools;
 using namespace clang::driver::toolchains;
 using namespace clang;
 using namespace llvm::opt;
 
 /// Following the conventions in https://wiki.debian.org/Multiarch/Tuples,
void wasm::Linker::ConstructJob(Compilation &C, const JobAction &JA,
                                 const ArgList &Args,
                                 const char *LinkingOutput) const {
 
   const ToolChain &ToolChain = getToolChain();
   const char *Linker = Args.MakeArgString(getLinkerPath(Args));
   ArgStringList CmdArgs;
 
   CmdArgs.push_back("-m");
-  if (ToolChain.getTriple().isArch64Bit())
+  if (llvm::TripleUtils::isArch64Bit(ToolChain.getTriple()))
     CmdArgs.push_back("wasm64");
   else
     CmdArgs.push_back("wasm32");
 
   if (Args.hasArg(options::OPT_s))
     CmdArgs.push_back("--strip-all");
 
   Args.AddAllArgs(CmdArgs, options::OPT_L);
static std::string AppendLTOLibDir(const std::string &Dir) {
     // LLVM in used, as the bitcode format is not stable.
     return Dir + "/llvm-lto/" LLVM_VERSION_STRING;
 }
 
 WebAssembly::WebAssembly(const Driver &D, const llvm::Triple &Triple,
                          const llvm::opt::ArgList &Args)
     : ToolChain(D, Triple, Args) {
 
-  assert(Triple.isArch32Bit() != Triple.isArch64Bit());
+  assert(llvm::TripleUtils::isArch32Bit(Triple) !=
+         llvm::TripleUtils::isArch64Bit(Triple));
 
   getProgramPaths().push_back(getDriver().getInstalledDir());
 
   auto SysRoot = getDriver().SysRoot;
   if (getTriple().getOS() == llvm::Triple::UnknownOS) {
     // Theoretically an "unknown" OS should mean no standard libraries, however
     // it could also mean that a custom set of libraries is in use, so just add
     // /lib to the search path. Disable multiarch in this case, to discourage

clang/lib/Frontend/CompilerInvocation.cpp

 #include "llvm/Support/Process.h"
 #include "llvm/Support/Regex.h"
 #include "llvm/Support/VersionTuple.h"
 #include "llvm/Support/VirtualFileSystem.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/TargetParser/Host.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <algorithm>
 #include <atomic>
 #include <cassert>
 #include <cstddef>
 #include <cstring>
 #include <ctime>
 #include <fstream>
 #include <limits>
if (Opts.OpenMPIsTargetDevice) {
     if (Args.hasArg(OPT_fopenmp_assume_threads_oversubscription))
       Opts.OpenMPThreadSubscription = true;
   }
 
   // Get the OpenMP target triples if any.
   if (Arg *A = Args.getLastArg(options::OPT_fopenmp_targets_EQ)) {
     enum ArchPtrSize { Arch16Bit, Arch32Bit, Arch64Bit };
     auto getArchPtrSize = [](const llvm::Triple &T) {
-      if (T.isArch16Bit())
+      if (llvm::TripleUtils::isArch16Bit(T))
         return Arch16Bit;
-      if (T.isArch32Bit())
+      if (llvm::TripleUtils::isArch32Bit(T))
         return Arch32Bit;
-      assert(T.isArch64Bit() && "Expected 64-bit architecture");
+      assert(llvm::TripleUtils::isArch64Bit(T) &&
+             "Expected 64-bit architecture");
       return Arch64Bit;
     };
 
     for (unsigned i = 0; i < A->getNumValues(); ++i) {
       llvm::Triple TT(A->getValue(i));
 
       if (TT.getArch() == llvm::Triple::UnknownArch ||
           !(TT.getArch() == llvm::Triple::aarch64 || TT.isPPC() ||

clang/lib/Sema/SemaType.cpp

 #include "clang/Sema/Template.h"
 #include "clang/Sema/TemplateInstCallback.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/SmallPtrSet.h"
 #include "llvm/ADT/SmallString.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/IR/DerivedTypes.h"
 #include "llvm/Support/ErrorHandling.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <bitset>
 #include <optional>
 
 using namespace clang;
 
 enum TypeDiagSelector {
   TDS_Function,
   TDS_Pointer,
if (IsPolyUnsigned) {
       return BTy->getKind() == BuiltinType::SChar ||
              BTy->getKind() == BuiltinType::Short ||
              BTy->getKind() == BuiltinType::LongLong;
     }
   }
 
   // Non-polynomial vector types: the usual suspects are allowed, as well as
   // float64_t on AArch64.
-  if ((Triple.isArch64Bit() || Triple.getArch() == llvm::Triple::aarch64_32) &&
+  if ((llvm::TripleUtils::isArch64Bit(Triple) ||
+       Triple.getArch() == llvm::Triple::aarch64_32) &&
       BTy->getKind() == BuiltinType::Double)
     return true;
 
   return BTy->getKind() == BuiltinType::SChar ||
          BTy->getKind() == BuiltinType::UChar ||
          BTy->getKind() == BuiltinType::Short ||
          BTy->getKind() == BuiltinType::UShort ||
          BTy->getKind() == BuiltinType::Int ||

clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp

 #include "llvm/Support/Signals.h"
 #include "llvm/Support/SourceMgr.h"
 #include "llvm/Support/StringSaver.h"
 #include "llvm/Support/TargetSelect.h"
 #include "llvm/Support/WithColor.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/TargetParser/Host.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <atomic>
 #include <optional>
 
 using namespace llvm;
 using namespace llvm::opt;
 using namespace llvm::object;
 
 /// Path of the current binary.
fatbinary(ArrayRef<std::pair<StringRef, StringRef>> InputFiles,
   // Create a new file to write the linked device image to.
   auto TempFileOrErr =
       createOutputFile(sys::path::filename(ExecutableName), "fatbin");
   if (!TempFileOrErr)
     return TempFileOrErr.takeError();
 
   SmallVector<StringRef, 16> CmdArgs;
   CmdArgs.push_back(*FatBinaryPath);
-  CmdArgs.push_back(Triple.isArch64Bit() ? "-64" : "-32");
+  CmdArgs.push_back(llvm::TripleUtils::isArch64Bit(Triple) ? "-64" : "-32");
   CmdArgs.push_back("--create");
   CmdArgs.push_back(*TempFileOrErr);
   for (const auto &[File, Arch] : InputFiles)
     CmdArgs.push_back(
         Args.MakeArgString("--image=profile=" + Arch + ",file=" + File));
 
   if (Error Err = executeCommands(*FatBinaryPath, CmdArgs))
     return std::move(Err);

lld/ELF/InputFiles.cpp

 #include "llvm/Support/ARMAttributeParser.h"
 #include "llvm/Support/ARMBuildAttributes.h"
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/RISCVAttributeParser.h"
 #include "llvm/Support/TarWriter.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
 using namespace llvm::sys;
 using namespace llvm::sys::fs;
 using namespace llvm::support::endian;
 using namespace lld;
auto *s = symtab.addSymbol(
                      sym.getType(), sym.st_value, sym.st_size, alignment});
     if (s->file == this)
       s->verdefIndex = idx;
   }
 }
 
 static ELFKind getBitcodeELFKind(const Triple &t) {
   if (t.isLittleEndian())
-    return t.isArch64Bit() ? ELF64LEKind : ELF32LEKind;
-  return t.isArch64Bit() ? ELF64BEKind : ELF32BEKind;
+    return TripleUtils::isArch64Bit(t) ? ELF64LEKind : ELF32LEKind;
+  return TripleUtils::isArch64Bit(t) ? ELF64BEKind : ELF32BEKind;
 }
 
 static uint16_t getBitcodeMachineKind(StringRef path, const Triple &t) {
   switch (t.getArch()) {
   case Triple::aarch64:
   case Triple::aarch64_be:
     return EM_AARCH64;
   case Triple::amdgcn:

lldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp

 #include "lldb/Utility/LLDBLog.h"
 #include "lldb/Utility/Log.h"
 #include "lldb/Utility/State.h"
 #include "lldb/Utility/Status.h"
 #include "lldb/Utility/StreamString.h"
 
 #include "llvm/TargetParser/Host.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 // Define these constants from FreeBSD mman.h for use when targeting remote
 // FreeBSD systems even when host has different values.
 #define MAP_PRIVATE 0x0002
 #define MAP_ANON 0x1000
 
 using namespace lldb;
 using namespace lldb_private;

 
 /// Default Constructor
 PlatformFreeBSD::PlatformFreeBSD(bool is_host)
     : PlatformPOSIX(is_host) // This is the local host platform
 {
   if (is_host) {
     ArchSpec hostArch = HostInfo::GetArchitecture(HostInfo::eArchKindDefault);
     m_supported_architectures.push_back(hostArch);
-    if (hostArch.GetTriple().isArch64Bit()) {
+    if (llvm::TripleUtils::isArch64Bit(hostArch.GetTriple())) {
       m_supported_architectures.push_back(
           HostInfo::GetArchitecture(HostInfo::eArchKind32));
     }
   } else {
     m_supported_architectures = CreateArchList(
         {llvm::Triple::x86_64, llvm::Triple::x86, llvm::Triple::aarch64,
          llvm::Triple::arm, llvm::Triple::mips64, llvm::Triple::ppc64,
          llvm::Triple::ppc},

lldb/source/Plugins/Platform/Linux/PlatformLinux.cpp

 #include "lldb/Target/Process.h"
 #include "lldb/Target/Target.h"
 #include "lldb/Utility/FileSpec.h"
 #include "lldb/Utility/LLDBLog.h"
 #include "lldb/Utility/Log.h"
 #include "lldb/Utility/State.h"
 #include "lldb/Utility/Status.h"
 #include "lldb/Utility/StreamString.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 // Define these constants from Linux mman.h for use when targeting remote linux
 // systems even when host has different values.
 #define MAP_PRIVATE 2
 #define MAP_ANON 0x20
 
 using namespace lldb;
 using namespace lldb_private;

 
 /// Default Constructor
 PlatformLinux::PlatformLinux(bool is_host)
     : PlatformPOSIX(is_host) // This is the local host platform
 {
   if (is_host) {
     ArchSpec hostArch = HostInfo::GetArchitecture(HostInfo::eArchKindDefault);
     m_supported_architectures.push_back(hostArch);
-    if (hostArch.GetTriple().isArch64Bit()) {
+    if (llvm::TripleUtils::isArch64Bit(hostArch.GetTriple())) {
       m_supported_architectures.push_back(
           HostInfo::GetArchitecture(HostInfo::eArchKind32));
     }
   } else {
     m_supported_architectures = CreateArchList(
         {llvm::Triple::x86_64, llvm::Triple::x86, llvm::Triple::arm,
          llvm::Triple::aarch64, llvm::Triple::mips64, llvm::Triple::mips64,
          llvm::Triple::hexagon, llvm::Triple::mips, llvm::Triple::mips64el,
CompilerType PlatformLinux::GetSiginfoType(const llvm::Triple &triple) {
   } else {
     ast->AddFieldToRecordType(siginfo_type, "si_code", int_type,
                               lldb::eAccessPublic, 0);
     ast->AddFieldToRecordType(siginfo_type, "si_errno", int_type,
                               lldb::eAccessPublic, 0);
   }
 
   // the structure is padded on 64-bit arches to fix alignment
-  if (triple.isArch64Bit())
+  if (llvm::TripleUtils::isArch64Bit(triple))
     ast->AddFieldToRecordType(siginfo_type, "__pad0", int_type,
                               lldb::eAccessPublic, 0);
 
   // union used to hold the signal data
   CompilerType union_type = ast->CreateRecordType(
       nullptr, OptionalClangModuleID(), lldb::eAccessPublic, "",
       clang::TTK_Union, lldb::eLanguageTypeC);
   ast->StartTagDeclarationDefinition(union_type);

lldb/source/Plugins/Platform/NetBSD/PlatformNetBSD.cpp

 #include "lldb/Target/Process.h"
 #include "lldb/Target/Target.h"
 #include "lldb/Utility/FileSpec.h"
 #include "lldb/Utility/LLDBLog.h"
 #include "lldb/Utility/Log.h"
 #include "lldb/Utility/State.h"
 #include "lldb/Utility/Status.h"
 #include "lldb/Utility/StreamString.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 // Define these constants from NetBSD mman.h for use when targeting remote
 // netbsd systems even when host has different values.
 #define MAP_PRIVATE 0x0002
 #define MAP_ANON 0x1000
 
 using namespace lldb;
 using namespace lldb_private;

 
 /// Default Constructor
 PlatformNetBSD::PlatformNetBSD(bool is_host)
     : PlatformPOSIX(is_host) // This is the local host platform
 {
   if (is_host) {
     ArchSpec hostArch = HostInfo::GetArchitecture(HostInfo::eArchKindDefault);
     m_supported_architectures.push_back(hostArch);
-    if (hostArch.GetTriple().isArch64Bit()) {
+    if (llvm::TripleUtils::isArch64Bit(hostArch.GetTriple())) {
       m_supported_architectures.push_back(
           HostInfo::GetArchitecture(HostInfo::eArchKind32));
     }
   } else {
     m_supported_architectures = CreateArchList(
         {llvm::Triple::x86_64, llvm::Triple::x86}, llvm::Triple::NetBSD);
   }
 }
CompilerType PlatformNetBSD::GetSiginfoType(const llvm::Triple &triple) {
   ast->AddFieldToRecordType(ksiginfo_type, "_signo", int_type,
                             lldb::eAccessPublic, 0);
   ast->AddFieldToRecordType(ksiginfo_type, "_code", int_type,
                             lldb::eAccessPublic, 0);
   ast->AddFieldToRecordType(ksiginfo_type, "_errno", int_type,
                             lldb::eAccessPublic, 0);
 
   // the structure is padded on 64-bit arches to fix alignment
-  if (triple.isArch64Bit())
+  if (llvm::TripleUtils::isArch64Bit(triple))
     ast->AddFieldToRecordType(ksiginfo_type, "__pad0", int_type,
                               lldb::eAccessPublic, 0);
 
   // union used to hold the signal data
   CompilerType union_type = ast->CreateRecordType(
       nullptr, OptionalClangModuleID(), lldb::eAccessPublic, "",
       clang::TTK_Union, lldb::eLanguageTypeC);
   ast->StartTagDeclarationDefinition(union_type);

lldb/source/Plugins/Platform/gdb-server/PlatformRemoteGDBServer.cpp

 #include "lldb/Utility/ProcessInfo.h"
 #include "lldb/Utility/Status.h"
 #include "lldb/Utility/StreamString.h"
 #include "lldb/Utility/UriParser.h"
 #include "llvm/Support/FormatAdapters.h"
 
 #include "Plugins/Process/Utility/GDBRemoteSignals.h"
 #include "Plugins/Process/gdb-remote/ProcessGDBRemote.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <optional>
 
 using namespace lldb;
 using namespace lldb_private;
 using namespace lldb_private::platform_gdb_server;
 
 LLDB_PLUGIN_DEFINE_ADV(PlatformRemoteGDBServer, PlatformGDB)
 
if (client_up->HandshakeWithServer(&error)) {
     // now.
     if (m_working_dir)
       m_gdb_client_up->SetWorkingDir(m_working_dir);
 
     m_supported_architectures.clear();
     ArchSpec remote_arch = m_gdb_client_up->GetSystemArchitecture();
     if (remote_arch) {
       m_supported_architectures.push_back(remote_arch);
-      if (remote_arch.GetTriple().isArch64Bit())
+      if (llvm::TripleUtils::isArch64Bit(remote_arch.GetTriple()))
         m_supported_architectures.push_back(
             ArchSpec(remote_arch.GetTriple().get32BitArchVariant()));
     }
   } else {
     client_up->Disconnect();
     if (error.Success())
       error.SetErrorString("handshake failed");
   }

llvm/include/llvm/CodeGen/BasicTTIImpl.h

 #include "llvm/IR/Type.h"
 #include "llvm/IR/Value.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetOptions.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <algorithm>
 #include <cassert>
 #include <cstdint>
 #include <limits>
 #include <optional>
 #include <utility>
 
 namespace llvm {
bool shouldBuildRelLookupTables() const {
     /// Relative lookup table entries consist of 32-bit offsets.
     /// Do not generate relative lookup tables for large code models
     /// in 64-bit achitectures where 32-bit offsets might not be enough.
     if (TM.getCodeModel() == CodeModel::Medium ||
         TM.getCodeModel() == CodeModel::Large)
       return false;
 
     Triple TargetTriple = TM.getTargetTriple();
-    if (!TargetTriple.isArch64Bit())
+    if (!TripleUtils::isArch64Bit(TargetTriple))
       return false;
 
     // TODO: Triggers issues on aarch64 on darwin, so temporarily disable it
     // there.
     if (TargetTriple.getArch() == Triple::aarch64 && TargetTriple.isOSDarwin())
       return false;
 
     return true;

llvm/include/llvm/Object/IRObjectFile.h

 
 #ifndef LLVM_OBJECT_IROBJECTFILE_H
 #define LLVM_OBJECT_IROBJECTFILE_H
 
 #include "llvm/Bitcode/BitcodeReader.h"
 #include "llvm/Object/IRSymtab.h"
 #include "llvm/Object/ModuleSymbolTable.h"
 #include "llvm/Object/SymbolicFile.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 namespace llvm {
 class Module;
 
 namespace object {
 class ObjectFile;
 
 class IRObjectFile : public SymbolicFile {
   std::vector<std::unique_ptr<Module>> Mods;
   ModuleSymbolTable SymTab;
   IRObjectFile(MemoryBufferRef Object,
                std::vector<std::unique_ptr<Module>> Mods);
 
 public:
   ~IRObjectFile() override;
   void moveSymbolNext(DataRefImpl &Symb) const override;
   Error printSymbolName(raw_ostream &OS, DataRefImpl Symb) const override;
   Expected<uint32_t> getSymbolFlags(DataRefImpl Symb) const override;
   basic_symbol_iterator symbol_begin() const override;
   basic_symbol_iterator symbol_end() const override;
   bool is64Bit() const override {
-    return Triple(getTargetTriple()).isArch64Bit();
+    return TripleUtils::isArch64Bit(Triple(getTargetTriple()));
   }
   StringRef getTargetTriple() const;
 
   static bool classof(const Binary *v) {
     return v->isIR();
   }
 
   using module_iterator =

llvm/include/llvm/TargetParser/Triple.h

public:
 
   /// Test whether the architecture is 64-bit
   ///
   /// Note that this tests for 64-bit pointer width, and nothing else. Note
   /// that we intentionally expose only three predicates, 64-bit, 32-bit, and
   /// 16-bit. The inner details of pointer width for particular architectures
   /// is not summed up in the triple, and so only a coarse grained predicate
   /// system is provided.
-  bool isArch64Bit() const;
+  [[deprecated("Use TripleUtils::isArch64Bit(const llvm::Triple& tripleImpl) "
+               "instead.")]] bool
+  isArch64Bit() const;
 
   /// Test whether the architecture is 32-bit
   ///
   /// Note that this tests for 32-bit pointer width, and nothing else.
-  bool isArch32Bit() const;
+  [[deprecated("Use TripleUtils::isArch32Bit(const llvm::Triple& tripleImpl) "
+               "instead.")]] bool
+  isArch32Bit() const;
 
   /// Test whether the architecture is 16-bit
   ///
   /// Note that this tests for 16-bit pointer width, and nothing else.
-  bool isArch16Bit() const;
+  [[deprecated("Use TripleUtils::isArch16Bit(const llvm::Triple& tripleImpl) "
+               "instead.")]] bool
+  isArch16Bit() const;
 
   /// Helper function for doing comparisons against version numbers included in
   /// the target triple.
   bool isOSVersionLT(unsigned Major, unsigned Minor = 0,
                      unsigned Micro = 0) const {
     if (Minor == 0) {
       return getOSVersion() < VersionTuple(Major);
     }
public:
   }
 
   /// Tests whether the target is the PS4 or PS5 platform.
   bool isPS() const { return isPS4() || isPS5(); }
 
   /// Tests whether the target is Android
   bool isAndroid() const { return getEnvironment() == Triple::Android; }
 
-  bool isAndroidVersionLT(unsigned Major) const {
-    assert(isAndroid() && "Not an Android triple!");
-
-    VersionTuple Version = getEnvironmentVersion();
-
-    // 64-bit targets did not exist before API level 21 (Lollipop).
-    if (isArch64Bit() && Version.getMajor() < 21)
-      return VersionTuple(21) < VersionTuple(Major);
-
-    return Version < VersionTuple(Major);
-  }
+  bool isAndroidVersionLT(unsigned Major) const;
 
   /// Tests whether the environment is musl-libc
   bool isMusl() const {
     return getEnvironment() == Triple::Musl ||
            getEnvironment() == Triple::MuslEABI ||
            getEnvironment() == Triple::MuslEABIHF ||
            getEnvironment() == Triple::MuslX32 ||
            getEnvironment() == Triple::OpenHOS || isOSLiteOS();

llvm/include/llvm/TargetParser/TripleUtils.h

+//===-- llvm/TargetParser/TripleUtils.h - Triple Utils class--*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_TARGETPARSER_TRIPLE_UTILS_H
+#define LLVM_TARGETPARSER_TRIPLE_UTILS_H
+
+#include "llvm/TargetParser/Triple.h"
+#include <string>
+
+namespace llvm {
+
+class TripleUtils {
+public:
+  /// Test whether the architecture is 16-bit
+  ///
+  /// Note that this tests for 16-bit pointer width, and nothing else.
+
+  static bool isArch16Bit(const Triple &tripleImpl);
+
+  static bool isArch32Bit(const Triple &tripleImpl);
+
+  static bool isArch64Bit(const Triple &tripleImpl);
+};
+
+} // namespace llvm
+
+#endif
 No newline at end of file

llvm/lib/Analysis/TargetLibraryInfo.cpp

 //
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Analysis/TargetLibraryInfo.h"
 #include "llvm/IR/Constants.h"
 #include "llvm/InitializePasses.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 using namespace llvm;
 
 static cl::opt<TargetLibraryInfoImpl::VectorLibrary> ClVectorLibrary(
     "vector-library", cl::Hidden, cl::desc("Vector functions library"),
     cl::init(TargetLibraryInfoImpl::NoLibrary),
     cl::values(clEnumValN(TargetLibraryInfoImpl::NoLibrary, "none",
                           "No vector functions library"),
                clEnumValN(TargetLibraryInfoImpl::Accelerate, "Accelerate",
static void initialize(TargetLibraryInfoImpl &TLI, const Triple &T,
   TLI.setShouldExtI32Param(ShouldExtI32Param);
   TLI.setShouldExtI32Return(ShouldExtI32Return);
   TLI.setShouldSignExtI32Param(ShouldSignExtI32Param);
   TLI.setShouldSignExtI32Return(ShouldSignExtI32Return);
 
   // Let's assume by default that the size of int is 32 bits, unless the target
   // is a 16-bit architecture because then it most likely is 16 bits. If that
   // isn't true for a target those defaults should be overridden below.
-  TLI.setIntSize(T.isArch16Bit() ? 16 : 32);
+  TLI.setIntSize(llvm::TripleUtils::isArch16Bit(T) ? 16 : 32);
 
   // There is really no runtime library on AMDGPU, apart from
   // __kmpc_alloc/free_shared.
   if (T.isAMDGPU()) {
     TLI.disableAllFunctions();
     TLI.setAvailable(llvm::LibFunc___kmpc_alloc_shared);
     TLI.setAvailable(llvm::LibFunc___kmpc_free_shared);
     return;

llvm/lib/BinaryFormat/MachO.cpp

 //===-- llvm/BinaryFormat/MachO.cpp - The MachO file format -----*- C++/-*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "llvm/BinaryFormat/MachO.h"
 #include "llvm/TargetParser/ARMTargetParser.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 
 static MachO::CPUSubTypeX86 getX86SubType(const Triple &T) {
   assert(T.isX86());
-  if (T.isArch32Bit())
+  if (TripleUtils::isArch32Bit(T))
     return MachO::CPU_SUBTYPE_I386_ALL;
 
-  assert(T.isArch64Bit());
+  assert(TripleUtils::isArch64Bit(T));
   if (T.getArchName() == "x86_64h")
     return MachO::CPU_SUBTYPE_X86_64_H;
   return MachO::CPU_SUBTYPE_X86_64_ALL;
 }
 
 static MachO::CPUSubTypeARM getARMSubType(const Triple &T) {
   assert(T.isARM() || T.isThumb());
   StringRef Arch = T.getArchName();
case ARM::ArchKind::ARMV7M:
     return MachO::CPU_SUBTYPE_ARM_V7M;
   case ARM::ArchKind::ARMV7EM:
     return MachO::CPU_SUBTYPE_ARM_V7EM;
   }
 }
 
 static MachO::CPUSubTypeARM64 getARM64SubType(const Triple &T) {
   assert(T.isAArch64());
-  if (T.isArch32Bit())
+  if (TripleUtils::isArch32Bit(T))
     return (MachO::CPUSubTypeARM64)MachO::CPU_SUBTYPE_ARM64_32_V8;
   if (T.isArm64e())
     return MachO::CPU_SUBTYPE_ARM64E;
 
   return MachO::CPU_SUBTYPE_ARM64_ALL;
 }
 
 static MachO::CPUSubTypePowerPC getPowerPCSubType(const Triple &T) {
   return MachO::CPU_SUBTYPE_POWERPC_ALL;
 }
 
 static Error unsupported(const char *Str, const Triple &T) {
   return createStringError(std::errc::invalid_argument,
                            "Unsupported triple for mach-o cpu %s: %s", Str,
                            T.str().c_str());
 }
 
 Expected<uint32_t> MachO::getCPUType(const Triple &T) {
   if (!T.isOSBinFormatMachO())
     return unsupported("type", T);
-  if (T.isX86() && T.isArch32Bit())
+  if (T.isX86() && TripleUtils::isArch32Bit(T))
     return MachO::CPU_TYPE_X86;
-  if (T.isX86() && T.isArch64Bit())
+  if (T.isX86() && TripleUtils::isArch64Bit(T))
     return MachO::CPU_TYPE_X86_64;
   if (T.isARM() || T.isThumb())
     return MachO::CPU_TYPE_ARM;
   if (T.isAArch64())
-    return T.isArch32Bit() ? MachO::CPU_TYPE_ARM64_32 : MachO::CPU_TYPE_ARM64;
+    return TripleUtils::isArch32Bit(T) ? MachO::CPU_TYPE_ARM64_32
+                                       : MachO::CPU_TYPE_ARM64;
   if (T.getArch() == Triple::ppc)
     return MachO::CPU_TYPE_POWERPC;
   if (T.getArch() == Triple::ppc64)
     return MachO::CPU_TYPE_POWERPC64;
   return unsupported("type", T);
 }
 
 Expected<uint32_t> MachO::getCPUSubType(const Triple &T) {

llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp

 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MD5.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetLoweringObjectFile.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <algorithm>
 #include <cstddef>
 #include <iterator>
 #include <optional>
 #include <string>
 
 using namespace llvm;
 
DwarfDebug::DwarfDebug(AsmPrinter *A)
 
   unsigned DwarfVersionNumber = Asm->TM.Options.MCOptions.DwarfVersion;
   unsigned DwarfVersion = DwarfVersionNumber ? DwarfVersionNumber
                                     : MMI->getModule()->getDwarfVersion();
   // Use dwarf 4 by default if nothing is requested. For NVPTX, use dwarf 2.
   DwarfVersion =
       TT.isNVPTX() ? 2 : (DwarfVersion ? DwarfVersion : dwarf::DWARF_VERSION);
 
-  bool Dwarf64 = DwarfVersion >= 3 && // DWARF64 was introduced in DWARFv3.
-                 TT.isArch64Bit();    // DWARF64 requires 64-bit relocations.
+  bool Dwarf64 =
+      DwarfVersion >= 3 &&          // DWARF64 was introduced in DWARFv3.
+      TripleUtils::isArch64Bit(TT); // DWARF64 requires 64-bit relocations.
 
   // Support DWARF64
   // 1: For ELF when requested.
   // 2: For XCOFF64: the AIX assembler will fill in debug section lengths
   //    according to the DWARF64 format for 64-bit assembly, so we must use
   //    DWARF64 in the compiler too for 64-bit mode.
   Dwarf64 &=
       ((Asm->TM.Options.MCOptions.Dwarf64 || MMI->getModule()->isDwarf64()) &&
        TT.isOSBinFormatELF()) ||
       TT.isOSBinFormatXCOFF();
 
-  if (!Dwarf64 && TT.isArch64Bit() && TT.isOSBinFormatXCOFF())
+  if (!Dwarf64 && TripleUtils::isArch64Bit(TT) && TT.isOSBinFormatXCOFF())
     report_fatal_error("XCOFF requires DWARF64 for 64-bit mode!");
 
   UseRangesSection = !NoDwarfRangesSection && !TT.isNVPTX();
 
   // Use sections as references. Force for NVPTX.
   if (DwarfSectionsAsReferences == Default)
     UseSectionsAsReferences = TT.isNVPTX();
   else

llvm/lib/CodeGen/TargetLoweringBase.cpp

 #include "llvm/Support/Casting.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include "llvm/Transforms/Utils/SizeOpts.h"
 #include <algorithm>
 #include <cassert>
 #include <cstdint>
 #include <cstring>
 #include <iterator>
 #include <string>
 #include <tuple>

 
 static bool darwinHasSinCos(const Triple &TT) {
   assert(TT.isOSDarwin() && "should be called with darwin triple");
   // Don't bother with 32 bit x86.
   if (TT.getArch() == Triple::x86)
     return false;
   // Macos < 10.9 has no sincos_stret.
   if (TT.isMacOSX())
-    return !TT.isMacOSXVersionLT(10, 9) && TT.isArch64Bit();
+    return !TT.isMacOSXVersionLT(10, 9) && TripleUtils::isArch64Bit(TT);
   // iOS < 7.0 has no sincos_stret.
   if (TT.isiOS())
     return !TT.isOSVersionLT(7, 0);
   // Any other darwin such as WatchOS/TvOS is new enough.
   return true;
 }
 
 void TargetLoweringBase::InitLibcalls(const Triple &TT) {

llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp

 #include "llvm/Support/Base64.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/CodeGen.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/Format.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <cassert>
 #include <string>
 
 using namespace llvm;
 using namespace dwarf;
 
 static cl::opt<bool> JumpTableInFunctionSection(
     "jumptable-in-function-section", cl::Hidden, cl::init(false),
MCSection *TargetLoweringObjectFileXCOFF::getSectionForConstant(
   }
 
   return ReadOnlySection;
 }
 
 void TargetLoweringObjectFileXCOFF::Initialize(MCContext &Ctx,
                                                const TargetMachine &TgtM) {
   TargetLoweringObjectFile::Initialize(Ctx, TgtM);
-  TTypeEncoding =
-      dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_datarel |
-      (TgtM.getTargetTriple().isArch32Bit() ? dwarf::DW_EH_PE_sdata4
-                                            : dwarf::DW_EH_PE_sdata8);
+  TTypeEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_datarel |
+                  (llvm::TripleUtils::isArch32Bit(TgtM.getTargetTriple())
+                       ? dwarf::DW_EH_PE_sdata4
   PersonalityEncoding = 0;
   LSDAEncoding = 0;
   CallSiteEncoding = dwarf::DW_EH_PE_udata4;
 
   // AIX debug for thread local location is not ready. And for integrated as
   // mode, the relocatable address for the thread local variable will cause
   // linker error. So disable the location attribute generation for thread local
   // variables for now.

llvm/lib/CodeGen/WinEHPrepare.cpp

 #include "llvm/IR/Instructions.h"
 #include "llvm/IR/Verifier.h"
 #include "llvm/InitializePasses.h"
 #include "llvm/Pass.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
 #include "llvm/Transforms/Utils/Cloning.h"
 #include "llvm/Transforms/Utils/Local.h"
 #include "llvm/Transforms/Utils/SSAUpdater.h"
 
 using namespace llvm;
 
 #define DEBUG_TYPE "winehprepare"
if (auto *CatchSwitch = dyn_cast<CatchSwitchInst>(FirstNonPHI)) {
 
     // catchpads are separate funclets in C++ EH due to the way rethrow works.
     int TryHigh = CatchLow - 1;
 
     // MSVC FrameHandler3/4 on x64&Arm64 expect Catch Handlers in $tryMap$
     //  stored in pre-order (outer first, inner next), not post-order
     //  Add to map here.  Fix the CatchHigh after children are processed
     const Module *Mod = BB->getParent()->getParent();
-    bool IsPreOrder = Triple(Mod->getTargetTriple()).isArch64Bit();
+    bool IsPreOrder = TripleUtils::isArch64Bit(Triple(Mod->getTargetTriple()));
     if (IsPreOrder)
       addTryBlockMapEntry(FuncInfo, TryLow, TryHigh, CatchLow, Handlers);
     unsigned TBMEIdx = FuncInfo.TryBlockMap.size() - 1;
 
     for (const auto *CatchPad : Handlers) {
       FuncInfo.FuncletBaseStateMap[CatchPad] = CatchLow;
       FuncInfo.EHPadStateMap[CatchPad] = CatchLow;
       for (const User *U : CatchPad->users()) {

llvm/lib/DWARFLinker/DWARFStreamer.cpp

 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCTargetOptions.h"
 #include "llvm/MC/MCTargetOptionsCommandFlags.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/FormatVariadic.h"
 #include "llvm/Support/LEB128.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 namespace llvm {
 
 Error DwarfStreamer::init(Triple TheTriple,
                           StringRef Swift5ReflectionSegmentName) {
   std::string ErrorStr;
   std::string TripleName;
 

 
 /// Emit DIE containing warnings.
 void DwarfStreamer::emitPaperTrailWarningsDie(DIE &Die) {
   switchToDebugInfoSection(/* Version */ 2);
   auto &Asm = getAsmPrinter();
   Asm.emitInt32(11 + Die.getSize() - 4);
   Asm.emitInt16(2);
   Asm.emitInt32(0);
-  Asm.emitInt8(MC->getTargetTriple().isArch64Bit() ? 8 : 4);
+  Asm.emitInt8(llvm::TripleUtils::isArch64Bit(MC->getTargetTriple()) ? 8 : 4);
   DebugInfoSectionSize += 11;
   emitDIE(Die);
 }
 
 /// Emit the debug_str section stored in \p Pool.
 void DwarfStreamer::emitStrings(const NonRelocatableStringpool &Pool) {
   Asm->OutStreamer->switchSection(MOFI->getDwarfStrSection());
   std::vector<DwarfStringPoolEntryRef> Entries = Pool.getEntriesForEmission();

llvm/lib/IR/AutoUpgrade.cpp

 #include "llvm/IR/LLVMContext.h"
 #include "llvm/IR/Metadata.h"
 #include "llvm/IR/Module.h"
 #include "llvm/IR/Verifier.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/Regex.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <cstring>
 
 using namespace llvm;
 
 static cl::opt<bool>
     DisableAutoUpgradeDebugInfo("disable-auto-upgrade-debug-info",
                                 cl::desc("Disable autoupgrade of debug info"));
 
if (!DL.contains(AddrSpaces)) {
     Regex R("(e-m:[a-z](-p:32:32)?)(-[if]64:.*$)");
     if (R.match(DL, &Groups))
       Res = (Groups[1] + AddrSpaces + Groups[3]).str();
   }
 
   // For 32-bit MSVC targets, raise the alignment of f80 values to 16 bytes.
   // Raising the alignment is safe because Clang did not produce f80 values in
   // the MSVC environment before this upgrade was added.
-  if (T.isWindowsMSVCEnvironment() && !T.isArch64Bit()) {
+  if (T.isWindowsMSVCEnvironment() && !TripleUtils::isArch64Bit(T)) {
     StringRef Ref = Res;
     auto I = Ref.find("-f80:32-");
     if (I != StringRef::npos)
       Res = (Ref.take_front(I) + "-f80:128-" + Ref.drop_front(I + 8)).str();
   }
 
   return Res;
 }

llvm/lib/InterfaceStub/IFSHandler.cpp

 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/BinaryFormat/ELF.h"
 #include "llvm/InterfaceStub/IFSStub.h"
 #include "llvm/Support/Error.h"
 #include "llvm/Support/GlobPattern.h"
 #include "llvm/Support/LineIterator.h"
 #include "llvm/Support/YAMLTraits.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <functional>
 #include <optional>
 
 using namespace llvm;
 using namespace llvm::ifs;
 
 LLVM_YAML_IS_SEQUENCE_VECTOR(IFSSymbol)
 
IFSTarget ifs::parseTriple(StringRef TripleStr) {
   case Triple::ArchType::riscv64:
     RetTarget.Arch = (IFSArch)ELF::EM_RISCV;
     break;
   default:
     RetTarget.Arch = (IFSArch)ELF::EM_NONE;
   }
   RetTarget.Endianness = IFSTriple.isLittleEndian() ? IFSEndiannessType::Little
                                                     : IFSEndiannessType::Big;
-  RetTarget.BitWidth =
-      IFSTriple.isArch64Bit() ? IFSBitWidthType::IFS64 : IFSBitWidthType::IFS32;
+  RetTarget.BitWidth = TripleUtils::isArch64Bit(IFSTriple)
+                           ? IFSBitWidthType::IFS64
+                           : IFSBitWidthType::IFS32;
   return RetTarget;
 }
 
 void ifs::stripIFSTarget(IFSStub &Stub, bool StripTriple, bool StripArch,
                          bool StripEndianness, bool StripBitWidth) {
   if (StripTriple || StripArch) {
     Stub.Target.Arch.reset();
     Stub.Target.ArchString.reset();

llvm/lib/LTO/LTOCodeGenerator.cpp

 #include "llvm/Support/Signals.h"
 #include "llvm/Support/TargetSelect.h"
 #include "llvm/Support/ToolOutputFile.h"
 #include "llvm/Support/YAMLTraits.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/TargetParser/Host.h"
 #include "llvm/TargetParser/SubtargetFeature.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include "llvm/Transforms/IPO.h"
 #include "llvm/Transforms/IPO/Internalize.h"
 #include "llvm/Transforms/IPO/WholeProgramDevirt.h"
 #include "llvm/Transforms/ObjCARC.h"
 #include "llvm/Transforms/Utils/ModuleUtils.h"
 #include <optional>
 #include <system_error>
 using namespace llvm;
bool LTOCodeGenerator::runAIXSystemAssembler(SmallString<128> &AssemblyFile) {
 
   // Setup the LDR_CNTRL variable
   std::string LDR_CNTRL_var = "LDR_CNTRL=MAXDATA32=0xA0000000@DSA";
   if (std::optional<std::string> V = sys::Process::GetEnv("LDR_CNTRL"))
     LDR_CNTRL_var += ("@" + *V);
 
   // Prepare inputs for the assember.
   const auto &Triple = TargetMach->getTargetTriple();
-  const char *Arch = Triple.isArch64Bit() ? "-a64" : "-a32";
+  const char *Arch = TripleUtils::isArch64Bit(Triple) ? "-a64" : "-a32";
   std::string ObjectFileName(AssemblyFile);
   ObjectFileName[ObjectFileName.size() - 1] = 'o';
   SmallVector<StringRef, 8> Args = {
       "/bin/env",     LDR_CNTRL_var,
       AssemblerPath,  Arch,
       "-many",        "-o",
       ObjectFileName, AssemblyFile};
 

llvm/lib/ProfileData/InstrProfCorrelator.cpp

 #include "llvm/DebugInfo/DWARF/DWARFContext.h"
 #include "llvm/DebugInfo/DWARF/DWARFDie.h"
 #include "llvm/DebugInfo/DWARF/DWARFExpression.h"
 #include "llvm/DebugInfo/DWARF/DWARFFormValue.h"
 #include "llvm/DebugInfo/DWARF/DWARFLocationExpression.h"
 #include "llvm/DebugInfo/DWARF/DWARFUnit.h"
 #include "llvm/Object/MachO.h"
 #include "llvm/Support/Debug.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <optional>
 
 #define DEBUG_TYPE "correlator"
 
 using namespace llvm;
 
 /// Get the __llvm_prf_cnts section.
 Expected<object::SectionRef> getCountersSection(const object::ObjectFile &Obj) {
InstrProfCorrelator::get(std::unique_ptr<MemoryBuffer> Buffer) {
   if (auto Err = BinOrErr.takeError())
     return std::move(Err);
 
   if (auto *Obj = dyn_cast<object::ObjectFile>(BinOrErr->get())) {
     auto CtxOrErr = Context::get(std::move(Buffer), *Obj);
     if (auto Err = CtxOrErr.takeError())
       return std::move(Err);
     auto T = Obj->makeTriple();
-    if (T.isArch64Bit())
+    if (TripleUtils::isArch64Bit(T))
       return InstrProfCorrelatorImpl<uint64_t>::get(std::move(*CtxOrErr), *Obj);
-    if (T.isArch32Bit())
+    if (TripleUtils::isArch32Bit(T))
       return InstrProfCorrelatorImpl<uint32_t>::get(std::move(*CtxOrErr), *Obj);
   }
   return make_error<InstrProfError>(
       instrprof_error::unable_to_correlate_profile, "not an object file");
 }
 
 std::optional<size_t> InstrProfCorrelator::getDataSize() const {
   if (auto *C = dyn_cast<InstrProfCorrelatorImpl<uint32_t>>(this)) {

llvm/lib/Target/AArch64/AArch64Subtarget.h

 #include "AArch64SelectionDAGInfo.h"
 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
 #include "llvm/CodeGen/GlobalISel/InlineAsmLowering.h"
 #include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
 #include "llvm/CodeGen/RegisterBankInfo.h"
 #include "llvm/CodeGen/TargetSubtargetInfo.h"
 #include "llvm/IR/DataLayout.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <string>
 
 #define GET_SUBTARGETINFO_HEADER
 #include "AArch64GenSubtargetInfo.inc"
 
 namespace llvm {
 class GlobalValue;
 class StringRef;
#include "AArch64GenSubtargetInfo.inc"
   bool isTargetFuchsia() const { return TargetTriple.isOSFuchsia(); }
   bool isWindowsArm64EC() const { return TargetTriple.isWindowsArm64EC(); }
 
   bool isTargetCOFF() const { return TargetTriple.isOSBinFormatCOFF(); }
   bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
   bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
 
   bool isTargetILP32() const {
-    return TargetTriple.isArch32Bit() ||
+    return llvm::TripleUtils::isArch32Bit(TargetTriple) ||
            TargetTriple.getEnvironment() == Triple::GNUILP32;
   }
 
   bool useAA() const override;
 
   bool addrSinkUsingGEPs() const override {
     // Keeping GEPs inbounds is important for exploiting AArch64
     // addressing-modes in ILP32 mode.

llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp

 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCTargetOptions.h"
 #include "llvm/MC/MCValue.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 using namespace llvm;
 
 namespace {
 
 class AArch64AsmBackend : public MCAsmBackend {
   static const unsigned PCRelFlagVal =
       MCFixupKindInfo::FKF_IsAlignedDownTo32Bits | MCFixupKindInfo::FKF_IsPCRel;
 protected:
DarwinAArch64AsmBackend(const Target &T, const Triple &TT,
                           const MCRegisterInfo &MRI)
       : AArch64AsmBackend(T, TT, /*IsLittleEndian*/ true), MRI(MRI) {}
 
   std::unique_ptr<MCObjectTargetWriter>
   createObjectTargetWriter() const override {
     uint32_t CPUType = cantFail(MachO::getCPUType(TheTriple));
     uint32_t CPUSubType = cantFail(MachO::getCPUSubType(TheTriple));
     return createAArch64MachObjectWriter(CPUType, CPUSubType,
-                                         TheTriple.isArch32Bit());
+                                         TripleUtils::isArch32Bit(TheTriple));
   }
 
   /// Generate the compact unwind encoding from the CFI directives.
   uint32_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
                                          const MCContext *Ctxt) const override {
     ArrayRef<MCCFIInstruction> Instrs = FI->Instructions;
     if (Instrs.empty())
       return CU::UNWIND_ARM64_MODE_FRAMELESS;

llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp

 //===-- LoongArchSubtarget.cpp - LoongArch Subtarget Information -*- C++ -*--=//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the LoongArch specific subclass of TargetSubtargetInfo.
 //
 //===----------------------------------------------------------------------===//
 
 #include "LoongArchSubtarget.h"
 #include "LoongArchFrameLowering.h"
 #include "MCTargetDesc/LoongArchBaseInfo.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 
 #define DEBUG_TYPE "loongarch-subtarget"
 
 #define GET_SUBTARGETINFO_TARGET_DESC
 #define GET_SUBTARGETINFO_CTOR
 #include "LoongArchGenSubtargetInfo.inc"
 
 void LoongArchSubtarget::anchor() {}
 
 LoongArchSubtarget &LoongArchSubtarget::initializeSubtargetDependencies(
     const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS,
     StringRef ABIName) {
-  bool Is64Bit = TT.isArch64Bit();
+  bool Is64Bit = TripleUtils::isArch64Bit(TT);
   if (CPU.empty() || CPU == "generic")
     CPU = Is64Bit ? "generic-la64" : "generic-la32";
 
   if (TuneCPU.empty())
     TuneCPU = CPU;
 
   ParseSubtargetFeatures(CPU, TuneCPU, FS);
   initializeProperties(TuneCPU);

llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp

 #include "MCTargetDesc/LoongArchBaseInfo.h"
 #include "TargetInfo/LoongArchTargetInfo.h"
 #include "llvm/Analysis/TargetTransformInfo.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/CodeGen.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include "llvm/Transforms/Scalar.h"
 #include <optional>
 
 using namespace llvm;
 
 #define DEBUG_TYPE "loongarch"
 
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLoongArchTarget() {
   // Register the target.
   RegisterTargetMachine<LoongArchTargetMachine> X(getTheLoongArch32Target());
   RegisterTargetMachine<LoongArchTargetMachine> Y(getTheLoongArch64Target());
   auto *PR = PassRegistry::getPassRegistry();
   initializeLoongArchPreRAExpandPseudoPass(*PR);
   initializeLoongArchDAGToDAGISelPass(*PR);
 }
 
 static cl::opt<bool>
     EnableLoopDataPrefetch("loongarch-enable-loop-data-prefetch", cl::Hidden,
                            cl::desc("Enable the loop data prefetch pass"),
                            cl::init(false));
 
 static std::string computeDataLayout(const Triple &TT) {
-  if (TT.isArch64Bit())
+  if (llvm::TripleUtils::isArch64Bit(TT))
     return "e-m:e-p:64:64-i64:64-i128:128-n64-S128";
-  assert(TT.isArch32Bit() && "only LA32 and LA64 are currently supported");
+  assert(llvm::TripleUtils::isArch32Bit(TT) &&
+         "only LA32 and LA64 are currently supported");
   return "e-m:e-p:32:32-i64:64-n32-S128";
 }
 
 static Reloc::Model getEffectiveRelocModel(const Triple &TT,
                                            std::optional<Reloc::Model> RM) {
   return RM.value_or(Reloc::Static);
 }
 
 static CodeModel::Model
 getEffectiveLoongArchCodeModel(const Triple &TT,
                                std::optional<CodeModel::Model> CM) {
   if (!CM)
     return CodeModel::Small;
 
   switch (*CM) {
   case CodeModel::Small:
   case CodeModel::Medium:
     return *CM;
   case CodeModel::Large:
-    if (!TT.isArch64Bit())
+    if (!TripleUtils::isArch64Bit(TT))
       report_fatal_error("Large code model requires LA64");
     return *CM;
   default:
     report_fatal_error(
         "Only small, medium and large code models are allowed on LoongArch");
   }
 }
 

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp

 #include "LoongArchFixupKinds.h"
 #include "llvm/MC/MCAsmLayout.h"
 #include "llvm/MC/MCAssembler.h"
 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCELFObjectWriter.h"
 #include "llvm/MC/MCValue.h"
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/EndianStream.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 #define DEBUG_TYPE "loongarch-asmbackend"
 
 using namespace llvm;
 
 std::optional<MCFixupKind>
 LoongArchAsmBackend::getFixupKind(StringRef Name) const {
   if (STI.getTargetTriple().isOSBinFormatELF()) {

 }
 
 MCAsmBackend *llvm::createLoongArchAsmBackend(const Target &T,
                                               const MCSubtargetInfo &STI,
                                               const MCRegisterInfo &MRI,
                                               const MCTargetOptions &Options) {
   const Triple &TT = STI.getTargetTriple();
   uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
-  return new LoongArchAsmBackend(STI, OSABI, TT.isArch64Bit(), Options);
+  return new LoongArchAsmBackend(STI, OSABI, TripleUtils::isArch64Bit(TT),
+                                 Options);
 }

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp

 //
 //===----------------------------------------------------------------------===//
 
 #include "LoongArchBaseInfo.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 namespace llvm {
 
 namespace LoongArchABI {
 
 ABI computeTargetABI(const Triple &TT, StringRef ABIName) {
   ABI ArgProvidedABI = getTargetABI(ABIName);
-  bool Is64Bit = TT.isArch64Bit();
+  bool Is64Bit = TripleUtils::isArch64Bit(TT);
   ABI TripleABI;
 
   // Figure out the ABI explicitly requested via the triple's environment type.
   switch (TT.getEnvironment()) {
   case llvm::Triple::EnvironmentType::GNUSF:
     TripleABI = Is64Bit ? LoongArchABI::ABI_LP64S : LoongArchABI::ABI_ILP32S;
     break;
   case llvm::Triple::EnvironmentType::GNUF32:

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp

 //===-- LoongArchMCAsmInfo.cpp - LoongArch Asm properties ------*- C++ -*--===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains the declarations of the LoongArchMCAsmInfo properties.
 //
 //===----------------------------------------------------------------------===//
 
 #include "LoongArchMCAsmInfo.h"
 #include "llvm/BinaryFormat/Dwarf.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 
 void LoongArchMCAsmInfo::anchor() {}
 
 LoongArchMCAsmInfo::LoongArchMCAsmInfo(const Triple &TT) {
-  CodePointerSize = CalleeSaveStackSlotSize = TT.isArch64Bit() ? 8 : 4;
+  CodePointerSize = CalleeSaveStackSlotSize =
+      TripleUtils::isArch64Bit(TT) ? 8 : 4;
   AlignmentIsInBytes = false;
   Data8bitsDirective = "\t.byte\t";
   Data16bitsDirective = "\t.half\t";
   Data32bitsDirective = "\t.word\t";
   Data64bitsDirective = "\t.dword\t";
   ZeroDirective = "\t.space\t";
   CommentString = "#";
   SupportsDebugInformation = true;
   DwarfRegNumForCFI = true;
   ExceptionsType = ExceptionHandling::DwarfCFI;
 }

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp

 #include "llvm/MC/MCDwarf.h"
 #include "llvm/MC/MCInstrAnalysis.h"
 #include "llvm/MC/MCInstrInfo.h"
 #include "llvm/MC/MCObjectWriter.h"
 #include "llvm/MC/MCRegisterInfo.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/Compiler.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 #define GET_INSTRINFO_MC_DESC
 #define ENABLE_INSTR_PREDICATE_VERIFIER
 #include "LoongArchGenInstrInfo.inc"
 
 #define GET_REGINFO_MC_DESC
 #include "LoongArchGenRegisterInfo.inc"
 
static MCInstrInfo *createLoongArchMCInstrInfo() {
   MCInstrInfo *X = new MCInstrInfo();
   InitLoongArchMCInstrInfo(X);
   return X;
 }
 
 static MCSubtargetInfo *
 createLoongArchMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
   if (CPU.empty() || CPU == "generic")
-    CPU = TT.isArch64Bit() ? "la464" : "generic-la32";
+    CPU = TripleUtils::isArch64Bit(TT) ? "la464" : "generic-la32";
   return createLoongArchMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
 }
 
 static MCAsmInfo *createLoongArchMCAsmInfo(const MCRegisterInfo &MRI,
                                            const Triple &TT,
                                            const MCTargetOptions &Options) {
   MCAsmInfo *MAI = new LoongArchMCAsmInfo(TT);
 

llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp

 #include "llvm/MC/MCObjectWriter.h"
 #include "llvm/MC/MCSymbolELF.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <algorithm>
 #include <cassert>
 #include <cstdint>
 #include <iterator>
 #include <list>
 #include <utility>
 
 #define DEBUG_TYPE "mips-elf-object-writer"
case ELF::R_MIPS16_TLS_TPREL_LO16:
     llvm_unreachable("Unsupported MIPS16 relocation");
     return true;
   }
 }
 
 std::unique_ptr<MCObjectTargetWriter>
 llvm::createMipsELFObjectWriter(const Triple &TT, bool IsN32) {
   uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
-  bool IsN64 = TT.isArch64Bit() && !IsN32;
-  bool HasRelocationAddend = TT.isArch64Bit();
+  bool IsN64 = TripleUtils::isArch64Bit(TT) && !IsN32;
+  bool HasRelocationAddend = TripleUtils::isArch64Bit(TT);
   return std::make_unique<MipsELFObjectWriter>(OSABI, HasRelocationAddend,
                                                 IsN64);
 }

llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp

 #include "llvm/MC/MCObjectWriter.h"
 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCSymbolELF.h"
 #include "llvm/MC/MCSymbolXCOFF.h"
 #include "llvm/MC/MCValue.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/ErrorHandling.h"
+#include "llvm/TargetParser/TripleUtils.h"
 using namespace llvm;
 
 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
   switch (Kind) {
   default:
     llvm_unreachable("Unknown fixup kind!");
   case FK_Data_1:
   case FK_Data_2:

 
 class XCOFFPPCAsmBackend : public PPCAsmBackend {
 public:
   XCOFFPPCAsmBackend(const Target &T, const Triple &TT)
       : PPCAsmBackend(T, TT) {}
 
   std::unique_ptr<MCObjectTargetWriter>
   createObjectTargetWriter() const override {
-    return createPPCXCOFFObjectWriter(TT.isArch64Bit());
+    return createPPCXCOFFObjectWriter(TripleUtils::isArch64Bit(TT));
   }
 
   std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
 };
 
 } // end anonymous namespace
 
 std::optional<MCFixupKind>

llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

 #include "llvm/InitializePasses.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Pass.h"
 #include "llvm/Support/CodeGen.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Target/TargetLoweringObjectFile.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include "llvm/Transforms/Scalar.h"
 #include <cassert>
 #include <memory>
 #include <optional>
 #include <string>
 
 using namespace llvm;
 
getEffectivePPCCodeModel(const Triple &TT, std::optional<CodeModel::Model> CM,
 
   if (JIT)
     return CodeModel::Small;
   if (TT.isOSAIX())
     return CodeModel::Small;
 
   assert(TT.isOSBinFormatELF() && "All remaining PPC OSes are ELF based.");
 
-  if (TT.isArch32Bit())
+  if (TripleUtils::isArch32Bit(TT))
     return CodeModel::Small;
 
-  assert(TT.isArch64Bit() && "Unsupported PPC architecture.");
+  assert(TripleUtils::isArch64Bit(TT) && "Unsupported PPC architecture.");
   return CodeModel::Medium;
 }
 
 
 static ScheduleDAGInstrs *createPPCMachineScheduler(MachineSchedContext *C) {
   const PPCSubtarget &ST = C->MF->getSubtarget<PPCSubtarget>();
   ScheduleDAGMILive *DAG =
     new ScheduleDAGMILive(C, ST.usePPCPreRASchedStrategy() ?

llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp

 #include "llvm/MC/MCSymbol.h"
 #include "llvm/MC/MCValue.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/EndianStream.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/LEB128.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 
 static cl::opt<bool> RelaxBranches("riscv-asm-relax-branches", cl::init(true),
                                    cl::Hidden);
 
 std::optional<MCFixupKind> RISCVAsmBackend::getFixupKind(StringRef Name) const {
   if (STI.getTargetTriple().isOSBinFormatELF()) {

 }
 
 MCAsmBackend *llvm::createRISCVAsmBackend(const Target &T,
                                           const MCSubtargetInfo &STI,
                                           const MCRegisterInfo &MRI,
                                           const MCTargetOptions &Options) {
   const Triple &TT = STI.getTargetTriple();
   uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
-  return new RISCVAsmBackend(STI, OSABI, TT.isArch64Bit(), Options);
+  return new RISCVAsmBackend(STI, OSABI, TripleUtils::isArch64Bit(TT), Options);
 }

llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp

 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/MC/MCRegisterInfo.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/Support/RISCVISAInfo.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/TargetParser/TargetParser.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 namespace llvm {
 
 extern const SubtargetFeatureKV RISCVFeatureKV[RISCV::NumSubtargetFeatures];
 
 namespace RISCVSysReg {
 #define GET_SysRegsList_IMPL
 #define GET_SiFiveRegsList_IMPL
 #include "RISCVGenSearchableTables.inc"
 } // namespace RISCVSysReg
 
 namespace RISCVInsnOpcode {
 #define GET_RISCVOpcodesList_IMPL
 #include "RISCVGenSearchableTables.inc"
 } // namespace RISCVInsnOpcode
 
 namespace RISCVABI {
 ABI computeTargetABI(const Triple &TT, const FeatureBitset &FeatureBits,
                      StringRef ABIName) {
   auto TargetABI = getTargetABI(ABIName);
-  bool IsRV64 = TT.isArch64Bit();
+  bool IsRV64 = TripleUtils::isArch64Bit(TT);
   bool IsRVE = FeatureBits[RISCV::FeatureRVE];
 
   if (!ABIName.empty() && TargetABI == ABI_Unknown) {
     errs()
         << "'" << ABIName
         << "' is not a recognized ABI for this target (ignoring target-abi)\n";
   } else if (ABIName.startswith("ilp32") && IsRV64) {
     errs() << "32-bit ABIs are not supported for 64-bit targets (ignoring "

 // Returns the register holding shadow call stack pointer.
 MCRegister getSCSPReg() { return RISCV::X3; }
 
 } // namespace RISCVABI
 
 namespace RISCVFeatures {
 
 void validate(const Triple &TT, const FeatureBitset &FeatureBits) {
-  if (TT.isArch64Bit() && !FeatureBits[RISCV::Feature64Bit])
+  if (TripleUtils::isArch64Bit(TT) && !FeatureBits[RISCV::Feature64Bit])
     report_fatal_error("RV64 target requires an RV64 CPU");
-  if (!TT.isArch64Bit() && !FeatureBits[RISCV::Feature32Bit])
+  if (!TripleUtils::isArch64Bit(TT) && !FeatureBits[RISCV::Feature32Bit])
     report_fatal_error("RV32 target requires an RV32 CPU");
   if (FeatureBits[RISCV::Feature32Bit] &&
       FeatureBits[RISCV::Feature64Bit])
     report_fatal_error("RV32 and RV64 can't be combined");
 }
 
 llvm::Expected<std::unique_ptr<RISCVISAInfo>>
 parseFeatureBits(bool IsRV64, const FeatureBitset &FeatureBits) {

llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp

 //
 //===----------------------------------------------------------------------===//
 
 #include "RISCVMCAsmInfo.h"
 #include "MCTargetDesc/RISCVMCExpr.h"
 #include "llvm/BinaryFormat/Dwarf.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 using namespace llvm;
 
 void RISCVMCAsmInfo::anchor() {}
 
 RISCVMCAsmInfo::RISCVMCAsmInfo(const Triple &TT) {
-  CodePointerSize = CalleeSaveStackSlotSize = TT.isArch64Bit() ? 8 : 4;
+  CodePointerSize = CalleeSaveStackSlotSize =
+      TripleUtils::isArch64Bit(TT) ? 8 : 4;
   CommentString = "#";
   AlignmentIsInBytes = false;
   SupportsDebugInformation = true;
   ExceptionsType = ExceptionHandling::DwarfCFI;
   Data16bitsDirective = "\t.half\t";
   Data32bitsDirective = "\t.word\t";
 }
 

llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp

 #include "llvm/MC/MCInstrInfo.h"
 #include "llvm/MC/MCObjectFileInfo.h"
 #include "llvm/MC/MCObjectWriter.h"
 #include "llvm/MC/MCRegisterInfo.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/ErrorHandling.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 #define GET_INSTRINFO_MC_DESC
 #define ENABLE_INSTR_PREDICATE_VERIFIER
 #include "RISCVGenInstrInfo.inc"
 
 #define GET_REGINFO_MC_DESC
 #include "RISCVGenRegisterInfo.inc"
 
createRISCVMCObjectFileInfo(MCContext &Ctx, bool PIC,
   MCObjectFileInfo *MOFI = new RISCVMCObjectFileInfo();
   MOFI->initMCObjectFileInfo(Ctx, PIC, LargeCodeModel);
   return MOFI;
 }
 
 static MCSubtargetInfo *createRISCVMCSubtargetInfo(const Triple &TT,
                                                    StringRef CPU, StringRef FS) {
   if (CPU.empty() || CPU == "generic")
-    CPU = TT.isArch64Bit() ? "generic-rv64" : "generic-rv32";
+    CPU = TripleUtils::isArch64Bit(TT) ? "generic-rv64" : "generic-rv32";
 
   return createRISCVMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
 }
 
 static MCInstPrinter *createRISCVMCInstPrinter(const Triple &T,
                                                unsigned SyntaxVariant,
                                                const MCAsmInfo &MAI,
                                                const MCInstrInfo &MII,

llvm/lib/Target/RISCV/RISCVInstrInfo.td

 }]> {
   let ParserMatchClass = UImmLog2XLenAsmOperand;
   // TODO: should ensure invalid shamt is rejected when decoding.
   let DecoderMethod = "decodeUImmOperand<6>";
   let MCOperandPredicate = [{
     int64_t Imm;
     if (!MCOp.evaluateAsConstantImm(Imm))
       return false;
-    if (STI.getTargetTriple().isArch64Bit())
+    if (llvm::TripleUtils::isArch64Bit(STI.getTargetTriple()))
       return isUInt<6>(Imm);
     return isUInt<5>(Imm);
   }];
   let OperandType = "OPERAND_UIMMLOG2XLEN";
   let OperandNamespace = "RISCVOp";
 }
 
 def uimm1 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isUInt<1>(Imm);}]> {

llvm/lib/Target/RISCV/RISCVInstrInfoC.td

def uimmlog2xlennonzero : Operand<XLenVT>, ImmLeaf<XLenVT, [{
   // TODO: should ensure invalid shamt is rejected when decoding.
   let DecoderMethod = "decodeUImmNonZeroOperand<6>";
   let OperandType = "OPERAND_UIMMLOG2XLEN_NONZERO";
   let OperandNamespace = "RISCVOp";
   let MCOperandPredicate = [{
     int64_t Imm;
     if (!MCOp.evaluateAsConstantImm(Imm))
       return false;
-    if (STI.getTargetTriple().isArch64Bit())
+    if (llvm::TripleUtils::isArch64Bit(STI.getTargetTriple()))
       return  isUInt<6>(Imm) && (Imm != 0);
     return isUInt<5>(Imm) && (Imm != 0);
   }];
 }
 
 def simm6 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isInt<6>(Imm);}]> {
   let ParserMatchClass = SImmAsmOperand<6>;
   let EncoderMethod = "getImmOpValue";

llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

def shfl_uimm : Operand<XLenVT>, ImmLeaf<XLenVT, [{
   let ParserMatchClass = UImmLog2XLenHalfAsmOperand;
   let DecoderMethod = "decodeUImmOperand<5>";
   let OperandType = "OPERAND_UIMM_SHFL";
   let OperandNamespace = "RISCVOp";
   let MCOperandPredicate = [{
     int64_t Imm;
     if (!MCOp.evaluateAsConstantImm(Imm))
       return false;
-    if (STI.getTargetTriple().isArch64Bit())
+    if (llvm::TripleUtils::isArch64Bit(STI.getTargetTriple()))
       return  isUInt<5>(Imm);
     return isUInt<4>(Imm);
   }];
 }
 
 def BCLRXForm : SDNodeXForm<imm, [{
   // Find the lowest 0.
   return CurDAG->getTargetConstant(llvm::countr_one(N->getZExtValue()),

llvm/lib/Target/RISCV/RISCVSubtarget.cpp

 #include "GISel/RISCVLegalizerInfo.h"
 #include "GISel/RISCVRegisterBankInfo.h"
 #include "RISCV.h"
 #include "RISCVFrameLowering.h"
 #include "RISCVMacroFusion.h"
 #include "RISCVTargetMachine.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/ErrorHandling.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 
 #define DEBUG_TYPE "riscv-subtarget"
 
 #define GET_SUBTARGETINFO_TARGET_DESC
 #define GET_SUBTARGETINFO_CTOR
 #include "RISCVGenSubtargetInfo.inc"

 
 void RISCVSubtarget::anchor() {}
 
 RISCVSubtarget &
 RISCVSubtarget::initializeSubtargetDependencies(const Triple &TT, StringRef CPU,
                                                 StringRef TuneCPU, StringRef FS,
                                                 StringRef ABIName) {
   // Determine default and user-specified characteristics
-  bool Is64Bit = TT.isArch64Bit();
+  bool Is64Bit = TripleUtils::isArch64Bit(TT);
   if (CPU.empty() || CPU == "generic")
     CPU = Is64Bit ? "generic-rv64" : "generic-rv32";
 
   if (TuneCPU.empty())
     TuneCPU = CPU;
 
   ParseSubtargetFeatures(CPU, TuneCPU, FS);
   if (Is64Bit) {

llvm/lib/Target/RISCV/RISCVTargetMachine.cpp

 #include "llvm/CodeGen/MIRYamlMapping.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
 #include "llvm/InitializePasses.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/FormattedStream.h"
 #include "llvm/Target/TargetOptions.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include "llvm/Transforms/IPO.h"
 #include <optional>
 using namespace llvm;
 
 static cl::opt<bool> EnableRedundantCopyElimination(
     "riscv-enable-copyelim",
     cl::desc("Enable the redundant copy elimination pass"), cl::init(true),
     cl::Hidden);
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() {
   initializeRISCVInsertReadWriteCSRPass(*PR);
   initializeRISCVDAGToDAGISelPass(*PR);
   initializeRISCVInitUndefPass(*PR);
   initializeRISCVMoveMergePass(*PR);
   initializeRISCVPushPopOptPass(*PR);
 }
 
 static StringRef computeDataLayout(const Triple &TT) {
-  if (TT.isArch64Bit())
+  if (TripleUtils::isArch64Bit(TT))
     return "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128";
-  assert(TT.isArch32Bit() && "only RV32 and RV64 are currently supported");
+  assert(TripleUtils::isArch32Bit(TT) &&
+         "only RV32 and RV64 are currently supported");
   return "e-m:e-p:32:32-i64:64-n32-S128";
 }
 
 static Reloc::Model getEffectiveRelocModel(const Triple &TT,
                                            std::optional<Reloc::Model> RM) {
   return RM.value_or(Reloc::Static);
 }
 
 RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT,
                                        StringRef CPU, StringRef FS,
                                        const TargetOptions &Options,
                                        std::optional<Reloc::Model> RM,
                                        std::optional<CodeModel::Model> CM,
                                        CodeGenOpt::Level OL, bool JIT)
     : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
                         getEffectiveRelocModel(TT, RM),
                         getEffectiveCodeModel(CM, CodeModel::Small), OL),
       TLOF(std::make_unique<RISCVELFTargetObjectFile>()) {
   initAsmInfo();
 
   // RISC-V supports the MachineOutliner.
   setMachineOutliner(true);
   setSupportsDefaultOutlining(true);
 
-  if (TT.isOSFuchsia() && !TT.isArch64Bit())
+  if (TT.isOSFuchsia() && !TripleUtils::isArch64Bit(TT))
     report_fatal_error("Fuchsia is only supported for 64-bit");
 }
 
 const RISCVSubtarget *
 RISCVTargetMachine::getSubtargetImpl(const Function &F) const {
   Attribute CPUAttr = F.getFnAttribute("target-cpu");
   Attribute TuneAttr = F.getFnAttribute("tune-cpu");
   Attribute FSAttr = F.getFnAttribute("target-features");

llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

 #include "llvm/MC/MCSectionWasm.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/MC/MCSymbolWasm.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/SourceMgr.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 
 #define DEBUG_TYPE "wasm-asm-parser"
 
 static const char *getSubtargetFeatureName(uint64_t Val);
 
 namespace {
class WebAssemblyAsmParser final : public MCTargetAsmParser {
   WebAssemblyAsmTypeCheck TC;
   // Don't type check if -no-type-check was set.
   bool SkipTypeCheck;
 
 public:
   WebAssemblyAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
                        const MCInstrInfo &MII, const MCTargetOptions &Options)
       : MCTargetAsmParser(Options, STI, MII), Parser(Parser),
-        Lexer(Parser.getLexer()), is64(STI.getTargetTriple().isArch64Bit()),
+        Lexer(Parser.getLexer()),
+        is64(TripleUtils::isArch64Bit(STI.getTargetTriple())),
         TC(Parser, MII, is64), SkipTypeCheck(Options.MCNoTypeCheck) {
     setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
     // Don't type check if this is inline asm, since that is a naked sequence of
     // instructions without a function/locals decl.
     auto &SM = Parser.getSourceManager();
     auto BufferName =
         SM.getBufferInfo(SM.getMainFileID()).Buffer->getBufferIdentifier();
     if (BufferName == "<inline asm>")

llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp

 #include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCFixupKindInfo.h"
 #include "llvm/MC/MCObjectWriter.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/MC/MCWasmObjectWriter.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 
 namespace {
 
 class WebAssemblyAsmBackend final : public MCAsmBackend {
   bool Is64Bit;
   bool IsEmscripten;

 std::unique_ptr<MCObjectTargetWriter>
 WebAssemblyAsmBackend::createObjectTargetWriter() const {
   return createWebAssemblyWasmObjectWriter(Is64Bit, IsEmscripten);
 }
 
 } // end anonymous namespace
 
 MCAsmBackend *llvm::createWebAssemblyAsmBackend(const Triple &TT) {
-  return new WebAssemblyAsmBackend(TT.isArch64Bit(), TT.isOSEmscripten());
+  return new WebAssemblyAsmBackend(TripleUtils::isArch64Bit(TT),
+                                   TT.isOSEmscripten());
 }

llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp

 /// This file contains the declarations of the WebAssemblyMCAsmInfo
 /// properties.
 ///
 //===----------------------------------------------------------------------===//
 
 #include "WebAssemblyMCAsmInfo.h"
 #include "WebAssemblyMCTargetDesc.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 
 #define DEBUG_TYPE "wasm-mc-asm-info"
 
 WebAssemblyMCAsmInfo::~WebAssemblyMCAsmInfo() = default; // anchor.
 
 WebAssemblyMCAsmInfo::WebAssemblyMCAsmInfo(const Triple &T,
                                            const MCTargetOptions &Options) {
-  CodePointerSize = CalleeSaveStackSlotSize = T.isArch64Bit() ? 8 : 4;
+  CodePointerSize = CalleeSaveStackSlotSize =
+      TripleUtils::isArch64Bit(T) ? 8 : 4;
 
   // TODO: What should MaxInstLength be?
 
   UseDataRegionDirectives = true;
 
   // Use .skip instead of .zero because .zero is confusing when used with two
   // arguments (it doesn't actually zero things out).
   ZeroDirective = "\t.skip\t";

llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp

 #include "WebAssemblySubtarget.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/TargetFrameLowering.h"
 #include "llvm/IR/Function.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetOptions.h"
+#include "llvm/TargetParser/TripleUtils.h"
 using namespace llvm;
 
 #define DEBUG_TYPE "wasm-reg-info"
 
 #define GET_REGINFO_TARGET_DESC
 #include "WebAssemblyGenRegisterInfo.inc"
 
 WebAssemblyRegisterInfo::WebAssemblyRegisterInfo(const Triple &TT)
WebAssemblyRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
   const auto &MFI = MF.getInfo<WebAssemblyFunctionInfo>();
   if (MFI->isFrameBaseVirtual())
     return MFI->getFrameBaseVreg();
   static const unsigned Regs[2][2] = {
       /*            !isArch64Bit       isArch64Bit      */
       /* !hasFP */ {WebAssembly::SP32, WebAssembly::SP64},
       /*  hasFP */ {WebAssembly::FP32, WebAssembly::FP64}};
   const WebAssemblyFrameLowering *TFI = getFrameLowering(MF);
-  return Regs[TFI->hasFP(MF)][TT.isArch64Bit()];
+  return Regs[TFI->hasFP(MF)][TripleUtils::isArch64Bit(TT)];
 }
 
 const TargetRegisterClass *
 WebAssemblyRegisterInfo::getPointerRegClass(const MachineFunction &MF,
                                             unsigned Kind) const {
   assert(Kind == 0 && "Only one kind of pointer on WebAssembly");
   if (MF.getSubtarget<WebAssemblySubtarget>().hasAddr64())
     return &WebAssembly::I64RegClass;
   return &WebAssembly::I32RegClass;
 }

llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h

 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSUBTARGET_H
 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSUBTARGET_H
 
 #include "WebAssemblyFrameLowering.h"
 #include "WebAssemblyISelLowering.h"
 #include "WebAssemblyInstrInfo.h"
 #include "WebAssemblySelectionDAGInfo.h"
 #include "llvm/CodeGen/TargetSubtargetInfo.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <string>
 
 #define GET_SUBTARGETINFO_ENUM
 #define GET_SUBTARGETINFO_HEADER
 #include "WebAssemblyGenSubtargetInfo.inc"
 
 namespace llvm {
 
public:
   }
   const Triple &getTargetTriple() const { return TargetTriple; }
   bool enableAtomicExpand() const override;
   bool enableIndirectBrExpand() const override { return true; }
   bool enableMachineScheduler() const override;
   bool useAA() const override;
 
   // Predicates used by WebAssemblyInstrInfo.td.
-  bool hasAddr64() const { return TargetTriple.isArch64Bit(); }
+  bool hasAddr64() const { return TripleUtils::isArch64Bit(TargetTriple); }
   bool hasSIMD128() const { return SIMDLevel >= SIMD128; }
   bool hasRelaxedSIMD() const { return SIMDLevel >= RelaxedSIMD; }
   bool hasAtomics() const { return HasAtomics; }
   bool hasNontrappingFPToInt() const { return HasNontrappingFPToInt; }
   bool hasSignExt() const { return HasSignExt; }
   bool hasExceptionHandling() const { return HasExceptionHandling; }
   bool hasBulkMemory() const { return HasBulkMemory; }
   bool hasMultivalue() const { return HasMultivalue; }

llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp

 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/RegAllocRegistry.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
 #include "llvm/IR/Function.h"
 #include "llvm/InitializePasses.h"
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Target/TargetOptions.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include "llvm/Transforms/Scalar.h"
 #include "llvm/Transforms/Scalar/LowerAtomicPass.h"
 #include "llvm/Transforms/Utils.h"
 #include <optional>
 using namespace llvm;
 
 #define DEBUG_TYPE "wasm"
 

 /// Create an WebAssembly architecture model.
 ///
 WebAssemblyTargetMachine::WebAssemblyTargetMachine(
     const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
     const TargetOptions &Options, std::optional<Reloc::Model> RM,
     std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
     : LLVMTargetMachine(
           T,
-          TT.isArch64Bit()
+          TripleUtils::isArch64Bit(TT)
               ? (TT.isOSEmscripten() ? "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
                                        "f128:64-n32:64-S128-ni:1:10:20"
                                      : "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
                                        "n32:64-S128-ni:1:10:20")
               : (TT.isOSEmscripten() ? "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
                                        "f128:64-n32:64-S128-ni:1:10:20"
                                      : "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
                                        "n32:64-S128-ni:1:10:20"),

llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp

 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "MCTargetDesc/X86BaseInfo.h"
-#include "MCTargetDesc/X86FixupKinds.h"
 #include "MCTargetDesc/X86EncodingOptimization.h"
+#include "MCTargetDesc/X86FixupKinds.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/BinaryFormat/ELF.h"
 #include "llvm/BinaryFormat/MachO.h"
 #include "llvm/MC/MCAsmBackend.h"
 #include "llvm/MC/MCAsmLayout.h"
 #include "llvm/MC/MCAssembler.h"
 #include "llvm/MC/MCCodeEmitter.h"
 #include "llvm/MC/MCContext.h"

 #include "llvm/MC/MCRegisterInfo.h"
 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCValue.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 
 namespace {
 /// A wrapper for holding a mask of the values from X86::AlignBranchBoundaryKind
 class X86AlignBranchKind {
 private:
   uint8_t AlignBranchKind = 0;
assert((permutationEncoding & 0x3FF) == permutationEncoding &&
            "Invalid compact register encoding!");
     return permutationEncoding;
   }
 
 public:
   DarwinX86AsmBackend(const Target &T, const MCRegisterInfo &MRI,
                       const MCSubtargetInfo &STI)
       : X86AsmBackend(T, STI), MRI(MRI), TT(STI.getTargetTriple()),
-        Is64Bit(TT.isArch64Bit()) {
+        Is64Bit(TripleUtils::isArch64Bit(TT)) {
     memset(SavedRegs, 0, sizeof(SavedRegs));
     OffsetSize = Is64Bit ? 8 : 4;
     MoveInstrSize = Is64Bit ? 3 : 2;
     StackDivide = Is64Bit ? 8 : 4;
   }
 
   std::unique_ptr<MCObjectTargetWriter>
   createObjectTargetWriter() const override {

llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp

 #include "llvm/MC/MCRegisterInfo.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MachineLocation.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/TargetParser/Host.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 
 #define GET_REGINFO_MC_DESC
 #include "X86GenRegisterInfo.inc"
 
 #define GET_INSTRINFO_MC_DESC
 #define GET_INSTRINFO_MC_HELPERS
 #define ENABLE_INSTR_PREDICATE_VERIFIER
 #include "X86GenInstrInfo.inc"
 
 #define GET_SUBTARGETINFO_MC_DESC
 #include "X86GenSubtargetInfo.inc"
 
 std::string X86_MC::ParseX86Triple(const Triple &TT) {
   std::string FS;
   // SSE2 should default to enabled in 64-bit mode, but can be turned off
   // explicitly.
-  if (TT.isArch64Bit())
+  if (TripleUtils::isArch64Bit(TT))
     FS = "+64bit-mode,-32bit-mode,-16bit-mode,+sse2";
   else if (TT.getEnvironment() != Triple::CODE16)
     FS = "-64bit-mode,+32bit-mode,-16bit-mode";
   else
     FS = "-64bit-mode,-32bit-mode,+16bit-mode";
 
   return FS;
 }

llvm/lib/Target/X86/X86AsmPrinter.cpp

 #include "llvm/MC/MCSectionELF.h"
 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Target/TargetMachine.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 
 X86AsmPrinter::X86AsmPrinter(TargetMachine &TM,
                              std::unique_ptr<MCStreamer> Streamer)
     : AsmPrinter(TM, std::move(Streamer)), FM(*this) {}
 
 //===----------------------------------------------------------------------===//
if (TT.isOSBinFormatELF()) {
     unsigned FeatureFlagsAnd = 0;
     if (M.getModuleFlag("cf-protection-branch"))
       FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_IBT;
     if (M.getModuleFlag("cf-protection-return"))
       FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_SHSTK;
 
     if (FeatureFlagsAnd) {
       // Emit a .note.gnu.property section with the flags.
-      if (!TT.isArch32Bit() && !TT.isArch64Bit())
+      if (!TripleUtils::isArch32Bit(TT) && !TripleUtils::isArch64Bit(TT))
         llvm_unreachable("CFProtection used on invalid architecture!");
       MCSection *Cur = OutStreamer->getCurrentSectionOnly();
       MCSection *Nt = MMI->getContext().getELFSection(
           ".note.gnu.property", ELF::SHT_NOTE, ELF::SHF_ALLOC);
       OutStreamer->switchSection(Nt);
 
       // Emitting note header.
-      const int WordSize = TT.isArch64Bit() && !TT.isX32() ? 8 : 4;
+      const int WordSize = TripleUtils::isArch64Bit(TT) && !TT.isX32() ? 8 : 4;
       emitAlignment(WordSize == 4 ? Align(4) : Align(8));
       OutStreamer->emitIntValue(4, 4 /*size*/); // data size for "GNU\0"
       OutStreamer->emitIntValue(8 + WordSize, 4 /*size*/); // Elf_Prop size
       OutStreamer->emitIntValue(ELF::NT_GNU_PROPERTY_TYPE_0, 4 /*size*/);
       OutStreamer->emitBytes(StringRef("GNU", 4)); // note name
 
       // Emitting an Elf_Prop for the CET properties.
       OutStreamer->emitInt32(ELF::GNU_PROPERTY_X86_FEATURE_1_AND);

llvm/lib/Target/X86/X86RegisterInfo.cpp

 #include "llvm/CodeGen/VirtRegMap.h"
 #include "llvm/IR/Constants.h"
 #include "llvm/IR/Function.h"
 #include "llvm/IR/Type.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetOptions.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 
 #define GET_REGINFO_TARGET_DESC
 #include "X86GenRegisterInfo.inc"
 
 static cl::opt<bool>
 EnableBasePointer("x86-use-base-pointer", cl::Hidden, cl::init(true),
           cl::desc("Enable use of a base pointer for complex stack frames"));
 
 X86RegisterInfo::X86RegisterInfo(const Triple &TT)
-    : X86GenRegisterInfo((TT.isArch64Bit() ? X86::RIP : X86::EIP),
+    : X86GenRegisterInfo((TripleUtils::isArch64Bit(TT) ? X86::RIP : X86::EIP),
                          X86_MC::getDwarfRegFlavour(TT, false),
                          X86_MC::getDwarfRegFlavour(TT, true),
-                         (TT.isArch64Bit() ? X86::RIP : X86::EIP)) {
+                         (TripleUtils::isArch64Bit(TT) ? X86::RIP : X86::EIP)) {
   X86_MC::initLLVMToSEHAndCVRegMapping(this);
 
   // Cache some information.
-  Is64Bit = TT.isArch64Bit();
+  Is64Bit = TripleUtils::isArch64Bit(TT);
   IsWin64 = Is64Bit && TT.isOSWindows();
 
   // Use a callee-saved register as the base pointer.  These registers must
   // not conflict with any ABI requirements.  For example, in 32-bit mode PIC
   // requires GOT in the EBX register before function calls via PLT GOT pointer.
   if (Is64Bit) {
     SlotSize = 8;
     // This matches the simplified 32-bit pointer code in the data layout

llvm/lib/Target/X86/X86TargetMachine.cpp

 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Pass.h"
 #include "llvm/Support/CodeGen.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Target/TargetLoweringObjectFile.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include "llvm/Transforms/CFGuard.h"
 #include <memory>
 #include <optional>
 #include <string>
 
 using namespace llvm;
 
 static cl::opt<bool> EnableMachineCombinerPass("x86-machine-combiner",

 }
 
 static std::string computeDataLayout(const Triple &TT) {
   // X86 is little endian
   std::string Ret = "e";
 
   Ret += DataLayout::getManglingComponent(TT);
   // X86 and x32 have 32 bit pointers.
-  if (!TT.isArch64Bit() || TT.isX32() || TT.isOSNaCl())
+  if (!TripleUtils::isArch64Bit(TT) || TT.isX32() || TT.isOSNaCl())
     Ret += "-p:32:32";
 
   // Address spaces for 32 bit signed, 32 bit unsigned, and 64 bit pointers.
   Ret += "-p270:32:32-p271:32:32-p272:64:64";
 
   // Some ABIs align 64 bit integers and doubles to 64 bits, others to 32.
-  if (TT.isArch64Bit() || TT.isOSWindows() || TT.isOSNaCl())
+  if (TripleUtils::isArch64Bit(TT) || TT.isOSWindows() || TT.isOSNaCl())
     Ret += "-i64:64";
   else if (TT.isOSIAMCU())
     Ret += "-i64:32-f64:32";
   else
     Ret += "-f64:32:64";
 
   // Some ABIs align long double to 128 bits, others to 32.
   if (TT.isOSNaCl() || TT.isOSIAMCU())
     ; // No f80
-  else if (TT.isArch64Bit() || TT.isOSDarwin() || TT.isWindowsMSVCEnvironment())
+  else if (TripleUtils::isArch64Bit(TT) || TT.isOSDarwin() ||
+           TT.isWindowsMSVCEnvironment())
     Ret += "-f80:128";
   else
     Ret += "-f80:32";
 
   if (TT.isOSIAMCU())
     Ret += "-f128:32";
 
   // The registers can hold 8, 16, 32 or, in x86-64, 64 bits.
-  if (TT.isArch64Bit())
+  if (TripleUtils::isArch64Bit(TT))
     Ret += "-n8:16:32:64";
   else
     Ret += "-n8:16:32";
 
   // The stack is aligned to 32 bits on some ABIs and 128 bits on others.
-  if ((!TT.isArch64Bit() && TT.isOSWindows()) || TT.isOSIAMCU())
+  if ((!TripleUtils::isArch64Bit(TT) && TT.isOSWindows()) || TT.isOSIAMCU())
     Ret += "-a:0:32-S32";
   else
     Ret += "-S128";
 
   return Ret;
 }
 
 static Reloc::Model getEffectiveRelocModel(const Triple &TT, bool JIT,

llvm/lib/TargetParser/CMakeLists.txt

add_llvm_component_library(LLVMTargetParser
   ARMTargetParser.cpp
   CSKYTargetParser.cpp
   Host.cpp
   LoongArchTargetParser.cpp
   RISCVTargetParser.cpp
   SubtargetFeature.cpp
   TargetParser.cpp
   Triple.cpp
+  TripleUtils.cpp
   X86TargetParser.cpp
 
   ADDITIONAL_HEADER_DIRS
   Unix
   Windows
 
   LINK_COMPONENTS
   Support
 
   DEPENDS
   RISCVTargetParserTableGen
   )

llvm/lib/TargetParser/Host.cpp

 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Config/llvm-config.h"
 #include "llvm/Support/MemoryBuffer.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include "llvm/TargetParser/X86TargetParser.h"
 #include <string.h>
 
 // Include the platform-specific parts of this class.
 #ifdef LLVM_ON_UNIX
 #include "Unix/Host.inc"
 #include <sched.h>
 #endif
std::string sys::getProcessTriple() {
   Triple PT(Triple::normalize(TargetTripleString));
 
 #if __APPLE__
   /// In Universal builds, LLVM_HOST_TRIPLE will have the wrong arch in one of
   /// the slices. This fixes that up.
   PT = withHostArch(PT);
 #endif
 
-  if (sizeof(void *) == 8 && PT.isArch32Bit())
+  if (sizeof(void *) == 8 && llvm::TripleUtils::isArch32Bit(PT))
     PT = PT.get64BitArchVariant();
-  if (sizeof(void *) == 4 && PT.isArch64Bit())
+  if (sizeof(void *) == 4 && llvm::TripleUtils::isArch64Bit(PT))
     PT = PT.get32BitArchVariant();
 
   return PT.str();
 }
 
 void sys::printDefaultTargetAndDetectedCPU(raw_ostream &OS) {
 #if LLVM_VERSION_PRINTER_SHOW_HOST_TARGET_INFO
   std::string CPU = std::string(sys::getHostCPUName());
   if (CPU == "generic")
     CPU = "(unknown)";
   OS << "  Default target: " << sys::getDefaultTargetTriple() << '\n'
      << "  Host CPU: " << CPU << '\n';
 #endif
 }

llvm/lib/TargetParser/Triple.cpp

 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/SwapByteOrder.h"
 #include "llvm/Support/VersionTuple.h"
 #include "llvm/TargetParser/ARMTargetParser.h"
 #include "llvm/TargetParser/ARMTargetParserCommon.h"
 #include "llvm/TargetParser/Host.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <cassert>
 #include <cstring>
 using namespace llvm;
 
 StringRef Triple::getArchTypeName(ArchType Kind) {
   switch (Kind) {
   case UnknownArch:    return "unknown";
 
if (ArchName.equals("bpf")) {
     return Triple::bpfeb;
   } else if (ArchName.equals("bpf_le") || ArchName.equals("bpfel")) {
     return Triple::bpfel;
   } else {
     return Triple::UnknownArch;
   }
 }
 
+bool Triple::isAndroidVersionLT(unsigned Major) const {
+  assert(isAndroid() && "Not an Android triple!");
+
+  VersionTuple Version = getEnvironmentVersion();
+
+  // 64-bit targets did not exist before API level 21 (Lollipop).
+  if (TripleUtils::isArch64Bit(*this) && Version.getMajor() < 21)
+    return VersionTuple(21) < VersionTuple(Major);
+
+  return Version < VersionTuple(Major);
+}
+
 Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
   Triple::ArchType BPFArch(parseBPFArch(Name));
   return StringSwitch<Triple::ArchType>(Name)
     .Case("aarch64", aarch64)
     .Case("aarch64_be", aarch64_be)
     .Case("aarch64_32", aarch64_32)
     .Case("arc", arc)
     .Case("arm64", aarch64) // "arm64" is an alias for "aarch64"

llvm/lib/TargetParser/TripleUtils.cpp

+//===--- TripleUtils.cpp - Triple Utils class --------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/TargetParser/TripleUtils.h"
+#include "llvm/Support/ErrorHandling.h"
+using namespace llvm;
+
+static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
+  switch (Arch) {
+  case llvm::Triple::UnknownArch:
+    return 0;
+
+  case llvm::Triple::avr:
+  case llvm::Triple::msp430:
+    return 16;
+
+  case llvm::Triple::aarch64_32:
+  case llvm::Triple::amdil:
+  case llvm::Triple::arc:
+  case llvm::Triple::arm:
+  case llvm::Triple::armeb:
+  case llvm::Triple::csky:
+  case llvm::Triple::dxil:
+  case llvm::Triple::hexagon:
+  case llvm::Triple::hsail:
+  case llvm::Triple::kalimba:
+  case llvm::Triple::lanai:
+  case llvm::Triple::le32:
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::m68k:
+  case llvm::Triple::mips:
+  case llvm::Triple::mipsel:
+  case llvm::Triple::nvptx:
+  case llvm::Triple::ppc:
+  case llvm::Triple::ppcle:
+  case llvm::Triple::r600:
+  case llvm::Triple::renderscript32:
+  case llvm::Triple::riscv32:
+  case llvm::Triple::shave:
+  case llvm::Triple::sparc:
+  case llvm::Triple::sparcel:
+  case llvm::Triple::spir:
+  case llvm::Triple::spirv32:
+  case llvm::Triple::tce:
+  case llvm::Triple::tcele:
+  case llvm::Triple::thumb:
+  case llvm::Triple::thumbeb:
+  case llvm::Triple::wasm32:
+  case llvm::Triple::x86:
+  case llvm::Triple::xcore:
+  case llvm::Triple::xtensa:
+    return 32;
+
+  case llvm::Triple::aarch64:
+  case llvm::Triple::aarch64_be:
+  case llvm::Triple::amdgcn:
+  case llvm::Triple::amdil64:
+  case llvm::Triple::bpfeb:
+  case llvm::Triple::bpfel:
+  case llvm::Triple::hsail64:
+  case llvm::Triple::le64:
+  case llvm::Triple::loongarch64:
+  case llvm::Triple::mips64:
+  case llvm::Triple::mips64el:
+  case llvm::Triple::nvptx64:
+  case llvm::Triple::ppc64:
+  case llvm::Triple::ppc64le:
+  case llvm::Triple::renderscript64:
+  case llvm::Triple::riscv64:
+  case llvm::Triple::sparcv9:
+  case llvm::Triple::spir64:
+  case llvm::Triple::spirv64:
+  case llvm::Triple::systemz:
+  case llvm::Triple::ve:
+  case llvm::Triple::wasm64:
+  case llvm::Triple::x86_64:
+    return 64;
+  }
+  llvm_unreachable("Invalid architecture value");
+}
+
+bool TripleUtils::isArch16Bit(const Triple &tripleImpl) {
+  return getArchPointerBitWidth(tripleImpl.getArch()) == 16;
+}
+
+bool TripleUtils::isArch32Bit(const Triple &tripleImpl) {
+  return getArchPointerBitWidth(tripleImpl.getArch()) == 32;
+}
+
+bool TripleUtils::isArch64Bit(const Triple &tripleImpl) {
+  return getArchPointerBitWidth(tripleImpl.getArch()) == 64;
+}

llvm/lib/XRay/InstrumentationMap.cpp

 #include "llvm/Object/ELFObjectFile.h"
 #include "llvm/Object/ObjectFile.h"
 #include "llvm/Object/RelocationResolver.h"
 #include "llvm/Support/DataExtractor.h"
 #include "llvm/Support/Error.h"
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/YAMLTraits.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <algorithm>
 #include <cstddef>
 #include <cstdint>
 #include <system_error>
 #include <vector>
 
 using namespace llvm;
 using namespace xray;
for (const object::SectionRef &Section : Sections) {
             Relocs.insert({Reloc.getOffset(), *AddendOrErr});
         }
       }
     }
   }
 
   // Copy the instrumentation map data into the Sleds data structure.
   auto C = Contents.bytes_begin();
-  bool Is32Bit = ObjFile.getBinary()->makeTriple().isArch32Bit();
+  bool Is32Bit = TripleUtils::isArch32Bit(ObjFile.getBinary()->makeTriple());
   size_t ELFSledEntrySize = Is32Bit ? 16 : 32;
 
   if ((C - Contents.bytes_end()) % ELFSledEntrySize != 0)
     return make_error<StringError>(
         Twine("Instrumentation map entries not evenly divisible by size of "
               "an XRay sled entry."),
         std::make_error_code(std::errc::executable_format_error));
 

llvm/tools/lli/lli.cpp

 #include "llvm/Support/PluginLoader.h"
 #include "llvm/Support/Process.h"
 #include "llvm/Support/Program.h"
 #include "llvm/Support/SourceMgr.h"
 #include "llvm/Support/TargetSelect.h"
 #include "llvm/Support/WithColor.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include "llvm/Transforms/Instrumentation.h"
 #include <cerrno>
 #include <optional>
 
 #if !defined(_MSC_VER) && !defined(__MINGW32__)
 #include <unistd.h>
 #else
 #include <io.h>
static void addCygMingExtraModule(ExecutionEngine &EE, LLVMContext &Context,
   Triple TargetTriple(TargetTripleStr);
 
   // Create a new module.
   std::unique_ptr<Module> M = std::make_unique<Module>("CygMingHelper", Context);
   M->setTargetTriple(TargetTripleStr);
 
   // Create an empty function named "__main".
   Type *ReturnTy;
-  if (TargetTriple.isArch64Bit())
+  if (TripleUtils::isArch64Bit(TargetTriple))
     ReturnTy = Type::getInt64Ty(Context);
   else
     ReturnTy = Type::getInt32Ty(Context);
   Function *Result =
       Function::Create(FunctionType::get(ReturnTy, {}, false),
                        GlobalValue::ExternalLinkage, "__main", M.get());
 
   BasicBlock *BB = BasicBlock::Create(Context, "__main", Result);

llvm/tools/llvm-exegesis/lib/Mips/Target.cpp

 //===-- Target.cpp ----------------------------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
-#include "../Error.h"
 #include "../Target.h"
+#include "../Error.h"
 #include "MCTargetDesc/MipsBaseInfo.h"
 #include "Mips.h"
 #include "MipsRegisterInfo.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 #define GET_AVAILABLE_OPCODE_CHECKER
 #include "MipsGenInstrInfo.inc"
 
 namespace llvm {
 namespace exegesis {
 
 #ifndef NDEBUG
if (Value.isIntN(32)) {
 
     return Instructions;
   }
 
   llvm_unreachable("Not implemented for values wider than 32 bits");
 }
 
 unsigned ExegesisMipsTarget::getScratchMemoryRegister(const Triple &TT) const {
-  return TT.isArch64Bit() ? Mips::A0_64 : Mips::A0;
+  return TripleUtils::isArch64Bit(TT) ? Mips::A0_64 : Mips::A0;
 }
 
 void ExegesisMipsTarget::fillMemoryOperands(InstructionTemplate &IT,
                                             unsigned Reg,
                                             unsigned Offset) const {
   assert(!isInvalidMemoryInstr(IT.getInstr()) &&
          "fillMemoryOperands requires a valid memory instruction");
   setMemOp(IT, 0, MCOperand::createReg(0));      // IndexReg

llvm/tools/llvm-exegesis/lib/PowerPC/Target.cpp

 //===-- Target.cpp ----------------------------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 // The PowerPC ExegesisTarget.
 //===----------------------------------------------------------------------===//
 #include "../Target.h"
 #include "PPC.h"
 #include "PPCRegisterInfo.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 #define GET_AVAILABLE_OPCODE_CHECKER
 #include "PPCGenInstrInfo.inc"
 
 namespace llvm {
 namespace exegesis {
 
 // Helper to fill a memory operand with a value.
return MCInstBuilder(getLoadImmediateOpcode(RegBitWidth))
       .addReg(Reg)
       .addImm(Value.getZExtValue());
 }
 
 unsigned
 ExegesisPowerPCTarget::getScratchMemoryRegister(const Triple &TT) const {
   // R13 is reserved as Thread Pointer, we won't use threading in benchmark, so
   // use it as scratch memory register
-  return TT.isArch64Bit() ? PPC::X13 : PPC::R13;
+  return TripleUtils::isArch64Bit(TT) ? PPC::X13 : PPC::R13;
 }
 
 void ExegesisPowerPCTarget::fillMemoryOperands(InstructionTemplate &IT,
                                                unsigned Reg,
                                                unsigned Offset) const {
   int MemOpIdx = 0;
   if (IT.getInstr().hasTiedRegisters())
     MemOpIdx = 1;

llvm/tools/llvm-exegesis/lib/X86/Target.cpp

 #include "llvm/ADT/Sequence.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/MC/MCInstBuilder.h"
 #include "llvm/Support/Errc.h"
 #include "llvm/Support/Error.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/FormatVariadic.h"
 #include "llvm/TargetParser/Host.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 #include <memory>
 #include <string>
 #include <vector>
 #if defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64))
 #include <immintrin.h>
 #include <intrin.h>
 #endif

 } // namespace
 
 void ExegesisX86Target::addTargetSpecificPasses(PassManagerBase &PM) const {
   // Lowers FP pseudo-instructions, e.g. ABS_Fp32 -> ABS_F.
   PM.add(createX86FloatingPointStackifierPass());
 }
 
 unsigned ExegesisX86Target::getScratchMemoryRegister(const Triple &TT) const {
-  if (!TT.isArch64Bit()) {
+  if (!TripleUtils::isArch64Bit(TT)) {
     // FIXME: This would require popping from the stack, so we would have to
     // add some additional setup code.
     return 0;
   }
   return TT.isOSWindows() ? X86::RCX : X86::RDI;
 }
 
 unsigned ExegesisX86Target::getLoopCounterRegister(const Triple &TT) const {
-  if (!TT.isArch64Bit()) {
+  if (!TripleUtils::isArch64Bit(TT)) {
     return 0;
   }
   return kLoopCounterReg;
 }
 
 Error ExegesisX86Target::randomizeTargetMCOperand(
     const Instruction &Instr, const Variable &Var, MCOperand &AssignedValue,
     const BitVector &ForbiddenRegs) const {

llvm/tools/llvm-ml/llvm-ml.cpp

 #include "llvm/Support/MemoryBuffer.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/Process.h"
 #include "llvm/Support/SourceMgr.h"
 #include "llvm/Support/TargetSelect.h"
 #include "llvm/Support/ToolOutputFile.h"
 #include "llvm/Support/WithColor.h"
 #include "llvm/TargetParser/Host.h"
+#include "llvm/TargetParser/TripleUtils.h"
 #include <ctime>
 #include <optional>
 
 using namespace llvm;
 using namespace llvm::opt;
 
 namespace {
 
int main(int Argc, char **Argv) {
   const Target *TheTarget = TargetRegistry::lookupTarget("", TheTriple, Error);
   if (!TheTarget) {
     WithColor::error(errs(), ProgName) << Error;
     return 1;
   }
   const std::string &TripleName = TheTriple.getTriple();
 
   bool SafeSEH = InputArgs.hasArg(OPT_safeseh);
-  if (SafeSEH && !(TheTriple.isArch32Bit() && TheTriple.isX86())) {
+  if (SafeSEH && !(TripleUtils::isArch32Bit(TheTriple) && TheTriple.isX86())) {
     WithColor::warning()
         << "/safeseh applies only to 32-bit X86 platforms; ignoring.\n";
     SafeSEH = false;
   }
 
   ErrorOr<std::unique_ptr<MemoryBuffer>> BufferPtr =
       MemoryBuffer::getFileOrSTDIN(InputFilename);
   if (std::error_code EC = BufferPtr.getError()) {

llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp

 #include "llvm/Support/InitLLVM.h"
 #include "llvm/Support/MSVCErrorWorkarounds.h"
 #include "llvm/Support/Memory.h"
 #include "llvm/Support/MemoryBuffer.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/TargetSelect.h"
 #include "llvm/Support/Timer.h"
 #include "llvm/Support/raw_ostream.h"
-
+#include "llvm/TargetParser/TripleUtils.h"
 #include <future>
 #include <list>
 
 using namespace llvm;
 using namespace llvm::object;
 
 static cl::OptionCategory RTDyldCategory("RTDyld Options");
 
if (LoadAddr != static_cast<uint64_t>(
         AlreadyAllocated[LoadAddr] = (*Tmp)->MB.allocatedSize();
       Worklist.erase(Tmp);
     }
   }
 
   // If the -target-addr-end option wasn't explicitly passed, then set it to a
   // sensible default based on the target triple.
   if (TargetAddrEnd.getNumOccurrences() == 0) {
-    if (TargetTriple.isArch16Bit())
+    if (llvm::TripleUtils::isArch16Bit(TargetTriple))
       TargetAddrEnd = (1ULL << 16) - 1;
-    else if (TargetTriple.isArch32Bit())
+    else if (llvm::TripleUtils::isArch32Bit(TargetTriple))
       TargetAddrEnd = (1ULL << 32) - 1;
     // TargetAddrEnd already has a sensible default for 64-bit systems, so
     // there's nothing to do in the 64-bit case.
   }
 
   // Process any elements remaining in the worklist.
   while (!Worklist.empty()) {
     auto *CurEntry = Worklist.front();

llvm/unittests/DebugInfo/DWARF/DwarfUtils.cpp

 //===--- unittests/DebugInfo/DWARF/DwarfUtils.cpp ---------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "DwarfUtils.h"
 #include "llvm/Config/llvm-config.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/TargetSelect.h"
 #include "llvm/TargetParser/Host.h"
 #include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/TripleUtils.h"
 
 using namespace llvm;
 
 static void initLLVMIfNeeded() {
   static bool gInitialized = false;
   if (!gInitialized) {
     gInitialized = true;
     InitializeAllTargets();

 Triple llvm::dwarf::utils::getDefaultTargetTripleForAddrSize(uint8_t AddrSize) {
   Triple T = getNormalizedDefaultTargetTriple();
 
   assert((AddrSize == 4 || AddrSize == 8) &&
          "Only 32-bit/64-bit address size variants are supported");
 
   // If a 32-bit/64-bit address size was specified, try to convert the triple
   // if it is for the wrong variant.
-  if (AddrSize == 8 && T.isArch32Bit())
+  if (AddrSize == 8 && TripleUtils::isArch32Bit(T))
     return T.get64BitArchVariant();
-  if (AddrSize == 4 && T.isArch64Bit())
+  if (AddrSize == 4 && TripleUtils::isArch64Bit(T))
     return T.get32BitArchVariant();
   return T;
 }
 
 bool llvm::dwarf::utils::isConfigurationSupported(Triple &T) {
   initLLVMIfNeeded();
   std::string Err;
   const Target *TheTarget = TargetRegistry::lookupTarget(T.getTriple(), Err);
   return TheTarget && TheTarget->hasMCAsmBackend();
 }

llvm/unittests/TargetParser/CMakeLists.txt

 set(LLVM_LINK_COMPONENTS
   Support
   TargetParser
   )
 
 add_llvm_unittest(TargetParserTests
   CSKYTargetParserTest.cpp
   Host.cpp
   TargetParserTest.cpp
   TripleTest.cpp
+  TripleUtilsTest.cpp
   )
 
 target_link_libraries(TargetParserTests PRIVATE LLVMTestingSupport)

llvm/unittests/TargetParser/TripleTest.cpp

TEST(TripleTest, ParsedIDs) {
   EXPECT_EQ(Triple::Linux, T.getOS());
   EXPECT_EQ(Triple::GNUEABI, T.getEnvironment());
 
   T = Triple("aarch64-oe-linux");
   EXPECT_EQ(Triple::aarch64, T.getArch());
   EXPECT_EQ(Triple::OpenEmbedded, T.getVendor());
   EXPECT_EQ(Triple::Linux, T.getOS());
   EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment());
-  EXPECT_TRUE(T.isArch64Bit());
 
   T = Triple("arm64_32-apple-ios");
   EXPECT_EQ(Triple::aarch64_32, T.getArch());
   EXPECT_EQ(Triple::IOS, T.getOS());
   EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment());
-  EXPECT_TRUE(T.isArch32Bit());
 
   T = Triple("dxil-unknown-shadermodel-pixel");
   EXPECT_EQ(Triple::dxil, T.getArch());
   EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
   EXPECT_EQ(Triple::ShaderModel, T.getOS());
   EXPECT_EQ(Triple::Pixel, T.getEnvironment());
   EXPECT_FALSE(T.supportsCOMDAT());
 
TEST(TripleTest, MutateName) {
   EXPECT_EQ(Triple::x86, T.getArch());
   EXPECT_EQ(Triple::PC, T.getVendor());
   EXPECT_EQ(Triple::Darwin, T.getOS());
   EXPECT_EQ("i386-pc-darwin", T.getTriple());
 }
 
 TEST(TripleTest, BitWidthPredicates) {
   Triple T;
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::arm);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::hexagon);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::mips);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::mips64);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
-
-  T.setArch(Triple::msp430);
-  EXPECT_TRUE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::ppc);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::ppc64);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
-
-  T.setArch(Triple::x86);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::x86_64);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
-
-  T.setArch(Triple::amdil);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::amdil64);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
-
-  T.setArch(Triple::hsail);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::hsail64);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
-
-  T.setArch(Triple::spir);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::spir64);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
 
   T.setArch(Triple::spirv32);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
   EXPECT_TRUE(T.isSPIRV());
 
   T.setArch(Triple::spirv64);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
   EXPECT_TRUE(T.isSPIRV());
 
-  T.setArch(Triple::sparc);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::sparcel);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::sparcv9);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
-
-  T.setArch(Triple::wasm32);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::wasm64);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
-
-  T.setArch(Triple::avr);
-  EXPECT_TRUE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
-  T.setArch(Triple::lanai);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
-
   T.setArch(Triple::riscv32);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
   EXPECT_TRUE(T.isRISCV());
 
   T.setArch(Triple::riscv64);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
   EXPECT_TRUE(T.isRISCV());
 
   T.setArch(Triple::csky);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
   EXPECT_TRUE(T.isCSKY());
 
   T.setArch(Triple::loongarch32);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
   EXPECT_TRUE(T.isLoongArch());
   EXPECT_TRUE(T.isLoongArch32());
 
   T.setArch(Triple::loongarch64);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
   EXPECT_TRUE(T.isLoongArch());
   EXPECT_TRUE(T.isLoongArch64());
 
   T.setArch(Triple::dxil);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
   EXPECT_TRUE(T.isDXIL());
-
-  T.setArch(Triple::xtensa);
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
 }
 
 TEST(TripleTest, BitWidthArchVariants) {
   Triple T;
   EXPECT_EQ(Triple::UnknownArch, T.get32BitArchVariant().getArch());
   EXPECT_EQ(Triple::UnknownArch, T.get64BitArchVariant().getArch());
 
   T.setArch(Triple::UnknownArch);

 
 TEST(TripleTest, getOSVersion) {
   Triple T;
   VersionTuple Version;
 
   T = Triple("i386-apple-darwin9");
   EXPECT_TRUE(T.isMacOSX());
   EXPECT_FALSE(T.isiOS());
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
   T.getMacOSXVersion(Version);
   EXPECT_EQ(VersionTuple(10, 5), Version);
   Version = T.getiOSVersion();
   EXPECT_EQ(VersionTuple(5), Version);
 
   T = Triple("x86_64-apple-darwin9");
   EXPECT_TRUE(T.isMacOSX());
   EXPECT_FALSE(T.isiOS());
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
   T.getMacOSXVersion(Version);
   EXPECT_EQ(VersionTuple(10, 5), Version);
   Version = T.getiOSVersion();
   EXPECT_EQ(VersionTuple(5), Version);
 
   T = Triple("x86_64-apple-macosx");
   EXPECT_TRUE(T.isMacOSX());
   EXPECT_FALSE(T.isiOS());
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
   T.getMacOSXVersion(Version);
   EXPECT_EQ(VersionTuple(10, 4), Version);
   Version = T.getiOSVersion();
   EXPECT_EQ(VersionTuple(5), Version);
 
   T = Triple("x86_64-apple-macosx10.7");
   EXPECT_TRUE(T.isMacOSX());
   EXPECT_FALSE(T.isiOS());
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
   T.getMacOSXVersion(Version);
   EXPECT_EQ(VersionTuple(10, 7), Version);
   Version = T.getiOSVersion();
   EXPECT_EQ(VersionTuple(5), Version);
 
   T = Triple("x86_64-apple-macos11.0");
   EXPECT_TRUE(T.isMacOSX());
   EXPECT_FALSE(T.isiOS());
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
   T.getMacOSXVersion(Version);
   EXPECT_EQ(VersionTuple(11, 0), Version);
 
   T = Triple("arm64-apple-macosx11.5.8");
   EXPECT_TRUE(T.isMacOSX());
   EXPECT_FALSE(T.isiOS());
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_FALSE(T.isArch32Bit());
-  EXPECT_TRUE(T.isArch64Bit());
   T.getMacOSXVersion(Version);
   EXPECT_EQ(VersionTuple(11, 5, 8), Version);
 
   // 10.16 forms a valid triple, even though it's not
   // a version of a macOS.
   T = Triple("x86_64-apple-macos10.16");
   EXPECT_TRUE(T.isMacOSX());
   T.getMacOSXVersion(Version);
   EXPECT_EQ(VersionTuple(10, 16), Version);
 
   T = Triple("x86_64-apple-darwin20");
   EXPECT_TRUE(T.isMacOSX());
   T.getMacOSXVersion(Version);
   EXPECT_EQ(VersionTuple(11), Version);
 
   // For darwin triples on macOS 11, only compare the major version.
   T = Triple("x86_64-apple-darwin20.2");
   EXPECT_TRUE(T.isMacOSX());
   T.getMacOSXVersion(Version);
   EXPECT_EQ(VersionTuple(11), Version);
 
   T = Triple("armv7-apple-ios");
   EXPECT_FALSE(T.isMacOSX());
   EXPECT_TRUE(T.isiOS());
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
   T.getMacOSXVersion(Version);
   EXPECT_EQ(VersionTuple(10, 4), Version);
   Version = T.getiOSVersion();
   EXPECT_EQ(VersionTuple(5), Version);
 
   T = Triple("armv7-apple-ios7.0");
   EXPECT_FALSE(T.isMacOSX());
   EXPECT_TRUE(T.isiOS());
-  EXPECT_FALSE(T.isArch16Bit());
-  EXPECT_TRUE(T.isArch32Bit());
-  EXPECT_FALSE(T.isArch64Bit());
   T.getMacOSXVersion(Version);
   EXPECT_EQ(VersionTuple(10, 4), Version);
   Version = T.getiOSVersion();
   EXPECT_EQ(VersionTuple(7, 0), Version);
   EXPECT_FALSE(T.isSimulatorEnvironment());
 
   T = Triple("x86_64-apple-ios10.3-simulator");
   EXPECT_TRUE(T.isiOS());

llvm/unittests/TargetParser/TripleUtilsTest.cpp

+//===----------- TripleUtils.cpp - TripleUtils unit tests
+//---------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/TargetParser/TripleUtils.h"
+#include "gtest/gtest.h"
+
+using namespace llvm;
+
+namespace {
+
+TEST(TripleUtilsTest, CheckArchBitWidth) {
+  Triple T;
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::arm);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::hexagon);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::mips);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::mips64);
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::msp430);
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::ppc);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::ppc64);
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::x86);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::x86_64);
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::amdil);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::amdil64);
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::hsail);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::hsail64);
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::spir);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::spir64);
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::spirv32);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::spirv64);
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::sparc);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::sparcel);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::sparcv9);
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::wasm32);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::wasm64);
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::avr);
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::lanai);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::riscv32);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::riscv64);
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::csky);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::loongarch32);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::loongarch64);
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::dxil);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T.setArch(Triple::xtensa);
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch16Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+}
+
+TEST(TripleUtilsTest, CheckArchBitWidthUsingOS) {
+  Triple T;
+
+  T = Triple("i386-apple-darwin9");
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T = Triple("x86_64-apple-darwin9");
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T = Triple("x86_64-apple-macosx");
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T = Triple("x86_64-apple-macosx10.7");
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T = Triple("x86_64-apple-macos11.0");
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T = Triple("arm64-apple-macosx11.5.8");
+  EXPECT_FALSE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_TRUE(llvm::TripleUtils::isArch64Bit(T));
+
+  T = Triple("armv7-apple-ios");
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T = Triple("armv7-apple-ios7.0");
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+  EXPECT_FALSE(llvm::TripleUtils::isArch64Bit(T));
+
+  T = Triple("arm64_32-apple-ios");
+  EXPECT_TRUE(llvm::TripleUtils::isArch32Bit(T));
+}
+
+} // namespace
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