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nemanjai (Nemanja Ivanovic)
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User Since
Jan 23 2015, 9:38 AM (243 w, 21 h)

Recent Activity

Tue, Sep 17

nemanjai requested changes to D62908: [PowerPC] Improve float vector gather codegen.

Requesting changes because there is no BE support.

Tue, Sep 17, 10:05 AM · Restricted Project
nemanjai committed rG1461fb6e783c: [PowerPC] Exploit single instruction load-and-splat for word and doubleword (authored by nemanjai).
[PowerPC] Exploit single instruction load-and-splat for word and doubleword
Tue, Sep 17, 9:45 AM
nemanjai committed rL372139: [PowerPC] Exploit single instruction load-and-splat for word and doubleword.
[PowerPC] Exploit single instruction load-and-splat for word and doubleword
Tue, Sep 17, 9:44 AM
nemanjai closed D63624: [PowerPC] Exploit single instruction load-and-splat for word and doubleword.
Tue, Sep 17, 9:43 AM · Restricted Project

Mon, Sep 16

nemanjai committed rGe63c6768256c: [PowerPC] Cust lower fpext v2f32 to v2f64 from extract_subvector v4f32 (authored by nemanjai).
[PowerPC] Cust lower fpext v2f32 to v2f64 from extract_subvector v4f32
Mon, Sep 16, 3:55 PM
nemanjai committed rL372043: [PowerPC] Cust lower fpext v2f32 to v2f64 from extract_subvector v4f32.
[PowerPC] Cust lower fpext v2f32 to v2f64 from extract_subvector v4f32
Mon, Sep 16, 3:54 PM
nemanjai added a comment to rL372029: [PowerPC] Cust lower fpext v2f32 to v2f64 from extract_subvector v4f32.

Due to an issue with the machine used for this commit losing connection during commit, only part of the patch was committed. We're working on getting the rest of it committed to bring the bots back to green.

Mon, Sep 16, 2:26 PM

Fri, Sep 13

nemanjai requested changes to D63676: Disable hosting MI to hotter basic blocks.

Some minor changes are required to make it more clear what this does.

Fri, Sep 13, 7:41 AM · Restricted Project
nemanjai accepted D61961: [PowerPC] Cust lower fpext v2f32 to v2f64 from extract_subvector v4f32.

Other than the minor nits that you can feel free to fix on the commit, LGTM.

Fri, Sep 13, 5:16 AM · Restricted Project

Wed, Sep 11

nemanjai added a comment to D66050: Improve division estimation of floating points..

It would appear that we are converging here. Both @jsji and @spatel are presumably in the "Must Review" for this. Would you guys mind taking another look as your approval is necessary for this to proceed.

Wed, Sep 11, 5:19 AM · Restricted Project

Mon, Sep 9

nemanjai accepted D67317: [PowerPC][NFC] Update test assertions using update_llc_test_checks.py.

Forgot to select Accept.

Mon, Sep 9, 5:01 AM · Restricted Project
nemanjai added a comment to D67317: [PowerPC][NFC] Update test assertions using update_llc_test_checks.py.

LGTM.
If we are producing the checks with the script, we should refrain from manually changing them as any future updates to the test will make it very difficult to determine whether the change is intended or not.

Mon, Sep 9, 4:59 AM · Restricted Project
nemanjai added a comment to D66991: [PowerPC] Fix SH field overflow issue.

LGTM. I'll let Stefan give the final ack though.

Mon, Sep 9, 4:55 AM · Restricted Project

Fri, Sep 6

nemanjai committed rL371203: Request commit access for nemanjai.
Request commit access for nemanjai
Fri, Sep 6, 6:32 AM

Thu, Sep 5

nemanjai added a comment to D58497: Clear the KnownModules cache if the preprocessor is going away.

I have not seen this problem resurface to be honest. When we initially hit it, changing the path for the build worked around the problem for us so we weren't really hitting in any longer. I posted this because I realized the possibility exists of having these dangling pointers (and it certainly fixed our original problem even without changing the build path).
However, I must say that I am completely out of my depth here as I am not a front end developer and don't really know how any of this stuff is supposed to work (i.e. whether it makes sense for PP here to be pointing to something that will go away).

Thu, Sep 5, 5:22 AM · Restricted Project

Aug 21 2019

nemanjai accepted D65814: [PowerPC] Add combined ELF ABI and 32/64 bit queries to the Subtarget [NFC].

LGTM other than a couple of minor nits. Thanks for cleaning this up.

Aug 21 2019, 12:59 AM · Restricted Project
nemanjai requested changes to D61961: [PowerPC] Cust lower fpext v2f32 to v2f64 from extract_subvector v4f32.
Aug 21 2019, 12:08 AM · Restricted Project

Aug 12 2019

nemanjai added a comment to D66050: Improve division estimation of floating points..

I suppose this is essentially an RFC to gauge the community's interest in improving the algorithm to gain more precision.
I think that in order to pull the trigger on a change such as this we would need the following to happen:

  1. The patch needs full context to be reviewable
  2. The formatting needs to be fixed up (some lines too long, etc.)
  3. We need testing (I imagine this makes a bunch of LIT tests fail which need to be updated)
  4. b) It might not be a bad idea to add a test to test-suite that will do some fast division vs. non-fast division to make sure the accuracy isn't too bad
  5. We should do some thorough analysis of the accuracy of the algorithm vs. the HW implementation on a wide range of values on a couple of targets (as was suggested above). I know this was done on PPC, so please share those results and try to replicate on another easily available target (such as X86).
Aug 12 2019, 3:43 AM · Restricted Project

Jul 22 2019

nemanjai added a comment to D65094: [PowerPC] Combine address computation to favour selecting DForm instructions.

Please note that essentially all the code in the SelectAddress* functions is somewhat orthogonal to this. Those changes are required to optimize what this patch does, but if the reviewers prefer, I can pull those out into a separate patch. However, I opted to keep them part of this patch at least initially as motivation for those changes on their own would be hard to understand without the context of this patch.

Jul 22 2019, 7:49 AM · Restricted Project
nemanjai created D65094: [PowerPC] Combine address computation to favour selecting DForm instructions.
Jul 22 2019, 7:47 AM · Restricted Project

Jul 21 2019

nemanjai committed rG3d68adebc579: [PowerPC][NFC] Precomit test case for upcoming patch (authored by nemanjai).
[PowerPC][NFC] Precomit test case for upcoming patch
Jul 21 2019, 2:05 PM
nemanjai committed rL366661: [PowerPC][NFC] Precomit test case for upcoming patch.
[PowerPC][NFC] Precomit test case for upcoming patch
Jul 21 2019, 2:03 PM
nemanjai committed rG73d641a23c29: [PowerPC][NFC] Regenerate test using script (authored by nemanjai).
[PowerPC][NFC] Regenerate test using script
Jul 21 2019, 11:43 AM
nemanjai committed rL366659: [PowerPC][NFC] Regenerate test using script.
[PowerPC][NFC] Regenerate test using script
Jul 21 2019, 11:42 AM

Jul 16 2019

nemanjai accepted D54409: PowerPC/SPE: Fix load/store handling for SPE.

LGTM other than a few minor nits.

Jul 16 2019, 2:06 PM · Restricted Project
nemanjai accepted D56703: PowerPC: Fix register spilling for SPE registers.

Oops. Forgot to accept.

Jul 16 2019, 1:56 PM · Restricted Project
nemanjai added a comment to D56703: PowerPC: Fix register spilling for SPE registers.

LGTM other than the code here looks really messy - but it looks messy regardless of this patch.

Jul 16 2019, 1:56 PM · Restricted Project

Jul 11 2019

nemanjai updated the diff for D63624: [PowerPC] Exploit single instruction load-and-splat for word and doubleword.

Clean up some of the comments, function naming, single-use check and other comments from Jinsong. Thanks for the review Jinsong.

Jul 11 2019, 4:28 AM · Restricted Project

Jul 10 2019

nemanjai added inline comments to D63624: [PowerPC] Exploit single instruction load-and-splat for word and doubleword.
Jul 10 2019, 5:19 PM · Restricted Project

Jul 8 2019

nemanjai added a comment to D63624: [PowerPC] Exploit single instruction load-and-splat for word and doubleword.

@jsji @amyk Do you guys have any further comments regarding this?

Jul 8 2019, 5:05 AM · Restricted Project

Jul 5 2019

nemanjai committed rG6c9a392c8eb0: [PowerPC] Move TOC save to prologue when profitable (authored by nemanjai).
[PowerPC] Move TOC save to prologue when profitable
Jul 5 2019, 11:39 AM
nemanjai committed rL365232: [PowerPC] Move TOC save to prologue when profitable.
[PowerPC] Move TOC save to prologue when profitable
Jul 5 2019, 11:39 AM
nemanjai closed D63803: [PowerPC] Move TOC save to prologue when profitable.
Jul 5 2019, 11:39 AM · Restricted Project
nemanjai added inline comments to D63803: [PowerPC] Move TOC save to prologue when profitable.
Jul 5 2019, 11:39 AM · Restricted Project
nemanjai added inline comments to D64220: [PowerPC] Remove redundant load immediate instructions.
Jul 5 2019, 11:17 AM · Restricted Project
nemanjai requested changes to D61961: [PowerPC] Cust lower fpext v2f32 to v2f64 from extract_subvector v4f32.

A few minor nits and a functional problem that needs to be addressed (exiting if the input is not a v4f32).

Jul 5 2019, 11:14 AM · Restricted Project

Jul 1 2019

nemanjai updated the diff for D63624: [PowerPC] Exploit single instruction load-and-splat for word and doubleword.

Missed some code cleanup on the last upload.

Jul 1 2019, 11:39 AM · Restricted Project
nemanjai updated the diff for D63624: [PowerPC] Exploit single instruction load-and-splat for word and doubleword.

Updated to handle the load->shuffle pattern in addition to the load->build_vector pattern.

Jul 1 2019, 11:05 AM · Restricted Project
nemanjai created D64024: [PowerPC][Altivec] Emit correct builtin for single precision vec_all_ne.
Jul 1 2019, 10:49 AM · Restricted Project

Jun 26 2019

nemanjai added a comment to D63624: [PowerPC] Exploit single instruction load-and-splat for word and doubleword.

Thanks @jsji for letting me know, and thanks @nemanjai for the handling of the load and splats!

I think this mostly looks good to me. I'm curious though, we also have test/CodeGen/PowerPC/load-v4i8-improved.ll that has a load->shift/permute->splat case. Could this patch be extended to cover this?

Jun 26 2019, 10:58 AM · Restricted Project
nemanjai updated the diff for D63803: [PowerPC] Move TOC save to prologue when profitable.

Remove unnecessary function and fix up conditions for the transformation.

Jun 26 2019, 5:46 AM · Restricted Project
nemanjai added inline comments to D63803: [PowerPC] Move TOC save to prologue when profitable.
Jun 26 2019, 4:26 AM · Restricted Project

Jun 25 2019

nemanjai committed rG4c64c62b9af1: [NFC] Fix buildbot breaks due to r364375 (authored by nemanjai).
[NFC] Fix buildbot breaks due to r364375
Jun 25 2019, 7:50 PM
nemanjai committed rL364377: [NFC] Fix buildbot breaks due to r364375.
[NFC] Fix buildbot breaks due to r364375
Jun 25 2019, 7:46 PM
nemanjai created D63803: [PowerPC] Move TOC save to prologue when profitable.
Jun 25 2019, 7:42 PM · Restricted Project
nemanjai committed rG69822ae10600: [PowerPC][NFC] Add a TOC save test case prior to posting a related patch (authored by nemanjai).
[PowerPC][NFC] Add a TOC save test case prior to posting a related patch
Jun 25 2019, 7:03 PM
nemanjai committed rL364375: [PowerPC][NFC] Add a TOC save test case prior to posting a related patch.
[PowerPC][NFC] Add a TOC save test case prior to posting a related patch
Jun 25 2019, 7:03 PM
nemanjai committed rG8265e8ff3656: [PowerPC] Mark FCOPYSIGN legal for FP vectors (authored by nemanjai).
[PowerPC] Mark FCOPYSIGN legal for FP vectors
Jun 25 2019, 6:51 PM
nemanjai committed rL364373: [PowerPC] Mark FCOPYSIGN legal for FP vectors.
[PowerPC] Mark FCOPYSIGN legal for FP vectors
Jun 25 2019, 6:50 PM
nemanjai closed D63634: [PowerPC] Mark FCOPYSIGN legal for FP vectors.
Jun 25 2019, 6:50 PM · Restricted Project
nemanjai added a comment to rL363040: [DAGCombine] GetNegatedExpression - constant float vector support (PR42105).

This breaks test cases on a few targets. Please refer to the original review for details.

Jun 25 2019, 4:58 AM
nemanjai committed rG47b7d13459a7: [PowerPC] Emit XXSEL for vec_sel and code that has the same pattern (authored by nemanjai).
[PowerPC] Emit XXSEL for vec_sel and code that has the same pattern
Jun 25 2019, 3:49 AM
nemanjai committed rL364289: [PowerPC] Emit XXSEL for vec_sel and code that has the same pattern.
[PowerPC] Emit XXSEL for vec_sel and code that has the same pattern
Jun 25 2019, 3:46 AM
nemanjai closed D61658: [PowerPC] Emit XXSEL for vec_sel and code that has the same pattern.
Jun 25 2019, 3:46 AM · Restricted Project

Jun 24 2019

nemanjai added a comment to D62963: [DAGCombine] GetNegatedExpression - constant float vector support (PR42105).

Same issue happens with arm64, aarch64, nvptx triples.

Jun 24 2019, 12:20 PM · Restricted Project
nemanjai added a comment to D62963: [DAGCombine] GetNegatedExpression - constant float vector support (PR42105).

This breaks (at least) PowerPC with the typical DAG Combine cycle (i.e. one combine undoes the other in a cycle). Here's a minimal test case to show this:

define dso_local <4 x double> @sub(double %b, double* nocapture readonly %ptr) local_unnamed_addr {
entry:
  %arrayidx = getelementptr inbounds double, double* %ptr, i64 45320
  %0 = load double, double* %arrayidx, align 4
  %vecinit = insertelement <4 x double> undef, double %0, i32 0
  %arrayidx1 = getelementptr inbounds double, double* %ptr, i64 176
  %1 = load double, double* %arrayidx1, align 4
  %vecinit2 = insertelement <4 x double> %vecinit, double %1, i32 1
  %arrayidx3 = getelementptr inbounds double, double* %ptr, i64 2734
  %2 = load double, double* %arrayidx3, align 4
  %vecinit4 = insertelement <4 x double> %vecinit2, double %2, i32 2
  %arrayidx5 = getelementptr inbounds double, double* %ptr, i64 7
  %3 = load double, double* %arrayidx5, align 4
  %vecinit6 = insertelement <4 x double> %vecinit4, double %3, i32 3
  %splat.splatinsert = insertelement <4 x double> undef, double %b, i32 0
  %splat.splat = shufflevector <4 x double> %splat.splatinsert, <4 x double> undef, <4 x i32> zeroinitializer
  %div = fdiv fast <4 x double> %vecinit6, %splat.splat
  %sub = fsub fast <4 x double> <double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00>, %div
  ret <4 x double> %sub
}

Compile with llc -mtriple=powerpc64le-unknown-unknown

Jun 24 2019, 11:38 AM · Restricted Project

Jun 22 2019

nemanjai added a comment to D63676: Disable hosting MI to hotter basic blocks.

Added a couple more reviewers that either recently modified this file or I think may be interested in the proposed change.

Jun 22 2019, 10:38 AM · Restricted Project
nemanjai added reviewers for D63676: Disable hosting MI to hotter basic blocks: chandlerc, craig.topper, eli.friedman.
Jun 22 2019, 10:38 AM · Restricted Project
nemanjai updated the diff for D63636: [PowerPC][Altivec] Fix offsets for vec_xl and vec_xst.

Remove the double cast. Simplify the test case. Rename the temp.

Jun 22 2019, 10:32 AM · Restricted Project
nemanjai added inline comments to D63636: [PowerPC][Altivec] Fix offsets for vec_xl and vec_xst.
Jun 22 2019, 10:09 AM · Restricted Project

Jun 20 2019

nemanjai added inline comments to D63624: [PowerPC] Exploit single instruction load-and-splat for word and doubleword.
Jun 20 2019, 6:26 PM · Restricted Project
nemanjai created D63636: [PowerPC][Altivec] Fix offsets for vec_xl and vec_xst.
Jun 20 2019, 6:23 PM · Restricted Project
nemanjai created D63634: [PowerPC] Mark FCOPYSIGN legal for FP vectors.
Jun 20 2019, 5:13 PM · Restricted Project
nemanjai added inline comments to D63624: [PowerPC] Exploit single instruction load-and-splat for word and doubleword.
Jun 20 2019, 2:06 PM · Restricted Project
nemanjai created D63624: [PowerPC] Exploit single instruction load-and-splat for word and doubleword.
Jun 20 2019, 2:06 PM · Restricted Project

Jun 13 2019

nemanjai added a comment to D61228: [PowerPC] Set the innermost hot loop to align 32 bytes.

Also, please make sure that the summary and text of the commit message does not mention PGO since it is not really considered any longer.

Jun 13 2019, 11:15 AM · Restricted Project

Jun 6 2019

nemanjai created D62993: [PowerPC] Emit scalar min/max instructions with unsafe fp math.
Jun 6 2019, 8:39 PM · Restricted Project
nemanjai updated the diff for D61658: [PowerPC] Emit XXSEL for vec_sel and code that has the same pattern.

Removed redundant pattern.
Added commuted tests, a v2i64 test and a negative (v4i1) test.

Jun 6 2019, 8:04 PM · Restricted Project
nemanjai added inline comments to D61658: [PowerPC] Emit XXSEL for vec_sel and code that has the same pattern.
Jun 6 2019, 8:01 PM · Restricted Project
nemanjai committed rGef4a3aa549ea: [PowerPC] Exploit the vector min/max instructions (authored by nemanjai).
[PowerPC] Exploit the vector min/max instructions
Jun 6 2019, 4:48 PM
nemanjai committed rL362759: [PowerPC] Exploit the vector min/max instructions.
[PowerPC] Exploit the vector min/max instructions
Jun 6 2019, 4:47 PM
nemanjai closed D47332: [PowerPC] Exploit the vector min/max instructions.
Jun 6 2019, 4:47 PM · Restricted Project

Jun 4 2019

nemanjai committed rG7c842fadf100: [PowerPC] Collapse RLDICL/RLDICR into RLDIC when possible (authored by nemanjai).
[PowerPC] Collapse RLDICL/RLDICR into RLDIC when possible
Jun 4 2019, 7:34 PM
nemanjai committed rL362576: [PowerPC] Collapse RLDICL/RLDICR into RLDIC when possible.
[PowerPC] Collapse RLDICL/RLDICR into RLDIC when possible
Jun 4 2019, 7:33 PM
nemanjai closed D60402: [PowerPC] Collapse RLDICL/RLDICR into RLDIC when possible.
Jun 4 2019, 7:33 PM · Restricted Project
nemanjai committed rGcfb6c82172e7: [PowerPC][NFC] Add codegen test for consecutive stores of vector elements (authored by nemanjai).
[PowerPC][NFC] Add codegen test for consecutive stores of vector elements
Jun 4 2019, 7:09 PM
nemanjai committed rL362573: [PowerPC][NFC] Add codegen test for consecutive stores of vector elements.
[PowerPC][NFC] Add codegen test for consecutive stores of vector elements
Jun 4 2019, 7:08 PM
nemanjai closed D62843: [PowerPC][NFC] Add tests to show current codegen of consecutive stores of vector elements.
Jun 4 2019, 7:08 PM · Restricted Project
nemanjai added a comment to D62843: [PowerPC][NFC] Add tests to show current codegen of consecutive stores of vector elements.

I'll commit this for you.

Jun 4 2019, 7:02 PM · Restricted Project
nemanjai accepted D62843: [PowerPC][NFC] Add tests to show current codegen of consecutive stores of vector elements.

LGTM. I assume you're only posting this for review because you don't have commit access.

Jun 4 2019, 7:01 PM · Restricted Project
nemanjai added a comment to D59881: Initial support for vectorization using MASSV (IBM MASS vector library).

The LLVM portion of this patch committed in https://reviews.llvm.org/rL362568.

Jun 4 2019, 7:01 PM · Restricted Project
nemanjai committed rG6321c6806591: Initial support for vectorization using MASSV (IBM MASS vector library) (authored by nemanjai).
Initial support for vectorization using MASSV (IBM MASS vector library)
Jun 4 2019, 6:56 PM
nemanjai committed rL362571: Initial support for vectorization using MASSV (IBM MASS vector library).
Initial support for vectorization using MASSV (IBM MASS vector library)
Jun 4 2019, 6:55 PM
nemanjai closed D59881: Initial support for vectorization using MASSV (IBM MASS vector library).
Jun 4 2019, 6:55 PM · Restricted Project
nemanjai committed rGfe97754acff1: Initial support for IBM MASS vector library (authored by nemanjai).
Initial support for IBM MASS vector library
Jun 4 2019, 6:29 PM
nemanjai committed rL362568: Initial support for IBM MASS vector library.
Initial support for IBM MASS vector library
Jun 4 2019, 6:29 PM
nemanjai added a comment to D59881: Initial support for vectorization using MASSV (IBM MASS vector library).

I'll commit this for you soon Jeeva.

Jun 4 2019, 5:02 PM · Restricted Project
nemanjai committed rGaed7227b7178: Revert r362472 as it is breaking PPC build bots (authored by nemanjai).
Revert r362472 as it is breaking PPC build bots
Jun 4 2019, 11:46 AM
nemanjai committed rL362539: Revert r362472 as it is breaking PPC build bots.
Revert r362472 as it is breaking PPC build bots
Jun 4 2019, 11:46 AM
nemanjai added a comment to rL362472: [DAGCombine] Match a pattern where a wide type scalar value is stored by….

This was identified as the culprit commit that broke the PPC big endian bot: http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt/builds/27963

Jun 4 2019, 5:57 AM

Jun 3 2019

nemanjai committed rGbad43d8f49cc: [PowerPC] Look through copies for compare elimination (authored by nemanjai).
[PowerPC] Look through copies for compare elimination
Jun 3 2019, 12:08 PM
nemanjai committed rL362438: [PowerPC] Look through copies for compare elimination.
[PowerPC] Look through copies for compare elimination
Jun 3 2019, 12:06 PM
nemanjai closed D59633: [PowerPC] Look through copies for compare elimination.
Jun 3 2019, 12:06 PM · Restricted Project
nemanjai committed rG009d08f313c4: [PowerPC] Set PROT_READ flag for MF_EXEC to prevent segfaults on PPC machines (authored by nemanjai).
[PowerPC] Set PROT_READ flag for MF_EXEC to prevent segfaults on PPC machines
Jun 3 2019, 9:18 AM
nemanjai committed rL362412: [PowerPC] Set PROT_READ flag for MF_EXEC to prevent segfaults on PPC machines.
[PowerPC] Set PROT_READ flag for MF_EXEC to prevent segfaults on PPC machines
Jun 3 2019, 9:18 AM
nemanjai closed D62741: [PowerPC] Set PROT_READ flag for MF_EXEC to prevent segfaults on PPC machines.
Jun 3 2019, 9:18 AM · Restricted Project
nemanjai accepted D40554: [PowerPC] Fix bugs in sign-/zero-extension elimination.

LGTM.

Jun 3 2019, 4:11 AM · Restricted Project

May 31 2019

nemanjai created D62741: [PowerPC] Set PROT_READ flag for MF_EXEC to prevent segfaults on PPC machines.
May 31 2019, 9:53 AM · Restricted Project

May 17 2019

nemanjai added a comment to D61228: [PowerPC] Set the innermost hot loop to align 32 bytes.

Okay, but we just call MBB->getParent()->getFunction().hasProfileData(), where do we actually check that the loop is hot?

Also, even if we align the majority of loops, how much does that really cost us? The code-size impact could be minor compared to the perf improvement, and if so, we should just always do it. It is still true that most users don't use PGO.

May 17 2019, 5:57 AM · Restricted Project

May 16 2019

nemanjai accepted D61966: [PowerPC][NFC] Add a tests for Reordering CSR reloads in epilogue to follow the same order as CSR saves in the prologue.

Please name the test case csr-save-restore-order.ll rather than using the word reverse since the reversal is something you do once and the test case shows the order of saves/restores.

May 16 2019, 3:00 PM · Restricted Project