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nemanjai (Nemanja Ivanovic)
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Jan 23 2015, 9:38 AM (270 w, 4 d)

Recent Activity

Yesterday

nemanjai accepted D76160: [PowerPC][Future] Add offsets to PC Relative relocations. .

Aside from a few minor nits, LGTM.

Mon, Mar 30, 12:30 PM
nemanjai added a comment to D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.
  1. Rename RotateRightClearLeft to something like RightJustifyRangeAndClear as it appears that is what the function is doing.

In ISA, the RLDICL is named as: "Rotate Left Doubleword Immediate then Clear Left". I am not sure if the right justify range make it more clear. Regarding to left or right, it is just a wrap rotate. The lambda here is trying to hide the detail that implement the right rotate with left rotate. Personally, I prefer the RotateRightClearLeft one, but also ok to the RightJustifyRangeAndClear if you insist.

Mon, Mar 30, 5:55 AM · Restricted Project
nemanjai accepted D77034: [PowerPC] Don't do the folding if the operand is R0/X0.

Ugh...
So we have a transformation that is called foldFrameOffset() and it would actually transform the attached test case? There does not appear to be any FrameIndex in the attached test case. So in addition to a missed check for R0/X0 vs. PPC::ZERO/PPC::ZERO8 we also have a transformation that says it folds frame offsets, but it does not really care about frame offsets - it just folds arithmetic into the index register.

Mon, Mar 30, 3:44 AM · Restricted Project

Fri, Mar 27

nemanjai committed rG482141134729: [DAGCombine] Fix splitting indexed loads in ForwardStoreValueToDirectLoad() (authored by nemanjai).
[DAGCombine] Fix splitting indexed loads in ForwardStoreValueToDirectLoad()
Fri, Mar 27, 4:33 PM
nemanjai closed D76778: [DAGCombine] Fix splitting indexed loads in ForwardStoreValueToDirectLoad().
Fri, Mar 27, 4:32 PM · Restricted Project
nemanjai updated the diff for D76778: [DAGCombine] Fix splitting indexed loads in ForwardStoreValueToDirectLoad().

I initially misread the comment from Eli. Fold both splitting-related checks into the new function.

Fri, Mar 27, 12:01 PM · Restricted Project
nemanjai updated the diff for D76778: [DAGCombine] Fix splitting indexed loads in ForwardStoreValueToDirectLoad().

Factored out detection of an opaque target constant index into a static function and updated the test case.

Fri, Mar 27, 6:29 AM · Restricted Project
nemanjai added inline comments to D76778: [DAGCombine] Fix splitting indexed loads in ForwardStoreValueToDirectLoad().
Fri, Mar 27, 5:24 AM · Restricted Project
nemanjai added a comment to D76778: [DAGCombine] Fix splitting indexed loads in ForwardStoreValueToDirectLoad().

Please refactor the "HasOTCInc || !MaySplitLoadIndex" condition into a helper function.

Fri, Mar 27, 4:50 AM · Restricted Project
nemanjai added a comment to D76240: [Sanitizers][Test] If the default linker is LLD, disable threads.

In D76240#1927115, @MaskRay wrote:
For lld, I think --threads={0,1,2,...} is better than the current --(no-)threads.

I have a change to rename lld --no-threads to --threads=N. It takes more efforts to actually work because I need to patch llvm::parallel::for_each_n called by lld/include/lld/Common/Threads.h#L75

Can the lit test run a system lld which may not support --threads= after --no-threads is removed?

Fri, Mar 27, 4:50 AM · Restricted Project

Thu, Mar 26

nemanjai accepted D76662: [PowerPC]: Don't allow r0 as a target for LD_GOT_TPREL_L/32.

LGTM. Thanks.

Thu, Mar 26, 9:11 AM · Restricted Project
nemanjai updated the diff for D76240: [Sanitizers][Test] If the default linker is LLD, disable threads.

Added comments explaining why threads are disabled in LLD when it is the default linker.

Thu, Mar 26, 7:00 AM · Restricted Project
nemanjai added a reviewer for D76778: [DAGCombine] Fix splitting indexed loads in ForwardStoreValueToDirectLoad(): efriedma.
Thu, Mar 26, 6:28 AM · Restricted Project
nemanjai added a comment to D76778: [DAGCombine] Fix splitting indexed loads in ForwardStoreValueToDirectLoad().

The author of the PR confirms that the patch fixes the problem.
Also, the failing unit tests are not due to this patch.

Thu, Mar 26, 6:28 AM · Restricted Project

Wed, Mar 25

nemanjai added a comment to D76240: [Sanitizers][Test] If the default linker is LLD, disable threads.

Adding a flag like that requires a comment explaining the need each place you're adding it.

Is there some way to refactor this so the code isn't scattered across five Python files?

Wed, Mar 25, 2:05 PM · Restricted Project
nemanjai added a comment to D76240: [Sanitizers][Test] If the default linker is LLD, disable threads.

Seems that people have lost interest in this review, but I still have the problem on my LLD builds. Any further comments from anyone?

Wed, Mar 25, 12:27 PM · Restricted Project
nemanjai accepted D76751: [PowerPC] Improve the way legalize mul for v8i16 and add pattern to match mul + add.

LGTM. Thanks.

Wed, Mar 25, 10:47 AM · Restricted Project
nemanjai created D76778: [DAGCombine] Fix splitting indexed loads in ForwardStoreValueToDirectLoad().
Wed, Mar 25, 8:37 AM · Restricted Project
nemanjai requested changes to D76751: [PowerPC] Improve the way legalize mul for v8i16 and add pattern to match mul + add.

Thanks for putting this up. This is actually something I meant to do very soon as we need it for a specific benchmark. Please fix the pattern and then this patch is fine.

Wed, Mar 25, 3:45 AM · Restricted Project

Tue, Mar 24

nemanjai added a comment to D76662: [PowerPC]: Don't allow r0 as a target for LD_GOT_TPREL_L/32.

Ah, OK. This makes sense.
I realize that it is not really possible to write a test case to show the allocation of R0 previous to this patch. However, would you modify existing test cases that use regex matching for the target register such as [[REG:[0-9]+]] to something like [[REG:[1-9][0-9]*]] to demonstrate that R0 is not a valid candidate for the regex match?

Tue, Mar 24, 8:02 AM · Restricted Project
nemanjai added reviewers for D76591: [PPCInstPrinter] Change printBranchOperand(calltarget) to print the target address in hexadecimal form: jasonliu, cebowleratibm.
Tue, Mar 24, 3:45 AM · Restricted Project
nemanjai added a comment to D76591: [PPCInstPrinter] Change printBranchOperand(calltarget) to print the target address in hexadecimal form.

This seems perfectly fine with me - and more consistent with GNU binutils.
However, I think the AIX guys should also have a look as I am not sure what the system assembler's capabilities are on AIX. I'll add a couple of AIX reviewers.

Tue, Mar 24, 3:44 AM · Restricted Project

Mon, Mar 23

nemanjai committed rGbfa9ce1cb27a: [PowerPC] Improve handling of some BUILD_VECTOR nodes (authored by nemanjai).
[PowerPC] Improve handling of some BUILD_VECTOR nodes
Mon, Mar 23, 3:49 PM
nemanjai closed D72660: [PowerPC] Improve handling of some BUILD_VECTOR nodes.
Mon, Mar 23, 3:49 PM · Restricted Project
nemanjai accepted D76294: [PowerPC][Future] Add initial support for PC Relative addressing to get block address .

LGTM aside from some nits that should be easily addressable on the commit.

Mon, Mar 23, 1:39 PM · Restricted Project, Restricted Project
nemanjai added inline comments to D75931: [PowerPC][Future] Add initial support for PC Relative addressing to get jump table base address.
Mon, Mar 23, 1:06 PM · Restricted Project
nemanjai accepted D75931: [PowerPC][Future] Add initial support for PC Relative addressing to get jump table base address.

LGTM aside from a couple of nits. Feel free to address those on the commit.

Mon, Mar 23, 1:06 PM · Restricted Project
nemanjai accepted D76614: [PowerPC]: e500 target can't use lwsync, use msync instead.

LGTM. I have no way of verifying this but no reason to doubt it.

Mon, Mar 23, 10:21 AM · Restricted Project
nemanjai accepted D73664: [PowerPC][Future] Add Support For Functions That Do Not Use A TOC..

LGTM. The remaining comments are just nits that you can address on the commit. Thanks for your patience through this review and for addressing all the comments.

Mon, Mar 23, 8:08 AM · Restricted Project, Restricted Project
nemanjai accepted D75821: [PowerPC] Remove the repeated definition for some InstAlias for mtspr/mfspr.

LGTM. Thanks for cleaning it up. I was mainly concerned with making sure this is an omission rather than something that was done on purpose to work around some bug. But it does indeed appear to be something we accidentally added.

Mon, Mar 23, 4:53 AM · Restricted Project
nemanjai added a comment to D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.

I think this would be immensely more readable if you use more descriptive names for variables. It is very hard to get this bit manipulation right in ones head so I really think you should try your best to make this as simple to follow as possible:

  1. You use one mask in on line 4463 and then a different one on 4476. Please don't do this. Stick with a consistent example.
  2. Rename RotateRightClearLeft to something like RightJustifyRangeAndClear as it appears that is what the function is doing.
  3. Get rid of all the expressions involving ME/MB - especially things like <imm> +/- MB/ME as they are very difficult to reason about. For readability, favour defining temporary values just so they would have a name. For example: MB+63-ME is kind of meaningless to a reader. But if you do something like unsigned FirstBitSetWhenRightJustified = MB + 63 - ME; that is now much easier to follow. I realize that we are creating single-use temporaries this way, but I really think it is worth it for readability.
Mon, Mar 23, 4:21 AM · Restricted Project

Thu, Mar 19

nemanjai added a comment to D76240: [Sanitizers][Test] If the default linker is LLD, disable threads.

For lld, I think --threads={0,1,2,...} is better than the current --(no-)threads.

BTW, can't testing with --no-threads hide possible LLDs concurency bugs?
We probably do not want to test LLD with --(no-)threads in most cases because it is not a real world use case of LLD.

Thu, Mar 19, 9:11 AM · Restricted Project

Wed, Mar 18

nemanjai committed rGe009fad342ce: [PowerPC] Remove UB from PPCInstrInfo when handling rotates fed by constants (authored by nemanjai).
[PowerPC] Remove UB from PPCInstrInfo when handling rotates fed by constants
Wed, Mar 18, 11:58 AM
nemanjai added a comment to D76240: [Sanitizers][Test] If the default linker is LLD, disable threads.

While I agree that the more general issue of scaling LLVM's (and particularly LLD's) parallelism is something we should consider tackling, I still think there is value in proceeding with something along the lines of this patch in the interim.
For users that have very parallel builds, there are mitigations available:

  • Presumably, most builds do not link such a large number of binaries that this is a serious problem
  • Even for builds that do link a large number of binaries, the cmake/ninja build system does provide the ability to scale down the number of parallel link jobs as someone mentioned in the comments above
Wed, Mar 18, 9:47 AM · Restricted Project
nemanjai accepted D76207: [PowerPC] implement target hook isProfitableToHoist.

LGTM aside from a nit from me and a couple from clang-format. I'm sure you can address those on the commit.

Wed, Mar 18, 7:02 AM · Restricted Project

Tue, Mar 17

nemanjai added a comment to D76160: [PowerPC][Future] Add offsets to PC Relative relocations. .

I think it would be useful to add a binary test case using either llvm-objdump or readelf if that is available. Just to test the desired encoding.

Tue, Mar 17, 7:59 AM
nemanjai accepted D76064: [PowerPC][Future] Add initial support for PC Relative addressing for global values that require GOT indirect addressing.

Approving this even though there is a problem with the logic in SelectAddressPCRel() as I trust that you will fix the obvious bug when committing this.

Tue, Mar 17, 7:25 AM · Restricted Project
nemanjai accepted D75280: [PowerPC][Future] Add initial support for PC Relative addressing for global values.

My comments are quite minor so feel free to address them on the commit. LGTM.

Tue, Mar 17, 6:52 AM · Restricted Project
nemanjai added a comment to D76240: [Sanitizers][Test] If the default linker is LLD, disable threads.

The -Wl,--no-threads logic seems test machine specific. Shouldn't a site-wise configuration file added somewhere on the test machine to adapt the behavior of lit substitutions? I don't know how to do that, though. lit.site.cfg.py files are generated in the build directory. They are not used for customization.

Tue, Mar 17, 4:27 AM · Restricted Project
nemanjai added a comment to D76240: [Sanitizers][Test] If the default linker is LLD, disable threads.

Shouldn't -DLLVM_PARALLEL_LINK_JOBS=1 be used to avoid the described condition?

Tue, Mar 17, 4:27 AM · Restricted Project
nemanjai accepted D74486: [PowerPC][Future] Add initial support for PC Relative addressing for constant pool loads.

LGTM aside from some minor nits. Feel free to address those on the commit.

Tue, Mar 17, 4:27 AM · Restricted Project
nemanjai added a comment to D76240: [Sanitizers][Test] If the default linker is LLD, disable threads.

"overwhelmed" by what, exactly? I mean, I guess there's fundamentally some overhead if we end up with N^2 active threads (where N is the number of cores), but threads don't have that much memory overhead on their own; it shouldn't be high in absolute terms unless your test machine somehow has hundreds of cores. And I'm not sure what else could cause an issue; I guess if the kernel scheduler decided to do something weird, context switches might hurt performance?

Also, what OS are you using?

$ cat /etc/lsb-release 
DISTRIB_ID=Ubuntu
DISTRIB_RELEASE=16.04
DISTRIB_CODENAME=xenial
DISTRIB_DESCRIPTION="Ubuntu 16.04.6 LTS"
Tue, Mar 17, 4:27 AM · Restricted Project

Mon, Mar 16

nemanjai added a comment to D73664: [PowerPC][Future] Add Support For Functions That Do Not Use A TOC..

I really think we should add significantly more testing to this patch. We should have test cases to cover the following (we can also just add run lines with -mcpu=future to existing tests):

  • Calls from functions that use the TOC (i.e. globals, etc.)
  • Calls from functions that don't use the TOC
  • Indirect calls
  • Tail calls (i.e. that they are disabled)
  • Handling of X2 in leaf functions (since this has changed AFAICT)
Mon, Mar 16, 3:51 PM · Restricted Project, Restricted Project
nemanjai requested changes to D76207: [PowerPC] implement target hook isProfitableToHoist.
Mon, Mar 16, 12:01 PM · Restricted Project
nemanjai created D76240: [Sanitizers][Test] If the default linker is LLD, disable threads.
Mon, Mar 16, 11:27 AM · Restricted Project
nemanjai committed rGf59432885374: [PowerPC] Disable sanitizer test due to failures when using LLD (authored by nemanjai).
[PowerPC] Disable sanitizer test due to failures when using LLD
Mon, Mar 16, 10:55 AM

Mon, Mar 9

nemanjai added a comment to D75821: [PowerPC] Remove the repeated definition for some InstAlias for mtspr/mfspr.

This is a curious situation. How did we end up having multiple definitions of instruction aliases?

Mon, Mar 9, 3:43 AM · Restricted Project

Thu, Mar 5

nemanjai added inline comments to D73664: [PowerPC][Future] Add Support For Functions That Do Not Use A TOC..
Thu, Mar 5, 5:29 AM · Restricted Project, Restricted Project

Tue, Mar 3

nemanjai added inline comments to D73664: [PowerPC][Future] Add Support For Functions That Do Not Use A TOC..
Tue, Mar 3, 8:09 PM · Restricted Project, Restricted Project

Feb 28 2020

nemanjai added a comment to D73664: [PowerPC][Future] Add Support For Functions That Do Not Use A TOC..

The changes that are needed are fairly minor but I would like to take another look. I promise to get to it immediately when you have the updated patch posted.

Feb 28 2020, 5:31 AM · Restricted Project, Restricted Project

Feb 26 2020

nemanjai committed rGb9f368605601: Fix buildbot break after c46b85aaf4d4 (authored by nemanjai).
Fix buildbot break after c46b85aaf4d4
Feb 26 2020, 8:04 PM
nemanjai committed rGc46b85aaf4d4: [LoopVectorize] Fix cost for calls to functions that have vector versions (authored by nemanjai).
[LoopVectorize] Fix cost for calls to functions that have vector versions
Feb 26 2020, 7:46 PM
nemanjai closed D74944: [LoopVectorize] Fix cost for calls to functions that have vector versions.
Feb 26 2020, 7:45 PM · Restricted Project

Feb 25 2020

nemanjai accepted D74701: [PowerPC] Fix the unexpected modification caused by D62993 in LowerSELECT_CC for power9.

LGTM. Sorry I missed this for so long. Thank you for fixing it.

Feb 25 2020, 7:38 AM · Restricted Project

Feb 24 2020

nemanjai added a comment to D74944: [LoopVectorize] Fix cost for calls to functions that have vector versions.

I am not sure I am actually following what it is you are requesting in terms of testing. Perhaps I need to describe the problems I am solving more thoroughly.

Feb 24 2020, 2:57 PM · Restricted Project
nemanjai updated the diff for D74944: [LoopVectorize] Fix cost for calls to functions that have vector versions.

Removed egregious use of auto and added a vfabi atrribute test case.

Feb 24 2020, 8:03 AM · Restricted Project
nemanjai added inline comments to D74944: [LoopVectorize] Fix cost for calls to functions that have vector versions.
Feb 24 2020, 7:53 AM · Restricted Project
nemanjai added a comment to D74944: [LoopVectorize] Fix cost for calls to functions that have vector versions.

Hi @nemanjai ,

thank you for updating the code.

Sorry for being picky, I think you should add another test. Your code need to work also for the vector-function-avi-variant attribute and not just for the -vector-library= option.

Kind regards,

Francesco

Feb 24 2020, 7:44 AM · Restricted Project

Feb 21 2020

nemanjai updated the diff for D74944: [LoopVectorize] Fix cost for calls to functions that have vector versions.

Updated to use the info from VFDatabase. Thanks @fpetrogalli!

Feb 21 2020, 11:27 AM · Restricted Project
nemanjai added inline comments to D74944: [LoopVectorize] Fix cost for calls to functions that have vector versions.
Feb 21 2020, 10:14 AM · Restricted Project

Feb 20 2020

nemanjai created D74944: [LoopVectorize] Fix cost for calls to functions that have vector versions.
Feb 20 2020, 7:28 PM · Restricted Project
nemanjai added inline comments to D72734: [VectorUtils] Rework the Vector Function Database (VFDatabase)..
Feb 20 2020, 7:28 PM · Restricted Project
nemanjai added a comment to rGf8045b250d80: Recommit "[SCCP] Remove forcedconstant, go to overdefined instead".

It would appear that this commit makes the following case trip an assert. Once the obvious change is made for the BranchInst cast to dyn_cast, it trips the assert because there is a load that uses the global.

Feb 20 2020, 7:53 AM

Feb 14 2020

nemanjai added inline comments to D74486: [PowerPC][Future] Add initial support for PC Relative addressing for constant pool loads.
Feb 14 2020, 9:45 AM · Restricted Project

Feb 13 2020

nemanjai added a comment to D74436: Change clang option -ffp-model=precise to select ffp-contract=on.

You're right, -O0 shouldn't generate FMA. I'm preparing to revert this now -- just verifying the build.

Perhaps this should be
off with no optimization
on with -O1/-O2/-O3/-Os/-Oz
fast with fast math

Feb 13 2020, 3:09 PM · Restricted Project

Feb 7 2020

nemanjai committed rG26bf877ec5ce: [PowerPC] Fix spilling of vector registers in PEI of EH aware functions (authored by nemanjai).
[PowerPC] Fix spilling of vector registers in PEI of EH aware functions
Feb 7 2020, 12:45 PM
nemanjai closed D73692: [PowerPC] Fix spilling of vector registers in PEI of EH aware functions.
Feb 7 2020, 12:45 PM · Restricted Project, Restricted Project
nemanjai added inline comments to D73692: [PowerPC] Fix spilling of vector registers in PEI of EH aware functions.
Feb 7 2020, 12:26 PM · Restricted Project, Restricted Project
nemanjai added a comment to D73692: [PowerPC] Fix spilling of vector registers in PEI of EH aware functions.

Thanks for the comments. I'll update the patch prior to committing.

Feb 7 2020, 6:57 AM · Restricted Project, Restricted Project
nemanjai updated the diff for D68237: [PowerPC] Handle f16 as a storage type only.

Fixed up the nits in the test cases and added a test for soft float. Also, moved the pattern fragments to the target independent td file for consistency.

Feb 7 2020, 6:03 AM · Restricted Project
nemanjai added a comment to D68237: [PowerPC] Handle f16 as a storage type only.

Thanks for the comments, I'll address them and upload an update shortly.

Feb 7 2020, 5:35 AM · Restricted Project

Feb 5 2020

nemanjai updated the diff for D68237: [PowerPC] Handle f16 as a storage type only.

My good intentions of updating and uploading the test case were once again thwarted by git in the previous update. Actually included the test case on this one.

Feb 5 2020, 11:02 AM · Restricted Project
nemanjai updated the summary of D68237: [PowerPC] Handle f16 as a storage type only.
Feb 5 2020, 10:34 AM · Restricted Project

Jan 31 2020

nemanjai added a comment to D73692: [PowerPC] Fix spilling of vector registers in PEI of EH aware functions.

The unit test failure is due to an unrelated commit to libc++. I'm not sure why it is showing up here, but presumably when I upload any new updates and the bot re-runs the tests, that should go away.

Jan 31 2020, 8:15 PM · Restricted Project, Restricted Project

Jan 30 2020

nemanjai added a project to D73692: [PowerPC] Fix spilling of vector registers in PEI of EH aware functions: Restricted Project.
Jan 30 2020, 7:55 AM · Restricted Project, Restricted Project
nemanjai updated the diff for D68237: [PowerPC] Handle f16 as a storage type only.

Updated the test case.

Jan 30 2020, 7:08 AM · Restricted Project
nemanjai added a comment to D68237: [PowerPC] Handle f16 as a storage type only.

@lei @stefanp Could you please re-review as this would be good to fix since it fixes a reported bug? I would like to get it committed and backported to V10.0.

Jan 30 2020, 7:08 AM · Restricted Project
nemanjai committed rG6cc6e89c11de: Fix helptext for opt/llc after 14fc20ca6 (authored by nemanjai).
Fix helptext for opt/llc after 14fc20ca6
Jan 30 2020, 6:40 AM
nemanjai closed D73267: Fix helptext for opt/llc after 14fc20ca6.
Jan 30 2020, 6:40 AM · Restricted Project
nemanjai added inline comments to D73664: [PowerPC][Future] Add Support For Functions That Do Not Use A TOC..
Jan 30 2020, 6:40 AM · Restricted Project, Restricted Project
nemanjai created D73692: [PowerPC] Fix spilling of vector registers in PEI of EH aware functions.
Jan 30 2020, 4:58 AM · Restricted Project, Restricted Project
nemanjai added inline comments to D73267: Fix helptext for opt/llc after 14fc20ca6.
Jan 30 2020, 4:41 AM · Restricted Project

Jan 27 2020

nemanjai accepted D72574: [PowerPC][Future] Add pld and pstd to future CPU.

LGTM.

Jan 27 2020, 8:55 AM · Restricted Project, Restricted Project
nemanjai accepted D69066: Add support for intrinsic llvm.ppc.eieio.

LGTM.

Jan 27 2020, 4:59 AM · Restricted Project

Jan 23 2020

nemanjai updated the diff for D73267: Fix helptext for opt/llc after 14fc20ca6.

Align the descriptions of the suboptions.

Jan 23 2020, 5:35 AM · Restricted Project
nemanjai created D73267: Fix helptext for opt/llc after 14fc20ca6.
Jan 23 2020, 5:26 AM · Restricted Project
nemanjai added inline comments to D72569: [PowerPC][Future] Add prefixed instruction paddi to future CPU.
Jan 23 2020, 5:08 AM · Restricted Project, Restricted Project

Jan 21 2020

nemanjai accepted D72569: [PowerPC][Future] Add prefixed instruction paddi to future CPU.

LGTM. Thanks for addressing the comments.

Jan 21 2020, 3:06 AM · Restricted Project, Restricted Project

Jan 16 2020

nemanjai requested changes to D72569: [PowerPC][Future] Add prefixed instruction paddi to future CPU.

Forgot to select request changes.

Jan 16 2020, 6:28 AM · Restricted Project, Restricted Project
nemanjai added a comment to D72569: [PowerPC][Future] Add prefixed instruction paddi to future CPU.

A few more comments need to be addressed for this to proceed.

Jan 16 2020, 6:25 AM · Restricted Project, Restricted Project

Jan 15 2020

nemanjai committed rG9c64f04df8ec: [PowerPC] Legalize saturating vector add/sub (authored by nemanjai).
[PowerPC] Legalize saturating vector add/sub
Jan 15 2020, 5:07 AM
nemanjai closed D71940: [PowerPC] Legalize saturating vector add/sub.
Jan 15 2020, 5:06 AM · Restricted Project

Jan 13 2020

nemanjai added inline comments to D72569: [PowerPC][Future] Add prefixed instruction paddi to future CPU.
Jan 13 2020, 5:18 PM · Restricted Project, Restricted Project
nemanjai updated the diff for D72660: [PowerPC] Improve handling of some BUILD_VECTOR nodes.

The shift amount for one of the patterns was wrong for little endian.

Jan 13 2020, 4:32 PM · Restricted Project
nemanjai created D72660: [PowerPC] Improve handling of some BUILD_VECTOR nodes.
Jan 13 2020, 3:35 PM · Restricted Project
nemanjai added a comment to D72649: [PowerPC][NFC] Reclaim TSFlags bit 6.

This introduces a dependency for https://reviews.llvm.org/D72569.

Jan 13 2020, 3:17 PM · Restricted Project, Restricted Project
nemanjai accepted D72577: [PowerPC][Future] Add prefixed loads and stores for future CPU.

LGTM.

Jan 13 2020, 7:25 AM · Restricted Project, Restricted Project
nemanjai accepted D72572: [PowerPC][Future] Branch Distance Estimation For Prefixed Instructions.

Aside from a couple of minor nits, LGTM.

Jan 13 2020, 7:16 AM · Restricted Project, Restricted Project
nemanjai added a comment to D72579: Evaluate __{c11_,}atomic_is_lock_free to 0 (avoid libcall) if larger than MaxAtomicPromoteWidth.

If I understand this correctly, this just evaluates the query for lock free atomics at compile time if the size is larger than the maximum possible size for an atomic on the target. If that's the case, this looks fine to me. But of course, some of the other target maintainers might feel otherwise.
The incompatibility with GCC might be an issue for some, but I don't expect this to be an issue at least on PPC.

Jan 13 2020, 7:06 AM · Restricted Project

Jan 12 2020

nemanjai added a comment to D72574: [PowerPC][Future] Add pld and pstd to future CPU.

Adding Florian, Daniel and Craig as reviewers since they were involved in the most recent change to this area of table gen.

Jan 12 2020, 11:29 AM · Restricted Project, Restricted Project