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nemanjai (Nemanja Ivanovic)
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User Since
Jan 23 2015, 9:38 AM (294 w, 6 d)

Recent Activity

Yesterday

nemanjai requested changes to D83500: [PowerPC][Power10] Implement custom codegen for the vec_replace_elt and vec_replace_unaligned builtins..

Just marking this not ready to keep my queue clean until the comments are addressed.

Thu, Sep 17, 7:32 PM · Restricted Project, Restricted Project, Restricted Project
nemanjai added inline comments to D83500: [PowerPC][Power10] Implement custom codegen for the vec_replace_elt and vec_replace_unaligned builtins..
Thu, Sep 17, 7:12 PM · Restricted Project, Restricted Project, Restricted Project
nemanjai added a comment to D87384: [PowerPC] Add ISEL patterns for Mul with Imm..

Why this can NOT be done in DAGCombiner by implementing decomposeMulByConstant target hook?

Thu, Sep 17, 6:08 PM · Restricted Project

Tue, Sep 15

nemanjai added a comment to D84962: [PowerPC] Correct cpsgn's behaviour on PowerPC to match that of the ABI.

Yes, this definitely needs a test case.

Tue, Sep 15, 10:40 AM · Restricted Project, Restricted Project, Restricted Project
nemanjai added a comment to D87321: Fix -gz=zlib options for linker.

This broke the PPC LLD bot and the failure has been ignored for 4 days. I believe it should be fixed with 3bc3983f229.

Tue, Sep 15, 10:38 AM · Restricted Project
nemanjai committed rG3bc3983f229f: Fix bot failure after ccb4124a4172 (authored by nemanjai).
Fix bot failure after ccb4124a4172
Tue, Sep 15, 10:37 AM
nemanjai added a comment to D86879: [XCOFF][AIX] Handle TOC entries that could not be reached by positive range in small code model.

We believe that the test is necessarily large. Has the associated bot encountered similar issues before? What was the recommended fix to retain the test in more appropriate environments?

Tue, Sep 15, 7:02 AM · Restricted Project

Mon, Sep 14

nemanjai committed rGdb94df04fbfa: Update PowerPC backend ownership in CODE_OWNERS.TXT (authored by nemanjai).
Update PowerPC backend ownership in CODE_OWNERS.TXT
Mon, Sep 14, 1:47 PM

Thu, Sep 10

nemanjai accepted D87483: [ELF][PowerPC] Define NOP as 0x60000000 to tidy up code. NFC.

I am very much in favour of such readability improvements. LGTM.

Thu, Sep 10, 8:30 PM · Restricted Project
nemanjai added inline comments to D86819: [PowerPC][Power10] Implementation of 128-bit Binary Vector Rotate builtins.
Thu, Sep 10, 7:48 AM · Restricted Project, Restricted Project, Restricted Project
nemanjai added a comment to D87318: [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic.

If I'm not mistaken, this patch is dependent on another one. If so, please add the dependency in the review.

Thu, Sep 10, 6:00 AM · Restricted Project
nemanjai added a comment to D87318: [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic.

Are the mentions of R_PPC64_GOT_TLSGD34 in the description typos of some sort? In the code, there are only mentions of R_PPC64_GOT_TLSGD_PCREL34.

Thu, Sep 10, 5:05 AM · Restricted Project
nemanjai accepted D86893: [PowerPC] Add support for R_PPC64_GOT_TPREL_PCREL34 used in TLS Initial Exec.

Please mention the relevant sections of the ABI in the description (i.e. where it mentions the 1-byte offset). Other than that and the inline nits, LGTM. Please give @MaskRay some time to have another look before committing.

Thu, Sep 10, 5:02 AM · Restricted Project

Wed, Sep 9

nemanjai added a comment to D87071: [Scheduling] Add a mutation to schedule GOT indirect instructions close to each other for linker optimization.

The fact that we catch all these additional opportunities is great. I don't fully understand all the code in the patch because I am not all that familiar with the scheduler so I'd like @stefanp to have a look at this as well.
I do have some nits inline and I'd like to see some tests that exercise the code paths where we can't reorder instructions to allow the optimization (i.e. cases where we return nullptr from getPLDpcAndLdStPair() as well as cases where we are unable to add the edges in schedHazardInsts()).

Wed, Sep 9, 8:08 PM · Restricted Project
nemanjai added a comment to D80713: [AMDGPU] Support disassembly for AMDGPU kernel descriptors.

...

I've run into this sort of problem before. The issue is almost certainly either a) incorrect assumption about host system endianness, meaning that you've incorrectly/inadvertently assumed the host is little endian, or b) assumed a 64-bit system somewhere. a) is almost certainly the issue here, based on both the test output and build bot name (ppc64*be*). I've skimmed the patch, but can't obviously see where the code is going wrong, but the test output for kd-zeroed-gfx10.s suggests it's around bytes 48-52. There may be other issues elsewhere though, since 0 renders the same regardless of size and endianness.

Wed, Sep 9, 2:47 AM · Restricted Project

Tue, Sep 8

nemanjai added a comment to D87330: [zorg] [PowerPC] Limit number of threads to 256 on ppc64le-sanitizer bot.

This is definitely needed as it is really overloading the machine. However I can't really approve it as I am not familiar with the Python code here.

Tue, Sep 8, 2:51 PM · Restricted Project
nemanjai accepted D86165: [PowerPC] Set setMaxAtomicSizeInBitsSupported appropriately for 32-bit PowerPC in PPCTargetLowering.

LGTM. Sorry for the delay.

Tue, Sep 8, 8:46 AM · Restricted Project, Restricted Project

Fri, Sep 4

nemanjai added inline comments to D87037: [DAGCombiner] Propagate FMF flags in FMA folding.
Fri, Sep 4, 7:42 PM · Restricted Project
nemanjai committed rG2d652949be4b: [PowerPC] Provide vec_cmpne on pre-Power9 architectures in altivec.h (authored by nemanjai).
[PowerPC] Provide vec_cmpne on pre-Power9 architectures in altivec.h
Fri, Sep 4, 6:49 PM
nemanjai committed rG54205f0bd237: [PowerPC] Allow const pointers for load builtins in altivec.h (authored by nemanjai).
[PowerPC] Allow const pointers for load builtins in altivec.h
Fri, Sep 4, 10:58 AM

Thu, Sep 3

nemanjai added a comment to D82485: Add tests for sequences of callbacks that RecursiveASTVisitor produces.

Is there a way this test case can somehow be broken up into multiple files? The test case takes a very long time to compile which causes intermittent but frequent failures on one of our bots that runs on a fairly small VM. Most of the failures listed here: http://lab.llvm.org:8011/builders/clang-ppc64le-linux?numbuilds=100 are timeout failures when compiling this test. It seems unfortunate to have to increase the timeout limit on the bot just for this - especially if this can be broken up into multiple files.

Thu, Sep 3, 4:29 AM · Restricted Project

Wed, Sep 2

nemanjai committed rG69289cc10ffd: [PowerPC] Fix broken kill flag after MI peephole (authored by nemanjai).
[PowerPC] Fix broken kill flag after MI peephole
Wed, Sep 2, 3:08 PM
nemanjai committed rG27714075848e: [PowerPC] Do not legalize vector FDIV without VSX (authored by nemanjai).
[PowerPC] Do not legalize vector FDIV without VSX
Wed, Sep 2, 2:04 PM
nemanjai accepted D87053: [PowerPC] Update MemorySanitizer test to cater for number of CPUs > 1024.

LGTM. Thanks for fixing this.

Wed, Sep 2, 1:21 PM · Restricted Project

Fri, Aug 28

nemanjai requested review of D86808: [MachineDCE] Delete missed dead instructions after deleting PHI.
Fri, Aug 28, 1:02 PM · Restricted Project

Thu, Aug 27

nemanjai added inline comments to D86706: [LLD][PowerPC] Add a pc-rel based long branch thunk.
Thu, Aug 27, 10:49 AM · Restricted Project

Mon, Aug 24

nemanjai added a comment to D80683: [SelectionDAG] Fix up SimplifyDemandedBits for ppcf128.

@RKSimon Do you think you'll have a chance to have another look at this some time soon?

Mon, Aug 24, 3:26 PM · Restricted Project
nemanjai committed rG075a92dea11e: [PowerPC] Do not use FISel for calls and TOC-based accesses with PC-Rel (authored by nemanjai).
[PowerPC] Do not use FISel for calls and TOC-based accesses with PC-Rel
Mon, Aug 24, 2:52 PM
nemanjai closed D86343: [PowerPC] Use SDISel instead of FISel for calls and TOC-based accesses with PC-Rel.
Mon, Aug 24, 2:52 PM · Restricted Project
nemanjai committed rGc485343c8310: [PowerPC] Handle SUBFIC in reg+reg -> reg+imm transformation (authored by nemanjai).
[PowerPC] Handle SUBFIC in reg+reg -> reg+imm transformation
Mon, Aug 24, 2:23 PM
nemanjai closed D84659: [PowerPC] Handle SUBFIC in reg+reg -> reg+imm transformation.
Mon, Aug 24, 2:23 PM · Restricted Project

Fri, Aug 21

nemanjai accepted D82502: [PowerPC] Implement Load VSX Vector and Sign Extend and Zero Extend.

LGTM aside from a couple of minor nits.

Fri, Aug 21, 12:08 PM · Restricted Project, Restricted Project, Restricted Project
nemanjai requested review of D86343: [PowerPC] Use SDISel instead of FISel for calls and TOC-based accesses with PC-Rel.
Fri, Aug 21, 5:16 AM · Restricted Project
nemanjai committed rG519b0e3e9d6d: [PowerPC] Pre-commit FISel with PC-Rel test (authored by nemanjai).
[PowerPC] Pre-commit FISel with PC-Rel test
Fri, Aug 21, 4:59 AM

Thu, Aug 20

nemanjai added a comment to D86262: [LoopIdiomRecognizePass] Options to disable part or the entire Loop Idiom Recognize Pass.

I agree that the justification provided seems somewhat inadequate - using memset/memcpy as a canonical form and teaching DA to handle it seems quite reasonable. However, there are libraries that are highly tuned wrt. when to call these functions and when not to. So it seems to me perfectly reasonable to provide an option to disable this for such uses. For example, a function may perform a memcpy/memset operation on data that is known to only be called only from range-limited sites. The compiler (without PGO+LTO which are often not an option) cannot know that it should expand such calls in the back end.

The issue you raise seems to be a cost-modeling issue, right? Ideally the compiler would know whether it is faster to use a loop or a memcpy. IIUC you are worried about the cases where the compiler replaces a loop with a memset, but the loop would be faster? Is there a way to improve the cost-modeling? IMO adding options like this potentially leads to papering over cost-modeling issues, rather than addressing the underlying issue. Also, such options tend to now work well together with LTO.

Thu, Aug 20, 3:54 PM · Restricted Project
nemanjai added a comment to D86262: [LoopIdiomRecognizePass] Options to disable part or the entire Loop Idiom Recognize Pass.

I agree that the justification provided seems somewhat inadequate - using memset/memcpy as a canonical form and teaching DA to handle it seems quite reasonable. However, there are libraries that are highly tuned wrt. when to call these functions and when not to. So it seems to me perfectly reasonable to provide an option to disable this for such uses. For example, a function may perform a memcpy/memset operation on data that is known to only be called only from range-limited sites. The compiler (without PGO+LTO which are often not an option) cannot know that it should expand such calls in the back end.

Thu, Aug 20, 4:05 AM · Restricted Project
nemanjai accepted D68035: [PowerPC] Extend custom lower of vector truncate to handle wider input.

Other than a couple of minor nits, LGTM. I am so sorry about the delay in reviewing this.

Thu, Aug 20, 3:41 AM · Restricted Project

Aug 17 2020

nemanjai added a comment to D85994: [LLD][PowerPC] Add check in LLD to produce an error for missing TLSGD/TLSLD.

First, if this issue is not common enough, I'd rather we don't have a diagnostic at all.

If we do need it, note that *(i - 2); may be out of bounds.

Last, we should avoid pre-built object files. You can synthesize them with yaml2obj. The preferred style is llvm/test/tools/llvm-readobj/ELF/*.test. lld/test/ELF has some yaml2obj tests as well.

Aug 17 2020, 11:25 AM · Restricted Project
nemanjai committed rGcddb0dbcefd8: [LLD][PowerPC] Implement GOT to PC-Rel relaxation (authored by nemanjai).
[LLD][PowerPC] Implement GOT to PC-Rel relaxation
Aug 17 2020, 7:37 AM
nemanjai closed D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.
Aug 17 2020, 7:36 AM · Restricted Project, Restricted Project

Aug 14 2020

nemanjai accepted D85979: [llvm-zorg] PowerPC Fixing Malformed LIT Flag.

LGTM. Thanks for fixing this. Hopefully we can get this committed quickly to bring the LLD bot back to green.

Aug 14 2020, 10:59 AM

Aug 13 2020

nemanjai added a comment to D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.

I believe we can have the optimization relocation on a code sequence like:

paddi ra, sym@pcrel
load/store rt, offset(ra)

If so we should have a test showing we relocate it properly even if we don't optimize it yet.

Aug 13 2020, 8:50 AM · Restricted Project, Restricted Project

Aug 12 2020

nemanjai added inline comments to D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.
Aug 12 2020, 4:00 PM · Restricted Project, Restricted Project
nemanjai updated the diff for D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.

Split the instruction enums into "Legacy" and "Prefixed" and use the .def file only for functions that access the enums as it simplifies the preprocessor logic.

Aug 12 2020, 1:18 PM · Restricted Project, Restricted Project
nemanjai added inline comments to D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.
Aug 12 2020, 9:49 AM · Restricted Project, Restricted Project

Aug 11 2020

nemanjai updated the diff for D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.

It is incorrect to relax this relocation if it is on a paddi. Bail out from the optimization if the relocation is on anything but a pld.

Aug 11 2020, 11:15 PM · Restricted Project, Restricted Project
nemanjai updated the diff for D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.

Cleaned up the definitions of instructions and addressed other minor comments.

Aug 11 2020, 7:58 AM · Restricted Project, Restricted Project

Aug 7 2020

nemanjai added a comment to D85504: [Reassociate] [PowerPC] stop common out mul factors if fma is preferred on target.

There seems to be some (weak) correlation between this and https://reviews.llvm.org/D84309 which I am reworking to remove it from canonicalization. It may be worth looking into whether we can catch both issues in CGP.

Aug 7 2020, 10:05 AM · Restricted Project
nemanjai added a comment to D80683: [SelectionDAG] Fix up SimplifyDemandedBits for ppcf128.

Ping.

Aug 7 2020, 9:59 AM · Restricted Project
nemanjai added a comment to D83569: [PowerPC] Fix the killed flag in mi-peephole pass.

It seems like we keep adding more and more complexity here to handle these flags. Is there not a pass we can just run that will simply re-compute this stuff (at least for the use of this while we're in SSA)? What does LiveVariables do? We certainly end up running DCE after the MI peephole to get rid of dead instructions after the transformation. It seems like we should be able to do the same thing for killed/dead flags as well.

Aug 7 2020, 9:55 AM · Restricted Project
nemanjai accepted D85391: [PPC] Rename bool-ret-to-int -> ppc-bool-ret-to-int.

Sure, it's PPC specific and the name should reflect that. Thanks. LGTM.

Aug 7 2020, 5:13 AM · Restricted Project
nemanjai accepted D85377: [PowerPC] Add option to control PCRel GOT indirect linker optimization.

I agree with Victor, please remove uses of future and use pwr10. All of this can be addressed when committing - another round of review is not required. LGTM.

Aug 7 2020, 5:12 AM · Restricted Project
nemanjai added inline comments to D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.
Aug 7 2020, 5:05 AM · Restricted Project, Restricted Project
nemanjai added inline comments to D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.
Aug 7 2020, 4:13 AM · Restricted Project, Restricted Project

Aug 6 2020

nemanjai accepted D85448: [PowerPC][PCRelative] Set TLS unsupported with PC relative memops.

Feel free to address the comment when committing the patch.

Aug 6 2020, 12:52 PM · Restricted Project, Restricted Project
nemanjai added inline comments to D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.
Aug 6 2020, 7:12 AM · Restricted Project, Restricted Project

Aug 5 2020

nemanjai updated the diff for D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.
  • Move implementation completely into LLD
  • Add option to disable the optimization
  • Handle computation of the total offset when the access instruction has a non-zero displacement
  • Add tests with the new option as well as a test with non-zero displacement on the access instructions
Aug 5 2020, 6:18 PM · Restricted Project, Restricted Project

Aug 4 2020

nemanjai planned changes to D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.

Need to account for a displacement on the access instruction and add some tests along the lines of

extern int Ext[40];
int test(int a) {
  return a + Ext[10];
}
Aug 4 2020, 9:41 AM · Restricted Project, Restricted Project
nemanjai committed rG14d726acd604: [PowerPC] Don't remove single swap between the load and store (authored by nemanjai).
[PowerPC] Don't remove single swap between the load and store
Aug 4 2020, 8:38 AM
nemanjai closed D84785: [PowerPC] Don't remove swap if there is only a single one between the load and store.
Aug 4 2020, 8:38 AM · Restricted Project
nemanjai committed rG62a933b72c5b: [Support][PPC] Fix bot failures due to cd53ded557c3 (authored by nemanjai).
[Support][PPC] Fix bot failures due to cd53ded557c3
Aug 4 2020, 7:01 AM
nemanjai added inline comments to rG36750ba5bd0e: [X86][AVX] isHorizontalBinOp - relax lane-crossing limits for AVX1-only targets..
Aug 4 2020, 6:54 AM
nemanjai added inline comments to rG36750ba5bd0e: [X86][AVX] isHorizontalBinOp - relax lane-crossing limits for AVX1-only targets..
Aug 4 2020, 6:44 AM

Aug 3 2020

nemanjai added a comment to D84570: [tsan] Fix the open and open64 interceptors to have correct declarations (variadic functions).

It would appear that this failure is not really related to this patch at all. Seems to fail with -O0/-O1 regardless of which patch is applied.
https://pastebin.com/1Mvz5KDz

Please let me know if there's something else I can help with.

Aug 3 2020, 6:23 AM · Restricted Project
nemanjai updated subscribers of D84570: [tsan] Fix the open and open64 interceptors to have correct declarations (variadic functions).
Aug 3 2020, 6:13 AM · Restricted Project
nemanjai added a comment to D84570: [tsan] Fix the open and open64 interceptors to have correct declarations (variadic functions).

It would appear that this failure is not really related to this patch at all. Seems to fail with -O0/-O1 regardless of which patch is applied.
https://pastebin.com/1Mvz5KDz

Aug 3 2020, 6:13 AM · Restricted Project
nemanjai added a comment to D84570: [tsan] Fix the open and open64 interceptors to have correct declarations (variadic functions).

I'll send you the results in a few minutes. Sorry about the delay - holiday here in Canada.

Aug 3 2020, 5:43 AM · Restricted Project
nemanjai added inline comments to rGcd53ded557c3: [Support] Fix computeHostNumPhysicalCores() to respect affinity.
Aug 3 2020, 5:06 AM

Jul 31 2020

nemanjai added a comment to D84956: [zorg] Add Flang and MLIR PowerPC buildbot on Red Hat.

Since we are adding another bot, we need to adjust the number of threads that are used by LIT for all the bots running on that machine. Thanks.

Jul 31 2020, 5:41 AM
nemanjai added inline comments to D84956: [zorg] Add Flang and MLIR PowerPC buildbot on Red Hat.
Jul 31 2020, 5:06 AM
nemanjai closed D84901: [Sanitizers] Fix lint failure with Python 3.6.

I forgot to add the differential revision to the commit message.
Committed in https://reviews.llvm.org/rGacb3b8dce1cd

Jul 31 2020, 4:27 AM · Restricted Project
nemanjai committed rGacb3b8dce1cd: [Sanitizers] Fix lint failure with Python 3.6 (authored by nemanjai).
[Sanitizers] Fix lint failure with Python 3.6
Jul 31 2020, 4:22 AM

Jul 30 2020

nemanjai updated the diff for D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.

Remove erroneous unrelated update.

Jul 30 2020, 4:27 PM · Restricted Project, Restricted Project
nemanjai updated the diff for D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.

Fix up usage of unsigned long literal suffixes.
Add new rel-expr.
Fix up minor nits.
Shorten the test cases.

Jul 30 2020, 4:26 PM · Restricted Project, Restricted Project
nemanjai added inline comments to D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.
Jul 30 2020, 4:03 PM · Restricted Project, Restricted Project
nemanjai added a comment to D84570: [tsan] Fix the open and open64 interceptors to have correct declarations (variadic functions).

CC @simoatze, @wschmidt:

Would anyone with access to a Linux/PPC64 machine be willing to take a look if the open() syscall is receiving the right value (0600 from the testcase)?

Jul 30 2020, 12:35 PM · Restricted Project
nemanjai added a comment to D84901: [Sanitizers] Fix lint failure with Python 3.6.

Sample of the build bot failure this resolves:
http://lab.llvm.org:8011/builders/clang-ppc64le-rhel/builds/6122/steps/ninja%20check%201/logs/stdio

Jul 30 2020, 3:03 AM · Restricted Project

Jul 29 2020

nemanjai requested review of D84901: [Sanitizers] Fix lint failure with Python 3.6.
Jul 29 2020, 5:42 PM · Restricted Project

Jul 28 2020

nemanjai added a comment to D84785: [PowerPC] Don't remove swap if there is only a single one between the load and store.

@wschmidt Sorry to ask you to go back to looking at LLVM code, but figured I'd add you for two reasons:

  1. If gcc has the same issue
  2. If the proposed fix is completely out to lunch :)
Jul 28 2020, 4:59 PM · Restricted Project
nemanjai added inline comments to D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.
Jul 28 2020, 12:40 PM · Restricted Project, Restricted Project
nemanjai accepted D84786: [PowerPC] Mark allocator_oom_test.cpp unsupported on PowerPC.

LGTM. Thank you.

Jul 28 2020, 12:12 PM · Restricted Project, Restricted Project, Restricted Project
nemanjai added a comment to D84785: [PowerPC] Don't remove swap if there is only a single one between the load and store.

@wschmidt Sorry to ask you to go back to looking at LLVM code, but figured I'd add you for two reasons:

  1. If gcc has the same issue
  2. If the proposed fix is completely out to lunch :)
Jul 28 2020, 11:50 AM · Restricted Project
nemanjai requested review of D84785: [PowerPC] Don't remove swap if there is only a single one between the load and store.
Jul 28 2020, 11:49 AM · Restricted Project

Jul 27 2020

nemanjai updated the diff for D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.

Add test cases for all the different instructions - thanks for your help producing these @NeHuang.
Run clang-format on the patch since the pre-commit build flagged a bunch of issues.

Jul 27 2020, 9:39 AM · Restricted Project, Restricted Project
nemanjai added inline comments to D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation.
Jul 27 2020, 9:24 AM · Restricted Project, Restricted Project
nemanjai added a comment to D83948: [PowerPC] Custom lowering for funnel shifts.

The fix to recover the regression: https://reviews.llvm.org/D84659

Jul 27 2020, 7:26 AM · Restricted Project
Herald added a project to D84659: [PowerPC] Handle SUBFIC in reg+reg -> reg+imm transformation: Restricted Project.
Jul 27 2020, 7:25 AM · Restricted Project
nemanjai accepted D83948: [PowerPC] Custom lowering for funnel shifts.

LGTM.

Jul 27 2020, 7:16 AM · Restricted Project

Jul 25 2020

nemanjai committed rGcdead4f89c0e: [PowerPC][NFC] Fix an assert that cannot trip from 7d076e19e31a (authored by nemanjai).
[PowerPC][NFC] Fix an assert that cannot trip from 7d076e19e31a
Jul 25 2020, 5:33 PM
nemanjai added inline comments to rG7d076e19e31a: [PowerPC] Fix computation of offset for load-and-splat for permuted loads.
Jul 25 2020, 5:24 PM

Jul 24 2020

nemanjai added a comment to D77448: [PowerPC] Canonicalize shuffles to match more single-instruction masks on LE.
Jul 24 2020, 12:43 PM · Restricted Project
nemanjai committed rG7d076e19e31a: [PowerPC] Fix computation of offset for load-and-splat for permuted loads (authored by nemanjai).
[PowerPC] Fix computation of offset for load-and-splat for permuted loads
Jul 24 2020, 12:39 PM
nemanjai added a comment to rG59a76d957a26: Re-apply:" Emit DW_OP_implicit_value for Floating point constants".

Hi there!
I believe this patch is causing failures on the following (big endian) PowerPC buildbots:
http://lab.llvm.org:8011/builders/clang-ppc64be-linux-multistage
http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt/
http://lab.llvm.org:8011/builders/clang-ppc64be-linux

Example of the failures can be seen at: http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/51729

Could you please fix or pull this changeset if necessary? Thank you.

Jul 24 2020, 11:33 AM

Jul 22 2020

Herald added a project to D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation: Restricted Project.
Jul 22 2020, 1:46 PM · Restricted Project, Restricted Project
nemanjai added a comment to D84309: [InstCombine] Preserve FMA opportunities when combining PHI nodes.

Sounds like agreement. I'll move this to CGP. Thanks for the quick response.

Jul 22 2020, 9:56 AM · Restricted Project
Herald added a project to D84309: [InstCombine] Preserve FMA opportunities when combining PHI nodes: Restricted Project.
Jul 22 2020, 4:52 AM · Restricted Project
nemanjai accepted D83365: [PowerPC] start and end parameters for fixupIsDeadOrKill may exist in different block before RA.

LGTM. I am really sorry about not getting back to this earlier.

Jul 22 2020, 2:14 AM · Restricted Project
nemanjai accepted D84291: [PowerPC][Power10] Fix the Test LSB by Byte (xvtlsbb) Builtins Implementation.

LGTM. The test case addition can be done on the commit.

Jul 22 2020, 2:08 AM · Restricted Project, Restricted Project, Restricted Project

Jul 21 2020

nemanjai added a comment to D84126: Enable -Wsuggest-override in the LLVM build.

There is a lot of instances where this warning fires in the unit tests since gtest does not appear to use the override keyword. This in turn causes failures on bootstrap builds that use -Werror.
An example: http://lab.llvm.org:8011/builders/ppc64le-lld-multistage-test/builds/10717

Jul 21 2020, 4:33 PM · Restricted Project, Restricted Project, Restricted Project, Restricted Project

Jul 20 2020

nemanjai accepted D79864: [PowerPC] Add linker opt for PC Relative GOT indirect accesses.

The remaining comments are minor nits that can be addressed on commit. LGTM.

Jul 20 2020, 9:16 PM · Restricted Project