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luismarques (Luís Marques)
Software/hardware engineer at lowRISC

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User Details

User Since
Nov 2 2018, 7:48 AM (115 w, 6 d)

Mostly LLVM work.

Recent Activity

Today

luismarques accepted D93767: [RISCV] Legalize select when Zbt extension available.

LGTM. The issues we detected are now solved.

Thu, Jan 21, 10:15 AM · Restricted Project

Thu, Jan 7

luismarques committed rG15f597115068: [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection (authored by luismarques).
[LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection
Thu, Jan 7, 3:04 PM
luismarques closed D86292: [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection.
Thu, Jan 7, 3:04 PM · Restricted Project
luismarques added a comment to D91052: [WebAssembly] Fix NaN handling when converting FP types.

Ping.

Thu, Jan 7, 12:59 PM · Restricted Project
luismarques added a comment to D92124: [CMake][compiler-rt][RISCV] Support RISC-V cross-compilation.

Ping.

Thu, Jan 7, 12:56 PM · Restricted Project
luismarques updated the diff for D79141: [RISCV] Better Split Stack Pointer Adjustment for RVC.
  • Sprayed test with correctness mist.
Thu, Jan 7, 12:24 PM · Restricted Project
luismarques updated the diff for D79141: [RISCV] Better Split Stack Pointer Adjustment for RVC.

Rebase.

Thu, Jan 7, 12:21 PM · Restricted Project

Mon, Jan 4

luismarques added a comment to D80690: [RISCV] Support libunwind for riscv32.

This seems roughly OK now. Does anyone with libunwind experience want to give it a thumbs up?
#libunwind people, does this LGTY?

ping.

Mon, Jan 4, 8:23 AM · Restricted Project, Restricted Project
luismarques added a comment to D92464: [compiler-rt][builtins][RISCV] Port __clear_cache to RISC-V baremetal.

Is there a particular motivation for porting this function to the bare-metal target? It seems to me that whatever bare-metal project is using this would be better off using a plain fence.i or other mechanism, at least at this point in time.

Mon, Jan 4, 3:40 AM · Restricted Project

Sun, Jan 3

luismarques added a comment to D73170: Handle subregs and superregs in callee-saved register mask.

Ping?

Sun, Jan 3, 4:40 PM · Restricted Project

Sat, Jan 2

luismarques updated subscribers of D91334: [compiler-rt] Set CMAKE_TRY_COMPILE_TARGET_TYPE to STATIC_LIBRARY when building builtins standalone.

Based on your description and rationale I *think* this makes sense and should be safe. I'll leave it to others to explicitly approve the patch, though.

Sat, Jan 2, 8:45 AM · Restricted Project

Mon, Dec 28

luismarques accepted D93851: [RISCV] Rewrite and simplify helper function. NFC..

(Now, that C++ has lambdas, etc, I wonder if using a standard find algorithm would be even simpler/cleaner?)

Mon, Dec 28, 9:18 AM · Restricted Project

Dec 9 2020

luismarques committed rGe28b6a60bc02: [RISCV][NFC] Regenerate RISCV CodeGen tests (authored by mundaym).
[RISCV][NFC] Regenerate RISCV CodeGen tests
Dec 9 2020, 11:44 AM
luismarques closed D92841: [RISCV][NFC] Regenerate RISCV CodeGen tests.
Dec 9 2020, 11:44 AM · Restricted Project

Dec 8 2020

luismarques closed D91269: [Clang][CodeGen][RISCV] Add hard float ABI tests with empty struct.
Dec 8 2020, 3:27 AM · Restricted Project
luismarques closed D91278: [Clang][CodeGen][RISCV] Fix hard float ABI for struct with empty struct and complex.
Dec 8 2020, 3:27 AM · Restricted Project
luismarques closed D91270: [Clang][CodeGen][RISCV] Fix hard float ABI test cases with empty struct.
Dec 8 2020, 3:26 AM · Restricted Project

Dec 7 2020

luismarques updated the diff for D91278: [Clang][CodeGen][RISCV] Fix hard float ABI for struct with empty struct and complex.

Add float Complex case, for regression test completeness.

Dec 7 2020, 12:27 PM · Restricted Project
luismarques updated the diff for D91270: [Clang][CodeGen][RISCV] Fix hard float ABI test cases with empty struct.

Address review feedback.

Dec 7 2020, 12:05 PM · Restricted Project

Dec 3 2020

luismarques added a comment to D92464: [compiler-rt][builtins][RISCV] Port __clear_cache to RISC-V baremetal.

I'm concerned by the fact that this port doesn't clear the cache for other cores, which this builtin generally does. Furthermore, the #elif doesn't reliably detect baremetal, since it could be other non-Linux OSes, such as BSD. It's also not immediately obvious who actually requires / benefits from this builtin. Lastly, the existing test won't run for baremetal, so this won't get tested.

Dec 3 2020, 3:17 PM · Restricted Project
luismarques added a comment to D92147: [RISCV] Add support for printing pcrel immediates as absolute addresses in llvm-objdump.

We've been pretty consistent with trying to align our behaviour with the GNU tools, so these kinds of patches have always been welcome. I'm not sure if there are compatibility concerns with changing the behaviour now. Should we have a an option for changing the printing style, both for compatibility and personal preference?
About the verification, I'm not sure what the best approach is.

Dec 3 2020, 2:22 AM · Restricted Project

Dec 1 2020

luismarques updated the diff for D92403: [LSan][RISCV] Enable LSan for RISCV64.

Fix formatting.

Dec 1 2020, 12:24 PM · Restricted Project, Restricted Project
luismarques requested review of D92403: [LSan][RISCV] Enable LSan for RISCV64.
Dec 1 2020, 9:51 AM · Restricted Project, Restricted Project
luismarques added a comment to D87997: [RISCV][crt] support building without init_array.

@phosek, @luismarques thanks for your feedback (sorry for the delay with reply)!

Yes, the nop is not really needed. I'll make appropriate adjustments.

Dec 1 2020, 2:55 AM · Restricted Project

Nov 25 2020

luismarques requested review of D92124: [CMake][compiler-rt][RISCV] Support RISC-V cross-compilation.
Nov 25 2020, 12:24 PM · Restricted Project
luismarques added a comment to D91043: [DebugInfo] Fix convert-loclist.ll.

(3) is part of it, but not quite. All these test "REQUIRES" x86 (the DebugInfo/X86 directory has this as a general requirement)

Nov 25 2020, 4:08 AM · Restricted Project

Nov 24 2020

luismarques committed rG1bc85cbbb803: [Sanitizer][RISCV] Fix redefinition of REG_SP (authored by luismarques).
[Sanitizer][RISCV] Fix redefinition of REG_SP
Nov 24 2020, 4:05 PM
luismarques closed D90934: [Sanitizer][RISCV] Fix redefinition of REG_SP.
Nov 24 2020, 4:05 PM · Restricted Project
luismarques added a comment to D89788: [RISCV] Add GHC calling convention.

I'll commit it. Thank you.

Nov 24 2020, 3:08 PM · Restricted Project
luismarques added a comment to D91043: [DebugInfo] Fix convert-loclist.ll.

I think the first question is rhetorical, but it ensures a DWARF target. The second question is the key: What makes this test special, for @luismarques environment? If you build with just RISC-V as the target, this entire directory should become unsupported. If you have both X86 and RISC-V, then these tests do run, and apparently (mostly) run fine. Why didn't this one?

Nov 24 2020, 3:06 PM · Restricted Project
luismarques committed rG22169e11c304: [MC/AsmParser] Fix use of Arm calling convention in target-agnostic test (authored by luismarques).
[MC/AsmParser] Fix use of Arm calling convention in target-agnostic test
Nov 24 2020, 2:57 PM
luismarques closed D91042: [MC/AsmParser] Fix use of Arm calling convention in target agnostic test.
Nov 24 2020, 2:56 PM · Restricted Project
luismarques committed rG28de0fb4863a: [RISCV] Set __GCC_HAVE_SYNC_COMPARE_AND_SWAP_x defines (authored by luismarques).
[RISCV] Set __GCC_HAVE_SYNC_COMPARE_AND_SWAP_x defines
Nov 24 2020, 2:51 PM
luismarques closed D91784: [RISCV] Set __GCC_HAVE_SYNC_COMPARE_AND_SWAP_x defines.
Nov 24 2020, 2:51 PM · Restricted Project
luismarques committed rGa8dc2110cd4d: [RISCV] Add GHC calling convention (authored by luismarques).
[RISCV] Add GHC calling convention
Nov 24 2020, 2:36 PM
luismarques added a reverting change for rGf8317bb256be: [RISCV] Add GHC calling convention: rGe4d938024551: Revert "[RISCV] Add GHC calling convention".
Nov 24 2020, 2:35 PM
luismarques committed rGe4d938024551: Revert "[RISCV] Add GHC calling convention" (authored by luismarques).
Revert "[RISCV] Add GHC calling convention"
Nov 24 2020, 2:35 PM
luismarques added a reverting change for D89788: [RISCV] Add GHC calling convention: rGe4d938024551: Revert "[RISCV] Add GHC calling convention".
Nov 24 2020, 2:34 PM · Restricted Project
luismarques committed rGf8317bb256be: [RISCV] Add GHC calling convention (authored by luismarques).
[RISCV] Add GHC calling convention
Nov 24 2020, 1:57 PM
luismarques closed D89788: [RISCV] Add GHC calling convention.
Nov 24 2020, 1:57 PM · Restricted Project
luismarques added a comment to D89788: [RISCV] Add GHC calling convention.

Could someone please commit this for me?

Nov 24 2020, 1:53 PM · Restricted Project
luismarques requested review of D86292: [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection.
Nov 24 2020, 7:53 AM · Restricted Project
luismarques updated the diff for D86292: [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection.

Merge tests, using --docnum.

Nov 24 2020, 7:53 AM · Restricted Project
luismarques added a reviewer for D91314: [RISCV] ELF attribute for Zfh extension.: jrtc27.
Nov 24 2020, 2:24 AM · Restricted Project
luismarques added inline comments to D91314: [RISCV] ELF attribute for Zfh extension..
Nov 24 2020, 2:24 AM · Restricted Project
luismarques added a comment to D90738: [RISCV] Support Zfh half-precision floating-point extension..

Overall this still looks good to me. Could you please just fix the following inconsistency?

Nov 24 2020, 2:13 AM · Restricted Project

Nov 23 2020

luismarques added a comment to D90738: [RISCV] Support Zfh half-precision floating-point extension..

I had added an inline comment for half-arith.ll nitpicking that it should probably use a hard-float ABI, to cut down on the fmvs. Now it has test checks for both soft float and hard float ABIs. @HsiangKai Is this because you think there is value in testing both scenarios in that file (and several others)?

Nov 23 2020, 7:49 AM · Restricted Project
luismarques accepted D91315: [RISCV] Handle zfh in the arch string..

LGTM.

Nov 23 2020, 7:28 AM · Restricted Project
luismarques added a comment to D91717: [RISCV][compiler-rt] Add support for save-restore.

Because the stack alignment is 16 bytes; see my earlier comment.

Nov 23 2020, 6:44 AM · Restricted Project
luismarques added a comment to D91717: [RISCV][compiler-rt] Add support for save-restore.

I used bundles of 4 just to follow the behaviour I saw in libgcc, and the grouping of 2 for rv64 seemed a bit too fine-grained. I'm not sure what the original justification for the coalescing into groups of 2/4 was in libgcc.
I'll update to account for other suggested changes and see if I can find any benchmarks which show the tradeoff for the grouping threshold

Nov 23 2020, 6:33 AM · Restricted Project

Nov 20 2020

luismarques added reviewers for D91719: [RISCV] Add support for using -msave-restore with tailcalls: jrtc27, luismarques, lenary, asb.
Nov 20 2020, 6:08 AM · Restricted Project
luismarques added reviewers for D91717: [RISCV][compiler-rt] Add support for save-restore: luismarques, asb, lenary.
Nov 20 2020, 4:44 AM · Restricted Project
luismarques added a comment to D91717: [RISCV][compiler-rt] Add support for save-restore.

It seems a bit excessive to me to coalesce the entry points into bundles of 4. Do you have any particular benchmarking data or reasoning that supports choosing that threshold?
Also, shouldn't this implementation include CFI directives?

Nov 20 2020, 4:44 AM · Restricted Project
luismarques accepted D90973: [RISCV] Remove RV32 HwMode. Use DefaultMode for RV32.

Any objections to me committing this?

Nov 20 2020, 3:51 AM · Restricted Project

Nov 11 2020

luismarques added a reviewer for D91043: [DebugInfo] Fix convert-loclist.ll: rnk.
Nov 11 2020, 2:58 PM · Restricted Project
luismarques added a comment to D91043: [DebugInfo] Fix convert-loclist.ll.

I'm a bit confused - looks like there's a bunch of other uses of %llc_dwarf in this test directory - any idea why those ones don't fail in the same way/for you?

Nov 11 2020, 2:57 PM · Restricted Project
luismarques updated the diff for D91278: [Clang][CodeGen][RISCV] Fix hard float ABI for struct with empty struct and complex.

Fix bad test.

Nov 11 2020, 9:34 AM · Restricted Project
luismarques requested review of D91278: [Clang][CodeGen][RISCV] Fix hard float ABI for struct with empty struct and complex.
Nov 11 2020, 9:31 AM · Restricted Project
luismarques requested review of D91270: [Clang][CodeGen][RISCV] Fix hard float ABI test cases with empty struct.
Nov 11 2020, 8:27 AM · Restricted Project
luismarques requested review of D91269: [Clang][CodeGen][RISCV] Add hard float ABI tests with empty struct.
Nov 11 2020, 8:22 AM · Restricted Project

Nov 10 2020

luismarques added a comment to D90738: [RISCV] Support Zfh half-precision floating-point extension..

This patch is pretty big, so I haven't yet been able to delve as deeply as I wanted to, but so far I didn't notice any major issues.
Thanks to Craig for providing the initial round of feedback, and pointing out several issues.
Some nitpicking remarks:

  • Several tests should probably use a hard-float ABI, to cut down on the fmvs.
  • For files that handle F, D and half, it would be nice to try to be more consistent regarding the order in which the code and declarations for those appears. (When handling early returns, short-circuit evaluation, and so on, it might arguably still make sense to be inconsistent and order things based on expected frequency, as that might have a very slightly compile-time performance impact)
Nov 10 2020, 7:23 AM · Restricted Project

Nov 9 2020

luismarques retitled D91052: [WebAssembly] Fix NaN handling when converting FP types from [WebAssembly] Fix NaN handing when converting FP types to [WebAssembly] Fix NaN handling when converting FP types.
Nov 9 2020, 2:06 AM · Restricted Project
luismarques requested review of D91052: [WebAssembly] Fix NaN handling when converting FP types.
Nov 9 2020, 12:39 AM · Restricted Project

Nov 8 2020

luismarques requested review of D91043: [DebugInfo] Fix convert-loclist.ll.
Nov 8 2020, 4:51 PM · Restricted Project
luismarques requested review of D91042: [MC/AsmParser] Fix use of Arm calling convention in target agnostic test.
Nov 8 2020, 4:11 PM · Restricted Project

Nov 6 2020

luismarques requested review of D90934: [Sanitizer][RISCV] Fix redefinition of REG_SP.
Nov 6 2020, 6:11 AM · Restricted Project

Nov 5 2020

luismarques updated the diff for D79141: [RISCV] Better Split Stack Pointer Adjustment for RVC.

Fix borked test update.

Nov 5 2020, 8:10 AM · Restricted Project
luismarques added a comment to D80690: [RISCV] Support libunwind for riscv32.

This seems roughly OK now. Does anyone with libunwind experience want to give it a thumbs up?
#libunwind people, does this LGTY?

Nov 5 2020, 1:59 AM · Restricted Project, Restricted Project
luismarques added a comment to D90817: [RISCV] Use the 'si' lib call for (double (fp_to_sint/uint i32 X)) when F extension is enabled..

LGTM. I guess the old libcall was producing the correct result anyway, since the in-register representation is the same?

Nov 5 2020, 1:57 AM · Restricted Project
luismarques accepted D90817: [RISCV] Use the 'si' lib call for (double (fp_to_sint/uint i32 X)) when F extension is enabled..

LGTM. I guess the old libcall was producing the correct result anyway, since the in-register representation is the same?

Nov 5 2020, 1:54 AM · Restricted Project
luismarques resigned from D86195: [RISC-V] Add support for AddressSanitizer on RISC-V GCC.
Nov 5 2020, 1:42 AM
luismarques resigned from D86198: llvm enable sanitizer (RISCV64).
Nov 5 2020, 1:42 AM
luismarques updated the diff for D90574: [Sanitizer][RISCV] Fix FastUnwindTest.

Address review feedback.

Nov 5 2020, 1:21 AM · Restricted Project

Nov 4 2020

luismarques accepted D90739: [RISCV] Remove assertsexti32 from fslw/fsrw isel patterns..

LGTM.

Nov 4 2020, 8:08 AM · Restricted Project
luismarques accepted D90585: [RISCV] Check all 64-bits of the mask in SelectRORIW..

Overall LGTM. See inline comment before committing.

Nov 4 2020, 6:54 AM · Restricted Project
luismarques accepted D90546: [RISCV] Remove custom isel for (srl (shl val, 32), imm). Use pattern instead. NFCI.
Nov 4 2020, 3:45 AM · Restricted Project
luismarques added a comment to D90546: [RISCV] Remove custom isel for (srl (shl val, 32), imm). Use pattern instead. NFCI.

LGTM.

Nov 4 2020, 3:45 AM · Restricted Project
luismarques updated the diff for D79141: [RISCV] Better Split Stack Pointer Adjustment for RVC.

NFC minor clean-up tweak.

Nov 4 2020, 3:29 AM · Restricted Project

Nov 3 2020

luismarques updated the diff for D79141: [RISCV] Better Split Stack Pointer Adjustment for RVC.

Add logic to balance increased instruction count vs decreased code size.

Nov 3 2020, 6:43 PM · Restricted Project
luismarques commandeered D79141: [RISCV] Better Split Stack Pointer Adjustment for RVC.

Arrr matey, I'm the captain now!

Nov 3 2020, 6:40 PM · Restricted Project

Nov 2 2020

luismarques accepted D90580: [RISCV] When matching RORIW, make sure the same input is given to both shifts..

LGTM. Good nitpicking feedback by @frasercrmck! :-)

Nov 2 2020, 3:33 AM · Restricted Project

Nov 1 2020

luismarques added a comment to D62732: [RISCV] Add SystemV ABI.

I'm not sure what's the state of risc-v hardware these days and how much resources do you have available, but if it's at all possible, I'd definitely recommend adding the lldb-server bits for risc-v and adding a builtbot for testing this configuration.

Nov 1 2020, 4:59 PM · Restricted Project
luismarques updated the diff for D86292: [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection.

Moved some of the ArchSpec/core bits from D62732 to here, per @labath's suggestion.

Nov 1 2020, 4:48 PM · Restricted Project
luismarques updated the diff for D62732: [RISCV] Add SystemV ABI.
  • Use MCBasedABI
  • Remove ArchSpec core bits, to be moved to D86292
Nov 1 2020, 4:07 PM · Restricted Project
luismarques requested review of D90574: [Sanitizer][RISCV] Fix FastUnwindTest.
Nov 1 2020, 3:10 PM · Restricted Project

Oct 29 2020

luismarques accepted D90339: [RISCV] Improve worklist management in the DAG combine for SLLW/SRLW/SRAW.

LGTM.

Oct 29 2020, 9:43 AM · Restricted Project

Oct 28 2020

luismarques accepted D89788: [RISCV] Add GHC calling convention.

Overall, LGTM. Two things, though:

Oct 28 2020, 4:59 PM · Restricted Project

Oct 22 2020

luismarques committed rG89840380d56e: [RISCV][NFC] Add more tests for 32-bit constant materialization (authored by luismarques).
[RISCV][NFC] Add more tests for 32-bit constant materialization
Oct 22 2020, 3:37 AM
luismarques closed D83210: [RISCV][NFC] Add more tests for 32-bit constant materialization.
Oct 22 2020, 3:36 AM · Restricted Project

Oct 21 2020

luismarques committed rG58f6b16c4981: [compiler-rt][builtins][RISCV] Always include __mul[sd]i3 builtin definitions (authored by luismarques).
[compiler-rt][builtins][RISCV] Always include __mul[sd]i3 builtin definitions
Oct 21 2020, 1:50 AM
luismarques closed D86457: [compiler-rt][builtins][RISCV] Always include __mul[sd]i3 builtin definitions.
Oct 21 2020, 1:49 AM · Restricted Project

Oct 20 2020

luismarques committed rGfc3f9dfad33d: [compiler-rt][builtins] Add tests for atomic builtins support functions (authored by luismarques).
[compiler-rt][builtins] Add tests for atomic builtins support functions
Oct 20 2020, 4:10 AM
luismarques closed D86278: [compiler-rt][builtins] Add tests for atomic builtins support functions.
Oct 20 2020, 4:09 AM · Restricted Project

Oct 19 2020

luismarques committed rG7ddd354d47cc: [RISCV][ASAN] Fix TLS offsets (authored by luismarques).
[RISCV][ASAN] Fix TLS offsets
Oct 19 2020, 5:42 AM
luismarques closed D89244: [RISCV][ASAN] Fix TLS offsets.
Oct 19 2020, 5:42 AM · Restricted Project

Oct 17 2020

luismarques committed rGb7ff218f1c04: [RISCV][ASAN] Fix passing XFAIL tests (authored by luismarques).
[RISCV][ASAN] Fix passing XFAIL tests
Oct 17 2020, 8:55 AM
luismarques closed D89299: [RISCV][ASAN] Fix passing XFAIL tests.
Oct 17 2020, 8:55 AM · Restricted Project

Oct 14 2020

luismarques accepted D89025: [RISCV] Add -mtune support.
Oct 14 2020, 1:58 AM · Restricted Project, Restricted Project

Oct 13 2020

luismarques added a comment to D89025: [RISCV] Add -mtune support.

RISCV supports -mcpu with default empty arch to align gcc's -mtune behavior since clang didn't support -mtune before. But now clang has -mtune, is it a good idea to remove those options? (ex. rocket-rv32/rv64, sifive-7-rv32/64)

Oct 13 2020, 8:27 AM · Restricted Project, Restricted Project
luismarques accepted D89025: [RISCV] Add -mtune support.

LGTM, but I would like other people to also review this, if possible.
(Just be sure to check/fix the clang-format warnings and the inline comments).

Oct 13 2020, 8:11 AM · Restricted Project, Restricted Project