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luismarques (Luís Marques)
Senior software/hardware engineer at lowRISC

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User Details

User Since
Nov 2 2018, 7:48 AM (191 w, 4 d)

Mostly LLVM work. Sometimes OpenTitan stuff. Oh, and messing with hardware is fun.

Recent Activity

Yesterday

luismarques accepted D114356: [Support] Add isShiftedUIntN to MathExtras.h.

LGTM.

Tue, Jul 5, 6:59 AM · Restricted Project, Restricted Project
luismarques added a comment to D129106: [RISCV] Add support for static chain.

I guess this patch should update the other conventions as well? E.g. error out if nest is used with the GHC CC. There's also the FastCC.

Tue, Jul 5, 3:51 AM · Restricted Project, Restricted Project

Sun, Jul 3

luismarques resigned from D127611: [ELF] Relax R_RISCV_CALL and R_RISCV_CALL_PLT.
Sun, Jul 3, 11:10 AM · Restricted Project, Restricted Project
luismarques requested changes to D127611: [ELF] Relax R_RISCV_CALL and R_RISCV_CALL_PLT.

Sorry, my previous approval comment was meant for D127581.

Sun, Jul 3, 11:09 AM · Restricted Project, Restricted Project
luismarques accepted D127611: [ELF] Relax R_RISCV_CALL and R_RISCV_CALL_PLT.

My tests finally finished running. No issues detected. LGTM.

Sun, Jul 3, 7:26 AM · Restricted Project, Restricted Project

Wed, Jun 29

luismarques added a comment to D128806: [RISCV] Fix wrong position of prologue_end.

Is removing the if (I != MBB.end()) DL = I->getDebugLoc(); actually correct? I'm wondering why do several other targets have that if it can just be removed.

Wed, Jun 29, 7:18 AM · Restricted Project, Restricted Project
luismarques added a comment to D87580: [RISCV][ASAN] support code for architecture-specific parts of asan.

Are you testing on user-QEMU or on hardware? Failed CHEKCS are caused by user-QEMU incompatibility. It will not affect the checker results. As far as I am concerneed, what we expect is to pass all the programs under gcc/testsuite/gcc.dg/asan.

Wed, Jun 29, 4:31 AM · Restricted Project, Restricted Project
luismarques added a comment to rG2de4f19ecdb2: [LSan][RISCV] Enable LSan for RISCV64.

It seems that only with this patch, LSAN cannot work for RISCV64.

Wed, Jun 29, 4:20 AM

Fri, Jun 24

luismarques updated the diff for D123265: [RISCV] Extend the Merge Base Offset pass to handle AUIPC+ADDI.

Nit: tweak comments.

Fri, Jun 24, 5:03 PM · Restricted Project, Restricted Project
luismarques updated the diff for D123265: [RISCV] Extend the Merge Base Offset pass to handle AUIPC+ADDI.
  • Rebase
  • Handle non-zero offsets in tail load/store instructions
Fri, Jun 24, 4:44 PM · Restricted Project, Restricted Project
luismarques requested review of D128562: [RISCV] Precommit test for D123265.
Fri, Jun 24, 4:27 PM · Restricted Project, Restricted Project
luismarques accepted D128491: [test-suite] Fix unaligned uint32_t accesses in ClamAV..
Fri, Jun 24, 3:56 PM · Restricted Project
luismarques added a comment to D128495: [RISCV][MC] Fold UIMM related code.

Personally, I would just leave the raw case statements, but I don't really care that much either way.
Overall, LGTM.

Fri, Jun 24, 7:14 AM · Restricted Project, Restricted Project
luismarques updated the diff for D123264: [RISCV] Pre-RA expand pseudos pass.

Make instructions with pre- and post-instructions symbols not duplicable

Fri, Jun 24, 4:50 AM · Restricted Project, Restricted Project
luismarques updated the diff for D123264: [RISCV] Pre-RA expand pseudos pass.
  • Rebase
  • Apply suggestion to rename label name
  • Set AnalysisUsage CFG preserved
Fri, Jun 24, 3:50 AM · Restricted Project, Restricted Project
luismarques accepted D128500: [RISCV] Change how we isel (add X, [-4096, -2049]) or (add X, [2048,4095])..

LGTM.

Fri, Jun 24, 1:48 AM · Restricted Project, Restricted Project

Wed, Jun 22

luismarques added inline comments to D128240: [RISCV] Support fe_getround and fe_raise_inexact in builtins.
Wed, Jun 22, 4:56 AM · Restricted Project, Restricted Project
luismarques added inline comments to D128240: [RISCV] Support fe_getround and fe_raise_inexact in builtins.
Wed, Jun 22, 4:50 AM · Restricted Project, Restricted Project

Tue, Jun 21

luismarques added inline comments to D127581: [ELF] Relax R_RISCV_ALIGN.
Tue, Jun 21, 8:18 AM · Restricted Project, Restricted Project
luismarques added inline comments to D127581: [ELF] Relax R_RISCV_ALIGN.
Tue, Jun 21, 6:18 AM · Restricted Project, Restricted Project

Wed, Jun 15

luismarques added inline comments to D127581: [ELF] Relax R_RISCV_ALIGN.
Wed, Jun 15, 12:08 PM · Restricted Project, Restricted Project
luismarques added a comment to D87580: [RISCV][ASAN] support code for architecture-specific parts of asan.

What specific failure are you encounted with currently? For me, I got the deadly signal error (SEGV on unknown address) for all the cases. Is this issue just for riscv or for all the targets? I'm trying to modify the logic between deadly signal error and generic error like heap-use-after-free. I'm not sure whether it is feasible.

Wed, Jun 15, 5:49 AM · Restricted Project, Restricted Project

Tue, Jun 14

luismarques added reviewers for D127727: [SeparateConstOffsetFromGEPPass] Added optional modification strategy: craig.topper, eli.friedman.
Tue, Jun 14, 5:55 AM · Restricted Project, Restricted Project

Mon, Jun 13

luismarques accepted D127549: RISCV: handle 64-bit PCREL data relocations.

(don't forget to update the commit message)

Mon, Jun 13, 11:46 AM · Restricted Project, Restricted Project
luismarques added a comment to D87580: [RISCV][ASAN] support code for architecture-specific parts of asan.

How is this work going? If you find the commit that led to this failure, maybe I can also help fix it.

Mon, Jun 13, 10:49 AM · Restricted Project, Restricted Project
luismarques added a comment to D127549: RISCV: handle 64-bit PCREL data relocations.

I know that this issue arose in the context of -fprofile-instr-generate but can you please clean up the test to focus on the bug? Something like this:

Mon, Jun 13, 8:04 AM · Restricted Project, Restricted Project
luismarques added a comment to D127549: RISCV: handle 64-bit PCREL data relocations.

I give up; the extra context seems to not paste in properly - the reduced context shows the diff properly. I can re-upload the extra context variant but it will render improperly.

Mon, Jun 13, 3:38 AM · Restricted Project, Restricted Project

Wed, Jun 8

luismarques accepted D126843: [RISCV] Support (addi (addi globaladdr, C1), C2) in RISCVMergeBaseOffset..

LGTM.

Wed, Jun 8, 7:25 AM · Restricted Project, Restricted Project
luismarques accepted D126729: [RISCV] Support LUI+ADDIW in RISCVMergeBaseOffsetOpt::matchLargeOffset..

Could this interact badly with the medlow upper address space bound of 0x000000007FFFF7FF?

Wed, Jun 8, 6:59 AM · Restricted Project, Restricted Project
luismarques added a comment to D126729: [RISCV] Support LUI+ADDIW in RISCVMergeBaseOffsetOpt::matchLargeOffset..

Could this interact badly with the medlow upper address space bound of 0x000000007FFFF7FF?

Wed, Jun 8, 4:45 AM · Restricted Project, Restricted Project

Tue, Jun 7

luismarques added a comment to D87580: [RISCV][ASAN] support code for architecture-specific parts of asan.

I have checked the satp register to convince myself that I was just running with sv39. I also spent a few hours debugging the up-to-date sanitizer code, but got nothing. Has anyone encounted with this error before?

Thanks for that work. I think I will be able to look into this around the end of this week or the start of the next one.

Tue, Jun 7, 10:34 PM · Restricted Project, Restricted Project

Mon, Jun 6

luismarques added a comment to D62732: [RISCV] Add SystemV ABI.

Hi Luis, are you planning on adding plugin architecture support (in lldb/source/Plugins/Architecture) as part of this work?

Mon, Jun 6, 3:04 PM · Restricted Project, Restricted Project

May 31 2022

luismarques added inline comments to D125036: [RISCV] Alignment relaxation.
May 31 2022, 3:10 AM · Restricted Project, Restricted Project
luismarques accepted D126635: [RISCV] Fix a few corner case bugs in RISCVMergeBaseOffsetOpt::matchLargeOffset.

LGTM.

May 31 2022, 2:47 AM · Restricted Project, Restricted Project
luismarques accepted D126640: [RISCV] Set target-abi explicitly to reduce codegen results.

LGTM.

May 31 2022, 2:19 AM · Restricted Project, Restricted Project
luismarques accepted D126392: [RISCV] Use two ADDIs to do some stack pointer adjustments..

LGTM.

May 31 2022, 2:04 AM · Restricted Project, Restricted Project

May 30 2022

luismarques added a comment to D87580: [RISCV][ASAN] support code for architecture-specific parts of asan.

I have checked the satp register to convince myself that I was just running with sv39. I also spent a few hours debugging the up-to-date sanitizer code, but got nothing. Has anyone encounted with this error before?

May 30 2022, 5:43 AM · Restricted Project, Restricted Project

May 27 2022

luismarques added a comment to D125497: [RISCV] Call relaxation.

Can you please rebase the patch? It fails to apply.

May 27 2022, 6:42 AM · Restricted Project, Restricted Project
luismarques added a comment to D125497: [RISCV] Call relaxation.

Can you please rebase the patch? It fails to apply.

May 27 2022, 6:26 AM · Restricted Project, Restricted Project

May 26 2022

luismarques added a comment to D126392: [RISCV] Use two ADDIs to do some stack pointer adjustments..

This may break assumptions that some unwinding code uses (e.g. an kernel backtrace without debug info). But then again I don't know if any of them handle non-immediate offsets anyway.

May 26 2022, 7:56 AM · Restricted Project, Restricted Project
luismarques added a comment to D125036: [RISCV] Alignment relaxation.

While I think there are still significant problems needing to address, it may work with quite a few application. It'd be nice if folks can check how this patch works without -mno-relax.

May 26 2022, 7:44 AM · Restricted Project, Restricted Project
luismarques added inline comments to D123515: [RISCV] Support '.option arch' directive.
May 26 2022, 7:10 AM · Restricted Project, Restricted Project
luismarques added inline comments to D126181: [RISCV] Add ISD::EH_DWARF_CFA.
May 26 2022, 4:09 AM · Restricted Project, Restricted Project

May 25 2022

luismarques added a comment to D87580: [RISCV][ASAN] support code for architecture-specific parts of asan.

==265==ERROR: AddressSanitizer: SEGV on unknown address 0x00081ffd1560 (pc 0x0000000108a8 bp 0x003fffe8ab70 sp 0x003fffe8aaf0 T0)
==265==The signal is caused by a READ memory access.

May 25 2022, 10:14 AM · Restricted Project, Restricted Project
luismarques added a comment to D125497: [RISCV] Call relaxation.

This still fails with the test case I provided as feedback for D100835: https://reviews.llvm.org/D100835#3456472

May 25 2022, 4:03 AM · Restricted Project, Restricted Project

May 3 2022

luismarques accepted D122213: [RISCV] Enable MachineOutliner by default under -Oz for RISCV.

LGTM. Thanks.

May 3 2022, 4:07 AM · Restricted Project, Restricted Project

May 2 2022

luismarques added a comment to D124644: [DAGCombiner] reassociationCanBreakAddressingModePattern should check uses of the outer add..

After a quick glance, I think it has the same issue. Was it copied from your original patch?

May 2 2022, 4:23 PM · Restricted Project, Restricted Project
luismarques added a comment to D124644: [DAGCombiner] reassociationCanBreakAddressingModePattern should check uses of the outer add..

@craig.topper Have you checked if CombinerHelper::reassociationCanBreakAddressingModePattern (in llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp) is sound?

May 2 2022, 4:08 PM · Restricted Project, Restricted Project
luismarques accepted D124644: [DAGCombiner] reassociationCanBreakAddressingModePattern should check uses of the outer add..

LGTM. Thanks for the fix!

May 2 2022, 4:02 PM · Restricted Project, Restricted Project

Apr 30 2022

luismarques added inline comments to D123496: [RISCV] Add Stackmap/Statepoint/Patchpoint support without targets.
Apr 30 2022, 7:24 AM · Restricted Project, Restricted Project

Apr 29 2022

luismarques accepted D124222: [RISCV] Improve constant materialization for cases that can use LUI+ADDI instead of LUI+ADDIW..

LGTM.

Apr 29 2022, 6:06 AM · Restricted Project, Restricted Project

Apr 24 2022

luismarques accepted D123679: [RISCV] Don't getDebugLoc for the end node of MBB iterator.
Apr 24 2022, 2:33 AM · Restricted Project, Restricted Project

Apr 22 2022

luismarques accepted D123679: [RISCV] Don't getDebugLoc for the end node of MBB iterator.

LGTM.

Apr 22 2022, 2:19 AM · Restricted Project, Restricted Project
luismarques added a comment to D87580: [RISCV][ASAN] support code for architecture-specific parts of asan.

It seems that Asan cannot work correctly for RISC-V now.
When I use '-fsanitize=address' to compile the program and then run on Qemu, I get
AddressSanitizer: CHECK failed: sanitizer_allocator_primary32.h:292 "((res)) < ((kNumPossibleRegions))" (0x40016, 0x40000) (tid=80622)

<empty stack>
Apr 22 2022, 1:00 AM · Restricted Project, Restricted Project

Apr 21 2022

luismarques accepted D124148: [RISCV] Add special case to constant materialization to remove trailing zeros first..

LGTM.

Apr 21 2022, 3:39 AM · Restricted Project, Restricted Project

Apr 20 2022

luismarques accepted D124096: [RISCV] Use default promotion for (i32 (shl 1, X)) on RV64 when Zbs is enabled..

LGTM.

Apr 20 2022, 9:09 AM · Restricted Project, Restricted Project
luismarques added a comment to D122635: [RISCV] Filter out instructions which contain unsafe things when outlining.

I think this patch makes no difference to outlining, but it is no harm to land since other targets do the same things.

Apr 20 2022, 5:20 AM · Restricted Project, Restricted Project
luismarques added a comment to D122490: [RISCV] Generate EF_RISCV_RVC when .option rvc.

I think this patch can be abandoned now?
Thanks for providing D123515 as an alternative.

Apr 20 2022, 4:43 AM · Restricted Project, Restricted Project
luismarques added a comment to D123679: [RISCV] Don't getDebugLoc for the end node of MBB iterator.

The fix looks fine.

Apr 20 2022, 4:40 AM · Restricted Project, Restricted Project
luismarques added a comment to D122635: [RISCV] Filter out instructions which contain unsafe things when outlining.

Is this patch still relevant?

Apr 20 2022, 3:36 AM · Restricted Project, Restricted Project
luismarques accepted D122634: [RISCV] Do not outline CFI instructions when they are needed in EH.

LGTM. Thanks!

Apr 20 2022, 3:23 AM · Restricted Project, Restricted Project
luismarques accepted D123364: [RISCV] Precommit test for D122634.

LGTM. Don't forget to fix the typo before committing.

Apr 20 2022, 3:23 AM · Restricted Project, Restricted Project
luismarques added inline comments to D123978: [RISCV] Support getHostCpuName for sifive-u74.
Apr 20 2022, 3:10 AM · Restricted Project, Restricted Project

Apr 19 2022

luismarques added a comment to D123978: [RISCV] Support getHostCpuName for sifive-u74.

This seems in line with what's done for the other archs, so overall seems fine.

Apr 19 2022, 2:32 PM · Restricted Project, Restricted Project
luismarques added inline comments to D123264: [RISCV] Pre-RA expand pseudos pass.
Apr 19 2022, 12:17 PM · Restricted Project, Restricted Project
luismarques updated the summary of D123264: [RISCV] Pre-RA expand pseudos pass.
Apr 19 2022, 11:14 AM · Restricted Project, Restricted Project
luismarques added a comment to D123264: [RISCV] Pre-RA expand pseudos pass.

This doesn't make sense to me?

Apr 19 2022, 11:13 AM · Restricted Project, Restricted Project
luismarques accepted D123983: [RISCV] Fold (xor (sllw 1, x), -1) -> (rolw ~1, x)..

LGTM.

Apr 19 2022, 9:19 AM · Restricted Project, Restricted Project
luismarques added inline comments to D60294: [DAGCombiner] [CodeGenPrepare] Split large offsets from base addresses.
Apr 19 2022, 7:43 AM · Restricted Project, Restricted Project

Apr 18 2022

luismarques added inline comments to D123264: [RISCV] Pre-RA expand pseudos pass.
Apr 18 2022, 4:54 PM · Restricted Project, Restricted Project
luismarques added inline comments to D123264: [RISCV] Pre-RA expand pseudos pass.
Apr 18 2022, 4:40 PM · Restricted Project, Restricted Project
luismarques updated the diff for D123264: [RISCV] Pre-RA expand pseudos pass.

Don't mess with isPosition. Create named temp labels. Remove cruft.

Apr 18 2022, 4:26 PM · Restricted Project, Restricted Project
luismarques added a comment to D100835: [WIP][LLD][RISCV] Linker Relaxation.

Incidentally, this issue of relaxation correctness is why I want the optimisation relaxations separated out from the alignment support that’s required;

Apr 18 2022, 8:02 AM · Restricted Project, Restricted Project
luismarques added a comment to D100835: [WIP][LLD][RISCV] Linker Relaxation.

It was a big pain to do the initial steps of the reduction (I had to start with the object files) but, eventually, I managed to do it and from there I reduced it further. Here's a simpler version of the problematic case:

Apr 18 2022, 7:51 AM · Restricted Project, Restricted Project
luismarques added a comment to D100835: [WIP][LLD][RISCV] Linker Relaxation.
  • I found a linking failure issue with this patch. I hadn't yet reported that here because I am still in the process of reducing and analyzing the problematic case.
Apr 18 2022, 5:54 AM · Restricted Project, Restricted Project

Apr 15 2022

luismarques added inline comments to D123264: [RISCV] Pre-RA expand pseudos pass.
Apr 15 2022, 2:41 AM · Restricted Project, Restricted Project
luismarques added a reviewer for D123264: [RISCV] Pre-RA expand pseudos pass: HsiangKai.
Apr 15 2022, 2:40 AM · Restricted Project, Restricted Project
luismarques added inline comments to D123264: [RISCV] Pre-RA expand pseudos pass.
Apr 15 2022, 1:47 AM · Restricted Project, Restricted Project

Apr 14 2022

luismarques added a comment to D100835: [WIP][LLD][RISCV] Linker Relaxation.

I have also planned to pick up the work. I think binutils is trying to improve their time complexity, and we should just aim for the best time complexity initially.

Is this patch lacking in some way in terms of performance (absolute or asymptotic)?

Asymptotic. See https://reviews.llvm.org/D100835#2707537
It has been long time since I looked at this patch, I'll need to re-read :)

Apr 14 2022, 10:32 AM · Restricted Project, Restricted Project
luismarques added a comment to D100835: [WIP][LLD][RISCV] Linker Relaxation.

I have also planned to pick up the work. I think binutils is trying to improve their time complexity, and we should just aim for the best time complexity initially.

Apr 14 2022, 10:24 AM · Restricted Project, Restricted Project
luismarques added a comment to D100835: [WIP][LLD][RISCV] Linker Relaxation.

This was discussed in the RISC-V sync-up call. As suggested by Alex, I'm sharing in writing here some of the things I mentioned or were discussed in the call:

Apr 14 2022, 9:10 AM · Restricted Project, Restricted Project
luismarques added a comment to D123264: [RISCV] Pre-RA expand pseudos pass.

Ping?

Apr 14 2022, 8:11 AM · Restricted Project, Restricted Project
luismarques added a comment to D122634: [RISCV] Do not outline CFI instructions when they are needed in EH.

These conditions existed since the first version of outlining implementation (D66210), so we won't see any differences of position instructions even if I added some tests in this patch.

Apr 14 2022, 7:35 AM · Restricted Project, Restricted Project

Apr 12 2022

luismarques added inline comments to D100835: [WIP][LLD][RISCV] Linker Relaxation.
Apr 12 2022, 7:11 AM · Restricted Project, Restricted Project
luismarques added a comment to D123496: [RISCV] Add Stackmap/Statepoint/Patchpoint support without targets.

Don't forget to include the full context in your patches. See https://llvm.org/docs/Phabricator.html#requesting-a-review-via-the-web-interface
It looks like you also want to use clang-format to reformat the code.

Apr 12 2022, 6:35 AM · Restricted Project, Restricted Project
luismarques added a comment to D100835: [WIP][LLD][RISCV] Linker Relaxation.

Thanks for the patch. It would be great to finally have linker relaxations for RISC-V in LLD.

Apr 12 2022, 4:49 AM · Restricted Project, Restricted Project

Apr 9 2022

luismarques added a comment to D122634: [RISCV] Do not outline CFI instructions when they are needed in EH.

We this change we now don't have any tests that show a difference compared with just if (MI.isPosition()) return outliner::InstrType::Illegal;
Please add a test that showcases that new, more fined grained, outlining criteria for position instructions.

Apr 9 2022, 9:52 AM · Restricted Project, Restricted Project
luismarques requested changes to D122635: [RISCV] Filter out instructions which contain unsafe things when outlining.
Apr 9 2022, 9:08 AM · Restricted Project, Restricted Project
luismarques added a comment to D122635: [RISCV] Filter out instructions which contain unsafe things when outlining.

I am sorry I haven't found any related tests in other targets and it is really hard to construct one...

Apr 9 2022, 9:07 AM · Restricted Project, Restricted Project

Apr 7 2022

luismarques accepted D122635: [RISCV] Filter out instructions which contain unsafe things when outlining.

At first glance this seemed to make sense. The other targets also exclude these operand types, so I guess it really does :)

Apr 7 2022, 3:51 PM · Restricted Project, Restricted Project
luismarques accepted D123336: [RISCV] Always select (and (srl X, C), Mask) as (srli (slli X, C2), C3)..

LGTM.

Apr 7 2022, 3:38 PM · Restricted Project, Restricted Project
luismarques added inline comments to D122951: [RISCV][SelectionDAG] Add a hook to sign extend i32 ConstantInt operands of phis on RV64..
Apr 7 2022, 3:35 PM · Restricted Project, Restricted Project
luismarques committed rGd09d297c5d28: [RISCV] Fix crash for section alignment with .option norvc (authored by luismarques).
[RISCV] Fix crash for section alignment with .option norvc
Apr 7 2022, 4:02 AM · Restricted Project, Restricted Project
luismarques closed D122236: [RISCV] Fix crash for initial section alignment with .option norvc.
Apr 7 2022, 4:02 AM · Restricted Project, Restricted Project

Apr 6 2022

luismarques updated luismarques.
Apr 6 2022, 4:22 PM
luismarques added a comment to D122236: [RISCV] Fix crash for initial section alignment with .option norvc.

Can we get this landed on time for backporting into 14.0.1? (it took me some time to address the review feedback because I was sick).

Apr 6 2022, 4:16 PM · Restricted Project, Restricted Project
luismarques requested review of D123267: [RISCV] Post-RA merge base offset pass.
Apr 6 2022, 4:13 PM · Restricted Project, Restricted Project
luismarques requested review of D123265: [RISCV] Extend the Merge Base Offset pass to handle AUIPC+ADDI.
Apr 6 2022, 4:07 PM · Restricted Project, Restricted Project
luismarques requested review of D123264: [RISCV] Pre-RA expand pseudos pass.
Apr 6 2022, 4:02 PM · Restricted Project, Restricted Project
luismarques added a comment to D122236: [RISCV] Fix crash for initial section alignment with .option norvc.

This patch makes sense to me and I think it is a correct fix.
In LLVM MC, the STI's feature bits is not mutable, it was determined by the command line before parsing the file. And to deal with directives like .option rvc, the Parser maintains an STI and replaces it with a new STI when the subtarget extensions were enabled or disabled. So we need to use MCAlignFragment's STI which is generated using the replaced STI by the parser. Is my understanding correct?

Apr 6 2022, 4:11 AM · Restricted Project, Restricted Project