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t.p.northover (Tim Northover)
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User Since
Oct 18 2012, 4:53 AM (348 w, 5 d)

Recent Activity

Tue, Jun 11

t.p.northover added a comment to D61259: AArch64: support arm64_32, an ILP32 slice for watchOS..

Ping.

Tue, Jun 11, 7:31 AM · Restricted Project
t.p.northover created D63131: arm64_32: implement the desired ABI for the ILP32 triple..
Tue, Jun 11, 4:22 AM · Restricted Project
t.p.northover retitled D61939: AArch64: add support for arm64_32 (ILP32) triple and -arch option. from AArch64: add support for arm64_23 (ILP32) IR generation to AArch64: add support for arm64_32 (ILP32) triple and -arch option..
Tue, Jun 11, 4:19 AM · Restricted Project
t.p.northover updated the diff for D61939: AArch64: add support for arm64_32 (ILP32) triple and -arch option..

This diff now only covers the trivial additions so that "arm64_32" is understood by the driver and creates AArch64 instantiations of relevant classes. Code generated is still wildly incorrect (not even ILP32 yet).

Tue, Jun 11, 4:16 AM · Restricted Project
t.p.northover added a comment to D61939: AArch64: add support for arm64_32 (ILP32) triple and -arch option..

Thanks for the suggestion Florian, and sorry it's taken so long to act on it. I've split the patch up as you suggest, I'll make this one cover the Triple bits.

Tue, Jun 11, 4:16 AM · Restricted Project

Wed, Jun 5

t.p.northover committed rGc46827c7eda3: LLVM IR: Generate new-style byval-with-Type from Clang (authored by t.p.northover).
LLVM IR: Generate new-style byval-with-Type from Clang
Wed, Jun 5, 2:10 PM
t.p.northover committed rG8d7f118ab2b9: InstCombine: correctly change byval type attribute alongside call args. (authored by t.p.northover).
InstCombine: correctly change byval type attribute alongside call args.
Wed, Jun 5, 1:37 PM
t.p.northover committed rG607c8a9d1481: IR: make getParamByValType Just Work. NFC. (authored by t.p.northover).
IR: make getParamByValType Just Work. NFC.
Wed, Jun 5, 1:36 PM

Fri, May 31

t.p.northover created D62742: [OpaquePtr] BitcodeReader: don't rely on Types derived from a Value to provide pointer structure.
Fri, May 31, 10:13 AM · Restricted Project

Thu, May 30

t.p.northover added a comment to D61259: AArch64: support arm64_32, an ILP32 slice for watchOS..

Ping.

Thu, May 30, 3:15 PM · Restricted Project
t.p.northover added a comment to D61939: AArch64: add support for arm64_32 (ILP32) triple and -arch option..

Ping.

Thu, May 30, 3:15 PM · Restricted Project
t.p.northover committed rGfcb00d4aec7d: Reapply: LLVM IR: update Clang tests for byval being a typed attribute. (authored by t.p.northover).
Reapply: LLVM IR: update Clang tests for byval being a typed attribute.
Thu, May 30, 11:50 AM
t.p.northover committed rGb7141207a483: Reapply: IR: add optional type to 'byval' function parameters (authored by t.p.northover).
Reapply: IR: add optional type to 'byval' function parameters
Thu, May 30, 11:49 AM
t.p.northover accepted D62664: [DAGCombine] (A+C1)-C2 -> A+(C1-C2) constant-fold.

Looks reasonable.

Thu, May 30, 9:56 AM · Restricted Project
t.p.northover accepted D62662: [DAGCombine] ((A-c1)+c2) -> (A+(c2-c1)) constant-fold.

LGTM.

Thu, May 30, 9:55 AM · Restricted Project
t.p.northover accepted D62689: [DAGCombine] (A-C1)-C2 -> A-(C1+C2) constant-fold.

LGTM.

Thu, May 30, 9:53 AM · Restricted Project

Wed, May 29

t.p.northover committed rG71ee3d02372a: Revert "IR: add optional type to 'byval' function parameters" (authored by t.p.northover).
Revert "IR: add optional type to 'byval' function parameters"
Wed, May 29, 1:49 PM
t.p.northover committed rG4b281755ae49: Revert "LLVM IR: update Clang tests for byval being a typed attribute." (authored by t.p.northover).
Revert "LLVM IR: update Clang tests for byval being a typed attribute."
Wed, May 29, 1:43 PM
t.p.northover committed rG45e8cc6639e9: LLVM IR: update Clang tests for byval being a typed attribute. (authored by t.p.northover).
LLVM IR: update Clang tests for byval being a typed attribute.
Wed, May 29, 12:12 PM
t.p.northover committed rG6e07f16fae60: IR: add optional type to 'byval' function parameters (authored by t.p.northover).
IR: add optional type to 'byval' function parameters
Wed, May 29, 12:11 PM
t.p.northover closed D62319: IR: add 'byval(<ty>)' variant to 'byval' function parameters.

Thanks David. I've committed it as r362012 and r362013 with the tweak you suggested.

Wed, May 29, 12:10 PM · Restricted Project
t.p.northover updated the diff for D62319: IR: add 'byval(<ty>)' variant to 'byval' function parameters.

I think I've fixed everything suggested, including making the comparison assert if it ever happens since that seems to be the consensus.

Wed, May 29, 11:15 AM · Restricted Project

Tue, May 28

t.p.northover added a comment to D62319: IR: add 'byval(<ty>)' variant to 'byval' function parameters.

Some replies, and I'll upload a new revision tomorrow with the things that definitely need fixing.

Tue, May 28, 7:09 PM · Restricted Project

May 25 2019

t.p.northover added inline comments to D61947: [AArch64] Merge globals when optimising for size.
May 25 2019, 1:33 AM · Restricted Project

May 24 2019

t.p.northover added inline comments to D62319: IR: add 'byval(<ty>)' variant to 'byval' function parameters.
May 24 2019, 7:18 AM · Restricted Project
t.p.northover updated the diff for D62319: IR: add 'byval(<ty>)' variant to 'byval' function parameters.

Switched to ternary operators as Matt suggested.

May 24 2019, 5:55 AM · Restricted Project
t.p.northover updated the diff for D62319: IR: add 'byval(<ty>)' variant to 'byval' function parameters.

Accidentally included half-done Clang changes in last upload, so this removes them.

May 24 2019, 5:38 AM · Restricted Project
t.p.northover updated the diff for D62319: IR: add 'byval(<ty>)' variant to 'byval' function parameters.

While modifying Clang to emit this new style attribute, it turned out I'd got the printing incorrect and you could end up with things like byval(%mystruct = type { i32 }). Fixed that and added a unit test for it.

May 24 2019, 5:36 AM · Restricted Project
t.p.northover retitled D62319: IR: add 'byval(<ty>)' variant to 'byval' function parameters from IR: add 'size <N>' attribute to 'byval' function parameters to IR: add 'byval(<ty>)' variant to 'byval' function parameters.
May 24 2019, 5:34 AM · Restricted Project
t.p.northover updated the diff for D62319: IR: add 'byval(<ty>)' variant to 'byval' function parameters.

Switched to byval(<ty>) syntax, still optional for now but auto-upgraded when reading .bc files.

May 24 2019, 5:04 AM · Restricted Project
t.p.northover committed rG3b2157aeed84: GlobalISel: support swifterror attribute on AArch64. (authored by t.p.northover).
GlobalISel: support swifterror attribute on AArch64.
May 24 2019, 1:40 AM
t.p.northover committed rG3d7a057b0d1d: CodeGen: factor out swifterror value tracking. (authored by t.p.northover).
CodeGen: factor out swifterror value tracking.
May 24 2019, 1:40 AM
t.p.northover closed D62248: GlobalISel: support swifterror on AArch64.

Thanks Amara, committed as r361608 with the suggested fix.

May 24 2019, 1:39 AM · Restricted Project
t.p.northover closed D62247: CodeGen: refactor swifterror tracking into CodeGen.

Thanks Amara. Committed as r361607.

May 24 2019, 1:37 AM · Restricted Project
t.p.northover accepted D62297: [ARM] ARMExpandPseudoInsts: add debug messages.

Thanks. LGTM.

May 24 2019, 1:16 AM · Restricted Project

May 23 2019

t.p.northover added a comment to D62319: IR: add 'byval(<ty>)' variant to 'byval' function parameters.

I'm liking the type idea more and more. I'll get started reworking the patch to do that.

May 23 2019, 9:17 AM · Restricted Project
t.p.northover added a comment to D62319: IR: add 'byval(<ty>)' variant to 'byval' function parameters.

One of the other suggestions was to pass a _type_ as a parameter to byval. IMO that would be the nicest idea (but I don't know if it's infeasibly difficult?)

May 23 2019, 9:04 AM · Restricted Project
t.p.northover added a comment to D62319: IR: add 'byval(<ty>)' variant to 'byval' function parameters.

ie: What about adding an integer parameter to 'byval'?

May 23 2019, 8:30 AM · Restricted Project
t.p.northover created D62319: IR: add 'byval(<ty>)' variant to 'byval' function parameters.
May 23 2019, 7:45 AM · Restricted Project
t.p.northover accepted D62285: [AArch64] Add nvcast patterns for v2f32 -> v1f64.

LGTM.

May 23 2019, 7:44 AM · Restricted Project
t.p.northover added a comment to D62308: [AArch64] support neon_sshl in performIntrinsicCombine..

I think there are probably other shifts that we can include while we're in the area. Most obviously aarch64_neon_ushl, but maybe others too.

May 23 2019, 7:13 AM · Restricted Project
t.p.northover added a comment to D62297: [ARM] ARMExpandPseudoInsts: add debug messages.

I like the Expanding/To, but I think dumping the whole function is a bit excessive. That's what -print-after-all is for really.

May 23 2019, 5:40 AM · Restricted Project
t.p.northover added inline comments to D62301: Fold Address Computations into Load/Store instructions for AArch64.
May 23 2019, 5:32 AM
t.p.northover added a comment to D61259: AArch64: support arm64_32, an ILP32 slice for watchOS..

Looks like there's no reviewers set here. @t.p.northover who should review this?

May 23 2019, 1:44 AM · Restricted Project

May 22 2019

t.p.northover added a comment to D61939: AArch64: add support for arm64_32 (ILP32) triple and -arch option..

Oops, yes. I'll leave it wrong though, the best that could come out of any attempt to change it would be to split the thread on llvm-commits.

May 22 2019, 7:03 AM · Restricted Project
t.p.northover accepted D62252: [DAGCombiner][X86][AArch64][SPARC][SystemZ] y - (x + C) -> (y - x) - C fold.

Looks reasonable to me.

May 22 2019, 7:03 AM · Restricted Project
t.p.northover added a comment to D61259: AArch64: support arm64_32, an ILP32 slice for watchOS..

Ping.

May 22 2019, 5:13 AM · Restricted Project
t.p.northover updated the diff for D61939: AArch64: add support for arm64_32 (ILP32) triple and -arch option..

During upstreaming we've changed from detecting an "arm64_32" ArchName to using a Triple::aarch64_32 Arch. We recently discovered a bug that meant only AArch32 NEON types were permitted, which is fixed in this new revision.

May 22 2019, 5:13 AM · Restricted Project
t.p.northover added a parent revision for D62248: GlobalISel: support swifterror on AArch64: D62247: CodeGen: refactor swifterror tracking into CodeGen.
May 22 2019, 4:40 AM · Restricted Project
t.p.northover added a child revision for D62247: CodeGen: refactor swifterror tracking into CodeGen: D62248: GlobalISel: support swifterror on AArch64.
May 22 2019, 4:40 AM · Restricted Project
t.p.northover created D62248: GlobalISel: support swifterror on AArch64.
May 22 2019, 4:40 AM · Restricted Project
t.p.northover created D62247: CodeGen: refactor swifterror tracking into CodeGen.
May 22 2019, 4:35 AM · Restricted Project

May 15 2019

t.p.northover committed rG3588a7462b75: arm64_32: add some unittests that were in the wrong commit. (authored by t.p.northover).
arm64_32: add some unittests that were in the wrong commit.
May 15 2019, 4:59 AM
t.p.northover created D61939: AArch64: add support for arm64_32 (ILP32) triple and -arch option..
May 15 2019, 4:49 AM · Restricted Project
t.p.northover added a comment to D61259: AArch64: support arm64_32, an ILP32 slice for watchOS..

Ping.

May 15 2019, 4:03 AM · Restricted Project

May 14 2019

t.p.northover committed rG717b62a146ae: TableGen: support #ifndef in addition to #ifdef. (authored by t.p.northover).
TableGen: support #ifndef in addition to #ifdef.
May 14 2019, 6:05 AM
t.p.northover closed D61888: TableGen: support #ifndef in addition to #ifdef.

Thanks for the quick review Nicolai. Committed as r360670.

May 14 2019, 6:04 AM · Restricted Project
t.p.northover created D61888: TableGen: support #ifndef in addition to #ifdef.
May 14 2019, 5:26 AM · Restricted Project
t.p.northover closed D61258: AArch64: support binutils-like things on arm64_32..

Thanks Florian, I've committed it as r360663, with the extra tests you suggested.

May 14 2019, 4:29 AM · Restricted Project
t.p.northover committed rGff6875acd909: AArch64: support binutils-like things on arm64_32. (authored by t.p.northover).
AArch64: support binutils-like things on arm64_32.
May 14 2019, 4:26 AM
t.p.northover committed rGed9117f88d0f: GlobalOpt: do not promote globals used atomically to constants. (authored by t.p.northover).
GlobalOpt: do not promote globals used atomically to constants.
May 14 2019, 4:03 AM

May 13 2019

t.p.northover accepted D61740: Simplify llvm-cat -help.

Looks fine to me.

May 13 2019, 3:54 AM · Restricted Project

May 10 2019

t.p.northover closed D61721: SelectionDAG: accommodate atomic floating stores.

Thanks. Committed as r360421.

May 10 2019, 4:23 AM · Restricted Project
t.p.northover committed rG6c1e3f94938f: SelectionDAG: accommodate atomic floating stores. (authored by t.p.northover).
SelectionDAG: accommodate atomic floating stores.
May 10 2019, 4:23 AM
t.p.northover accepted D61560: [TargetLowering] Handle multi depth GEPs w/ inline asm constraints.

I think it looks reasonable now. Thanks for updating it!

May 10 2019, 4:13 AM · Restricted Project

May 9 2019

t.p.northover added a comment to D61719: Add ".dword" directive.

Could you add a test?

May 9 2019, 4:13 AM · Restricted Project
t.p.northover updated the diff for D61258: AArch64: support binutils-like things on arm64_32..

Added unittests in suggested places.

May 9 2019, 4:03 AM · Restricted Project
t.p.northover added inline comments to D58982: DAG: allow DAG pointer size different from memory representation..
May 9 2019, 2:47 AM · Restricted Project
t.p.northover created D61721: SelectionDAG: accommodate atomic floating stores.
May 9 2019, 2:45 AM · Restricted Project
t.p.northover added inline comments to D61560: [TargetLowering] Handle multi depth GEPs w/ inline asm constraints.
May 9 2019, 2:12 AM · Restricted Project

May 8 2019

t.p.northover added inline comments to D61560: [TargetLowering] Handle multi depth GEPs w/ inline asm constraints.
May 8 2019, 1:50 PM · Restricted Project
t.p.northover added a comment to D61259: AArch64: support arm64_32, an ILP32 slice for watchOS..

Ping.

May 8 2019, 6:41 AM · Restricted Project
t.p.northover added a comment to D61258: AArch64: support binutils-like things on arm64_32..

Ping.

May 8 2019, 6:41 AM · Restricted Project
t.p.northover committed rG18adcf331b16: ARM: disallow SP as Rn for Thumb2 TST & TEQ instructions (authored by t.p.northover).
ARM: disallow SP as Rn for Thumb2 TST & TEQ instructions
May 8 2019, 4:03 AM

May 7 2019

t.p.northover updated the diff for D55562: Atomics: support min/max orthogonally.

Sorry, I managed to forget about this one somehow. I hadn't changed the 32-bit requirement, but I agree it shouldn't be there so this diff removes it and adds tests for the newly legal cases.

May 7 2019, 5:58 AM · Restricted Project
t.p.northover added inline comments to D61560: [TargetLowering] Handle multi depth GEPs w/ inline asm constraints.
May 7 2019, 3:24 AM · Restricted Project

May 3 2019

t.p.northover accepted D61398: [SDAG][AArch64] Boolean and/or reduce to umax/min reduce (PR41635).

I'm using sign bits to detect that, is there a better way to do that?

May 3 2019, 3:13 AM · Restricted Project

May 1 2019

t.p.northover committed rGee2474df9f82: DAG: allow DAG pointer size different from memory representation. (authored by t.p.northover).
DAG: allow DAG pointer size different from memory representation.
May 1 2019, 5:37 AM
t.p.northover closed D58982: DAG: allow DAG pointer size different from memory representation..

Thanks Matt. Committed as r359676 with your suggested boolean flip.

May 1 2019, 5:36 AM · Restricted Project
t.p.northover added inline comments to D61226: [AArch64] Add an option to get the TLS pointer from software.
May 1 2019, 4:43 AM · Restricted Project

Apr 29 2019

t.p.northover added parent revisions for D61259: AArch64: support arm64_32, an ILP32 slice for watchOS.: D61258: AArch64: support binutils-like things on arm64_32., D58982: DAG: allow DAG pointer size different from memory representation..
Apr 29 2019, 6:39 AM · Restricted Project
t.p.northover added a child revision for D58982: DAG: allow DAG pointer size different from memory representation.: D61259: AArch64: support arm64_32, an ILP32 slice for watchOS..
Apr 29 2019, 6:39 AM · Restricted Project
t.p.northover added a child revision for D61258: AArch64: support binutils-like things on arm64_32.: D61259: AArch64: support arm64_32, an ILP32 slice for watchOS..
Apr 29 2019, 6:39 AM · Restricted Project
t.p.northover created D61259: AArch64: support arm64_32, an ILP32 slice for watchOS..
Apr 29 2019, 6:39 AM · Restricted Project
t.p.northover created D61258: AArch64: support binutils-like things on arm64_32..
Apr 29 2019, 6:35 AM · Restricted Project

Apr 26 2019

t.p.northover added a comment to D61124: Fix alignment in AArch64InstructionSelector::emitConstantPoolEntry().

Yep. Very simple.

Apr 26 2019, 2:13 AM · Restricted Project

Apr 25 2019

t.p.northover added a comment to D58982: DAG: allow DAG pointer size different from memory representation..

Ping.

Apr 25 2019, 11:34 AM · Restricted Project
t.p.northover accepted D60485: [AArch64] Add support for MTE intrinsics.
Apr 25 2019, 11:32 AM · Restricted Project

Apr 24 2019

t.p.northover added inline comments to D60485: [AArch64] Add support for MTE intrinsics.
Apr 24 2019, 3:13 AM · Restricted Project

Apr 23 2019

t.p.northover committed rG6af366be8ad3: ARM: disallow add/sub to sp unless Rn is also sp. (authored by t.p.northover).
ARM: disallow add/sub to sp unless Rn is also sp.
Apr 23 2019, 6:49 AM

Apr 18 2019

t.p.northover accepted D60677: [ARM] Rewrite isLegalT2AddressImmediate.

LGTM. Thanks for updating it.

Apr 18 2019, 2:52 AM · Restricted Project

Apr 17 2019

t.p.northover added a comment to D60719: Demonstrate how to fix freestanding for memcpy.

IIUC freestanding environment should not rely on memcpy being present so my take on it was that by "fixing" freestanding I could have my cake and eat it too.

Apr 17 2019, 11:42 AM · Restricted Project, Restricted Project
t.p.northover added a comment to D60719: Demonstrate how to fix freestanding for memcpy.

I think it'd be pretty unpopular with the people I know who use freestanding. They're mostly working on microcontrollers and compiling -Oz so the extra code size would be untenable; they also have memcpy implementations anyway because they use it in their own code.

Apr 17 2019, 3:33 AM · Restricted Project, Restricted Project

Apr 16 2019

t.p.northover added inline comments to D60708: [ARM] Code-generation infrastructure for MVE..
Apr 16 2019, 4:22 AM · Restricted Project
t.p.northover added a comment to D60706: [ARM] implement 8.1-M instructions at the MC level..

I think this needs splitting up further. There are a lot of novelties in the assembly syntax with this new instruction set, and it's made the patch huge.

Apr 16 2019, 4:04 AM · Restricted Project
t.p.northover added a comment to D60692: [ARM] Explicit lowering of half <-> double conversions..

The code looks reasonable to me, but should be tested.

Apr 16 2019, 3:25 AM · Restricted Project
t.p.northover added inline comments to D60697: [ARM] Allow "-march=foo+fp" to vary with foo..
Apr 16 2019, 3:17 AM · Restricted Project, Restricted Project
t.p.northover added a comment to D58982: DAG: allow DAG pointer size different from memory representation..

I haven't changed ComputeValueVTs yet.

Apr 16 2019, 3:03 AM · Restricted Project
t.p.northover updated the diff for D58982: DAG: allow DAG pointer size different from memory representation..

Switched to using getPtrExtOrTrunc. I *think* it's right, but there was a certain amount of guesswork on whether it'll actually work for signed pointers.

Apr 16 2019, 3:03 AM · Restricted Project
t.p.northover accepted D60700: [ARM] Change the MC names for VMAXNM/VMINNM..

OK, it's a bit ugly but pretty limited in scope so I think we can live with it. LGTM.

Apr 16 2019, 2:19 AM · Restricted Project