craig.topper (Craig Topper)
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User Since
Jul 30 2013, 7:58 PM (207 w, 5 d)

Recent Activity

Sat, Jul 22

craig.topper added a comment to D35750: [x86] Teach the x86 backend about general fast rep+movs and rep+stos features of modern x86 CPUs, and use this feature to drastically reduce the number of places we actually emit memset and memcpy library calls..

I believe prior to Ivy Bridge the Intel optimization manual indicates that rep movsb/stosb was only optimized to handle 1-3 bytes. Specifically to be used to handle the remainder portion in conjunction with rep+movsd to handle the rest.

Sat, Jul 22, 3:18 PM

Fri, Jul 21

craig.topper added a comment to D35701: Break up Targets.cpp into a header/impl pair per target type[NFCI].

LGTM

Fri, Jul 21, 2:55 PM
craig.topper added a comment to D35701: Break up Targets.cpp into a header/impl pair per target type[NFCI].

Please recheck all the cpp file headers. Many of them aren't 80 columns and they should probably mention the target the way the header comments do. Right now it looks like a copy and paste from Targets.cpp with only the file name changed.

Fri, Jul 21, 2:09 PM
craig.topper added inline comments to D35701: Break up Targets.cpp into a header/impl pair per target type[NFCI].
Fri, Jul 21, 10:26 AM
craig.topper added a comment to D35701: Break up Targets.cpp into a header/impl pair per target type[NFCI].

I think we should drop "using namespace llvm;" from the cpp files. clang doesn't usually do that except in codegen and it doesn't look like it was required in the original Targets.cpp.

Fri, Jul 21, 10:21 AM

Thu, Jul 20

craig.topper created D35712: [X86] Prevent selecting masked aligned load instructions if the load should be non-temporal.
Thu, Jul 20, 6:03 PM
craig.topper added a comment to D35701: Break up Targets.cpp into a header/impl pair per target type[NFCI].

Just review blank lines between every function. I'm too lazy to keep marking them.

Thu, Jul 20, 4:40 PM
craig.topper added a comment to D35688: More extendable LaneBitmask.

Can we go ahead and add getHighestLane to the existing class to hide the Log2_32? Maybe getNumLanes as well.

Thu, Jul 20, 11:26 AM

Tue, Jul 18

craig.topper added inline comments to D35572: Add isValidCPUName and isValidFeature to TargetInfo.
Tue, Jul 18, 9:50 PM
craig.topper accepted D35293: AMD znver1 Initial Scheduler model.
Tue, Jul 18, 7:45 PM
craig.topper added reviewers for D35601: [X86][BITREVERSE] Optimized bitreverse builtin for 8 bit scalar integer (PR31810): RKSimon, spatel.
Tue, Jul 18, 7:19 PM

Mon, Jul 17

craig.topper added a comment to D35449: [X86] Implement __builtin_cpu_is.

I'm considering making validateCpuIs return a std::pair with the appropriate value and a tag that indicates invalid/vendor/type/subtype. This way we can remove the target based string decoding from CodeGen by reusing the validate function(with a better name). Sema can look for the invalid tag for its error.

Mon, Jul 17, 10:29 PM
craig.topper added inline comments to D35354: [X86][LLVM][TD] Arranging Atom family in an inheritance ratio.
Mon, Jul 17, 7:03 AM

Sun, Jul 16

craig.topper added inline comments to D35354: [X86][LLVM][TD] Arranging Atom family in an inheritance ratio.
Sun, Jul 16, 11:11 PM

Sat, Jul 15

craig.topper accepted D35040: [IR] Implement Constant::isNegativeZeroValue/isZeroValue/isAllOnesValue/isOneValue/isMinSignedValue for ConstantDataVector without going through getElementAsConstant.

Accepting based on @bogner's LGTM in email reply.

Sat, Jul 15, 2:51 PM
craig.topper added a comment to D35449: [X86] Implement __builtin_cpu_is.

I think gcc supports builtin_cpu_supports and builtin_cpu_is for non-x86. We already have an x86 only implementation of __builtin_cpu_supports so I did the same here.

Sat, Jul 15, 1:51 PM
craig.topper updated the diff for D35451: [InstCombine] Improve the expansion in SimplifyUsingDistributiveLaws to handle cases where one side doesn't simplify, but the other side resolves to an identity value.

Added Sanjay's compare test cases.

Sat, Jul 15, 10:04 AM
craig.topper added a comment to D33608: [Analysis] RemoveTotalMemInst counting in InstCount to avoid reading back other Statistic variables.

Ping * 4

Sat, Jul 15, 9:16 AM
craig.topper created D35451: [InstCombine] Improve the expansion in SimplifyUsingDistributiveLaws to handle cases where one side doesn't simplify, but the other side resolves to an identity value.
Sat, Jul 15, 12:05 AM

Fri, Jul 14

craig.topper created D35449: [X86] Implement __builtin_cpu_is.
Fri, Jul 14, 10:42 PM

Thu, Jul 13

craig.topper added inline comments to D35340: [x86] use more shift or LEA for select-of-constants.
Thu, Jul 13, 1:20 PM
craig.topper added a comment to D35348: Adding all X86 Processor families which can help initializing several uArch properties.

If we were to go the route of adding a feature bit for every CPU. I wonder if we should just convert the CPU name into an enum in the target independent subtarget classes. Going through a feature bit to create an enum is just making the number of feature bits larger. Feature bits are stored in a std::bitset that last I checked was 160 bits and is stored in some of the tablegen generated data structures. Due to limitations in various place this max size of 160 is determined by the target with the most feature bits. I believe it got as high as it is because ARM or AArch64 has added a feature bit per CPU similar to this patch.

Thu, Jul 13, 9:49 AM

Wed, Jul 12

craig.topper added inline comments to D35293: AMD znver1 Initial Scheduler model.
Wed, Jul 12, 12:31 AM
craig.topper accepted D34029: Infer lowest bits of an integer Multiply when the low bits of the operands are known.

Sorry I accidentally lost track of this.

Wed, Jul 12, 12:29 AM

Tue, Jul 11

craig.topper updated the diff for D35214: [compiler-rt][X86] Match the detection of cpu's for __cpu_model to the latest version of gcc.

Found a mistake in my previous patch around getAvailableFeatures where I forgot to still update the Features variable that gets passed to the AMD and Intel CPU detection

Tue, Jul 11, 11:58 PM
craig.topper updated the diff for D35214: [compiler-rt][X86] Match the detection of cpu's for __cpu_model to the latest version of gcc.

I've synced what I can of this into Host.cpp now. Host.cpp now has two feature variables now because just in matching libgcc we used 31 bits. The fall back CPU detection for Intel family 6 required 3 more bits. So I gave Host.cpp a second variable. Now getAvailableFeatures in Host.cpp returns both feature variables through outparams. I've changed getAvailableFeatures here to return its single feature variable as an outparam as well to keep them somewhat consistent.

Tue, Jul 11, 11:55 PM
craig.topper updated the diff for D35040: [IR] Implement Constant::isNegativeZeroValue/isZeroValue/isAllOnesValue/isOneValue/isMinSignedValue for ConstantDataVector without going through getElementAsConstant.

Add getElementAsAPInt.

Tue, Jul 11, 8:52 AM

Mon, Jul 10

craig.topper added a comment to D35214: [compiler-rt][X86] Match the detection of cpu's for __cpu_model to the latest version of gcc.

I can't remove the older processors from Host.cpp. Host.cpp also contains a newer processor called Goldmont that's not in libgcc yet. I think these files have slightly different goals.

Mon, Jul 10, 11:47 AM
craig.topper updated the diff for D35214: [compiler-rt][X86] Match the detection of cpu's for __cpu_model to the latest version of gcc.

Add back INTEL_CORE2 to the switch. Guess I got carried away with deleting.

Mon, Jul 10, 11:06 AM
craig.topper created D35214: [compiler-rt][X86] Match the detection of cpu's for __cpu_model to the latest version of gcc.
Mon, Jul 10, 11:03 AM
craig.topper accepted D34163: Add strictfp attribute to prevent unwanted optimizations of libm calls.

Can you also add strictfp to utils/vim/syntax/llvm.vim where the other keywords are listed?

Mon, Jul 10, 10:07 AM
craig.topper added a comment to D35145: Use emplace_back to replace size() and resize()..

Hmm I was going off this complexity section here http://en.cppreference.com/w/cpp/container/list/size

Mon, Jul 10, 8:57 AM
craig.topper added a comment to D35182: [InstCombine] remove one-use restriction for not (cmp P, A, B) --> cmp P', A, B.

Are any of the improved tests, cases that wouldn't be improved by my earlier proposal to demorgan logical ops on compare when one side is free to invert and the other side isn't. Which I think avoids the CSE issues.

Mon, Jul 10, 8:56 AM
craig.topper added inline comments to D35191: [X86] Adding Fast AVX2 Gather as a subtarget feature.
Mon, Jul 10, 8:41 AM
craig.topper added a comment to D35145: Use emplace_back to replace size() and resize()..

Doesn't C++11 guarantee constant time for std::list::size?

Mon, Jul 10, 8:36 AM

Sun, Jul 9

craig.topper accepted D35184: X86 Intrinsics: _bit_scan_forward should not be under #ifdef __RDRND__.

LGTM

Sun, Jul 9, 11:33 PM
craig.topper added inline comments to D35184: X86 Intrinsics: _bit_scan_forward should not be under #ifdef __RDRND__.
Sun, Jul 9, 11:12 AM
craig.topper closed D35097: [InstCombine] Make InstCombine's IRBuilder be passed by reference everywhere.
Sun, Jul 9, 10:03 AM
craig.topper added 1 commit(s) for D35097: [InstCombine] Make InstCombine's IRBuilder be passed by reference everywhere: rL307451: [InstCombine] Make InstCombine's IRBuilder be passed by reference everywhere.
Sun, Jul 9, 10:02 AM
craig.topper added an edge to rL307451: [InstCombine] Make InstCombine's IRBuilder be passed by reference everywhere: D35097: [InstCombine] Make InstCombine's IRBuilder be passed by reference everywhere.
Sun, Jul 9, 10:02 AM
craig.topper added a comment to D35097: [InstCombine] Make InstCombine's IRBuilder be passed by reference everywhere.

I committed but forgot the differential revision line so it didn't close

Sun, Jul 9, 6:13 AM
craig.topper created D35161: [X86] Improve the unknown stepping support for Intel CPUs in getHostCPUName.
Sun, Jul 9, 6:13 AM
craig.topper added a comment to D35044: [IR] Remove the opcode argument from CmpInst::Create.

I think part of another change snuck into this patch. Particularly the stuff in InstCombineSelect.cpp. So ignore that.

Sun, Jul 9, 6:13 AM

Thu, Jul 6

craig.topper created D35097: [InstCombine] Make InstCombine's IRBuilder be passed by reference everywhere.
Thu, Jul 6, 4:07 PM
craig.topper created D35044: [IR] Remove the opcode argument from CmpInst::Create.
Thu, Jul 6, 12:15 AM

Wed, Jul 5

craig.topper created D35040: [IR] Implement Constant::isNegativeZeroValue/isZeroValue/isAllOnesValue/isOneValue/isMinSignedValue for ConstantDataVector without going through getElementAsConstant.
Wed, Jul 5, 9:11 PM
craig.topper created D35025: [SimplifyCFG] Move a portion of an if statement that should already be implied to an assert.
Wed, Jul 5, 11:21 AM
craig.topper accepted D34901: [ValueTracking] Support icmps fed by 'and' and 'or'.

LGTM

Wed, Jul 5, 11:09 AM
craig.topper added inline comments to D35014: [X86] PR32755 : Improvement in CodeGen instruction selection for LEAs..
Wed, Jul 5, 10:18 AM

Mon, Jul 3

craig.topper created D34974: [InstCombine] Add single use checks to SimplifyBSwap to ensure we are really saving instructions.
Mon, Jul 3, 11:44 PM

Sat, Jul 1

craig.topper updated the diff for D34923: [X86] Add comment string for broadcast loads from the constant pool..

Reduce code duplication.

Sat, Jul 1, 5:16 PM
craig.topper added inline comments to D34923: [X86] Add comment string for broadcast loads from the constant pool..
Sat, Jul 1, 1:54 PM
craig.topper closed D34842: [X86] Add RDRND to Goldmont. Add MOVBE to all Atom CPUs.
Sat, Jul 1, 1:52 PM
craig.topper added 1 commit(s) for D34842: [X86] Add RDRND to Goldmont. Add MOVBE to all Atom CPUs: rL306851: [X86] Add RDRND feature to Goldmont. Add MOVBE to all Atom CPUs..
Sat, Jul 1, 1:52 PM
craig.topper added an edge to rL306851: [X86] Add RDRND feature to Goldmont. Add MOVBE to all Atom CPUs.: D34842: [X86] Add RDRND to Goldmont. Add MOVBE to all Atom CPUs.
Sat, Jul 1, 1:52 PM
craig.topper created D34923: [X86] Add comment string for broadcast loads from the constant pool..
Sat, Jul 1, 12:35 AM

Fri, Jun 30

craig.topper accepted D34831: Fix opt --help ordering of available optimizations..

LGTM

Fri, Jun 30, 10:36 AM
craig.topper added a comment to D34842: [X86] Add RDRND to Goldmont. Add MOVBE to all Atom CPUs.

There's a separate review for X86.d https://reviews.llvm.org/D34828

Fri, Jun 30, 9:52 AM
craig.topper created D34870: [InstCombine] Fold (a | b) ^ (~a | ~b) --> ~(a ^ b) and (a & b) ^ (~a & ~b) --> ~(a ^ b).
Fri, Jun 30, 12:37 AM

Thu, Jun 29

craig.topper created D34842: [X86] Add RDRND to Goldmont. Add MOVBE to all Atom CPUs.
Thu, Jun 29, 4:04 PM
craig.topper created D34828: [X86] Add RDRAND feature to GLM CPU.
Thu, Jun 29, 12:13 PM
craig.topper added reviewers for D34769: [X86] X86::CMOV to Branch heuristic based optimization: RKSimon, spatel, zvi.
Thu, Jun 29, 11:22 AM

Wed, Jun 28

craig.topper accepted D34504: [LLVM][X86][Goldmont] Adding new target-cpu: Goldmont.

LGTM

Wed, Jun 28, 10:50 AM

Tue, Jun 27

craig.topper created D34737: [InstCombine] Remove 64-bit bit width restriction from m_ConstantInt(uint64_t*&).
Tue, Jun 27, 11:42 PM
craig.topper created D34699: [InstCombine] Propagate nsw flag when turning mul by pow2 into shift when the constant is a vector splat or the scalar bit width is larger than 64-bits.
Tue, Jun 27, 10:19 AM
craig.topper added a comment to D33262: [JumpThreading] Teach jump threading how to analyze (and (cmp A, C1), (cmp A, C2)) after InstCombine has turned it into (cmp (add A, C3), C4) .

Test case committed in r306416

Tue, Jun 27, 8:30 AM
craig.topper added inline comments to D33262: [JumpThreading] Teach jump threading how to analyze (and (cmp A, C1), (cmp A, C2)) after InstCombine has turned it into (cmp (add A, C3), C4) .
Tue, Jun 27, 8:16 AM
craig.topper added a comment to D33262: [JumpThreading] Teach jump threading how to analyze (and (cmp A, C1), (cmp A, C2)) after InstCombine has turned it into (cmp (add A, C3), C4) .

I had a test. Maybe I forgot to git add it when I turned in. I'll check.

Tue, Jun 27, 8:14 AM

Mon, Jun 26

craig.topper added a comment to D34666: [PatternMatch] Remove 64-bit or less restriction from m_SpecificInt.

It looks like when m_SpecificInt was added in https://reviews.llvm.org/rL216586 in Aug 2014 it came with this restriction. I wonder if it was borrowed from the m_ConstantInt that writes to a uint64_t that's located right next to it in the file.

Mon, Jun 26, 11:04 PM
craig.topper created D34666: [PatternMatch] Remove 64-bit or less restriction from m_SpecificInt.
Mon, Jun 26, 10:06 PM
craig.topper added inline comments to D34571: [DAGCombine] Improve handling of insert_subvector of bitcast values.
Mon, Jun 26, 10:01 PM
craig.topper added reviewers for D34661: [X86][MMX] Added custom lowering action for MMX SELECT (PR30418): RKSimon, spatel.
Mon, Jun 26, 6:24 PM
craig.topper accepted D34341: [TableGen] Fix bug in TableGen CodeGenPatterns when adding variants of the patterns..

LGTM

Mon, Jun 26, 11:35 AM
craig.topper added a comment to D34504: [LLVM][X86][Goldmont] Adding new target-cpu: Goldmont.

Should we OR in isGLM() every place we use isSLM() today?

Mon, Jun 26, 11:29 AM

Sun, Jun 25

craig.topper closed D32978: [SCEV] Avoid copying ConstantRange just to get the min/max value.
Sun, Jun 25, 11:34 PM
craig.topper closed D34411: [TableGen] Remove some copies around PatternToMatch..
Sun, Jun 25, 11:34 PM
craig.topper closed D34592: [IR] Implement commutable matchers without using combineOr.
Sun, Jun 25, 11:33 PM
craig.topper added a comment to D34504: [LLVM][X86][Goldmont] Adding new target-cpu: Goldmont.

Were you able to get the family/model/stepping info for lib/Support/Host.cpp?

Sun, Jun 25, 9:49 AM

Jun 23 2017

craig.topper added a reviewer for D34592: [IR] Implement commutable matchers without using combineOr: davide.
Jun 23 2017, 11:22 PM
craig.topper created D34593: [IR][AssumptionCache] Add m_Shift and m_BitwiseLogic matchers to replace a couple m_CombineOr.
Jun 23 2017, 11:11 PM
craig.topper created D34592: [IR] Implement commutable matchers without using combineOr.
Jun 23 2017, 10:03 PM
craig.topper added inline comments to D34163: Add strictfp attribute to prevent unwanted optimizations of libm calls.
Jun 23 2017, 1:42 PM
craig.topper added a comment to D34504: [LLVM][X86][Goldmont] Adding new target-cpu: Goldmont.

Can you add goldmont to getHostCPUName in lib/Support/Host.cpp assuming you have the family/model/stepping info for it? Also need to add a RUN line to test/CodeGen/X86/cpu.ll

Jun 23 2017, 9:53 AM
craig.topper added a reviewer for D34504: [LLVM][X86][Goldmont] Adding new target-cpu: Goldmont: craig.topper.
Jun 23 2017, 9:50 AM

Jun 22 2017

craig.topper added a comment to D33262: [JumpThreading] Teach jump threading how to analyze (and (cmp A, C1), (cmp A, C2)) after InstCombine has turned it into (cmp (add A, C3), C4) .

Ping

Jun 22 2017, 1:41 PM
craig.topper added a comment to D34504: [LLVM][X86][Goldmont] Adding new target-cpu: Goldmont.

Don't add the SMAP feature flag. We should only have feature flags that are used by isel.

Jun 22 2017, 8:12 AM

Jun 21 2017

craig.topper created D34498: [InstCombine] Add one use checks to or/and->xnor folding.
Jun 21 2017, 10:32 PM
craig.topper updated the diff for D34184: [InstCombine] Teach foldSelectICmpAndOr to recognize (select (icmp slt (trunc (X)), 0), Y, (or Y, C2)) .

Rebase on top of the one use fixes to the existing code.

Jun 21 2017, 3:34 PM
craig.topper added inline comments to D34396: Adding code padding for performance stability - first policy (BranchesWithSameTargetAvoidancePolicy).
Jun 21 2017, 2:01 PM
craig.topper added inline comments to D34393: Adding code padding for performance stability - infrastructure.
Jun 21 2017, 2:00 PM
craig.topper added a comment to D34393: Adding code padding for performance stability - infrastructure.

Can you please repost the diff with full context using one of the commands mentioned here. http://llvm.org/docs/Phabricator.html#requesting-a-review-via-the-web-interface

Jun 21 2017, 1:56 PM

Jun 20 2017

craig.topper created D34437: [InstCombine] Don't let folding (select (icmp eq (and X, C1), 0), Y, (or Y, C2)) create more instructions than it removes.
Jun 20 2017, 11:16 PM
craig.topper added a comment to D32582: [InstCombine] Add range metadata to cttz/ctlz/ctpop intrinsic calls based on known bits.

Ping

Jun 20 2017, 11:15 PM
craig.topper added a comment to D32978: [SCEV] Avoid copying ConstantRange just to get the min/max value.

Ping * 2

Jun 20 2017, 11:14 PM
craig.topper added a reviewer for D32978: [SCEV] Avoid copying ConstantRange just to get the min/max value: davide.
Jun 20 2017, 11:14 PM
craig.topper created D34431: [LVI] Teach LVI to reason about ORs of icmps similar to how it reasons about ANDs of icmps.
Jun 20 2017, 5:04 PM
craig.topper created D34411: [TableGen] Remove some copies around PatternToMatch..
Jun 20 2017, 9:53 AM
craig.topper added a comment to D34341: [TableGen] Fix bug in TableGen CodeGenPatterns when adding variants of the patterns..

We don't need a new method to copy a vector. The caller can always make a copy into a local variable first.

Jun 20 2017, 8:55 AM
craig.topper created D34389: [AVX-512] Remove and autoupgrade the masked integer compare intrinsics.
Jun 20 2017, 12:42 AM

Jun 19 2017

craig.topper added a comment to D33608: [Analysis] RemoveTotalMemInst counting in InstCount to avoid reading back other Statistic variables.

Ping * 2

Jun 19 2017, 11:38 AM