I've removed the canonicalization in LowerIntVSETCC_AVX512 that was causing this in r372543. And I've moved it to X86ISelDAGToDAG in r372544. At the time LowerIntVSETCC_AVX512 we were using isel patterns for vptest and this was an attempt reduce the size of the table. We're now using custom isel in X86ISelDAGToDAG so the canonicalization is much cheaper to handle there.

LGTM

LGTM with those comment fixes.

What if we just do the larger than 32-bit mask? Its not clear that making BZHI just to fold a load is an improvement. You have to materialize an immediate instead so the total uops increased.

I added some memset tests in r372494 and the RUN line changes here. Can you rebase?

Do we have a similar test for memset that should be updated?

In D67802#1676910, @arsenm wrote:

LGTM but could use tests

Remove ImmArg from Mips intrinsics

What targets does clang enable FTZ/DAZ on? I don't think it does on X86.

Remove bad change

In D67513#1668369, @jhibbits wrote:

Thanks for getting rid of SPE4RC, I really did not like it, but couldn't think of a better way. Glad you did.

It looks like you're changing more than just removing SPE4RC in this diff. Do the tests really change because of the removal?

So who wants to click Accept?

Update clang release notes as well.

In D67259#1662106, @RKSimon wrote:

Do we need to include some benchmark numbers?

X86 looks good to me.

Fix review comments

I believe this test case compiled with avx needs this pass.

In D67363#1664746, @spatel wrote:

In D67363#1664689, @craig.topper wrote:

For VEX instructions don’t we just use the other input register to break the dependency without adding an instruction?

That sounds right, but it's not controlled by this pass. That's part of memory op folding?
If I'm seeing it correctly, that's already more aggressively optimizing for size than what we're doing here:

// Avoid partial and undef register update stalls unless optimizing for size.
if (!MF.getFunction().hasOptSize() &&
    (hasPartialRegUpdate(MI.getOpcode(), Subtarget, /*ForLoadFold*/true) ||
     shouldPreventUndefRegUpdateMemFold(MF, MI)))
  return nullptr;

For VEX instructions don’t we just use the other input register to break the dependency without adding an instruction?

LGTM. Will you also be updating nonvolatile_load/nonvolatile_store in include/llvm/Target/TargetSelectionDAG.td. We use those in several places where we change the size of a load.

Add a sentence to the release notes

Rebase