craig.topper retitled D61863: [X86] Prefer locked stack op over mfence for seq_cst 64-bit stores on 32-bit targets from Prefer locked stack op over mfence for seq_cst stores to [X86] Prefer locked stack op over mfence for seq_cst 64-bit stores on 32-bit targets.

Mon, May 13, 11:48 AM · Restricted Project

craig.topper updated the diff for D61047: [X86] Delay creating index register negations during address matching until after we know for sure the match will succeed.

-Move into getAddressOperands.
-Emit the NEG machine directly as I'm not sure I trust accessing N at this point in the code to use insertDAGNode. N can be changed by CSEing and other DAG modifications that can occur during address matching.
-Add -pre-RA-sched=linearize to one test that would fail previously due to the dangling sub node getting left behind when LEA costing failed.

Mon, May 13, 11:44 AM · Restricted Project

craig.topper committed rGc6a6c107428e: [X86] Add test case for mask register variant of PR41619 which should be fixed… (authored by craig.topper).

[X86] Add test case for mask register variant of PR41619 which should be fixed…

Mon, May 13, 8:45 AM

Sun, May 12

craig.topper committed rG61e556d2bdf3: Recommit r358887 "[TargetLowering][AMDGPU][X86] Improve SimplifyDemandedBits… (authored by craig.topper).

Recommit r358887 "[TargetLowering][AMDGPU][X86] Improve SimplifyDemandedBits…

Sun, May 12, 9:02 PM

Sat, May 11

craig.topper committed rGc9d7484aa36e: [X86] Add CMOV_FR32X/CMOV_FR64X pseudo instructions. Use them in fast isel to… (authored by craig.topper).

[X86] Add CMOV_FR32X/CMOV_FR64X pseudo instructions. Use them in fast isel to…

Sat, May 11, 8:59 AM

craig.topper committed rG74a436596d73: [X86] Sink some fast isel code into the only if that uses it. NFC (authored by craig.topper).

[X86] Sink some fast isel code into the only if that uses it. NFC

Sat, May 11, 8:58 AM

craig.topper committed rG26f2b13a6597: [X86] Use TLI.getRegClassFor to simplify some more fast isel code. NFCI (authored by craig.topper).

[X86] Use TLI.getRegClassFor to simplify some more fast isel code. NFCI

Sat, May 11, 8:58 AM

Fri, May 10

craig.topper committed rG682cc09675b0: [X86] Use getRegClassFor to simplify some code in fast isel. NFCI (authored by craig.topper).

[X86] Use getRegClassFor to simplify some code in fast isel. NFCI

Fri, May 10, 10:17 PM

craig.topper committed rG31f7adb94f6a: [X86] Don't emit MOVNTDQA loads from fast-isel without SSE4.1. (authored by craig.topper).

[X86] Don't emit MOVNTDQA loads from fast-isel without SSE4.1.

Fri, May 10, 9:20 PM

craig.topper committed rGbdef12df8d6f: [X86] Add a test case for idempotent atomic operations with speculative load… (authored by craig.topper).

[X86] Add a test case for idempotent atomic operations with speculative load…

Fri, May 10, 8:59 PM

craig.topper committed rGdf10cc6068b2: [X86] Disable speculative load hardening for operations with an explicit RSP… (authored by craig.topper).

[X86] Disable speculative load hardening for operations with an explicit RSP…

Fri, May 10, 3:02 PM

craig.topper added a reverting change for D58632: [X86] Improve lowering of idemptotent RMW operations: rGdf10cc6068b2: [X86] Disable speculative load hardening for operations with an explicit RSP….

Fri, May 10, 3:02 PM · Restricted Project

craig.topper added a comment to D58632: [X86] Improve lowering of idemptotent RMW operations.

I've commited a modified version of my patch in r360475. I'll try to reduce a test case and commit that later tonight or tomorrow.

Fri, May 10, 3:01 PM · Restricted Project

craig.topper committed rG114f763f3710: [LegalizeVectorOps] Remove calls to LegalizeOp on the return value from… (authored by craig.topper).

[LegalizeVectorOps] Remove calls to LegalizeOp on the return value from…

Fri, May 10, 2:41 PM

craig.topper accepted D55897: Add constrained fptrunc and fpext intrinsics.

LGTM with that one remaining unused variable fixed.

Fri, May 10, 1:34 PM · Restricted Project

craig.topper accepted D61744: [SDAG] Recursively legalize both vector mulo results.

LGTM

Fri, May 10, 1:31 PM · Restricted Project

craig.topper added inline comments to D55897: Add constrained fptrunc and fpext intrinsics.

Fri, May 10, 12:51 PM · Restricted Project

craig.topper accepted D61784: Simple attempt at adding InstCombine::visitFNeg(...).

LGTM

Fri, May 10, 12:35 PM · Restricted Project

craig.topper added a comment to D58632: [X86] Improve lowering of idemptotent RMW operations.

@sammccall, can you try this patch

Fri, May 10, 12:22 PM · Restricted Project

craig.topper added a comment to D58632: [X86] Improve lowering of idemptotent RMW operations.

You’ll need to use llc to crash. But I can guess the issue now. SLH is expecting the memory address to have a virtual register as a base register, but we forced RSP on this access. We need to teach SLH about this case

Fri, May 10, 9:59 AM · Restricted Project

craig.topper added a comment to D58632: [X86] Improve lowering of idemptotent RMW operations.

@sammccall, any chance you’ve seen it with an asserts build? I think the debug output might say which registers it was trying to copy.

Fri, May 10, 8:57 AM · Restricted Project

craig.topper accepted D61390: [CodeGen] Add lround/llround builtins.

LGTM

Fri, May 10, 8:41 AM · Restricted Project

Wed, May 8

craig.topper added a comment to D61705: Tablegen type comparison LE should be LT or equal..

The X86 patterns are probably heavily hidden in tablegen classes, but they should be easily visible in X86GenDAGISel.inc. Does that file generate the same before and after this change?

Wed, May 8, 4:21 PM · Restricted Project

craig.topper committed rG51a17df45d19: [InstCombine] When turning sext into zext due to known bits, return the new… (authored by craig.topper).

[InstCombine] When turning sext into zext due to known bits, return the new…

Wed, May 8, 1:58 PM

craig.topper added inline comments to D61692: [SDAG] Vector op legalization for overflow ops.

Wed, May 8, 1:55 PM · Restricted Project

craig.topper created D61695: [InstCombine] When turning sext into zext due to known bits, return the new ZExt instead of calling replaceinstuseswith.

Wed, May 8, 1:32 PM · Restricted Project

craig.topper committed rGc5db081f8d5d: [X86] Add a non-ambiguous check prefix to lwp-intrinsics.ll for the case when… (authored by craig.topper).

[X86] Add a non-ambiguous check prefix to lwp-intrinsics.ll for the case when…

Wed, May 8, 12:20 PM

craig.topper requested changes to D61390: [CodeGen] Add lround/llround builtins.

Should we have a PowerPC test for ppcf128?

Wed, May 8, 12:01 PM · Restricted Project

craig.topper accepted D61390: [CodeGen] Add lround/llround builtins.

LGTM

Wed, May 8, 11:52 AM · Restricted Project

craig.topper added inline comments to D58632: [X86] Improve lowering of idemptotent RMW operations.

Wed, May 8, 11:32 AM · Restricted Project

craig.topper added inline comments to D58632: [X86] Improve lowering of idemptotent RMW operations.

Wed, May 8, 11:18 AM · Restricted Project

craig.topper committed rG493aec3ef5c2: [FastISel][X86] Support FNeg instruction in target independent fast isel… (authored by craig.topper).

[FastISel][X86] Support FNeg instruction in target independent fast isel…

Wed, May 8, 10:26 AM

Tue, May 7

craig.topper added inline comments to D61390: [CodeGen] Add lround/llround builtins.

Tue, May 7, 3:05 PM · Restricted Project

craig.topper planned changes to D52109: [TwoAddressInstructionPass] Don't update SrcRegMap for copies inserted for tied register constraint when the src isn't killed.

Moving back to Plan Changes because I still believe this is the wrong fix. I don't know what the right fix is.

Tue, May 7, 1:31 PM · Restricted Project

Mon, May 6

craig.topper resigned from D57072: Don't codegen an unreachable return block.

Mon, May 6, 11:18 PM · Restricted Project

craig.topper added a comment to D61390: [CodeGen] Add lround/llround builtins.

Can you test lround.i32 with -mtriple=i686-unknown with and without -mattr=sse2.

Mon, May 6, 10:50 PM · Restricted Project

craig.topper added inline comments to D61390: [CodeGen] Add lround/llround builtins.

Mon, May 6, 10:43 PM · Restricted Project

craig.topper added inline comments to D61390: [CodeGen] Add lround/llround builtins.

Mon, May 6, 10:38 PM · Restricted Project

craig.topper committed rGc6d445f9c1cb: [FastISel][X86] If selectFNeg fails, fall back to SelectionDAG not treating it… (authored by craig.topper).

[FastISel][X86] If selectFNeg fails, fall back to SelectionDAG not treating it…

Mon, May 6, 9:24 PM

craig.topper added a comment to D61622: [FastISel][X86] If selectFNeg fails, fall back to SelectionDAG not treating it as an fsub..

In D61622#1492790, @cameron.mcinally wrote:

Ah, I see it now. Thanks for the explanation.

I'd like to review this, but the FastISel code under the hood is outside of my domain. If no one else chimes in, I'll dig into it tomorrow.

Mon, May 6, 6:19 PM · Restricted Project

craig.topper added a comment to D61622: [FastISel][X86] If selectFNeg fails, fall back to SelectionDAG not treating it as an fsub..

In D61622#1492800, @craig.topper wrote:

In D61622#1492790, @cameron.mcinally wrote:

Ah, I see it now. Thanks for the explanation.

I'd like to review this, but the FastISel code under the hood is outside of my domain. If no one else chimes in, I'll dig into it tomorrow.

If nothing else, I think you can at least confirm this returns things back to the behavior that would have existed prior to r345295