craig.topper (Craig Topper)
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Jul 30 2013, 7:58 PM (276 w, 6 h)

Recent Activity

Today

craig.topper created D54513: [X86] Allow pmulh to be formed from narrow vXi16 vectors under -x86-experimental-vector-widening-legalization.
Wed, Nov 14, 12:24 AM

Yesterday

craig.topper added a dependent revision for D54467: [X86] Disable combineToExtendVectorInReg under -x86-experimental-vector-widening-legalization. Add custom type legalization for extends.: D54512: [X86] Add -x86-experimental-vector-widening support to reduceVMULWidth and combineMulToPMADDWD.
Tue, Nov 13, 11:01 PM
craig.topper added a dependency for D54512: [X86] Add -x86-experimental-vector-widening support to reduceVMULWidth and combineMulToPMADDWD: D54467: [X86] Disable combineToExtendVectorInReg under -x86-experimental-vector-widening-legalization. Add custom type legalization for extends..
Tue, Nov 13, 11:01 PM
craig.topper created D54512: [X86] Add -x86-experimental-vector-widening support to reduceVMULWidth and combineMulToPMADDWD.
Tue, Nov 13, 11:01 PM
craig.topper accepted D54083: [X86][AVX512] Remove constant pool shuffle decoding from SelectionDAG.

LGTM

Tue, Nov 13, 10:50 PM
craig.topper accepted D54359: [InstCombine] Remove a couple of asserts based on incorrect assumptions.

LGTM

Tue, Nov 13, 10:48 PM
craig.topper reopened D53876: Preserve loop metadata when splitting exit blocks.

Reopening as this was reverted in r346823

Tue, Nov 13, 6:11 PM
craig.topper added inline comments to D54359: [InstCombine] Remove a couple of asserts based on incorrect assumptions.
Tue, Nov 13, 11:26 AM
craig.topper added inline comments to D54359: [InstCombine] Remove a couple of asserts based on incorrect assumptions.
Tue, Nov 13, 11:25 AM
craig.topper added a dependent revision for D54346: [SelectionDAG][X86] Relax restriction on the width of an input to *_EXTEND_VECTOR_INREG. Use them and regular *_EXTEND to replace the X86 specific VSEXT/VZEXT opcodes: D54467: [X86] Disable combineToExtendVectorInReg under -x86-experimental-vector-widening-legalization. Add custom type legalization for extends..
Tue, Nov 13, 12:41 AM
craig.topper added a dependency for D54467: [X86] Disable combineToExtendVectorInReg under -x86-experimental-vector-widening-legalization. Add custom type legalization for extends.: D54346: [SelectionDAG][X86] Relax restriction on the width of an input to *_EXTEND_VECTOR_INREG. Use them and regular *_EXTEND to replace the X86 specific VSEXT/VZEXT opcodes.
Tue, Nov 13, 12:41 AM
craig.topper added inline comments to D54467: [X86] Disable combineToExtendVectorInReg under -x86-experimental-vector-widening-legalization. Add custom type legalization for extends..
Tue, Nov 13, 12:41 AM
craig.topper created D54467: [X86] Disable combineToExtendVectorInReg under -x86-experimental-vector-widening-legalization. Add custom type legalization for extends..
Tue, Nov 13, 12:38 AM

Mon, Nov 12

craig.topper accepted D54267: [X86][SSE] Add lowerVectorShuffleAsByteRotateAndPermute (PR39387).

LGTM

Mon, Nov 12, 1:08 PM
craig.topper updated the diff for D54346: [SelectionDAG][X86] Relax restriction on the width of an input to *_EXTEND_VECTOR_INREG. Use them and regular *_EXTEND to replace the X86 specific VSEXT/VZEXT opcodes.

Rebase to remove a commented out line in combineVSZext

Mon, Nov 12, 12:21 PM
craig.topper added inline comments to D54276: [SelectionDAG][AArch64][X86] Move legalization of vector MULHS/MULHU from LegalizeDAG to LegalizeVectorOps.
Mon, Nov 12, 12:00 PM
craig.topper updated the diff for D54276: [SelectionDAG][AArch64][X86] Move legalization of vector MULHS/MULHU from LegalizeDAG to LegalizeVectorOps.

Rebase after r346697

Mon, Nov 12, 11:45 AM
craig.topper added inline comments to D54267: [X86][SSE] Add lowerVectorShuffleAsByteRotateAndPermute (PR39387).
Mon, Nov 12, 10:52 AM
craig.topper added inline comments to D54276: [SelectionDAG][AArch64][X86] Move legalization of vector MULHS/MULHU from LegalizeDAG to LegalizeVectorOps.
Mon, Nov 12, 10:35 AM
craig.topper added inline comments to D54267: [X86][SSE] Add lowerVectorShuffleAsByteRotateAndPermute (PR39387).
Mon, Nov 12, 10:17 AM

Sat, Nov 10

craig.topper added a comment to D54359: [InstCombine] Remove a couple of asserts based on incorrect assumptions.

Those asserts are validating the metadata correctness. Deleting them is hiding a bug I think.

Sat, Nov 10, 6:29 PM
craig.topper retitled D54285: [DAGCombiner] Enable tryToFoldExtendOfConstant to run after legalize vector ops from [DAGCombiner] Enable tryToFoldExtendOfConstant to run between legalize vector ops and legalize DAG to [DAGCombiner] Enable tryToFoldExtendOfConstant to run after legalize vector ops.
Sat, Nov 10, 4:10 PM
craig.topper updated the diff for D54285: [DAGCombiner] Enable tryToFoldExtendOfConstant to run after legalize vector ops.

Remove the LegalOperations/LegalDAG check completel

Sat, Nov 10, 4:08 PM
craig.topper updated the diff for D54276: [SelectionDAG][AArch64][X86] Move legalization of vector MULHS/MULHU from LegalizeDAG to LegalizeVectorOps.

Handle AArch64 expansion with isel patterns instead of custom lowering. This prevents DAG combine from seeing the extract+build_vector opportunity.

Sat, Nov 10, 12:29 PM
craig.topper abandoned D43738: [X86] Use target independent zero_extend/sign_extend nodes for vectors with same number of elements..
Sat, Nov 10, 10:01 AM
craig.topper updated the diff for D54346: [SelectionDAG][X86] Relax restriction on the width of an input to *_EXTEND_VECTOR_INREG. Use them and regular *_EXTEND to replace the X86 specific VSEXT/VZEXT opcodes.

Address comments and hopefully arcanist adds context.

Sat, Nov 10, 9:58 AM

Fri, Nov 9

craig.topper added inline comments to D54346: [SelectionDAG][X86] Relax restriction on the width of an input to *_EXTEND_VECTOR_INREG. Use them and regular *_EXTEND to replace the X86 specific VSEXT/VZEXT opcodes.
Fri, Nov 9, 12:35 PM
craig.topper created D54346: [SelectionDAG][X86] Relax restriction on the width of an input to *_EXTEND_VECTOR_INREG. Use them and regular *_EXTEND to replace the X86 specific VSEXT/VZEXT opcodes.
Fri, Nov 9, 12:33 PM

Thu, Nov 8

craig.topper added inline comments to D54267: [X86][SSE] Add lowerVectorShuffleAsByteRotateAndPermute (PR39387).
Thu, Nov 8, 10:35 PM
craig.topper created D54285: [DAGCombiner] Enable tryToFoldExtendOfConstant to run after legalize vector ops.
Thu, Nov 8, 5:15 PM
craig.topper created D54283: [DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to run between vector op legalization and DAG legalization. Fix bad one use check in combineShuffleOfScalars .
Thu, Nov 8, 4:20 PM
craig.topper created D54278: [SelectionDAG] Teach getNode to constant fold SIGN/ZERO/ANY_EXTEND_VECTOR_INREG.
Thu, Nov 8, 3:25 PM
craig.topper created D54276: [SelectionDAG][AArch64][X86] Move legalization of vector MULHS/MULHU from LegalizeDAG to LegalizeVectorOps.
Thu, Nov 8, 2:11 PM
craig.topper added inline comments to D54237: Constant folding and instcombine for saturating adds.
Thu, Nov 8, 10:27 AM
craig.topper added a comment to D54267: [X86][SSE] Add lowerVectorShuffleAsByteRotateAndPermute (PR39387).

Does this change the code generated for rgbcmyk here https://godbolt.org/z/cot3xT I filed the original PR based on what happened from trying to vectorize it for sse4.2 which we don't currently do, but I think the two vblendvbs in the avx2 output are similar.

Thu, Nov 8, 9:45 AM
craig.topper added inline comments to D54073: [x86] allow vector load narrowing with multi-use values.
Thu, Nov 8, 9:15 AM
craig.topper added a comment to D54121: [FPEnv] Add constrained FCMP intrinsic.

The X86 builtin story is weird. There should be 9 builtins. I'm not sure how you found 12. 8 representing the encodings used by the SSE1/SSE2 cmpps/pd/ss/sd listed below. And 9th intrinsic that takes a 5 bit immediate to cover the 32 values that the AVX vcmpps/pd/ss/sd.

Thu, Nov 8, 9:08 AM

Wed, Nov 7

craig.topper added a comment to D54237: Constant folding and instcombine for saturating adds.

What about subtraction?

Wed, Nov 7, 4:35 PM
craig.topper added a reviewer for D54237: Constant folding and instcombine for saturating adds: craig.topper.
Wed, Nov 7, 4:34 PM
craig.topper added a comment to D53784: [DAGCombiner] narrow vector binops when extraction is cheap.

@steven-johnson do you have an IR test case? There might be some X86 specific change I can make.

Wed, Nov 7, 2:47 PM

Tue, Nov 6

craig.topper accepted D54171: [MS] Zero out ECX in __cpuid in intrin.h.

LGTM

Tue, Nov 6, 12:35 PM

Mon, Nov 5

craig.topper added a comment to D54119: [X86] Avoid creating a critical edge during cmov expansion.

It looks like "Early Tail Duplication" may have thwarted by change for the PR.

Mon, Nov 5, 12:15 PM
craig.topper added inline comments to D54119: [X86] Avoid creating a critical edge during cmov expansion.
Mon, Nov 5, 12:02 PM
craig.topper created D54119: [X86] Avoid creating a critical edge during cmov expansion.
Mon, Nov 5, 12:01 PM

Sat, Nov 3

craig.topper added inline comments to D54052: Support for inserting profile-directed cache prefetches.
Sat, Nov 3, 8:50 PM

Fri, Nov 2

craig.topper created D54069: [X86] Add vector shift by immediate to SimplifyDemandedBitsForTargetNode..
Fri, Nov 2, 11:19 PM
craig.topper added inline comments to D53932: [NFCI][FPEnv] Split constrained intrinsic tests.
Fri, Nov 2, 3:52 PM

Thu, Nov 1

craig.topper added a reviewer for D54016: [X86] don't allow X86_64 PIC mode addresses to be used as immediates: rnk.
Thu, Nov 1, 6:10 PM
craig.topper added a reviewer for D54008: [X86] Fix MCNullStreamer support for modules with a CodeView flag: rnk.
Thu, Nov 1, 3:38 PM

Wed, Oct 31

craig.topper added a comment to D53919: [X86] Don't allow illegal vector types to return by direct value on x86-64..

Retitling to just the x86-64 case. 32-bit mode has issues on arguments too I think and will need more work. The IsIllegalVectorType function is a member of the X86_64ABIInfo so we need to refactor or add a new one for 32-bit.

Wed, Oct 31, 10:23 AM
craig.topper retitled D53919: [X86] Don't allow illegal vector types to return by direct value on x86-64. from [X86] Don't allow illegal vector types to return by direct value. to [X86] Don't allow illegal vector types to return by direct value on x86-64..
Wed, Oct 31, 10:22 AM

Tue, Oct 30

craig.topper created D53919: [X86] Don't allow illegal vector types to return by direct value on x86-64..
Tue, Oct 30, 9:52 PM

Mon, Oct 29

craig.topper added inline comments to D53850: Declares __cpu_model as dso local.
Mon, Oct 29, 5:15 PM
craig.topper added a comment to D53229: [LegalizeTypes] Teach PromoteIntRes_BITCAST to better handle a bitcast with vector output type and a vector input type that needs to be widened.

Ping

Mon, Oct 29, 1:37 PM
craig.topper added a comment to D53823: [X86] In lowerVectorShuffleAsBroadcast, make peeking through CONCAT_VECTORS work correctly if we already walked through a bitcast that changed the element size..

Here's a test case that crashes with -mattr=avx2

Mon, Oct 29, 1:34 PM
craig.topper created D53823: [X86] In lowerVectorShuffleAsBroadcast, make peeking through CONCAT_VECTORS work correctly if we already walked through a bitcast that changed the element size..
Mon, Oct 29, 11:27 AM

Fri, Oct 26

craig.topper accepted D53216: [FPEnv] Add constrained intrinsics for MAXNUM and MINNUM.

LGTM

Fri, Oct 26, 10:52 PM
craig.topper accepted D53574: [X86] Add extra-uses on the mask of pattern c of extract-{low,}bits.ll tests.

LGTM

Fri, Oct 26, 10:50 PM
craig.topper accepted D53783: [Intrinsic] Signed and Unsigned Saturation Subtraction Intrinsics.

LGTM

Fri, Oct 26, 10:42 PM

Thu, Oct 25

craig.topper created D53743: [LegalizeTypes] Stop DAGTypeLegalizer::getSETCCWidenedResultTy from creating illegal setccs. Add checks for valid setccs.
Thu, Oct 25, 9:00 PM
craig.topper abandoned D43306: [X86] Add pass to infer required-vector-width attribute based on size of function arguments and use of intrinsics.
Thu, Oct 25, 2:37 PM
craig.topper added inline comments to D53268: [X86] Stop promoting and/or/xor/andn to vXi64..
Thu, Oct 25, 12:04 PM
craig.topper updated the diff for D53268: [X86] Stop promoting and/or/xor/andn to vXi64..

With the correct patch and context this time

Thu, Oct 25, 11:56 AM
craig.topper updated the diff for D53268: [X86] Stop promoting and/or/xor/andn to vXi64..

I believe this now has all the patterns we need. I haven't fully collapsed the repetition of patterns into multiclasses, but I'd like to take that as follow up.

Thu, Oct 25, 11:52 AM
craig.topper added a comment to D53053: [Intrinsic] Signed Saturation Addition Intrinsic.

When can we expect a signed subtraction intrinsic?

Thu, Oct 25, 11:44 AM
craig.topper accepted D53703: [LegalizeDAG] Remove dead SINT_TO_FP legalization code.

LGTM

Thu, Oct 25, 10:15 AM

Wed, Oct 24

craig.topper accepted D53649: [TargetLowering] Improve vXi64 UITOFP vXf64 support (P38226).

Not sure I understood the AVX512F comment about vcvtusi2sdq not being legal. Isn't it allowed with AVX512F in X86TargetLowering::LowerUINT_TO_FP? It can't be explicitly marked Legal with setOperationAction because that interface only mentions the input type and we still have to checkout the output type.bold text

Wed, Oct 24, 10:34 PM
craig.topper abandoned D53663: [X86] Add a common-avx512 CPU to match icc's -xCOMMON-AVX512 option.

Abandoning after an internal discussion

Wed, Oct 24, 3:30 PM
craig.topper abandoned D53665: [X86] Add a common-avx512 CPU to match icc's -xCOMMON-AVX512 option.

Abandoning after an internal conversation.

Wed, Oct 24, 3:29 PM
craig.topper created D53671: [X86] Remove some uarch tuning flags from KNL that look to have been inherited from SNB/IVB incorrectly.
Wed, Oct 24, 2:14 PM
craig.topper added a comment to rL345183: [X86] Explicitly list all KNL features of inheriting from IVB. NFC.

I tend to agree with you. I might look into cleaning that up after I fix the extra stuff in KNL

Wed, Oct 24, 1:48 PM
craig.topper added inline comments to D53663: [X86] Add a common-avx512 CPU to match icc's -xCOMMON-AVX512 option.
Wed, Oct 24, 12:48 PM
craig.topper created D53665: [X86] Add a common-avx512 CPU to match icc's -xCOMMON-AVX512 option.
Wed, Oct 24, 12:08 PM
craig.topper created D53663: [X86] Add a common-avx512 CPU to match icc's -xCOMMON-AVX512 option.
Wed, Oct 24, 12:07 PM
craig.topper accepted D53643: [TargetLowering] Add SimplifyDemandedBitsForTargetNode callback + add PMULDQ/PMULUDQ handling.

LGTM

Wed, Oct 24, 10:31 AM

Tue, Oct 23

craig.topper updated the diff for D53268: [X86] Stop promoting and/or/xor/andn to vXi64..

Add more patterns to handle masked logic ops. Starting to add VPTEST patterns.

Tue, Oct 23, 11:07 PM
craig.topper updated the diff for D52757: [X86] Bring back the MOV64r0 pseudo instruction.

Update the fast-isel code in MaterializeInt as well

Tue, Oct 23, 3:12 PM
craig.topper updated the diff for D52757: [X86] Bring back the MOV64r0 pseudo instruction.

Rebase and add spill-zero-x86_64.ll to cover the stack spill case that originally prompted me to look at this. I've reduced this from a complex function that has something like 20 spills of 0 in it. This is the best I was able to reduce it. We don't seem to have any directed tests for spill a 32-bit zero either. It seems to happen in a half dozen or so larger tests.

Tue, Oct 23, 2:42 PM

Mon, Oct 22

craig.topper updated the diff for D53268: [X86] Stop promoting and/or/xor/andn to vXi64..

Rebase. Fix a bad VPTERNLOG pattern. Add a combine to combineANDNP to fix a regression.

Mon, Oct 22, 10:15 PM
craig.topper accepted D53340: [Intrinsic] Unigned Saturation Addition Intrinsic.

LGTM.

Mon, Oct 22, 3:36 PM
craig.topper accepted D53521: [X86][BMI1] X86DAGToDAGISel: select BEXTR from x << (32 - y) >> (32 - y) pattern.

LGTM

Mon, Oct 22, 3:30 PM
craig.topper added a comment to D52441: [CodeGen] Update min-legal-vector width based on function argument and return types.

Ping

Mon, Oct 22, 3:23 PM
craig.topper added a comment to D53306: [X86] Stop promoting integer loads to vXi64.

@sanjoy @sammccall I've recommitted this in r344965 with a fix for the miscompile. I believe DAGCombiner::ForwardStoreValueToDirectLoad was forwarding a v4i64 store to a v4i32 load by replacing them with a truncate which doesn't work for vectors. We would need an extract_subvector+bitcast. I've put in a qualification to only forward scalars if the types don't match. Please let me know if you see any more issues.

Mon, Oct 22, 3:19 PM
craig.topper accepted D53474: [LegalizeDAG] Share Vector/Scalar CTTZ Expansion.

LGTM

Mon, Oct 22, 11:26 AM
craig.topper added a comment to D53478: [DAGCombine] SimplifyNodeWithTwoResults - ensure same legalization for LO/HI operands (PR21207).

DAG combine hasn't always performed legalization on the fly after LegalizeDAG. So there used to only be one chance to legalize.

Mon, Oct 22, 10:16 AM
craig.topper added a comment to D53306: [X86] Stop promoting integer loads to vXi64.

@sammccall I've reverted the change in r344921. Is there anything you can do to help narrow this down? Ideally providing the LLVM IR for the failing case.

Mon, Oct 22, 10:04 AM

Sun, Oct 21

craig.topper updated the diff for D53306: [X86] Stop promoting integer loads to vXi64.

Thread expected width into the constant pool shuffle decoders so we don't over decode the constant.

Sun, Oct 21, 11:21 AM

Sat, Oct 20

craig.topper updated the diff for D53306: [X86] Stop promoting integer loads to vXi64.

Add a hack to prevent the crash in vector-trunc. Though now we miss a combine.

Sat, Oct 20, 11:24 PM
craig.topper updated the diff for D53449: [X86] Remove SDIVREM8_SEXT_HREG/UDIVREM8_ZEXT_HREG and their associated DAG combine and target bits support. Use a post isel peephole instead..

Move comment.

Sat, Oct 20, 11:03 PM
craig.topper added inline comments to D53229: [LegalizeTypes] Teach PromoteIntRes_BITCAST to better handle a bitcast with vector output type and a vector input type that needs to be widened.
Sat, Oct 20, 10:53 PM
craig.topper updated the diff for D53229: [LegalizeTypes] Teach PromoteIntRes_BITCAST to better handle a bitcast with vector output type and a vector input type that needs to be widened.

Add a test case for AArch64. I wasn't sure what file to put it in so I made a new file and put the diff of the old vs new code here.

Sat, Oct 20, 10:50 PM
craig.topper abandoned D44674: [X86] Recognize horizontal reduction trees and narrow the width of the later binops..
Sat, Oct 20, 12:41 PM
craig.topper abandoned D46410: [Target] Diagnose mismatch in required CPU for always_inline functions.
Sat, Oct 20, 12:41 PM

Fri, Oct 19

craig.topper created D53462: [X86] Add additional CPUs and features to Host.cpp and X86TargetParser.def to match compiler-rt and enable __builtin_cpu_supports/__builtin_cpu_is support in clang.
Fri, Oct 19, 4:59 PM
craig.topper created D53461: [X86][compiler-rt] Add additional CPUs and features to the cpu detection to match libgcc.
Fri, Oct 19, 4:56 PM
craig.topper added a dependency for D53458: [X86] Add support for more than 32 features for __builtin_cpu_is: D53460: [X86] When checking the bits in cpu_features for function multiversioning dispatcher in the resolver, make sure all the required bits are set. Not just one of them.
Fri, Oct 19, 4:51 PM
craig.topper added a dependent revision for D53460: [X86] When checking the bits in cpu_features for function multiversioning dispatcher in the resolver, make sure all the required bits are set. Not just one of them: D53458: [X86] Add support for more than 32 features for __builtin_cpu_is.
Fri, Oct 19, 4:51 PM
craig.topper updated the diff for D53458: [X86] Add support for more than 32 features for __builtin_cpu_is.

Rebase on top of D53460

Fri, Oct 19, 4:51 PM
craig.topper created D53460: [X86] When checking the bits in cpu_features for function multiversioning dispatcher in the resolver, make sure all the required bits are set. Not just one of them.
Fri, Oct 19, 4:39 PM
craig.topper created D53458: [X86] Add support for more than 32 features for __builtin_cpu_is.
Fri, Oct 19, 3:58 PM