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simoncook (Simon Cook)
Compiler Engineer, Embecosm

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User Details

User Since
Mar 11 2015, 2:39 PM (254 w, 4 d)

Recent Activity

Fri, Jan 24

simoncook created D73339: [RISCV] Compress instructions based on function features.
Fri, Jan 24, 2:51 AM · Restricted Project

Dec 10 2019

simoncook committed rGa6e50e40e6dd: [RISCV] Improve assembler missing feature warnings (authored by simoncook).
[RISCV] Improve assembler missing feature warnings
Dec 10 2019, 8:53 AM
simoncook closed D69899: [RISCV] Improve assembler missing feature warnings.
Dec 10 2019, 8:53 AM · Restricted Project

Nov 18 2019

simoncook committed rGeedb9648229f: [RISCV] Add assembly mnemonic spell checking (authored by simoncook).
[RISCV] Add assembly mnemonic spell checking
Nov 18 2019, 2:59 AM
simoncook closed D69894: [RISCV] Add assembly mnemonic spell checking.
Nov 18 2019, 2:59 AM · Restricted Project
simoncook committed rGc00e5cf29d49: [RISCV] Set triple based on -march flag (authored by simoncook).
[RISCV] Set triple based on -march flag
Nov 18 2019, 2:57 AM
simoncook closed D54214: [RISCV] Set triple based on -march flag.
Nov 18 2019, 2:56 AM · Restricted Project

Nov 7 2019

simoncook updated the diff for D54214: [RISCV] Set triple based on -march flag.

@lenary Following the discussion regarding D69383, I think it's best for now to keep the logic just keeping -march directly, rather than using getRISCVArch. I think in the case of -target risc32-..... -mabi=lp64 I think it would confuse users if the tools suddenly changed to doing an rv64 compile. If we disable that, all that function would provide me is the same StringRef I'm already evaluating. I think adding any extra flag to indicate whether a rv32<->rv64 switch is acceptable would just make the code unnecessarily more messy. I think in the future if getRISCVArch evaluates more flags, then it might make sense to reconsider this.

Nov 7 2019, 9:42 AM · Restricted Project
simoncook added a comment to D69899: [RISCV] Improve assembler missing feature warnings.

This looks good to me, the only thing that I'm not sure about is the phrasing of the warnings:

"error: instruction requires the following: RV32I Base Instruction Set"

For a naive user (like me) I think the 'I' could make them focus on the extension as the problem, not the fact that's it's RV32 vs RV64.

Nov 7 2019, 3:42 AM · Restricted Project

Nov 6 2019

simoncook updated the diff for D69899: [RISCV] Improve assembler missing feature warnings.

Add diff that has useful context

Nov 6 2019, 8:45 AM · Restricted Project
simoncook created D69899: [RISCV] Improve assembler missing feature warnings.
Nov 6 2019, 8:45 AM · Restricted Project
simoncook created D69894: [RISCV] Add assembly mnemonic spell checking.
Nov 6 2019, 7:04 AM · Restricted Project

Nov 5 2019

simoncook added inline comments to D69741: [Codegen] Both sides of '&&' are same; fixed.
Nov 5 2019, 3:54 AM · Restricted Project

Oct 25 2019

simoncook added a comment to D69383: [RISCV] Match GCC `-march`/`-mabi` driver defaults.

I have a question about backwards compatibility with this patch. Clang 9 has shipped with rvXXg/etc defaulting to ilp32/lp64 ABI, and no march meaning rvXXi, with users having built objects with those defaults. When Clang 10 ships, users they now need to always use a mabi/march flag to keep the same compatibility with their Clang 9 flows, the enabled extensions and ABI will be changed under their feet without warning (or at least until they either hit a linker error in the ABI case, or potentially an invalid instruction trap in the march case).

Oct 25 2019, 1:34 AM · Restricted Project

Oct 23 2019

simoncook added a comment to D67185: [RISCV] Add support for -ffixed-xX flags.

@simoncook: your commit doesn't include handling the case of TLS lowering when -ffixed-x4 is used.

Oct 23 2019, 5:47 AM · Restricted Project, Restricted Project

Oct 22 2019

simoncook committed rGaed9d6d64a38: [RISCV] Add support for -ffixed-xX flags (authored by simoncook).
[RISCV] Add support for -ffixed-xX flags
Oct 22 2019, 1:35 PM
simoncook closed D67185: [RISCV] Add support for -ffixed-xX flags.
Oct 22 2019, 1:35 PM · Restricted Project, Restricted Project
simoncook added a comment to D67185: [RISCV] Add support for -ffixed-xX flags.
In D67185#1708177, @asb wrote:

Note, D68862 is in-progress at the moment, which is related to this patch.

Indeed - Simon, could you please go through that patch and ensure that the implementation here is aligned to it (or indeed, feed back on that patch if you feel they should be doing something differently). Thanks!

Oct 22 2019, 9:18 AM · Restricted Project, Restricted Project
simoncook added a comment to D54214: [RISCV] Set triple based on -march flag.

Ping, before I rebased this did anyone have any other thoughts on flag precedence?

Oct 22 2019, 9:04 AM · Restricted Project

Oct 21 2019

simoncook updated the diff for D62732: [RISCV] Add SystemV ABI.

Rebase, implement all hooks that aren't PrepareTrivialCall/function calling related. If its possible to commit these two separately, I think it would be best to have that as a separate patch whereby preparing arguments for the various RISC-V hard-float ABIs can be done independently of breakpoints/unwinding/etc.

Oct 21 2019, 11:08 PM · Restricted Project

Oct 14 2019

simoncook added inline comments to D67185: [RISCV] Add support for -ffixed-xX flags.
Oct 14 2019, 3:18 AM · Restricted Project, Restricted Project

Oct 3 2019

simoncook updated the diff for D67185: [RISCV] Add support for -ffixed-xX flags.

Rebase on top of tree, add @luismarques as reviewer

Oct 3 2019, 6:59 AM · Restricted Project, Restricted Project

Sep 19 2019

simoncook updated the diff for D67185: [RISCV] Add support for -ffixed-xX flags.

Update to reflect comments about the fact registers are explicitly reserved. In addition to @lenary 's suggested change, I renamed isReservedReg to note the check that we are checking if its a user provided reservation.

Sep 19 2019, 9:03 AM · Restricted Project, Restricted Project

Sep 6 2019

simoncook updated the diff for D67185: [RISCV] Add support for -ffixed-xX flags.

Update based on initial feedback/going down the providing error route.

Sep 6 2019, 5:21 AM · Restricted Project, Restricted Project

Sep 5 2019

simoncook added a comment to D67185: [RISCV] Add support for -ffixed-xX flags.

For added context, I have gone and double-checked with GCC's implementation both for AArch64 and RISC-V and for registers used by the calling convention the compiler will still use them for argument passing and return values, but otherwise won't use it for any temporaries/register allocation purposes, which does have the side effect of confusing behaviour unless carefully documented.

Sep 5 2019, 6:26 AM · Restricted Project, Restricted Project
simoncook planned changes to D67185: [RISCV] Add support for -ffixed-xX flags.

Thanks for the feedback. I will improve the test so it more reliably tests what it intends to.

Sep 5 2019, 2:09 AM · Restricted Project, Restricted Project

Sep 4 2019

simoncook created D67185: [RISCV] Add support for -ffixed-xX flags.
Sep 4 2019, 9:39 AM · Restricted Project, Restricted Project

Sep 3 2019

simoncook committed rL370708: Add myself..
Add myself.
Sep 3 2019, 1:37 AM

Aug 8 2019

simoncook accepted D65947: [RISCV] Allow ABI Names in Inline Assembly Constraints.

In that case LGTM

Aug 8 2019, 7:31 AM · Restricted Project
simoncook added a comment to D65947: [RISCV] Allow ABI Names in Inline Assembly Constraints.

Other than my small suggestion about the use of NoRegister, this looks good to me.

Aug 8 2019, 6:48 AM · Restricted Project

Aug 5 2019

simoncook added inline comments to D65649: [RISCV] Add MC encodings and tests of the Bit Manipulation extension.
Aug 5 2019, 3:12 AM · Restricted Project

Aug 1 2019

simoncook added a comment to D54214: [RISCV] Set triple based on -march flag.

What happens if I pass clang -march=rv32i -target riscv64-unknown-elf? Should we care about the ordering of -march vs -target?

Aug 1 2019, 3:59 AM · Restricted Project
simoncook updated the diff for D54214: [RISCV] Set triple based on -march flag.

Rebase on top of tree.

Aug 1 2019, 3:20 AM · Restricted Project

Jul 31 2019

simoncook committed rG7deaeee753f6: [RISCV] Add support for floating point registers in inlineasm (authored by simoncook).
[RISCV] Add support for floating point registers in inlineasm
Jul 31 2019, 2:17 AM
simoncook committed rL367399: [RISCV] Add support for floating point registers in inlineasm.
[RISCV] Add support for floating point registers in inlineasm
Jul 31 2019, 2:11 AM
simoncook closed D64737: RISCV: Add support for floating point registers in inlineasm.
Jul 31 2019, 2:11 AM · Restricted Project, Restricted Project
simoncook committed rG8d7ec4d644d2: [RISCV] Add support for lowering floating point inlineasm clobbers (authored by simoncook).
[RISCV] Add support for lowering floating point inlineasm clobbers
Jul 31 2019, 2:08 AM
simoncook committed rL367397: [RISCV] Add support for lowering floating point inlineasm clobbers.
[RISCV] Add support for lowering floating point inlineasm clobbers
Jul 31 2019, 2:08 AM
simoncook closed D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.
Jul 31 2019, 2:07 AM · Restricted Project

Jul 29 2019

simoncook added a comment to D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.

Thanks for reviewing this @lenary, @asb do you want to take a look at this first, or is a LGTM from Sam sufficient for me to merge?

Jul 29 2019, 7:36 AM · Restricted Project

Jul 25 2019

simoncook added a child revision for D64751: [RISCV] Add support for lowering floating point inlineasm clobbers: D64737: RISCV: Add support for floating point registers in inlineasm.
Jul 25 2019, 3:20 AM · Restricted Project
simoncook added a parent revision for D64737: RISCV: Add support for floating point registers in inlineasm: D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.
Jul 25 2019, 3:20 AM · Restricted Project, Restricted Project
simoncook removed a parent revision for D64751: [RISCV] Add support for lowering floating point inlineasm clobbers: D64737: RISCV: Add support for floating point registers in inlineasm.
Jul 25 2019, 3:20 AM · Restricted Project
simoncook removed a child revision for D64737: RISCV: Add support for floating point registers in inlineasm: D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.
Jul 25 2019, 3:20 AM · Restricted Project, Restricted Project

Jul 15 2019

simoncook added a child revision for D64737: RISCV: Add support for floating point registers in inlineasm: D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.
Jul 15 2019, 9:15 AM · Restricted Project, Restricted Project
simoncook added parent revisions for D64751: [RISCV] Add support for lowering floating point inlineasm clobbers: D64737: RISCV: Add support for floating point registers in inlineasm, D60456: [RISCV] Hard float ABI support.
Jul 15 2019, 9:15 AM · Restricted Project
simoncook added a child revision for D60456: [RISCV] Hard float ABI support: D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.
Jul 15 2019, 9:15 AM · Restricted Project, Restricted Project
simoncook created D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.
Jul 15 2019, 9:12 AM · Restricted Project
simoncook added a comment to D64737: RISCV: Add support for floating point registers in inlineasm.

As an aside, I've noticed a codegen issue when using floating point clobber lists, resulting in the implicit-defs not being added to INLINEASM instructions. I'm working on a fix for that now and will submit a second patch shortly.

Jul 15 2019, 6:42 AM · Restricted Project, Restricted Project
simoncook retitled D64737: RISCV: Add support for floating point registers in inlineasm from [PATCH] RISCV: Add support for floating point registers in inlineasm to RISCV: Add support for floating point registers in inlineasm.
Jul 15 2019, 6:20 AM · Restricted Project, Restricted Project
simoncook created D64737: RISCV: Add support for floating point registers in inlineasm.
Jul 15 2019, 6:20 AM · Restricted Project, Restricted Project

Jul 3 2019

simoncook added inline comments to D64125: [RISCV] Support @llvm.readcyclecounter() Intrinsic.
Jul 3 2019, 6:03 AM · Restricted Project

Jun 18 2019

simoncook updated the diff for D62732: [RISCV] Add SystemV ABI.
  • Refactored register tables to match style used in i386/x86_64
  • Add enum for RISC-V DWARF numbers
  • Add F registers (assuming 32-bit, at runtime this seems to be overwritten to 64-bit if D extension is provided)
  • Add default unwind plan for first frame
Jun 18 2019, 2:49 AM · Restricted Project

May 31 2019

simoncook created D62732: [RISCV] Add SystemV ABI.
May 31 2019, 7:06 AM · Restricted Project

Jan 31 2019

simoncook added a comment to D57497: [RISCV] Passing small data limitation value to RISCV backend.

As this mllvm option only affects the creation of ELF objects, do we also need to add a similar option for the LTO case, as the -G value would have no effect otherwise?

Jan 31 2019, 3:26 AM · Restricted Project

Nov 7 2018

simoncook added a parent revision for D54214: [RISCV] Set triple based on -march flag: D54215: [Triple] Add test for if triple is RISC-V.
Nov 7 2018, 10:26 AM · Restricted Project
simoncook added a child revision for D54215: [Triple] Add test for if triple is RISC-V: D54214: [RISCV] Set triple based on -march flag.
Nov 7 2018, 10:26 AM · Restricted Project
simoncook created D54215: [Triple] Add test for if triple is RISC-V.
Nov 7 2018, 10:26 AM · Restricted Project
simoncook created D54214: [RISCV] Set triple based on -march flag.
Nov 7 2018, 10:24 AM · Restricted Project

Oct 15 2018

simoncook added inline comments to D53291: add riscv32e to the llvm.
Oct 15 2018, 8:44 AM · Restricted Project
simoncook added a comment to D52977: [RISCV] Introduce codegen patterns for instructions introduced in RV64I.

I tried building this on top of trunk but my build failed with this assertion:

Oct 15 2018, 4:04 AM

Aug 15 2018

simoncook accepted D50246: [RISCV] Add support for computing sysroot for riscv32-unknown-elf.

My tests now look better, there are a couple of failures, but this seems to be a bug in newlib, rather than with clang/this patch (the bug was masked before as we would have been pulling in system headers). So this patch looks good to me.

Aug 15 2018, 2:18 AM

Aug 14 2018

simoncook requested changes to D50246: [RISCV] Add support for computing sysroot for riscv32-unknown-elf.

I've tested this, regression tests involving linking now mostly pass as crt0 can now be found, but it seems that system headers are still being pulled in causing a couple of tests to fail. In particular using limits.h is causing build failures for me.

Aug 14 2018, 2:47 AM

Aug 2 2018

simoncook added a comment to D46822: [RISCV] Add driver for riscv32-unknown-elf baremetal target.

It seems the ability to link objects has been broken by this change. As an example from our nightly tests:

Aug 2 2018, 1:52 PM

Jun 21 2018

simoncook added a comment to D48412: [RISCV] Add support for interrupt attribute.

I think this should also cover mismatched arguments if the attribute appears several times, and reject/warn about the attribute combination in these cases.

Jun 21 2018, 2:08 AM · Restricted Project

May 23 2018

simoncook abandoned D46746: [RISCV] Fix builtin fixup sizes.
May 23 2018, 5:26 AM

May 22 2018

simoncook updated the diff for D46423: [RISCV] Support .option relax and .option norelax.

Note: I've marked this as WIP whilst discussing the interface, I'm not suggesting hardcoding in a setSTI() function to MCAsmBackend, that will be removed from the final patch

May 22 2018, 9:38 AM
simoncook updated the diff for D45181: [RISCV] Add diff relocation support for RISC-V.

Rebased on top of tree, and applied changes as per Alex's review.

May 22 2018, 8:05 AM · Restricted Project
simoncook added a comment to D46746: [RISCV] Fix builtin fixup sizes.

I agree, the route you have taken in D46965 seems the best route to go down. Unless we end up with some fixup where we want to manipulate bytes that wouldn't be covered by that calculation (it seems unlikely), then all this table is doing is duplicating what information we already have, so I think it's best to use your calculation.

May 22 2018, 6:41 AM
simoncook added a comment to D46965: [RISCV] Fix builtin fixup sizes (alternate approach).

This LGTM.

May 22 2018, 6:30 AM

May 11 2018

simoncook added inline comments to D45181: [RISCV] Add diff relocation support for RISC-V.
May 11 2018, 4:36 AM · Restricted Project
simoncook created D46746: [RISCV] Fix builtin fixup sizes.
May 11 2018, 4:28 AM
simoncook requested changes to D45773: [RISCV] Don't fold symbol diff.
May 11 2018, 3:28 AM

May 4 2018

simoncook added a parent revision for D46424: [RISCV] Support .option push and .option pop: D46423: [RISCV] Support .option relax and .option norelax.
May 4 2018, 4:10 AM
simoncook added a child revision for D46423: [RISCV] Support .option relax and .option norelax: D46424: [RISCV] Support .option push and .option pop.
May 4 2018, 4:10 AM
simoncook created D46424: [RISCV] Support .option push and .option pop.
May 4 2018, 4:10 AM
simoncook added a child revision for D45864: [RISCV] Support .option rvc and norvc: D46423: [RISCV] Support .option relax and .option norelax.
May 4 2018, 4:08 AM
simoncook added a child revision for D44886: [RISCV] Support linker relax function call from auipc and jalr to jal: D46423: [RISCV] Support .option relax and .option norelax.
May 4 2018, 4:08 AM
simoncook added parent revisions for D46423: [RISCV] Support .option relax and .option norelax: D44886: [RISCV] Support linker relax function call from auipc and jalr to jal, D45864: [RISCV] Support .option rvc and norvc.
May 4 2018, 4:08 AM
simoncook created D46423: [RISCV] Support .option relax and .option norelax.
May 4 2018, 4:07 AM

May 3 2018

simoncook added inline comments to D45181: [RISCV] Add diff relocation support for RISC-V.
May 3 2018, 8:53 AM · Restricted Project

Apr 19 2018

simoncook updated the diff for D45181: [RISCV] Add diff relocation support for RISC-V.

I've readded the reloc check line to hilo-constaddr.s and renamed hilo-constaddr-invalid.s to hilo-constaddr-expr.s since it is no longer checking something that is always invalid.

Apr 19 2018, 2:05 AM · Restricted Project

Apr 16 2018

simoncook updated the diff for D45181: [RISCV] Add diff relocation support for RISC-V.

I've rebased the change on top of D44886 to indicate what is conditional based on linker relaxation.

Apr 16 2018, 3:29 AM · Restricted Project

Apr 7 2018

simoncook updated the diff for D45181: [RISCV] Add diff relocation support for RISC-V.

Take part of test I removed as it now produces and error, and turn it into an explicit test for an error message.

Apr 7 2018, 2:18 PM · Restricted Project

Apr 6 2018

simoncook updated the diff for D45181: [RISCV] Add diff relocation support for RISC-V.

The previous diff had one change missing from my original patch, that is now restored.

Apr 6 2018, 5:09 PM · Restricted Project
simoncook updated the diff for D45181: [RISCV] Add diff relocation support for RISC-V.

I've updated the patch to respond to comments, and deal with the couple of test failures I was seeing.

Apr 6 2018, 4:57 PM · Restricted Project

Apr 4 2018

simoncook added reviewers for D45181: [RISCV] Add diff relocation support for RISC-V: asb, edward-jones.
Apr 4 2018, 1:03 AM · Restricted Project

Apr 2 2018

simoncook created D45181: [RISCV] Add diff relocation support for RISC-V.
Apr 2 2018, 1:24 PM · Restricted Project

Nov 15 2017

simoncook added a comment to D40001: [RISCV] MC layer support for the load/store instructions of standard compress instruction set.

Thanks, I found one nitpick with a couple of the tests, but the rest looks good to me.

Nov 15 2017, 2:28 AM

Nov 14 2017

simoncook requested changes to D40001: [RISCV] MC layer support for the load/store instructions of standard compress instruction set.
Nov 14 2017, 1:49 AM

Nov 1 2016

simoncook added inline comments to D24613: [AAP] (9) Add the bulk of the AAP backend implementation.
Nov 1 2016, 4:20 PM
simoncook requested changes to D24612: [AAP] (8) Add AAP Disassembler support.
Nov 1 2016, 4:01 PM
simoncook added inline comments to D23772: [AAP] (6) Add AAP AsmParser.
Nov 1 2016, 3:55 PM
simoncook requested changes to D23771: [AAP] (5) Add AAP MC layer support.
Nov 1 2016, 3:46 PM

Aug 24 2016

simoncook added inline comments to D20046: [AVR] Add assembly parser.
Aug 24 2016, 12:51 AM

Aug 17 2016

simoncook updated subscribers of D23558: [RISCV 2/10] Add RISC-V ELF defines.
Aug 17 2016, 6:57 AM
simoncook updated subscribers of D23567: [RISCV 9/10] Add support for disassembly.
Aug 17 2016, 6:56 AM
simoncook updated subscribers of D23568: [RISCV 10/10] Add common fixups and relocations.
Aug 17 2016, 6:56 AM
simoncook updated subscribers of D23566: [RISCV 8/10] Add support for all RV32I instructions.
Aug 17 2016, 6:56 AM
simoncook updated subscribers of D23564: [RISCV 7/10] Add RISCVInstPrinter and basic MC assembler tests.
Aug 17 2016, 6:56 AM