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simoncook (Simon Cook)
Compiler Engineer, Embecosm

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User Since
Mar 11 2015, 2:39 PM (232 w, 2 d)

Recent Activity

Thu, Aug 8

simoncook accepted D65947: [RISCV] Allow ABI Names in Inline Assembly Constraints.

In that case LGTM

Thu, Aug 8, 7:31 AM · Restricted Project
simoncook added a comment to D65947: [RISCV] Allow ABI Names in Inline Assembly Constraints.

Other than my small suggestion about the use of NoRegister, this looks good to me.

Thu, Aug 8, 6:48 AM · Restricted Project

Mon, Aug 5

simoncook added inline comments to D65649: [RISCV] Add MC encodings and tests of the Bit Manipulation extension.
Mon, Aug 5, 3:12 AM · Restricted Project

Thu, Aug 1

simoncook added a comment to D54214: [RISCV] Set triple based on -march flag.

What happens if I pass clang -march=rv32i -target riscv64-unknown-elf? Should we care about the ordering of -march vs -target?

Thu, Aug 1, 3:59 AM · Restricted Project
simoncook updated the diff for D54214: [RISCV] Set triple based on -march flag.

Rebase on top of tree.

Thu, Aug 1, 3:20 AM · Restricted Project

Wed, Jul 31

simoncook committed rG7deaeee753f6: [RISCV] Add support for floating point registers in inlineasm (authored by simoncook).
[RISCV] Add support for floating point registers in inlineasm
Wed, Jul 31, 2:17 AM
simoncook committed rL367399: [RISCV] Add support for floating point registers in inlineasm.
[RISCV] Add support for floating point registers in inlineasm
Wed, Jul 31, 2:11 AM
simoncook closed D64737: RISCV: Add support for floating point registers in inlineasm.
Wed, Jul 31, 2:11 AM · Restricted Project, Restricted Project
simoncook committed rG8d7ec4d644d2: [RISCV] Add support for lowering floating point inlineasm clobbers (authored by simoncook).
[RISCV] Add support for lowering floating point inlineasm clobbers
Wed, Jul 31, 2:08 AM
simoncook committed rL367397: [RISCV] Add support for lowering floating point inlineasm clobbers.
[RISCV] Add support for lowering floating point inlineasm clobbers
Wed, Jul 31, 2:08 AM
simoncook closed D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.
Wed, Jul 31, 2:07 AM · Restricted Project

Mon, Jul 29

simoncook added a comment to D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.

Thanks for reviewing this @lenary, @asb do you want to take a look at this first, or is a LGTM from Sam sufficient for me to merge?

Mon, Jul 29, 7:36 AM · Restricted Project

Jul 25 2019

simoncook added a child revision for D64751: [RISCV] Add support for lowering floating point inlineasm clobbers: D64737: RISCV: Add support for floating point registers in inlineasm.
Jul 25 2019, 3:20 AM · Restricted Project
simoncook added a parent revision for D64737: RISCV: Add support for floating point registers in inlineasm: D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.
Jul 25 2019, 3:20 AM · Restricted Project, Restricted Project
simoncook removed a parent revision for D64751: [RISCV] Add support for lowering floating point inlineasm clobbers: D64737: RISCV: Add support for floating point registers in inlineasm.
Jul 25 2019, 3:20 AM · Restricted Project
simoncook removed a child revision for D64737: RISCV: Add support for floating point registers in inlineasm: D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.
Jul 25 2019, 3:20 AM · Restricted Project, Restricted Project

Jul 15 2019

simoncook added a child revision for D64737: RISCV: Add support for floating point registers in inlineasm: D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.
Jul 15 2019, 9:15 AM · Restricted Project, Restricted Project
simoncook added parent revisions for D64751: [RISCV] Add support for lowering floating point inlineasm clobbers: D64737: RISCV: Add support for floating point registers in inlineasm, D60456: [RISCV] Hard float ABI support.
Jul 15 2019, 9:15 AM · Restricted Project
simoncook added a child revision for D60456: [RISCV] Hard float ABI support: D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.
Jul 15 2019, 9:15 AM · Restricted Project, Restricted Project
simoncook created D64751: [RISCV] Add support for lowering floating point inlineasm clobbers.
Jul 15 2019, 9:12 AM · Restricted Project
simoncook added a comment to D64737: RISCV: Add support for floating point registers in inlineasm.

As an aside, I've noticed a codegen issue when using floating point clobber lists, resulting in the implicit-defs not being added to INLINEASM instructions. I'm working on a fix for that now and will submit a second patch shortly.

Jul 15 2019, 6:42 AM · Restricted Project, Restricted Project
simoncook retitled D64737: RISCV: Add support for floating point registers in inlineasm from [PATCH] RISCV: Add support for floating point registers in inlineasm to RISCV: Add support for floating point registers in inlineasm.
Jul 15 2019, 6:20 AM · Restricted Project, Restricted Project
simoncook created D64737: RISCV: Add support for floating point registers in inlineasm.
Jul 15 2019, 6:20 AM · Restricted Project, Restricted Project

Jul 3 2019

simoncook added inline comments to D64125: [RISCV] Support @llvm.readcyclecounter() Intrinsic.
Jul 3 2019, 6:03 AM · Restricted Project

Jun 18 2019

simoncook updated the diff for D62732: [WIP][RISCV] Initial port of LLDB for RISC-V.
  • Refactored register tables to match style used in i386/x86_64
  • Add enum for RISC-V DWARF numbers
  • Add F registers (assuming 32-bit, at runtime this seems to be overwritten to 64-bit if D extension is provided)
  • Add default unwind plan for first frame
Jun 18 2019, 2:49 AM · Restricted Project

May 31 2019

simoncook created D62732: [WIP][RISCV] Initial port of LLDB for RISC-V.
May 31 2019, 7:06 AM · Restricted Project

Jan 31 2019

simoncook added a comment to D57497: [RISCV] Passing small data limitation value to RISCV backend.

As this mllvm option only affects the creation of ELF objects, do we also need to add a similar option for the LTO case, as the -G value would have no effect otherwise?

Jan 31 2019, 3:26 AM · Restricted Project

Nov 7 2018

simoncook added a parent revision for D54214: [RISCV] Set triple based on -march flag: D54215: [Triple] Add test for if triple is RISC-V.
Nov 7 2018, 10:26 AM · Restricted Project
simoncook added a child revision for D54215: [Triple] Add test for if triple is RISC-V: D54214: [RISCV] Set triple based on -march flag.
Nov 7 2018, 10:26 AM · Restricted Project
simoncook created D54215: [Triple] Add test for if triple is RISC-V.
Nov 7 2018, 10:26 AM · Restricted Project
simoncook created D54214: [RISCV] Set triple based on -march flag.
Nov 7 2018, 10:24 AM · Restricted Project

Oct 15 2018

simoncook added inline comments to D53291: add riscv32e to the llvm.
Oct 15 2018, 8:44 AM · Restricted Project
simoncook added a comment to D52977: [RISCV] Introduce codegen patterns for instructions introduced in RV64I.

I tried building this on top of trunk but my build failed with this assertion:

Oct 15 2018, 4:04 AM

Aug 15 2018

simoncook accepted D50246: [RISCV] Add support for computing sysroot for riscv32-unknown-elf.

My tests now look better, there are a couple of failures, but this seems to be a bug in newlib, rather than with clang/this patch (the bug was masked before as we would have been pulling in system headers). So this patch looks good to me.

Aug 15 2018, 2:18 AM

Aug 14 2018

simoncook requested changes to D50246: [RISCV] Add support for computing sysroot for riscv32-unknown-elf.

I've tested this, regression tests involving linking now mostly pass as crt0 can now be found, but it seems that system headers are still being pulled in causing a couple of tests to fail. In particular using limits.h is causing build failures for me.

Aug 14 2018, 2:47 AM

Aug 2 2018

simoncook added a comment to D46822: [RISCV] Add driver for riscv32-unknown-elf baremetal target.

It seems the ability to link objects has been broken by this change. As an example from our nightly tests:

Aug 2 2018, 1:52 PM

Jun 21 2018

simoncook added a comment to D48412: [RISCV] Add support for interrupt attribute.

I think this should also cover mismatched arguments if the attribute appears several times, and reject/warn about the attribute combination in these cases.

Jun 21 2018, 2:08 AM · Restricted Project

May 23 2018

simoncook abandoned D46746: [RISCV] Fix builtin fixup sizes.
May 23 2018, 5:26 AM

May 22 2018

simoncook updated the diff for D46423: [RISCV] Support .option relax and .option norelax.

Note: I've marked this as WIP whilst discussing the interface, I'm not suggesting hardcoding in a setSTI() function to MCAsmBackend, that will be removed from the final patch

May 22 2018, 9:38 AM
simoncook updated the diff for D45181: [RISCV] Add diff relocation support for RISC-V.

Rebased on top of tree, and applied changes as per Alex's review.

May 22 2018, 8:05 AM · Restricted Project
simoncook added a comment to D46746: [RISCV] Fix builtin fixup sizes.

I agree, the route you have taken in D46965 seems the best route to go down. Unless we end up with some fixup where we want to manipulate bytes that wouldn't be covered by that calculation (it seems unlikely), then all this table is doing is duplicating what information we already have, so I think it's best to use your calculation.

May 22 2018, 6:41 AM
simoncook added a comment to D46965: [RISCV] Fix builtin fixup sizes (alternate approach).

This LGTM.

May 22 2018, 6:30 AM

May 11 2018

simoncook added inline comments to D45181: [RISCV] Add diff relocation support for RISC-V.
May 11 2018, 4:36 AM · Restricted Project
simoncook created D46746: [RISCV] Fix builtin fixup sizes.
May 11 2018, 4:28 AM
simoncook requested changes to D45773: [RISCV] Don't fold symbol diff.
May 11 2018, 3:28 AM

May 4 2018

simoncook added a parent revision for D46424: [RISCV] Support .option push and .option pop: D46423: [RISCV] Support .option relax and .option norelax.
May 4 2018, 4:10 AM
simoncook added a child revision for D46423: [RISCV] Support .option relax and .option norelax: D46424: [RISCV] Support .option push and .option pop.
May 4 2018, 4:10 AM
simoncook created D46424: [RISCV] Support .option push and .option pop.
May 4 2018, 4:10 AM
simoncook added a child revision for D45864: [RISCV] Support .option rvc and norvc: D46423: [RISCV] Support .option relax and .option norelax.
May 4 2018, 4:08 AM
simoncook added a child revision for D44886: [RISCV] Support linker relax function call from auipc and jalr to jal: D46423: [RISCV] Support .option relax and .option norelax.
May 4 2018, 4:08 AM
simoncook added parent revisions for D46423: [RISCV] Support .option relax and .option norelax: D44886: [RISCV] Support linker relax function call from auipc and jalr to jal, D45864: [RISCV] Support .option rvc and norvc.
May 4 2018, 4:08 AM
simoncook created D46423: [RISCV] Support .option relax and .option norelax.
May 4 2018, 4:07 AM

May 3 2018

simoncook added inline comments to D45181: [RISCV] Add diff relocation support for RISC-V.
May 3 2018, 8:53 AM · Restricted Project

Apr 19 2018

simoncook updated the diff for D45181: [RISCV] Add diff relocation support for RISC-V.

I've readded the reloc check line to hilo-constaddr.s and renamed hilo-constaddr-invalid.s to hilo-constaddr-expr.s since it is no longer checking something that is always invalid.

Apr 19 2018, 2:05 AM · Restricted Project

Apr 16 2018

simoncook updated the diff for D45181: [RISCV] Add diff relocation support for RISC-V.

I've rebased the change on top of D44886 to indicate what is conditional based on linker relaxation.

Apr 16 2018, 3:29 AM · Restricted Project

Apr 7 2018

simoncook updated the diff for D45181: [RISCV] Add diff relocation support for RISC-V.

Take part of test I removed as it now produces and error, and turn it into an explicit test for an error message.

Apr 7 2018, 2:18 PM · Restricted Project

Apr 6 2018

simoncook updated the diff for D45181: [RISCV] Add diff relocation support for RISC-V.

The previous diff had one change missing from my original patch, that is now restored.

Apr 6 2018, 5:09 PM · Restricted Project
simoncook updated the diff for D45181: [RISCV] Add diff relocation support for RISC-V.

I've updated the patch to respond to comments, and deal with the couple of test failures I was seeing.

Apr 6 2018, 4:57 PM · Restricted Project

Apr 4 2018

simoncook added reviewers for D45181: [RISCV] Add diff relocation support for RISC-V: asb, edward-jones.
Apr 4 2018, 1:03 AM · Restricted Project

Apr 2 2018

simoncook created D45181: [RISCV] Add diff relocation support for RISC-V.
Apr 2 2018, 1:24 PM · Restricted Project

Nov 15 2017

simoncook added a comment to D40001: [RISCV] MC layer support for the load/store instructions of standard compress instruction set.

Thanks, I found one nitpick with a couple of the tests, but the rest looks good to me.

Nov 15 2017, 2:28 AM

Nov 14 2017

simoncook requested changes to D40001: [RISCV] MC layer support for the load/store instructions of standard compress instruction set.
Nov 14 2017, 1:49 AM

Nov 1 2016

simoncook added inline comments to D24613: [AAP] (9) Add the bulk of the AAP backend implementation.
Nov 1 2016, 4:20 PM
simoncook requested changes to D24612: [AAP] (8) Add AAP Disassembler support.
Nov 1 2016, 4:01 PM
simoncook added inline comments to D23772: [AAP] (6) Add AAP AsmParser.
Nov 1 2016, 3:55 PM
simoncook requested changes to D23771: [AAP] (5) Add AAP MC layer support.
Nov 1 2016, 3:46 PM

Aug 24 2016

simoncook added inline comments to D20046: [AVR] Add assembly parser.
Aug 24 2016, 12:51 AM

Aug 17 2016

simoncook updated subscribers of D23558: [RISCV 2/10] Add RISC-V ELF defines.
Aug 17 2016, 6:57 AM
simoncook updated subscribers of D23567: [RISCV 9/10] Add support for disassembly.
Aug 17 2016, 6:56 AM
simoncook updated subscribers of D23568: [RISCV 10/10] Add common fixups and relocations.
Aug 17 2016, 6:56 AM
simoncook updated subscribers of D23566: [RISCV 8/10] Add support for all RV32I instructions.
Aug 17 2016, 6:56 AM
simoncook updated subscribers of D23564: [RISCV 7/10] Add RISCVInstPrinter and basic MC assembler tests.
Aug 17 2016, 6:56 AM
simoncook updated subscribers of D23562: [RISCV 5/10] Add bare-bones RISC-V MCTargetDesc.
Aug 17 2016, 6:56 AM
simoncook updated subscribers of D23563: [RISCV 6/10] Add basic RISCVAsmParser.
Aug 17 2016, 6:56 AM
simoncook updated subscribers of D23560: [RISCV 3/10] Add stub backend.
Aug 17 2016, 6:56 AM
simoncook updated subscribers of D23561: [RISCV 4/10] Add basic RISCV{InstrFormats,InstrInfo,RegisterInfo,}.td.
Aug 17 2016, 6:56 AM
simoncook updated subscribers of D23557: [RISCV 1/10] Recognise riscv32 and riscv64 in triple parsing code.
Aug 17 2016, 6:56 AM

Jul 19 2016

simoncook updated subscribers of D22463: [RFC] Moving to GitHub Proposal: NOT DECISION!.
Jul 19 2016, 3:35 AM

Jan 26 2016

simoncook updated subscribers of D16471: Remove autoconf support.
Jan 26 2016, 10:21 AM

Sep 22 2015

simoncook updated the diff for D13008: Remove handling of AddrSpaceCast in stripAndAccumulateInBoundsConstantOffsets.

Added comment to test as per recommendation.

Sep 22 2015, 1:28 AM

Sep 21 2015

simoncook retitled D13008: Remove handling of AddrSpaceCast in stripAndAccumulateInBoundsConstantOffsets from to Remove handling of AddrSpaceCast in stripAndAccumulateInBoundsConstantOffsets.
Sep 21 2015, 3:30 AM

Aug 20 2015

simoncook updated subscribers of D12192: Add clang support for AAP.
Aug 20 2015, 4:56 AM
simoncook updated subscribers of D12191: AAP Backend.
Aug 20 2015, 4:41 AM