rampitec (Stanislav Mekhanoshin)
User

Projects

User does not belong to any projects.

User Details

User Since
Apr 4 2014, 4:14 AM (237 w, 2 d)

Recent Activity

Fri, Oct 19

rampitec updated the diff for D52677: [AMDGPU] Match v_swap_b32.
Fri, Oct 19, 3:57 PM
rampitec added inline comments to D52677: [AMDGPU] Match v_swap_b32.
Fri, Oct 19, 3:57 PM
rampitec added a comment to D52846: [AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/ST.

You probably need to extend the pass to support subregs, not necessarily in the same patch.
But you definitely need a mir test with subregs used with either operands.

Fri, Oct 19, 3:09 PM
rampitec accepted D53359: AMDGPU: Remove PHI loop condition optimization.

LGTM

Fri, Oct 19, 2:51 PM

Thu, Oct 18

rampitec accepted D52946: AMDGPU: Add support pattern for SUB of one bit.

LGTM

Thu, Oct 18, 4:29 PM

Tue, Oct 2

rampitec committed rL343648: [AMDGPU] Assert in getOpSize() there are no sub-dword subregs.
[AMDGPU] Assert in getOpSize() there are no sub-dword subregs
Tue, Oct 2, 5:02 PM
rampitec closed D52769: [AMDGPU] Assert in getOpSize() there are no sub-dword subregs.
Tue, Oct 2, 5:02 PM

Mon, Oct 1

rampitec created D52769: [AMDGPU] Assert in getOpSize() there are no sub-dword subregs.
Mon, Oct 1, 10:41 PM
rampitec added inline comments to D52736: [AMDGPU] Fixed SIInstrInfo::getOpSize to handle subregs.
Mon, Oct 1, 10:16 PM
rampitec updated the diff for D52677: [AMDGPU] Match v_swap_b32.

Addressed review comments.

Mon, Oct 1, 9:45 PM
rampitec added inline comments to D52677: [AMDGPU] Match v_swap_b32.
Mon, Oct 1, 9:44 PM
rampitec added inline comments to D52736: [AMDGPU] Fixed SIInstrInfo::getOpSize to handle subregs.
Mon, Oct 1, 9:21 PM
rampitec added inline comments to D52736: [AMDGPU] Fixed SIInstrInfo::getOpSize to handle subregs.
Mon, Oct 1, 8:28 PM
rampitec accepted D52741: [AMDGPU] Add an AMDGPU pass to promote bitcast calls.

LGTM

Mon, Oct 1, 12:11 PM
rampitec committed rL343508: [AMDGPU] Fixed SIInstrInfo::getOpSize to handle subregs.
[AMDGPU] Fixed SIInstrInfo::getOpSize to handle subregs
Mon, Oct 1, 11:01 AM
rampitec closed D52736: [AMDGPU] Fixed SIInstrInfo::getOpSize to handle subregs.
Mon, Oct 1, 11:01 AM
rampitec added a dependency for D52677: [AMDGPU] Match v_swap_b32: D52736: [AMDGPU] Fixed SIInstrInfo::getOpSize to handle subregs.
Mon, Oct 1, 10:39 AM
rampitec added a dependent revision for D52736: [AMDGPU] Fixed SIInstrInfo::getOpSize to handle subregs: D52677: [AMDGPU] Match v_swap_b32.
Mon, Oct 1, 10:39 AM
rampitec updated the diff for D52677: [AMDGPU] Match v_swap_b32.

Split off independent D52736.

Mon, Oct 1, 10:39 AM
rampitec created D52736: [AMDGPU] Fixed SIInstrInfo::getOpSize to handle subregs.
Mon, Oct 1, 10:36 AM

Fri, Sep 28

rampitec created D52677: [AMDGPU] Match v_swap_b32.
Fri, Sep 28, 5:36 PM
rampitec accepted D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..

LGTM

Fri, Sep 28, 8:33 AM

Thu, Sep 27

rampitec added inline comments to D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..
Thu, Sep 27, 12:34 PM
rampitec committed rL343249: [AMDGPU] Fold copy (copy vgpr).
[AMDGPU] Fold copy (copy vgpr)
Thu, Sep 27, 11:59 AM
rampitec closed D52577: [AMDGPU] Fold copy (copy vgpr).
Thu, Sep 27, 11:59 AM
rampitec requested changes to D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..
Thu, Sep 27, 11:27 AM
rampitec added inline comments to D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..
Thu, Sep 27, 9:37 AM

Wed, Sep 26

rampitec created D52577: [AMDGPU] Fold copy (copy vgpr).
Wed, Sep 26, 2:38 PM
rampitec added inline comments to D52559: [AMDGPU] Divergence driven instruction selection. Shift operations..
Wed, Sep 26, 11:46 AM

Tue, Sep 25

rampitec committed rL343047: [AMDGPU] Fix ds combine with subregs.
[AMDGPU] Fix ds combine with subregs
Tue, Sep 25, 4:35 PM
rampitec closed D52522: [AMDGPU] Fix ds combine with subregs.
Tue, Sep 25, 4:34 PM
rampitec created D52522: [AMDGPU] Fix ds combine with subregs.
Tue, Sep 25, 3:44 PM
rampitec accepted D52518: AMDGPU: Add Selection patterns to support add of one bit..

LGTM

Tue, Sep 25, 1:47 PM

Mon, Sep 24

rampitec committed rL342935: [AMDGPU] Remove useless check from test. NFC..
[AMDGPU] Remove useless check from test. NFC.
Mon, Sep 24, 6:28 PM
rampitec accepted D52052: [RegAllocGreedy] avoid using physreg candidates that cannot be correctly spilled.

LGTM

Mon, Sep 24, 9:11 AM · Restricted Project
rampitec accepted D52413: AMDGPU: Expand atomicrmw nand in IR.

LGTM

Mon, Sep 24, 9:10 AM

Fri, Sep 21

rampitec accepted D52355: AMDGPU: Always run AMDGPUAlwaysInline.

LGTM

Fri, Sep 21, 9:58 AM

Sep 20 2018

rampitec accepted D52019: [AMDGPU] Divergence driven instruction selection. Part 1..

LGTM. Thanks!

Sep 20 2018, 10:15 AM

Sep 19 2018

rampitec added inline comments to D52019: [AMDGPU] Divergence driven instruction selection. Part 1..
Sep 19 2018, 2:56 PM
rampitec added a reviewer for D52019: [AMDGPU] Divergence driven instruction selection. Part 1.: dp.
Sep 19 2018, 2:56 PM

Sep 17 2018

rampitec accepted D52172: AMDGPU: Don't form fmed3 if it will require materialization.

LGTM

Sep 17 2018, 10:46 AM
rampitec accepted D52170: AMDGPU: Fix private handling for allowsMisalignedMemoryAccesses.

LGTM

Sep 17 2018, 10:46 AM
rampitec committed rL342400: [AMDGPU] Initialize instruction itinerary from GCNSubtarget.
[AMDGPU] Initialize instruction itinerary from GCNSubtarget
Sep 17 2018, 9:06 AM
rampitec closed D52123: [AMDGPU] Initialize instruction itinerary from GCNSubtarget.
Sep 17 2018, 9:06 AM

Sep 14 2018

rampitec created D52123: [AMDGPU] Initialize instruction itinerary from GCNSubtarget.
Sep 14 2018, 2:38 PM
rampitec added a comment to D52052: [RegAllocGreedy] avoid using physreg candidates that cannot be correctly spilled.

Thanks! Looks good, but please wait for others to review.

Sep 14 2018, 10:41 AM · Restricted Project

Sep 13 2018

rampitec added inline comments to D52052: [RegAllocGreedy] avoid using physreg candidates that cannot be correctly spilled.
Sep 13 2018, 1:09 PM · Restricted Project
rampitec added inline comments to D52019: [AMDGPU] Divergence driven instruction selection. Part 1..
Sep 13 2018, 10:38 AM
rampitec added a comment to D51794: AMDGPU: Don't error on calls to null or undef.

Considering emitting traps requires fixing traps first, otherwise a program that should work will incorrectly trap

Sep 13 2018, 9:10 AM
rampitec accepted D51995: AMDGPU: Generate VALU ThreeOp Integer instructions.

LGTM

Sep 13 2018, 8:58 AM
rampitec accepted D51932: [AMDGPU] Fix-up cases where writelane has 2 SGPR operands.

LGTM

Sep 13 2018, 1:37 AM
rampitec accepted D51931: [AMDGPU] Load divergence predicate refactoring.

LGTM

Sep 13 2018, 12:16 AM
rampitec added inline comments to D51931: [AMDGPU] Load divergence predicate refactoring.
Sep 13 2018, 12:16 AM

Sep 12 2018

rampitec accepted D52012: AMDGPU: Fix not preserving alignent in call setups.

LGTM

Sep 12 2018, 11:31 PM
rampitec added inline comments to D51995: AMDGPU: Generate VALU ThreeOp Integer instructions.
Sep 12 2018, 2:34 PM
rampitec added inline comments to D51995: AMDGPU: Generate VALU ThreeOp Integer instructions.
Sep 12 2018, 12:15 PM
rampitec accepted D51975: [AMDGPU] Preliminary patch for divergence driven instruction selection. Load offset inlining pattern changed..

LGTM

Sep 12 2018, 12:06 PM
rampitec added inline comments to D51931: [AMDGPU] Load divergence predicate refactoring.
Sep 12 2018, 12:04 PM
rampitec added inline comments to D51932: [AMDGPU] Fix-up cases where writelane has 2 SGPR operands.
Sep 12 2018, 12:03 PM

Sep 11 2018

rampitec added inline comments to D51932: [AMDGPU] Fix-up cases where writelane has 2 SGPR operands.
Sep 11 2018, 2:18 PM
rampitec accepted D51736: DAG: Change behavior of fminnum/fmaxnum nodes.

LGTM

Sep 11 2018, 12:50 PM
rampitec added inline comments to D51932: [AMDGPU] Fix-up cases where writelane has 2 SGPR operands.
Sep 11 2018, 12:39 PM
rampitec accepted D51909: AMDGPU: Fix annotate kernel features through casted calls.

LGTM

Sep 11 2018, 11:28 AM
rampitec added inline comments to D51931: [AMDGPU] Load divergence predicate refactoring.
Sep 11 2018, 11:23 AM

Sep 10 2018

rampitec accepted D51890: AMDGPU: Move isa version and EF_AMDGPU_MACH_* determination into TargetParser..

LGTM except for small formatting issue.

Sep 10 2018, 3:20 PM
rampitec added inline comments to D51890: AMDGPU: Move isa version and EF_AMDGPU_MACH_* determination into TargetParser..
Sep 10 2018, 3:20 PM
rampitec accepted D51845: AMDGPU: Remove leftovers from configurable address spaces.

LGTM

Sep 10 2018, 10:47 AM
rampitec accepted D51843: AMDGPU: Don't error on out of bounds address spaces.

LGTM.
A note though, I would think of it as a some subset of flat.

Sep 10 2018, 10:46 AM
rampitec added a comment to D51794: AMDGPU: Don't error on calls to null or undef.

HCC had a bug recently that was producing calls to under. I assume a call to null would appear for a pure virtual call. They are undefined to execute, but they could appear in dead code that is never reached so it’s not an error to have them exist

A standard reaction to pure virtual call is a runtime error message and abort. We cannot produce an error message from kernel but we can abort. I would suggest to lower it to s_trap.

I don't think this is how that's implemented. Other targets generate a literal call to null in this case. This is an edge case since typically undef/null calls are turned into unreachable in simplifycfg, which there is a flag to generate a trap on separately.

Sep 10 2018, 10:44 AM
rampitec added reviewers for D51794: AMDGPU: Don't error on calls to null or undef: b-sumner, t-tye.
Sep 10 2018, 10:41 AM

Sep 8 2018

rampitec added a comment to D51794: AMDGPU: Don't error on calls to null or undef.

HCC had a bug recently that was producing calls to under. I assume a call to null would appear for a pure virtual call. They are undefined to execute, but they could appear in dead code that is never reached so it’s not an error to have them exist

Sep 8 2018, 8:23 AM

Sep 7 2018

rampitec added a comment to D51794: AMDGPU: Don't error on calls to null or undef.

There is no error to hide. This is perfectly valid IR

Sep 7 2018, 10:23 PM
rampitec accepted D51796: AMDGPU: Remove function pointer type hack.

LGTM

Sep 7 2018, 12:29 PM
rampitec accepted D51797: AMDGPU: Fix tests using old number for constant address space.

LGTM

Sep 7 2018, 12:29 PM
rampitec accepted D51795: AMDGPU: Don't error on calls to constexpr casts of functions.

LGTM

Sep 7 2018, 12:25 PM
rampitec added a comment to D51794: AMDGPU: Don't error on calls to null or undef.

What's the point of hiding an error? We should rather produce a normal error message.

Sep 7 2018, 12:23 PM
rampitec accepted D51791: AMDGPU: Use GOT PSV since it has an address space now.

LGTM

Sep 7 2018, 12:23 PM

Sep 6 2018

rampitec added inline comments to D51736: DAG: Change behavior of fminnum/fmaxnum nodes.
Sep 6 2018, 12:28 PM
rampitec added a reviewer for D51736: DAG: Change behavior of fminnum/fmaxnum nodes: b-sumner.
Sep 6 2018, 12:28 PM
rampitec added a comment to D51742: [AMDGPU] Fix regression with not maintaining MachineDominatorTree.

Looks good, but Matt needs to approve.
Also do you need a test?

Sep 6 2018, 12:15 PM
rampitec accepted D51734: [AMDGPU] Preliminary patch for divergence driven instruction selection. Immediate selection predicate changed.

LGTM. Thanks!

Sep 6 2018, 12:03 PM
rampitec accepted D51610: [AMDGPU] Preliminary patch for divergence driven instruction selection. Fold immediate SMRD offset..

LGTM

Sep 6 2018, 11:52 AM
rampitec accepted D51586: [AMDGPU] Preliminary patch for divergence driven instruction selection. Inline immediate move to V_MADAK_F32..

LGTM

Sep 6 2018, 11:51 AM

Sep 4 2018

rampitec added a comment to D51610: [AMDGPU] Preliminary patch for divergence driven instruction selection. Fold immediate SMRD offset..

Please attach full context diff.

Sep 4 2018, 10:08 AM

Aug 31 2018

rampitec committed rL341266: [AMDGPU] Split v32i32 loads.
[AMDGPU] Split v32i32 loads
Aug 31 2018, 3:44 PM
rampitec closed D51555: [AMDGPU] Split v32i32 loads.
Aug 31 2018, 3:44 PM
rampitec created D51555: [AMDGPU] Split v32i32 loads.
Aug 31 2018, 1:08 PM
rampitec accepted D51541: AMDGPU: Restrict extract_vector_elt combine to loads.

LGTM

Aug 31 2018, 8:21 AM

Aug 30 2018

rampitec accepted D51476: AMDGPU: Stop forcing internalize at -O0.

LGTM

Aug 30 2018, 8:11 AM

Aug 29 2018

rampitec accepted D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..

LGTM

Aug 29 2018, 11:32 AM
rampitec added inline comments to D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..
Aug 29 2018, 8:26 AM

Aug 28 2018

rampitec accepted D51345: AMDGPU: Shrink insts to fold immediates.

LGTM

Aug 28 2018, 11:11 AM
rampitec added inline comments to D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..
Aug 28 2018, 10:39 AM
rampitec accepted D51347: AMDGPU: Force shrinking of add/sub even if the carry is used.

LGTM

Aug 28 2018, 10:06 AM
rampitec accepted D51351: AMDGPU: Remove nan tests in class if src is nnan.

LGTM

Aug 28 2018, 9:06 AM
rampitec added a comment to D51347: AMDGPU: Force shrinking of add/sub even if the carry is used.

I am not sure that a copy + e32 instruction is better than a single e64 instruction. In fact I think it is worse.

Aug 28 2018, 9:04 AM
rampitec accepted D51346: AMDGPU: Don't delete instructions if S_ENDPGM has implicit uses.

LGTM

Aug 28 2018, 9:00 AM
rampitec added inline comments to D51345: AMDGPU: Shrink insts to fold immediates.
Aug 28 2018, 8:40 AM
rampitec accepted D51344: AMDGPU: Move canShrink into TII.

LGTM

Aug 28 2018, 8:24 AM
rampitec added a comment to D51316: [AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1..

It is not really an NFC. It changes codegen even if you cannot forge such an IR right now. You cannot write a test for an NFC. NFC is something like changing comment or formatting, or changing a vector with list. Also NFC does not usually need a review. Please change subject.

Aug 28 2018, 8:18 AM