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efriedma (Eli Friedman)
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Aug 10 2016, 1:07 PM (252 w, 3 d)

Recent Activity

Today

efriedma added inline comments to D99481: [InstCombine] Fix miscompile on GEP+load to icmp fold (PR45210).
Sat, Jun 12, 10:46 AM · Restricted Project

Yesterday

efriedma added a comment to D104007: [BasicAA] Properly mark that coroutine suspension may modify parameters.

Do you know if there is a stable contract in IR to tell whether an argument is in fact a callee-owned memory?

Argument::hasPassPointeeByValueCopyAttr()

Fri, Jun 11, 1:27 PM · Restricted Project
efriedma added a comment to D104007: [BasicAA] Properly mark that coroutine suspension may modify parameters.

Do you know if there is a stable contract in IR to tell whether an argument is in fact a callee-owned memory?

Fri, Jun 11, 10:17 AM · Restricted Project
efriedma added inline comments to D104075: [ScalarEvolution] Merge howManyGreaterThans with howManyLessThans..
Fri, Jun 11, 10:11 AM · Restricted Project
efriedma added a comment to D104007: [BasicAA] Properly mark that coroutine suspension may modify parameters.

@efriedma think that coroutine suspend wouldn't make alloca really 'may alias'. We are just trying to make a lie to the MemCpyOpt Pass.

Fri, Jun 11, 12:25 AM · Restricted Project

Thu, Jun 10

efriedma added a comment to D104007: [BasicAA] Properly mark that coroutine suspension may modify parameters.

This doesn't seem right. A byval argument is essentially a local variable. We should treat it the same way as we would an alloca. If it's live across the first suspend point, it should become part of the coroutine frame.

It will become part of the coroutine frame, by copying it through memcpy. That's actually what's the first memcpy for in the test case.

Thu, Jun 10, 10:23 PM · Restricted Project
efriedma added a comment to D104007: [BasicAA] Properly mark that coroutine suspension may modify parameters.

This doesn't seem right. A byval argument is essentially a local variable. We should treat it the same way as we would an alloca. If it's live across the first suspend point, it should become part of the coroutine frame.

Thu, Jun 10, 8:54 PM · Restricted Project
efriedma added a comment to D103656: [ScalarEvolution] Ensure backedge-taken counts are not pointers..

Ping

Thu, Jun 10, 5:15 PM · Restricted Project
efriedma requested review of D104075: [ScalarEvolution] Merge howManyGreaterThans with howManyLessThans..
Thu, Jun 10, 4:46 PM · Restricted Project
efriedma added a comment to D104066: [SCEV] Use knowledge of stride to prove loops finite for LT exit count computation.

I don't see any obvious issue here. I'd like to work through the known miscompiles before we start expanding this, though.

Thu, Jun 10, 4:34 PM · Restricted Project
efriedma added a comment to D97982: [MC] Introduce NeverAlign fragment type.

Which disables NeverAlign padding (0 bytes)

When do we actually do this computation? At first glance, MCAssembler::layoutSectionOnce never actually goes back to recompute the size of the NeverAlign padding.

There's one invocation of computeFragmentSize which would set the final size of NeverAlign fragment in MCAssembler::finishLayout, which is performed after layoutSectionOnce/layoutOnce is done.

Thu, Jun 10, 1:27 PM · Restricted Project
efriedma added a comment to D97982: [MC] Introduce NeverAlign fragment type.

Which disables NeverAlign padding (0 bytes)

Thu, Jun 10, 12:53 PM · Restricted Project
efriedma added a comment to D103958: [WIP] Support MustControl conditional control attribute.

Defining the value used to establish a control dependency, e.g. the load later writes depend on (kernel only defines writes to be ctrl-dependently ordered).

Thu, Jun 10, 12:28 PM · Restricted Project, Restricted Project
efriedma added inline comments to D101920: [AArch64][v8.3A] Avoid inserting implicit landing pads (PACI*SP).
Thu, Jun 10, 11:51 AM · Restricted Project

Wed, Jun 9

efriedma added a comment to D101722: [SCEV] Don't require ControlsExit for gt/lt NoWrap.

doing that "cheap enough" has has me slightly stuck.

Wed, Jun 9, 10:00 PM · Restricted Project
efriedma added a comment to D101722: [SCEV] Don't require ControlsExit for gt/lt NoWrap.

Looks like a real issue for strides that aren't a power of two.

Wed, Jun 9, 9:46 PM · Restricted Project
efriedma added a comment to D103958: [WIP] Support MustControl conditional control attribute.

You could break __builtin_load_with_control_dependency(x) into something like __builtin_control_dependency(READ_ONCE(x)). I don't think any transforms will touch that in practice, even if it isn't theoretically sound. The rest of my suggestion still applies to that form, I think. They key point is that the compiler just needs to ensure some branch consumes the loaded value; it doesn't matter which branch it is.

Wed, Jun 9, 5:55 PM · Restricted Project, Restricted Project
efriedma added a comment to D103958: [WIP] Support MustControl conditional control attribute.

I don't like using metadata like this. Dropping metadata should generally preserve the semantics of the code.

Anything better for this without introducing new instructions? Would an argument be reasonable?

Wed, Jun 9, 3:08 PM · Restricted Project, Restricted Project
efriedma added a comment to D103958: [WIP] Support MustControl conditional control attribute.

without resorting to inline assembly (which often results in poor codegen).

Could you give an example of the resulting assembly with mustcontrol vs. this patch?

Wed, Jun 9, 12:58 PM · Restricted Project, Restricted Project
efriedma added a comment to D103958: [WIP] Support MustControl conditional control attribute.

I don't like using metadata like this. Dropping metadata should generally preserve the semantics of the code.

Wed, Jun 9, 12:56 PM · Restricted Project, Restricted Project
efriedma added a comment to D103170: [CodeGen][AArch64][SVE] Use ld1r[bhsd] for vector splat from memory.

Maybe add a testcase for splat of a constant? Not sure what the code generation should look like, but it would be good to have coverage.

Wed, Jun 9, 12:41 PM · Restricted Project

Tue, Jun 8

efriedma added inline comments to D103939: [SVE][LSR] Teach LSR to enable simple scaled-index addressing mode generation for SVE..
Tue, Jun 8, 9:24 PM · Restricted Project
efriedma added a comment to D103874: [IR] Rename the shufflevector's undef mask to poison.

In practice, the frozen element won't be used in most of the cases; the middle-end's demanded elements analysis will trigger instcombine to almost always remove the freeze.

Tue, Jun 8, 9:15 PM · Restricted Project, Restricted Project
efriedma added a comment to D73607: [X86] Custom lower ISD::FROUND with SSE4.1 to avoid a libcall..

Looks like some combine is incorrectly producing X86ISD::VTRUNCS? Probably just exposed by this patch.

Tue, Jun 8, 9:07 PM · Restricted Project
efriedma added inline comments to D97982: [MC] Introduce NeverAlign fragment type.
Tue, Jun 8, 9:01 PM · Restricted Project
efriedma added a comment to D101722: [SCEV] Don't require ControlsExit for gt/lt NoWrap.

If I'm understanding correctly, the issue you're describing is that if %len is ULONG_MAX in the following loop, on trunk LLVM, the backedge-taken count comes out to zero. This is because of the math in ScalarEvolution::computeBECount: we try to compute ceil(a/b) by converting it to floor((a + b - 1) / b), which doesn't work. There are different ways we could address this. For example, we could change around the computation: we can compute ceil(a/b) by instead expanding it to floor(a/b) + umin(a % b, 1).

Tue, Jun 8, 7:03 PM · Restricted Project
efriedma added inline comments to D97982: [MC] Introduce NeverAlign fragment type.
Tue, Jun 8, 5:14 PM · Restricted Project
efriedma added inline comments to D97982: [MC] Introduce NeverAlign fragment type.
Tue, Jun 8, 4:32 PM · Restricted Project
efriedma added inline comments to D97982: [MC] Introduce NeverAlign fragment type.
Tue, Jun 8, 4:17 PM · Restricted Project
efriedma added a comment to D103338: Rename MachineMemOperand::getOrdering -> getSuccessOrdering..

Ping

Tue, Jun 8, 3:42 PM · Restricted Project
efriedma added a comment to D103874: [IR] Rename the shufflevector's undef mask to poison.

I noted the cases where it looks like the undef->poison change might actually impact code using compiler intrinsic functions that have external specifications. The relevant specifications say the elements in question are "undefined", without really specifying what that means.

Tue, Jun 8, 2:22 PM · Restricted Project, Restricted Project
efriedma accepted D103611: Correct the behavior of va_arg checking in C++.

LGTM

Tue, Jun 8, 1:50 PM · Restricted Project
efriedma added inline comments to D93818: [LangRef] Update shufflevector's semantics to return poison if the mask is undef.
Tue, Jun 8, 1:41 PM · Restricted Project
efriedma added a comment to D103906: Do not generate calls to the 128-bit function __multi3() on 32-bit ARM..

We could change compiler-rt to expose the relevant routines if we wanted to. See https://reviews.llvm.org/D43106 etc.

Tue, Jun 8, 1:32 PM · Restricted Project
efriedma accepted D103495: [static initializers] Emit global_ctors and global_dtors in reverse order when .ctors/.dtors are used..

LGTM. Making the order of constructors independent of UseInitArray seems obviously good in any case.

Tue, Jun 8, 10:51 AM · Restricted Project
efriedma added a comment to D99481: [InstCombine] Fix miscompile on GEP+load to icmp fold (PR45210).

That approach looks better. But I think you missed a use of Idx in the magic_cst path?

Tue, Jun 8, 9:10 AM · Restricted Project

Mon, Jun 7

efriedma added a comment to D103495: [static initializers] Emit global_ctors and global_dtors in reverse order when .ctors/.dtors are used..

Are there any existing optimizations that might be affected by this? In particular, I think GlobalOpt implicitly reorders functions in global_ctors.

Mon, Jun 7, 4:59 PM · Restricted Project
efriedma added inline comments to D103611: Correct the behavior of va_arg checking in C++.
Mon, Jun 7, 1:14 PM · Restricted Project
efriedma updated the summary of D103656: [ScalarEvolution] Ensure backedge-taken counts are not pointers..
Mon, Jun 7, 12:31 PM · Restricted Project
efriedma added inline comments to D103611: Correct the behavior of va_arg checking in C++.
Mon, Jun 7, 11:26 AM · Restricted Project

Sun, Jun 6

efriedma added inline comments to D103748: [LoopUnroll] Clamp unroll count to MaxTripCount.
Sun, Jun 6, 4:05 PM · Restricted Project
efriedma added a comment to D99481: [InstCombine] Fix miscompile on GEP+load to icmp fold (PR45210).

I don't think the revised change really solves the problem. The reason you end up with dead instructions is the "return nullptr;" at the end of the function, around line 402. The new code doesn't seem related to that. If we narrow the cases where the generate the lshr+and, the infloop might trigger less frequently, but it doesn't really solve the general problem.

Sun, Jun 6, 3:57 PM · Restricted Project

Fri, Jun 4

efriedma added a comment to D103656: [ScalarEvolution] Ensure backedge-taken counts are not pointers..

It's the right diff. The initial version only touched the backedge calculation, but it turned out to be sort of tied together with condition handling because the backedge calculation queries it. I'll update the description.

Fri, Jun 4, 4:10 PM · Restricted Project
efriedma added a comment to D103660: [ScalarEvolution] Don't form min/max for pointer-type phi/select..

I'm happy to take some time to discuss this; if we urgently some other solution for the branch, we can take a more targeted approach.

Fri, Jun 4, 3:56 PM · Restricted Project
efriedma updated the diff for D103656: [ScalarEvolution] Ensure backedge-taken counts are not pointers..

Rebase

Fri, Jun 4, 1:52 PM · Restricted Project
efriedma committed rG925cd6b46780: Regenerate a few tests related to SCEV. (authored by efriedma).
Regenerate a few tests related to SCEV.
Fri, Jun 4, 1:36 PM
efriedma updated the diff for D103656: [ScalarEvolution] Ensure backedge-taken counts are not pointers..

Also perform ptrtoint conversion when analyzing implied conditions, for consistency with backedge taken analysis. This fixes some minor diffs in the previous version of the patch.

Fri, Jun 4, 1:23 PM · Restricted Project
efriedma accepted D103082: [AArch64][SVE] Improve codegen for dupq SVE ACLE intrinsics.

LGTM

Fri, Jun 4, 12:15 PM · Restricted Project, Restricted Project
efriedma accepted D103703: [AArch64] Remove AArch64ISD::NEG.

LGTM

Fri, Jun 4, 12:07 PM · Restricted Project
efriedma added a comment to D103656: [ScalarEvolution] Ensure backedge-taken counts are not pointers..

For pointers where the index type is smaller than the pointer type, coming up with the right result is a little tricky. As far as I can tell from the LangRef rules, icmp compares all the bits of the pointer, not just the index bits? So I guess we can special-case comparisons where both sides have the same pointer base: the non-index bits will be the same. If both sides have the same pointer base, and we've inferred some sort of nowrap, we can then convert the icmp to compare the index bits. I guess we can handle non-integral pointers the same way.

Fri, Jun 4, 10:17 AM · Restricted Project
efriedma added a comment to D103629: [AArch64] Cost-model i8 vector loads/stores.

The two-instruction sequence leaves the bits in the right positions for a <4 x i16>. If you need a <4 x i32>, you need another zip. If you need sign-extension, you need to sshr the result or something like that. So "%x = load <4 x i8>, <4 x i8>* %a %y = sext <4 x i8> %x to <4 x i32>" would be four instructions total.

Fri, Jun 4, 9:51 AM · Restricted Project
efriedma accepted D103611: Correct the behavior of va_arg checking in C++.

LGTM

Fri, Jun 4, 9:38 AM · Restricted Project

Thu, Jun 3

efriedma requested review of D103660: [ScalarEvolution] Don't form min/max for pointer-type phi/select..
Thu, Jun 3, 6:02 PM · Restricted Project
efriedma requested review of D103656: [ScalarEvolution] Ensure backedge-taken counts are not pointers..
Thu, Jun 3, 4:09 PM · Restricted Project
efriedma added inline comments to D103118: [SCEV] Compute exit counts for unsigned IVs using mustprogress semantics.
Thu, Jun 3, 2:45 PM · Restricted Project
efriedma added inline comments to D103378: [VectorCombine] Freeze index unless it is known to be non-poison..
Thu, Jun 3, 2:11 PM · Restricted Project
efriedma added inline comments to D103118: [SCEV] Compute exit counts for unsigned IVs using mustprogress semantics.
Thu, Jun 3, 1:59 PM · Restricted Project
efriedma added a comment to D103629: [AArch64] Cost-model i8 vector loads/stores.

And while we don't have a load instruction that supports this

Thu, Jun 3, 1:16 PM · Restricted Project
efriedma accepted D103634: [Constants][PowerPC] Check exactlyValue for ppc_fp128 in isNullValue.

LGTM with one minor comment.

Thu, Jun 3, 12:52 PM · Restricted Project
efriedma added a comment to D103614: [PowerPC][AIX][RFC] Generate inlined quadword lock free atomic operations via AtomicExpand.

I wouldn't recommend using AtomicExpansionKind::LLSC for new code. It's been a source of problems on other targets that use/used it: most targets have a forward progress rule that imposes restrictions beyond the ll/sc instructions themselves, and normal code generation can violate them. For example, fast regalloc can insert spills inside the ll/sc loop, or the basic block layout could be rearranged. I think the only target that hasn't run into issues is Hexagon.

Thu, Jun 3, 11:59 AM · Restricted Project
efriedma added inline comments to D103082: [AArch64][SVE] Improve codegen for dupq SVE ACLE intrinsics.
Thu, Jun 3, 11:51 AM · Restricted Project, Restricted Project
efriedma added a comment to D103611: Correct the behavior of va_arg checking in C++.

I'm a little nervous about using C type merging in C++; it's not designed to support C++ types, so it might end up crashing or something like that. I think I'd prefer to explicitly convert enum types to their underlying type.

Thu, Jun 3, 11:47 AM · Restricted Project
efriedma committed rG44cdf771fe12: [AtomicExpand] Merge cmpxchg success and failure ordering when appropriate. (authored by efriedma).
[AtomicExpand] Merge cmpxchg success and failure ordering when appropriate.
Thu, Jun 3, 11:36 AM
efriedma closed D103342: [AtomicExpand] Merge cmpxchg success and failure ordering when appropriate..
Thu, Jun 3, 11:36 AM · Restricted Project
efriedma added a comment to D103634: [Constants][PowerPC] Check exactlyValue for ppc_fp128 in isNullValue.

Constant::isNullValue() is supposed to mean "is this value all zero bits"; various parts of the code use it that way. It shouldn't care whether the value is semantically equal to zero. Anything doing floating-point arithmetic should be using the appropriate ConstantFP/APFloat methods.

Thu, Jun 3, 11:28 AM · Restricted Project
efriedma added a comment to D103634: [Constants][PowerPC] Check exactlyValue for ppc_fp128 in isNullValue.

If Constant::isNullValue() isn't returning the right result, please fix it directly. Getting it wrong could have other unexpected consequences.

Thu, Jun 3, 11:05 AM · Restricted Project

Wed, Jun 2

efriedma added a comment to D60358: [TargetLowering][X86] Teach SimplifyDemandedBits to use ShrinkDemandedOp on ISD::SHL nodes..

I just pushed rGd8b9ed72ee83, a testcase affected by this patch.

Wed, Jun 2, 5:43 PM · Restricted Project
efriedma committed rGd8b9ed72ee83: [AArch64] Add regression test for missed bfi optimization. (authored by efriedma).
[AArch64] Add regression test for missed bfi optimization.
Wed, Jun 2, 5:39 PM
efriedma added inline comments to D102759: [AArch64ISelDAGToDAG] Supplement cases for ORRWrs/ORRXrs when calculating usefulbits.
Wed, Jun 2, 3:13 PM · Restricted Project
efriedma added a comment to D103082: [AArch64][SVE] Improve codegen for dupq SVE ACLE intrinsics.

Can we add a few end-to-end tests of bool svdupq with constant operands to acle_sve_dupq.c? The pattern matching to create ptrue seems a bit fragile, so I want to make sure we don't break it by accident.

Wed, Jun 2, 12:26 PM · Restricted Project, Restricted Project
efriedma added a comment to D99438: [SimplifyLibCalls] Take size of int into consideration when emitting ldexp/ldexpf.

LGTM

Wed, Jun 2, 12:00 PM · Restricted Project
efriedma accepted D103028: [clang][ARM] Remove arm2/3/6/7m CPU names.

LGTM

Wed, Jun 2, 11:14 AM · Restricted Project, Restricted Project

Tue, Jun 1

efriedma added a comment to D103408: DetectDeadLanes: Remove assert for subregister defs.

I'm not sure this is the right fix.

From my understanding, REG_SEQUENCE, INSERT_SUBREG, EXTRACT_SUBREG, and PHI should never target a subregister. For COPY, we can target a subregister, but only if that register is a physical register.

Physical registers do not have subregister indexes. TRI::getSubReg resolves the physreg with index to a different physreg value. It's invalid to combine the two

Tue, Jun 1, 2:55 PM · Restricted Project
efriedma added a comment to D103408: DetectDeadLanes: Remove assert for subregister defs.

I'm not sure this is the right fix.

Tue, Jun 1, 2:48 PM · Restricted Project
efriedma added a comment to D103028: [clang][ARM] Remove arm2/3/6/7m CPU names.

I found some discussion at https://patchwork.kernel.org/project/linux-arm-kernel/patch/20180930024904.14240-1-Jason@zx2c4.com/ . Apparently, the kernel is actually intentionally building for "ARMv3M" by default, to support some ancient hardware that doesn't support all the armv4 instructions. LLVM doesn't support this at the moment. We shouldn't accept -march=armv3m unless we're actually going to generate correct code for it.

Tue, Jun 1, 11:31 AM · Restricted Project, Restricted Project
efriedma committed rGfd229caa0138: [polly] Fix SCEVLoopAddRecRewriter to avoid invalid AddRecs. (authored by efriedma).
[polly] Fix SCEVLoopAddRecRewriter to avoid invalid AddRecs.
Tue, Jun 1, 9:51 AM
efriedma closed D102959: [polly] Fix SCEVLoopAddRecRewriter to avoid invalid AddRecs..
Tue, Jun 1, 9:51 AM · Restricted Project
efriedma added a comment to D103080: [CMake] Ignore arm_*.h for non-ARM build.

I think I'm fine with the general direction, but it would be nice to have a CMake option to force the headers for all targets to be built if someone needs them. For static analysis or something like that, I can imagine someone building LLVM without any backends at all.

Tue, Jun 1, 9:48 AM · Restricted Project
efriedma accepted D102950: [LegalizeTypes] Avoid promotion of exponent in FPOWI.

LGTM

Tue, Jun 1, 7:11 AM · Restricted Project
efriedma accepted D103050: [CodeGen] Refactor libcall lookups for RTLIB::POWI_*.

LGTM

Tue, Jun 1, 7:03 AM · Restricted Project

Mon, May 31

efriedma added a comment to D99481: [InstCombine] Fix miscompile on GEP+load to icmp fold (PR45210).

Oh, hmm, didn't realize the transform could still fail at that point. Need to fix the code to avoid creating the mask instruction if the transform fails. @nathanchance, feel free to revert in the meantime.

Mon, May 31, 6:37 PM · Restricted Project

Fri, May 28

efriedma added a comment to D103275: Update musttail verification to check all swiftasync->swiftasync tail calls..

If a swifttailcc function calls another swifttailcc in a non-tail position, the proposed rule is that it has to be marked notail? Not sure I understand the justification here. Is there some reason we need to forbid sibcall optimization of swifttailcc functions?

Fri, May 28, 6:43 PM · Restricted Project
efriedma accepted D99481: [InstCombine] Fix miscompile on GEP+load to icmp fold (PR45210).

LGTM

Fri, May 28, 6:30 PM · Restricted Project
efriedma committed rG577fea4e1a13: [CGAtomic] Delete outdated code comparing success/failure ordering for cmpxchg. (authored by efriedma).
[CGAtomic] Delete outdated code comparing success/failure ordering for cmpxchg.
Fri, May 28, 3:36 PM
efriedma requested review of D103342: [AtomicExpand] Merge cmpxchg success and failure ordering when appropriate..
Fri, May 28, 2:22 PM · Restricted Project
efriedma requested review of D103338: Rename MachineMemOperand::getOrdering -> getSuccessOrdering..
Fri, May 28, 1:24 PM · Restricted Project
efriedma committed rG0b3b0a727ad6: [AArch64][RISCV] Make sure isel correctly honors failure orderings. (authored by efriedma).
[AArch64][RISCV] Make sure isel correctly honors failure orderings.
Fri, May 28, 12:48 PM
efriedma closed D103284: [AArch64][RISCV] Make sure isel correctly honors failure orderings..
Fri, May 28, 12:48 PM · Restricted Project
efriedma accepted D102698: [InstCombine] Relaxed constraints of uses for exp(X) * exp(Y) -> exp(X + Y) and exp2(X) * exp2(Y) -> exp2(X + Y).

LGTM

Fri, May 28, 12:40 PM · Restricted Project
efriedma accepted D103232: [AtomicExpandPass][AArch64] Promote xchg with floating-point types to integer ones.

I looked, and apparently we do have an AMDGPU test for xchg; if it isn't impacted, that's fine, I guess.

Fri, May 28, 12:38 PM · Restricted Project
efriedma accepted D103077: [DAGCombine] Poison-prove scalarizeExtractedVectorLoad..

LGTM

Fri, May 28, 12:35 PM · Restricted Project
efriedma added inline comments to D103284: [AArch64][RISCV] Make sure isel correctly honors failure orderings..
Fri, May 28, 12:15 PM · Restricted Project
efriedma added a comment to D103232: [AtomicExpandPass][AArch64] Promote xchg with floating-point types to integer ones.

The transform makes sense on targets that don't have atomic operations on floating-point registers, but that isn't all targets. In particular, the GPU targets have floating-point atomic operations, and bitcasting like this might get in the way of the natural lowering there.

Fri, May 28, 12:06 PM · Restricted Project

Thu, May 27

efriedma added a comment to D103082: [AArch64][SVE] Improve codegen for dupq SVE ACLE intrinsics.

Do we really need a dedicated LLVM intrinsic to make the pattern-matching work here? It would be better if we could leverage @llvm.experimental.vector.insert.nxv16i8.v16i8 or something like that. Something along the lines of https://godbolt.org/z/Wz4azzKrP seems straightforward enough to match, and generates decent code even without any special patterns.

Thu, May 27, 4:31 PM · Restricted Project, Restricted Project
efriedma accepted D102612: SwiftTailCC: teach verifier musttail rules applicable to this CC..

LGTM

Thu, May 27, 3:20 PM · Restricted Project
efriedma added a comment to D103232: [AtomicExpandPass][AArch64] Promote xchg with floating-point types to integer ones.

I don't really like unconditionally messing with the type of the atomic operation; not sure what kind of impact that will have.

Thu, May 27, 3:16 PM · Restricted Project
efriedma added a comment to D102711: [GlobalOpt] Handle null check with global pointer variables.

I'd like to see a little more test coverage, given all the different cases where the behavior of the transform changed.

Thu, May 27, 3:06 PM · Restricted Project
efriedma added inline comments to D103167: [ARM] Fix Machine Outliner LDRD/STRD handling in Thumb mode.
Thu, May 27, 2:55 PM · Restricted Project
efriedma added a comment to D102959: [polly] Fix SCEVLoopAddRecRewriter to avoid invalid AddRecs..

SCEVLoopAddRecRewriter was originally added for use by polly, and has only ever been used by polly. So the "original intent" is just whatever polly needed, I think.

Thu, May 27, 2:48 PM · Restricted Project
efriedma added inline comments to D101898: [ARM] Prevent spilling between ldrex/strex pairs.
Thu, May 27, 2:26 PM · Restricted Project