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efriedma (Eli Friedman)
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Aug 10 2016, 1:07 PM (150 w, 8 h)

Recent Activity

Today

efriedma committed rGab1d73ee3248: [ARM] Don't reserve R12 on Thumb1 as an emergency spill slot. (authored by efriedma).
[ARM] Don't reserve R12 on Thumb1 as an emergency spill slot.
Wed, Jun 26, 4:49 PM
efriedma committed rL364490: [ARM] Don't reserve R12 on Thumb1 as an emergency spill slot..
[ARM] Don't reserve R12 on Thumb1 as an emergency spill slot.
Wed, Jun 26, 4:49 PM
efriedma closed D63677: [ARM] Don't reserve R12 on Thumb1 as an emergency spill slot..
Wed, Jun 26, 4:49 PM · Restricted Project
efriedma added a comment to D63782: [FPEnv] Add fptosi and fptoui constrained intrinsics.

I think IEEE-754 does define this

Wed, Jun 26, 3:40 PM · Restricted Project
efriedma added a comment to D63629: [JumpThreading][PR42085] Fold constant TIs before calculating LoopHeaders.

there is a possibility of a miscompile when threading an edge across the LH

Wed, Jun 26, 3:31 PM · Restricted Project
efriedma added a comment to D63782: [FPEnv] Add fptosi and fptoui constrained intrinsics.

Is this a general comment or referring to a change in Kevin's patch?

Wed, Jun 26, 2:51 PM · Restricted Project
efriedma added inline comments to D62653: [Mips][DSP] Fix physregs incorrectly marked as dead..
Wed, Jun 26, 12:08 PM
efriedma accepted D63215: Fixing @llvm.memcpy not honoring volatile.

Maybe mention in the commit message that this is explicitly not addressing target-specific code, or calls to memcpy?

Wed, Jun 26, 11:48 AM · Restricted Project
efriedma added a comment to D63782: [FPEnv] Add fptosi and fptoui constrained intrinsics.

The problem with poison is that it eventually leads to UB, and then your program has no defined meaning. Practically, it might mean some codepath that involves a call to llvm.experimental.constrained.fptosi.i32.f64 could get folded away because it's provably UB, or something like that.

Wed, Jun 26, 11:43 AM · Restricted Project
efriedma added a comment to D63815: [DAGCombine] visitEXTRACT_SUBVECTOR - 'little to big' extract_subvector(bitcast()) support.

It looks like the arm64-neon-2velem.ll regressions are a shuffle lowering issue, yes; we're creating a DUPLANE where the operand is an extract_subvector, and it doesn't simplify.

Wed, Jun 26, 11:33 AM · Restricted Project

Yesterday

efriedma added a comment to D63782: [FPEnv] Add fptosi and fptoui constrained intrinsics.

What happens if the input float is out of range? fptosi/fptoui instructions produce poison; not sure if you want that here.

Tue, Jun 25, 6:12 PM · Restricted Project
efriedma updated the diff for D63677: [ARM] Don't reserve R12 on Thumb1 as an emergency spill slot..

Fix Thumb1FrameLowering::emitPrologue and Thumb1FrameLowering::emitEpilogue so they don't scavenge a register inside of frame setup/teardown. Instead, just pick a register we know is available.

Tue, Jun 25, 5:28 PM · Restricted Project
efriedma added a comment to D63677: [ARM] Don't reserve R12 on Thumb1 as an emergency spill slot..

The third instruction in the function looks like it is using r6 as the base pointer to save one of the argument registers on the stack, but r6 isn't set until further down.

Tue, Jun 25, 2:21 PM · Restricted Project
efriedma added a comment to D61911: [GlobalOpt] Allow dead struct fields in SRA with non constant offset..

The problem here is that the IR semantics don't allow this transform in general.

Tue, Jun 25, 12:35 PM · Restricted Project
efriedma accepted D60601: [DAGCombiner] Exploiting more about the transformation of TransformFPLoadStorePair function.

Sorry, I meant to reply to this earlier. If you've tested the performance on PowerPC, it's probably fine. ARM has fewer registers, but not so few that it's likely to cause problems here.

Tue, Jun 25, 10:09 AM · Restricted Project

Mon, Jun 24

efriedma updated the diff for D63677: [ARM] Don't reserve R12 on Thumb1 as an emergency spill slot..

Improved comment on ExtraCSSpill.

Mon, Jun 24, 11:38 AM · Restricted Project
efriedma added a comment to D63677: [ARM] Don't reserve R12 on Thumb1 as an emergency spill slot..

This looks a lot like a bug I hit a while ago while writing a fuzzer for ABI
compatibility between clang and gcc. I've currently got Thumb1-only targets
disabled because of this.

Mon, Jun 24, 11:33 AM · Restricted Project

Fri, Jun 21

efriedma created D63677: [ARM] Don't reserve R12 on Thumb1 as an emergency spill slot..
Fri, Jun 21, 3:13 PM · Restricted Project
efriedma accepted D63635: [COFF, ARM64] Fix encoding of debugtrap for Windows.

LGTM

Fri, Jun 21, 2:40 PM · Restricted Project
efriedma added a comment to D63038: [SimplifyLibCalls] powf(x, sitofp(n)) -> powi(x, n).

It looks like you didn't change all the uses of isFast() in optimizePow?

Fri, Jun 21, 2:38 PM · Restricted Project
efriedma added a comment to D63038: [SimplifyLibCalls] powf(x, sitofp(n)) -> powi(x, n).

It would be nice to use the exact necessary fast-math flags here, while we're thinking about it, instead of just "isFast()". From the discussion, it seems like we only need "afn"?

Fri, Jun 21, 12:06 PM · Restricted Project
efriedma added a comment to D63635: [COFF, ARM64] Fix encoding of debugtrap for Windows.

I believe it's the default strategy for O0 AArch64 codegen these days

Fri, Jun 21, 11:47 AM · Restricted Project

Thu, Jun 20

efriedma committed rG45270054bc27: [ARM GlobalISel] Tests for s64 G_ADD and G_SUB. (authored by efriedma).
[ARM GlobalISel] Tests for s64 G_ADD and G_SUB.
Thu, Jun 20, 3:00 PM
efriedma added a comment to D63585: [ARM GlobalISel] Add support for s64 G_ADD and G_SUB..

Tests committed in r363991 (https://reviews.llvm.org/rL363991)

Thu, Jun 20, 2:57 PM · Restricted Project
efriedma committed rL363991: [ARM GlobalISel] Tests for s64 G_ADD and G_SUB..
[ARM GlobalISel] Tests for s64 G_ADD and G_SUB.
Thu, Jun 20, 2:57 PM
efriedma committed rG25f08a17c318: [ARM GlobalISel] Add support for s64 G_ADD and G_SUB. (authored by efriedma).
[ARM GlobalISel] Add support for s64 G_ADD and G_SUB.
Thu, Jun 20, 2:56 PM
efriedma committed rL363989: [ARM GlobalISel] Add support for s64 G_ADD and G_SUB..
[ARM GlobalISel] Add support for s64 G_ADD and G_SUB.
Thu, Jun 20, 2:56 PM
efriedma closed D63585: [ARM GlobalISel] Add support for s64 G_ADD and G_SUB..
Thu, Jun 20, 2:56 PM · Restricted Project
efriedma updated subscribers of D62990: [SCEV]When safe, compute MinStart as unsigned_min(Start - Stride) + Stride in computeMaxBECountForLT.

I think this is sound now.

Thu, Jun 20, 2:20 PM · Restricted Project
efriedma added a comment to D46262: Enable sibling-call optimization for functions returning structs.

The testcase I actually wanted, which incorrectly forms a tail call:

Thu, Jun 20, 12:22 PM · Restricted Project

Wed, Jun 19

efriedma created D63585: [ARM GlobalISel] Add support for s64 G_ADD and G_SUB..
Wed, Jun 19, 5:38 PM · Restricted Project
efriedma committed rGd88e28d13e66: [llvm-objdump] Switch between ARM/Thumb based on mapping symbols. (authored by efriedma).
[llvm-objdump] Switch between ARM/Thumb based on mapping symbols.
Wed, Jun 19, 5:27 PM
efriedma committed rL363903: [llvm-objdump] Switch between ARM/Thumb based on mapping symbols..
[llvm-objdump] Switch between ARM/Thumb based on mapping symbols.
Wed, Jun 19, 5:27 PM
efriedma closed D60927: [llvm-objdump] Switch between ARM/Thumb based on mapping symbols..
Wed, Jun 19, 5:27 PM · Restricted Project
efriedma added a comment to D63294: [Analysis] enhance FP library function prototype checking to match types with name suffix .

Should clang translate that call into "sqrtf" to be more accurate?

Wed, Jun 19, 1:58 PM · Restricted Project
efriedma added a comment to D63068: [AVR] Fix incorrect stack parameter push order.

In AVR, it uses push instruction to store arguments. Therefore. the order of store(push) instruction can't be changed.

Wed, Jun 19, 12:18 PM · Restricted Project
efriedma added a comment to D62653: [Mips][DSP] Fix physregs incorrectly marked as dead..

So we would need to mark every instruction that uses any part of DSPControl as having an post-isel hook and there are more than 100 instructions

Wed, Jun 19, 11:37 AM
efriedma added a comment to D63294: [Analysis] enhance FP library function prototype checking to match types with name suffix .

How do we test that?

Wed, Jun 19, 11:25 AM · Restricted Project

Tue, Jun 18

efriedma added a comment to D59744: Fix i386 ABI "__m64" type bug.

I'm just laying out the basic requirements for getting this patch back in, because the current patch is invalid given LLVM's current requirements.

Tue, Jun 18, 4:40 PM · Restricted Project, Restricted Project
efriedma added a comment to D59744: Fix i386 ABI "__m64" type bug.

If we're going to insert emms instructions automatically, it doesn't really make sense to do it in the frontend; the backend could figure out the most efficient placement itself. (See lib/Target/X86/X86VZeroUpper.cpp, which implements similar logic for AVX.) The part I'd be worried about is the potential performance hit from calling emms in places where other compilers wouldn't, for code using MMX intrinsics.

Tue, Jun 18, 3:02 PM · Restricted Project, Restricted Project
efriedma updated subscribers of D63294: [Analysis] enhance FP library function prototype checking to match types with name suffix .

AVR intentionally makes the C type "double" a single-precision float ("float" in IR). So we could fail to recognize "fabs" etc. on AVR with this patch, I think?

Tue, Jun 18, 2:36 PM · Restricted Project
efriedma added a comment to D59744: Fix i386 ABI "__m64" type bug.

Are you saying that using MMX in LLVM requires source-level workarounds in some way, and so we can't lower portable code to use MMX because that code will (reasonably) lack those workarounds?

Tue, Jun 18, 2:17 PM · Restricted Project, Restricted Project
efriedma added a comment to D59744: Fix i386 ABI "__m64" type bug.

Now, we could theoretically use a different ABI rule for vectors defined with Clang-specific extensions, but that seems like it would cause quite a few problems of its own.

Tue, Jun 18, 11:38 AM · Restricted Project, Restricted Project

Mon, Jun 17

efriedma updated the diff for D60927: [llvm-objdump] Switch between ARM/Thumb based on mapping symbols..

Switched to a single vector for mapping symbols. Switched isArmElf() to use getEMachine(). Updated title/commit message.

Mon, Jun 17, 3:17 PM · Restricted Project
efriedma added inline comments to D63371: Rewrite ConstStructBuilder with a mechanism that can cope with splitting and updating constants..
Mon, Jun 17, 1:17 PM · Restricted Project, Restricted Project
efriedma accepted D62944: [Driver] Fix wchar_t and wint_t definitions on Solaris.

LGTM

Mon, Jun 17, 12:52 PM · Restricted Project, Restricted Project

Thu, Jun 13

efriedma accepted D61750: [Targets] Move soft-float-abi filtering to `initFeatureMap`.

LGTM

Thu, Jun 13, 4:37 PM · Restricted Project, Restricted Project
efriedma added a comment to D46262: Enable sibling-call optimization for functions returning structs.

Also, it looks like you never cc'ed llvm-commits; please abandon this and post a new revision with llvm-commits properly cc'ed

Thu, Jun 13, 2:58 PM · Restricted Project
efriedma requested changes to D46262: Enable sibling-call optimization for functions returning structs.

Please fix the "summary" to include the full expected commit message.

Thu, Jun 13, 2:54 PM · Restricted Project
efriedma added inline comments to D63260: [Attr] Support _attribute__ ((fallthrough)).
Thu, Jun 13, 11:36 AM · Restricted Project
efriedma added a comment to D62990: [SCEV]When safe, compute MinStart as unsigned_min(Start - Stride) + Stride in computeMaxBECountForLT.

Is the isLoopEntryGuardedByCond actually proving what you need it to prove? Even if Start-Stride is in the range [0, End), that doesn't necessarily imply Start-Stride doesn't overflow. For example, suppose Start is 0, End is -1, and Stride is 2.

Thu, Jun 13, 11:26 AM · Restricted Project
efriedma added inline comments to D63260: [Attr] Support _attribute__ ((fallthrough)).
Thu, Jun 13, 11:20 AM · Restricted Project
efriedma added a comment to D62944: [Driver] Fix wchar_t and wint_t definitions on Solaris.

For format-strings.c, I'm not really happy suggesting #if defined(__sun) && !defined(__LP64__), but I don't think the alternative is better. We could restrict the test so it doesn't run using a Solaris target triple, but we actually want coverage here: the difference in wint_t affects the semantics of "%lc", so we want some coverage of that path.

Thu, Jun 13, 11:01 AM · Restricted Project, Restricted Project

Wed, Jun 12

efriedma added inline comments to D63038: [SimplifyLibCalls] powf(x, sitofp(n)) -> powi(x, n).
Wed, Jun 12, 3:48 PM · Restricted Project
efriedma added inline comments to D63038: [SimplifyLibCalls] powf(x, sitofp(n)) -> powi(x, n).
Wed, Jun 12, 3:35 PM · Restricted Project
efriedma updated the diff for D63036: LLVM IR constant expressions never trap..

Addressed review comments. Added release note. I think this patch contains all the changes necessary to reflect the change to IR semantics.

Wed, Jun 12, 3:00 PM · Restricted Project
efriedma added a comment to D63152: [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack.

I'd prefer to take this soon, and deal with the performance later, given this is a serious bug. I wouldn't be surprised if this is actually causing issues in practice, but nobody realized it because it's non-deterministic.

Wed, Jun 12, 12:33 PM · Restricted Project
efriedma added inline comments to D63038: [SimplifyLibCalls] powf(x, sitofp(n)) -> powi(x, n).
Wed, Jun 12, 11:52 AM · Restricted Project
efriedma added a comment to D63215: Fixing @llvm.memcpy not honoring volatile.

What happens if findOptimalMemOpLowering fails? We have other ways of lowering memcpy/memset that could also violate the "one store per byte" rule.

Wed, Jun 12, 9:35 AM · Restricted Project

Tue, Jun 11

efriedma added a comment to D61809: [BPF] Preserve debuginfo array/union/struct type/access index.

The general idea of restricting the intrinsics to specific contexts makes sense. I'm not sure it makes sense to mark expressions, as opposed to types, though; can we really expect the user to know which expressions to apply this to?

Tue, Jun 11, 5:39 PM · Restricted Project
efriedma added inline comments to rL361590: Clarify how musttail can be used to create forwarding thunks.
Tue, Jun 11, 4:10 PM
efriedma accepted D61947: [AArch64] Merge globals when optimising for size.

LGTM

Tue, Jun 11, 2:50 PM · Restricted Project

Mon, Jun 10

efriedma accepted D63099: [AArch64] Add more CPUs to host detection.

LGTM

Mon, Jun 10, 4:43 PM · Restricted Project
efriedma updated the diff for D63036: LLVM IR constant expressions never trap..

Address review comments, minor code cleanup, fix ConstantExpr::getAsInstruction, fix regression tests.

Mon, Jun 10, 4:03 PM · Restricted Project
efriedma added inline comments to D63036: LLVM IR constant expressions never trap..
Mon, Jun 10, 2:06 PM · Restricted Project
efriedma added a comment to D63038: [SimplifyLibCalls] powf(x, sitofp(n)) -> powi(x, n).

We definitely need afn for this; powi performs multiple intermediate rounding steps, so it can be significantly less accurate than pow.

Mon, Jun 10, 12:44 PM · Restricted Project

Fri, Jun 7

efriedma created D63036: LLVM IR constant expressions never trap..
Fri, Jun 7, 5:31 PM · Restricted Project
efriedma added inline comments to D62990: [SCEV]When safe, compute MinStart as unsigned_min(Start - Stride) + Stride in computeMaxBECountForLT.
Fri, Jun 7, 12:39 PM · Restricted Project
efriedma added a comment to D60074: [Attributor] Deduce "no-recurse" function attribute.

In terms of the correctness of this patch, I'm specifically concerned that this patch has no equivalent to the SCCNodes.size() != 1 check in FunctionAttrs, so it will derive norecurse in cases where FunctionAttrs would not. For example:

Fri, Jun 7, 11:25 AM · Restricted Project
efriedma added a comment to D54730: [DomTree] Fix order of domtree updates in MergeBlockIntoPredecessor..

Feel free to take it over, particularly since it looks like you have a testcase you can easily share.

Fri, Jun 7, 11:05 AM · Restricted Project

Thu, Jun 6

efriedma added a comment to D62025: Expand llvm.is.constant earlier.

We already fold llvm.is.constant to true early, in ConstantFoldScalarCall.

Thu, Jun 6, 6:27 PM · Restricted Project
efriedma added inline comments to D62644: [EarlyCSE] Ensure equal keys have the same hash value.
Thu, Jun 6, 4:55 PM · Restricted Project
efriedma added a comment to D62802: [RFC][AMDGPU] Uniform values being used outside loop marked non-divergent.

Instead of making LCSSA preserve StackProtector, could you run LCSSA before StackProtector, and make StackProtector preserve LCSSA?

Thu, Jun 6, 12:06 PM · Restricted Project
efriedma accepted D62968: [ARM] Adjust isLegalT1AddressImmediate for non-legal types.

This probably doesn't precisely match the generated code for all simple types, but it makes sense for at least i64/float/double. LGTM

Thu, Jun 6, 10:44 AM · Restricted Project
efriedma accepted D62699: [InlineCost] Add support for unary fneg..

LGTM

Thu, Jun 6, 10:41 AM · Restricted Project

Wed, Jun 5

efriedma added a comment to D60074: [Attributor] Deduce "no-recurse" function attribute.

Is it actually correct to derive norecurse like this?

Wed, Jun 5, 5:59 PM · Restricted Project
efriedma accepted D62767: [APFloat] APFloat::Storage::Storage - refix use after move.

LGTM

Wed, Jun 5, 4:48 PM · Restricted Project
efriedma added a comment to D62653: [Mips][DSP] Fix physregs incorrectly marked as dead..

I think fundamentally, the problem here is that the registers in question aren't being handled consistently.

Wed, Jun 5, 3:40 PM
efriedma added inline comments to D62644: [EarlyCSE] Ensure equal keys have the same hash value.
Wed, Jun 5, 11:49 AM · Restricted Project

Tue, Jun 4

efriedma added a comment to D62775: [SelectionDAG] Skip addrspacecast expansion when casting undef values.

It's legitimate for a target to reject addrspacecasts which don't make sense.

Tue, Jun 4, 2:25 PM · Restricted Project
efriedma added a comment to D62775: [SelectionDAG] Skip addrspacecast expansion when casting undef values.

If you look at some targets, they provide multiple address-spaces which are essentially identical; see, for example, the implementation of isNoopAddrSpaceCast on x86. Not sure what the complete justification was, but it can be convenient if you need to dereference null.

Tue, Jun 4, 2:13 PM · Restricted Project
efriedma added a comment to D62871: [Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold.

For the cases involving sign bits, are we actually expecting the IR to look like this when we reach SelectionDAG? With some form of D62818, I would expect we end up with "icmp slt"...

Tue, Jun 4, 1:52 PM · Restricted Project

Mon, Jun 3

efriedma added a comment to D62699: [InlineCost] Add support for unary fneg..

Is it likely that we're ever going to be able to do anything useful with the fast-math flags?

Mon, Jun 3, 5:48 PM · Restricted Project
efriedma added a comment to D62699: [InlineCost] Add support for unary fneg..

It should be possible to write a testcase based on the simplification? Otherwise looks fine.

Mon, Jun 3, 3:42 PM · Restricted Project
efriedma accepted D60705: [ARM] Turn some undefined encoding bits into 0s..

LGTM

Mon, Jun 3, 3:24 PM · Restricted Project
efriedma added a comment to D62818: [InstCombine] Introduce fold for icmp pred (and X, (sh signbit, Y)), 0..

On the instcombine side, one thing worth noting which isn't called out in the commit message is the interaction with other instcombine patterns. In the testcase, note that the final IR actually doesn't contain any mask; instead, it checks icmp slt i32 [[SHL]], 0. Huihui, please update the commit message to make this clear.

Mon, Jun 3, 3:14 PM · Restricted Project
efriedma added a comment to D62653: [Mips][DSP] Fix physregs incorrectly marked as dead..

I would like to avoid having "undead" registers, which are marked dead but are semantically necessary, at any point. That means never calling setIsDead(false); as part of instruction selection, even if the flags are eventually correct after post-isel hooks run. The reason for this is that otherwise it's very confusing for anyone reading the code, or MIR dumps, to understand how it's supposed to work.

Mon, Jun 3, 12:55 PM

Fri, May 31

efriedma committed rGd8e8722791e4: [CodeGen] Fix hashing for MO_ExternalSymbol MachineOperands. (authored by efriedma).
[CodeGen] Fix hashing for MO_ExternalSymbol MachineOperands.
Fri, May 31, 5:08 PM
efriedma committed rL362281: [CodeGen] Fix hashing for MO_ExternalSymbol MachineOperands..
[CodeGen] Fix hashing for MO_ExternalSymbol MachineOperands.
Fri, May 31, 5:06 PM
efriedma closed D61975: [CodeGen] Fix hashing for MO_ExternalSymbol MachineOperands..
Fri, May 31, 5:06 PM · Restricted Project
efriedma added a comment to D61975: [CodeGen] Fix hashing for MO_ExternalSymbol MachineOperands..

I looked more carefully just as I was about to commit this, and discovered the hashing for MO_RegisterMask is also wrong. I think I'll fix that separately, though.

Fri, May 31, 5:06 PM · Restricted Project
efriedma added a comment to D62392: [DAGCombine][ARM] (sub Carry, X) -> (addcarry (sub 0, X), 0, Carry) fold.

Oh, I see...

Fri, May 31, 2:46 PM · Restricted Project
efriedma added a comment to D62392: [DAGCombine][ARM] (sub Carry, X) -> (addcarry (sub 0, X), 0, Carry) fold.

If you don't want to continue working on this, that's okay, I think. D62450 looks like it's the more interesting fix.

Fri, May 31, 2:30 PM · Restricted Project
efriedma added a comment to D62450: [DAGCombine][ARM] x ==/!= c -> (x - c) ==/!= 0 iff '-c' can be folded into the x node..

Can you add test coverage for some other target, maybe x86?

Fri, May 31, 2:25 PM · Restricted Project
efriedma accepted D62266: [DAGCombine][X86][AArch64][ARM] (C - x) + y -> (y - x) + C fold.

LGTM. I'm okay with working on adding more test coverage and fixes for the ADDCARRY cases in a followup.

Fri, May 31, 2:19 PM · Restricted Project
efriedma accepted D62651: [ARM] Add FP16 vector insert/extract patterns.

We could possibly use a custom inserter to generate the vins sequence, but it would probably involve some benchmarking to make sure there aren't any unexpected performance penalties due to the weird register usage. So I'm happy to put that off for now.

Fri, May 31, 2:01 PM · Restricted Project
efriedma accepted D62747: [InlineCost] Don't add the soft float functional call cost for the fneg idiom, fsub -0.0, %x.

LGTM

Fri, May 31, 1:37 PM · Restricted Project
efriedma added a comment to D62555: [TailDuplicator] prevent tail duplication for INLINEASM_BR.

The following testcase still crashes with this patch. Given that, I don't think it makes sense to merge this patch; even if it lets some current version kernel build, someone else is likely to hit the same issue in the near future.

Fri, May 31, 1:25 PM · Restricted Project
efriedma accepted D62683: [ARM][FIX] Ran out of registers due tail recursion.

Eventually I think the code in IsEligibleForTailCallOptimization will disappear if we make ip an allocatable register, but this seems okay for now.

Fri, May 31, 1:04 PM · Restricted Project
efriedma added a comment to D38479: Make -mgeneral-regs-only more like GCC's.

Something I ran into when reviewing https://reviews.llvm.org/D62639 is that on AArch64, for varargs functions, we emit floating-point stores when noimplicitfloat is specified. That seems fine for -mno-implicit-float, but maybe not for -mgeneral-regs-only?

Fri, May 31, 12:53 PM