efriedma (Eli Friedman)
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Aug 10 2016, 1:07 PM (114 w, 1 d)

Recent Activity

Yesterday

efriedma accepted D53115: [COFF, ARM64] Add _ReadStatusReg and_WriteStatusReg intrinsics.

LGTM

Thu, Oct 18, 4:35 PM
efriedma committed rL344752: Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP").
Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")
Thu, Oct 18, 12:36 PM
efriedma added inline comments to D52894: Update CallSite docs and add a new function (NFC).
Thu, Oct 18, 12:12 PM
efriedma added inline comments to D52894: Update CallSite docs and add a new function (NFC).
Thu, Oct 18, 11:27 AM

Wed, Oct 17

efriedma added a comment to D53264: [ARM64] [Windows] Add unwind support to llvm-readobj.

I think this is looking good; hopefully Reid will get a chance to look briefly to make sure this matches what he was expecting.

Wed, Oct 17, 6:45 PM
efriedma added inline comments to D52894: Update CallSite docs and add a new function (NFC).
Wed, Oct 17, 3:45 PM
efriedma added reviewers for D50064: [MachineCopyPropagation] Improve redundant copy elimination: bogner, MatzeB.

Please don't wait months to ping on a patch; if you haven't gotten any response in a week, please ping, and if you haven't gotten any response in a couple weeks, please email llvmdev. We want to review patches in a timely fashion, but sometimes reviewers miss an email, or incorrectly expect someone else will review the patch.

Wed, Oct 17, 3:32 PM
efriedma added a comment to D53027: [LoopInterchange] Fix inner loop reduction handling..

This analysis seems very fragile.

Wed, Oct 17, 3:21 PM
efriedma added a comment to D53342: [SimplifyLibCalls][WIP] Mark known arguments with nonnull.

The approach is fine.

Wed, Oct 17, 3:10 PM
efriedma committed rL344710: [AArch64] Define __ELF__ for aarch64-none-elf and other similar triples..
[AArch64] Define __ELF__ for aarch64-none-elf and other similar triples.
Wed, Oct 17, 2:09 PM
efriedma committed rC344710: [AArch64] Define __ELF__ for aarch64-none-elf and other similar triples..
[AArch64] Define __ELF__ for aarch64-none-elf and other similar triples.
Wed, Oct 17, 2:09 PM
efriedma closed D53348: [AArch64] Define __ELF__ for aarch64-none-elf and other similar triples..
Wed, Oct 17, 2:09 PM
efriedma added a comment to D53362: [Prototype] Heap-To-Stack Conversion Pass.

I think you have to be careful about something like the following:

Wed, Oct 17, 12:39 PM
efriedma accepted D53370: Add a emitUnaryFloatFnCall version that fetches the function name from TLI.

It looks like you didn't touch LibCallSimplifier::optimizeLog, but I guess that's not necessary (it probably shouldn't be using emitUnaryFloatFnCall anyway).

Wed, Oct 17, 12:24 PM
efriedma added a comment to D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Starting multiple threads on the LLVM mailing lists with the same message is spam. Please don't do that.

Wed, Oct 17, 11:22 AM

Tue, Oct 16

efriedma created D53348: [AArch64] Define __ELF__ for aarch64-none-elf and other similar triples..
Tue, Oct 16, 4:17 PM
efriedma updated subscribers of D53264: [ARM64] [Windows] Add unwind support to llvm-readobj.
Tue, Oct 16, 4:10 PM
efriedma added a comment to D51431: [WIP][IPSCCP] Add lattice value for != constant and propagate nonnull..

I am not sure what you mean by freezing the pointer I am afraid.

Tue, Oct 16, 3:41 PM
efriedma updated the diff for D53184: [LangRef] Clarify semantics of volatile operations..

Took another shot at the wording. This should be a bit more explicit about what we're assuming, and what transforms are allowed.

Tue, Oct 16, 3:20 PM
efriedma added inline comments to D53184: [LangRef] Clarify semantics of volatile operations..
Tue, Oct 16, 2:39 PM
efriedma added a comment to D50039: [FunctionAttrs] Added nonnull atribute to libc function args.

I think we still need the clang patch to preemptively strip nonnull annotations from C library functions before we turn on EnableNonnullArgPropagation by default, to be safe. But yes, the right approach is to add the correct nonnull attributes, then enable nonnull propagation.

Tue, Oct 16, 2:28 PM
efriedma accepted D53338: [InstCombine] Cleanup libfunc attribute inferring.

LGTM

Tue, Oct 16, 2:10 PM
efriedma added a comment to D53229: [LegalizeTypes] Teach PromoteIntRes_BITCAST to better handle a bitcast with vector output type and a vector input type that needs to be widened.

I'd like to see more test coverage for this, I think. If I'm following correctly, this should affect something like the following on AArch64?

Tue, Oct 16, 12:23 PM
efriedma added a comment to D52835: [Diagnostics] Check integer to floating point number implicit conversions.

Looks like the latest update is missing a test file?

Tue, Oct 16, 12:00 PM
efriedma added a comment to D50039: [FunctionAttrs] Added nonnull atribute to libc function args.

This doesn't look like the patch I was expecting.

Tue, Oct 16, 11:53 AM
efriedma added a comment to D53129: [InstCombine] Fixed crash with aliased functions.

Please make sure your patches are reviewed by a qualified reviewer before you merge.

Tue, Oct 16, 11:28 AM
efriedma added inline comments to D49273: [InstCombine] Expand the simplification of pow() into exp2().
Tue, Oct 16, 11:04 AM

Mon, Oct 15

efriedma added inline comments to D53258: [LegalizeDAG] Add generic vector CTPOP expansion (PR32655) (WIP).
Mon, Oct 15, 2:47 PM
efriedma added a comment to D53264: [ARM64] [Windows] Add unwind support to llvm-readobj.

This probably needs at least a few testcases... not so much to duplicate the tests you're going to add for exception handling emission, but rather to make sure the error handling works correctly.

Mon, Oct 15, 1:57 PM
efriedma added inline comments to D53258: [LegalizeDAG] Add generic vector CTPOP expansion (PR32655) (WIP).
Mon, Oct 15, 1:02 PM
efriedma accepted D53259: [AARCH64] Improve vector popcnt lowering with ADDLP.

LGTM

Mon, Oct 15, 12:44 PM
efriedma added inline comments to D53235: [RISCV] Add RV64F codegen support.
Mon, Oct 15, 12:14 PM
efriedma accepted D53279: [SelectionDAG] Support promotion of FRAMEADDR/RETURNADDR operands.

LGTM

Mon, Oct 15, 10:27 AM

Fri, Oct 12

efriedma accepted D52978: [TargetLowering][RISCV] Introduce isSExtCheaperThanZExt hook and implement for RISC-V.

LGTM

Fri, Oct 12, 5:11 PM
efriedma accepted D53224: [RISCV] Eliminate unnecessary masking of promoted shift amounts.

LGTM with a couple more tests with an explicit AND (to show the pattern triggers for "and i32 %shamt, 31", but not "and i32 %shamt, 15").

Fri, Oct 12, 3:49 PM
efriedma added a comment to D53162: [DataLayout] Add bit width of pointers to global values.

I'm not sure it makes sense to put this information in the DataLayout.

Fri, Oct 12, 2:23 PM
efriedma reopened D52950: [BPF] Add BTF generation for BPF target.

Reverted in r344405.

Fri, Oct 12, 12:48 PM · debug-info
efriedma added a reverting commit for rL344376: [BPF] Some fixes after rL344366: rL344405: Revert BTF commit series..
Fri, Oct 12, 12:44 PM
efriedma added a reverting commit for rL344381: [BPF] Don't include linux/types.h and fix style: rL344405: Revert BTF commit series..
Fri, Oct 12, 12:44 PM
efriedma added a reverting commit for rL344366: [BPF] Add BTF generation for BPF target: rL344405: Revert BTF commit series..
Fri, Oct 12, 12:44 PM
efriedma added a reverting commit for rL344385: Disambiguate: s/make_unique/llvm::make_unique/. NFC: rL344405: Revert BTF commit series..
Fri, Oct 12, 12:44 PM
efriedma committed rL344405: Revert BTF commit series..
Revert BTF commit series.
Fri, Oct 12, 12:44 PM
efriedma added a reverting commit for rL344390: Fix MCBTF string array initialization so its MSVC friendly. NFCI.: rL344405: Revert BTF commit series..
Fri, Oct 12, 12:44 PM
efriedma added a reverting commit for rL344387: [BPF] Use cstdint {,u}int*_t instead of linux/types.h __u32 __u16 ...: rL344405: Revert BTF commit series..
Fri, Oct 12, 12:44 PM
efriedma added a reverting commit for rL344395: Replace assert() with llvm_unreachable because it's obviously a typo.: rL344405: Revert BTF commit series..
Fri, Oct 12, 12:44 PM
efriedma updated the diff for D53177: [builtins] Implement __aeabi_uread4/8 and __aeabi_uwrite4/8..

Fixed signature of __aeabi_uwrite4/8.

Fri, Oct 12, 12:17 PM
efriedma added a comment to D53177: [builtins] Implement __aeabi_uread4/8 and __aeabi_uwrite4/8..

The packed/may_alias struct pattern is the same pattern we use in the x86 immintrin.h for unaligned loads; should do the right thing in general.

Fri, Oct 12, 12:14 PM
efriedma added a comment to D52709: Add -instcombine-code-sinking option.

lib/Transforms/Scalar/Sink.cpp is probably a good starting point

Fri, Oct 12, 11:54 AM
efriedma added a comment to D53184: [LangRef] Clarify semantics of volatile operations..

llvmdev thread is titled "Volatile and Inserted Loads/Stores on MMIO​".

Fri, Oct 12, 11:42 AM

Thu, Oct 11

efriedma created D53184: [LangRef] Clarify semantics of volatile operations..
Thu, Oct 11, 7:44 PM
efriedma added a reviewer for D51431: [WIP][IPSCCP] Add lattice value for != constant and propagate nonnull.: nlopes.

You're making the lattice really confusing. Essentially, there are now two different merging rules: one is used if the caller calls mergeInValue, and a different one is used if the caller calls markNotConstant etc. So it's not obvious what the lattice actually represents.

Thu, Oct 11, 7:13 PM
efriedma created D53177: [builtins] Implement __aeabi_uread4/8 and __aeabi_uwrite4/8..
Thu, Oct 11, 3:31 PM
efriedma committed rL344300: [ELF] Fix link failure with Android compressed relocation support..
[ELF] Fix link failure with Android compressed relocation support.
Thu, Oct 11, 2:45 PM
efriedma committed rLLD344300: [ELF] Fix link failure with Android compressed relocation support..
[ELF] Fix link failure with Android compressed relocation support.
Thu, Oct 11, 2:45 PM
efriedma closed D53003: [ELF] Fix link failure with Android compressed relocation support..
Thu, Oct 11, 2:45 PM
efriedma added a comment to D51936: Fix a use-after-RAUW bug in large GEP splitting.

What happened to this patch?

Thu, Oct 11, 2:17 PM
efriedma added a comment to D52002: Switch optimization for known maximum switch values.

Anyone have any thoughts about potential security implications for this? Normally, I wouldn't really care about assuming code never has undefined behavior, but an indirect jump to an arbitrary address is much easier to exploit than other sorts of undefined behavior.

Thu, Oct 11, 2:08 PM
efriedma added inline comments to D52835: [Diagnostics] Check integer to floating point number implicit conversions.
Thu, Oct 11, 12:49 PM

Wed, Oct 10

efriedma added inline comments to D53115: [COFF, ARM64] Add _ReadStatusReg and_WriteStatusReg intrinsics.
Wed, Oct 10, 6:19 PM
efriedma added a comment to D53115: [COFF, ARM64] Add _ReadStatusReg and_WriteStatusReg intrinsics.

Missing Sema changes?

Wed, Oct 10, 4:20 PM
efriedma added a comment to D52835: [Diagnostics] Check integer to floating point number implicit conversions.

Probably should have a test for something like float x = (__uint128_t)-1;, to make sure we print something reasonable.

Wed, Oct 10, 4:06 PM
efriedma added a comment to D52649: [mips] Mark fmaxl as a long double emulation routine.

I don't think anything will go wrong in this case, specifically... I'm more generally worried about the keeping a list of float routines in the MIPS backend which is essentially copy-pasted from RuntimeLibcalls.def.

Wed, Oct 10, 12:46 PM

Mon, Oct 8

efriedma added a comment to D52975: [TargetLowering][RISCV] Introduce getExtendForShiftAmount and implement for RISC-V.

I was hoping there was an opportunity here to avoid the need for backend-specific peepholes

Mon, Oct 8, 6:38 PM
efriedma added a comment to D52975: [TargetLowering][RISCV] Introduce getExtendForShiftAmount and implement for RISC-V.

I guess that sentence was weird. I meant, if the shift amount is too large, DAGCombine will fold the shift to undef.

Mon, Oct 8, 6:31 PM
efriedma added a comment to D53003: [ELF] Fix link failure with Android compressed relocation support..

Found as a build failure testing a new compiler on Android.

Mon, Oct 8, 6:13 PM
efriedma created D53003: [ELF] Fix link failure with Android compressed relocation support..
Mon, Oct 8, 3:58 PM
efriedma added a comment to D52868: [AArch64][v8.5A] Restrict indirect tail calls to use x16/17 only when using BTI.

Would it also make sense to enforce the corresponding restriction, that non-tail-call indirect branches shouldn't use x16/x17?

Mon, Oct 8, 12:52 PM
efriedma added a comment to D52978: [TargetLowering][RISCV] Introduce isSExtCheaperThanZExt hook and implement for RISC-V.

Makes sense.

Mon, Oct 8, 12:27 PM
efriedma requested changes to D52975: [TargetLowering][RISCV] Introduce getExtendForShiftAmount and implement for RISC-V.

You can't ANY_EXTEND here; that will confuse DAGCombine, which will, for example, fold shifts where the shift amount is too large to undef. Other targets normally deal with this at isel time; see, for example, MaskedShiftAmountPats in lib/Target/X86/X86InstrCompiler.td .

Mon, Oct 8, 12:16 PM
efriedma added a comment to D52854: Use is.constant intrinsic for __builtin_constant_p.

I don't think that was the approach @rsmith was suggesting; you don't need to wrap every possible kind of expression. Rather, at the point where the expression is required to be constant, add a single expression which wraps the entire expression tree to indicate that. So for "constexpr int c = 10+2;", the expression tree for the initializer is something like ConstExpr(BinaryOperator(IntegerLiteral, IntegerLiteral)).

Mon, Oct 8, 12:07 PM

Fri, Oct 5

efriedma accepted D52811: [COFF, ARM64] Add _InterlockedAdd intrinsic.

LGTM

Fri, Oct 5, 1:30 PM
efriedma accepted D52834: [ARM] Account for implicit IT when calculating inline asm size.

LGTM

Fri, Oct 5, 12:55 PM
efriedma added inline comments to D52807: [COFF, ARM64] Add _InterlockedCompareExchangePointer_nf intrinsic.
Fri, Oct 5, 12:52 PM
efriedma accepted D52807: [COFF, ARM64] Add _InterlockedCompareExchangePointer_nf intrinsic.

LGTM

Fri, Oct 5, 12:03 PM
efriedma added inline comments to D52816: [AArch64] Create proper memoperand for multi-vector stores.
Fri, Oct 5, 11:22 AM

Thu, Oct 4

efriedma accepted D52575: [SimplifyCFG] Pass AggressiveInsts to DominatesMergePoint by reference. Remove null check..

LGTM

Thu, Oct 4, 3:48 PM
efriedma added inline comments to D52899: [TTI] Check that lowered type is floating point before calling isFabsFree.
Thu, Oct 4, 3:32 PM
efriedma added inline comments to D52807: [COFF, ARM64] Add _InterlockedCompareExchangePointer_nf intrinsic.
Thu, Oct 4, 3:27 PM
efriedma added a comment to D52807: [COFF, ARM64] Add _InterlockedCompareExchangePointer_nf intrinsic.

How are you testing?

Thu, Oct 4, 2:18 PM
efriedma accepted D52838: [COFF, ARM64] Add __getReg intrinsic.

LGTM

Thu, Oct 4, 2:08 PM
efriedma added a comment to D52838: [COFF, ARM64] Add __getReg intrinsic.

Needs a testcase for the error message like we have for other intrinsics in test/Sema/builtins-arm64.c . Otherwise LGTM.

Thu, Oct 4, 1:09 PM
efriedma added inline comments to D52838: [COFF, ARM64] Add __getReg intrinsic.
Thu, Oct 4, 12:33 PM
efriedma added a comment to D52899: [TTI] Check that lowered type is floating point before calling isFabsFree.

Testcase?

Thu, Oct 4, 11:58 AM
efriedma added inline comments to D49507: [Power9] Add __float128 support in the backend for bitcast to a i128.
Thu, Oct 4, 11:21 AM
efriedma added a comment to D52834: [ARM] Account for implicit IT when calculating inline asm size.

Code changes seem fine.

Thu, Oct 4, 11:14 AM

Wed, Oct 3

efriedma accepted D50179: [AArch64][ARM] Context sensitive meaning of option "crypto".

LGTM

Wed, Oct 3, 4:02 PM
efriedma added a comment to D52838: [COFF, ARM64] Add __getReg intrinsic.

read_register only allows reading reserved registers because reading an allocatable register is meaningless (the compiler can store arbitrary data in allocatable registers).

Wed, Oct 3, 2:17 PM
efriedma added a comment to D52811: [COFF, ARM64] Add _InterlockedAdd intrinsic.

How come this hasn't been an issue for those targets up until now?

Wed, Oct 3, 1:25 PM
efriedma added a comment to D52827: [LICM] Make LICM able to hoist phis.

This has no impact by itself that I've been able to see, as LICM typically doesn't see such phis as they will have been converted into selects by the time LICM is run

Wed, Oct 3, 1:01 PM
efriedma added a comment to D46535: Correct warning on Float->Integer conversions..

Every Integer is representable (lossy of course) as a float as far as I know.

Wed, Oct 3, 12:34 PM
efriedma added a comment to D52816: [AArch64] Create proper memoperand for multi-vector stores.

You could just directly test that the computed memory operand is correct: write a test that runs "llc -stop-after=isel" and check the MIR. Without your patch, you should see something like "ST1Fourv2d killed %5, %4 :: (store 48 into %ir.addr, align 64)"; with your patch, that will be "store 64".

Wed, Oct 3, 12:30 PM
efriedma added a comment to D52834: [ARM] Account for implicit IT when calculating inline asm size.

The Arm MaxInstLength could be increased to 6

Wed, Oct 3, 12:15 PM
efriedma added inline comments to D52807: [COFF, ARM64] Add _InterlockedCompareExchangePointer_nf intrinsic.
Wed, Oct 3, 12:03 PM

Tue, Oct 2

efriedma added inline comments to D52811: [COFF, ARM64] Add _InterlockedAdd intrinsic.
Tue, Oct 2, 5:23 PM
efriedma added a comment to D52797: [LICM] Clear LoopToAliasSetMap when a loop being deleted is outermost or removed from its parent loop..

The commit message should refer to https://bugs.llvm.org/show_bug.cgi?id=31141 (assuming this patch fixes that bug).

Tue, Oct 2, 3:24 PM
efriedma added a comment to D52716: [Inliner] Penalise inlining of calls with loops at Oz.

unless we count that they are 32bit instructions? Do we do a lot of modelling of that?

Tue, Oct 2, 12:17 PM
efriedma added a comment to D52649: [mips] Mark fmaxl as a long double emulation routine.

I'm kind of confused by what you're doing here... fmaxl is a C library function; C code is allowed to take its address and call it indirectly. So changing the lowering based on the name of the callee seems wrong.

Tue, Oct 2, 11:51 AM
efriedma added inline comments to D52707: Switch optimization in IR for known maximum switch values.
Tue, Oct 2, 11:32 AM · Restricted Project
efriedma added inline comments to D52671: [InstCombine] Skip merging non-free GEP.
Tue, Oct 2, 11:06 AM

Mon, Oct 1

efriedma added inline comments to D52671: [InstCombine] Skip merging non-free GEP.
Mon, Oct 1, 6:45 PM