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frasercrmck (Fraser Cormack)
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Jun 1 2015, 8:58 AM (363 w, 5 d)

Recent Activity

Yesterday

frasercrmck added a comment to D125787: [RISCV] Fix RVV stack frame alignment bugs.

And I also worried that if the size of RVV padding is big enough, the size of the local scalar variable field is out of the range of 12 bits signed number. If it is necessary to add an extra scavenger spill slot for it?

Fri, May 20, 9:53 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125364: [RISCV] Replace ISD::FP_EXTEND and ISD::FP_ROUND with RVV VL op..
Fri, May 20, 6:23 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125964: [RISCV] Fix logic for determining RVV stack padding.
Fri, May 20, 5:37 AM · Restricted Project, Restricted Project
frasercrmck committed rGd60ae47f9dab: [RISCV] Fix logic for determining RVV stack padding (authored by frasercrmck).
[RISCV] Fix logic for determining RVV stack padding
Fri, May 20, 5:31 AM · Restricted Project, Restricted Project
frasercrmck closed D125964: [RISCV] Fix logic for determining RVV stack padding.
Fri, May 20, 5:31 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125964: [RISCV] Fix logic for determining RVV stack padding.
Fri, May 20, 5:25 AM · Restricted Project, Restricted Project
frasercrmck committed rGa351070710f5: [RISCV] Add a test showing overlapping stack offsets with RVV (authored by frasercrmck).
[RISCV] Add a test showing overlapping stack offsets with RVV
Fri, May 20, 5:12 AM · Restricted Project, Restricted Project
frasercrmck closed D125962: [RISCV] Add a test showing overlapping stack offsets with RVV.
Fri, May 20, 5:11 AM · Restricted Project, Restricted Project

Thu, May 19

frasercrmck added inline comments to D126036: [LegalizeTypes] Fix bug in expensive checks verification.
Thu, May 19, 11:14 PM · Restricted Project, Restricted Project
frasercrmck added a comment to D125787: [RISCV] Fix RVV stack frame alignment bugs.

Ok, I think that makes sense. We can always chose a more complicated scheme later if we don't like the extra padding, but fixing bugs comes first.

Again though, I think this is a separable patch. Can I ask you to split that off? We should be able to demonstrate the misaligned stack without fixing either a) internal underalignment alignments of RVV objects, or b) your offseting code (I think?). If I understood you correctly, this basically just ends up needing to set RVVPadding more often.

Thu, May 19, 9:54 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125964: [RISCV] Fix logic for determining RVV stack padding.
Thu, May 19, 9:13 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D125973: [RISCV] Ensure the entire stack is aligned to the RVV stack alignment.

While this bug is reproducible on main, there's no way to properly fix the codegen without D125787 as we lack the ability to ensure RVV alignment beyond 8, and we don't need to ensure an alignment of 8 as we get that for free. So I thought it better to base this patch on D125787.

Thu, May 19, 7:09 AM · Restricted Project, Restricted Project
frasercrmck updated the diff for D125973: [RISCV] Ensure the entire stack is aligned to the RVV stack alignment.

fix typo

Thu, May 19, 7:05 AM · Restricted Project, Restricted Project
frasercrmck requested review of D125973: [RISCV] Ensure the entire stack is aligned to the RVV stack alignment.
Thu, May 19, 7:04 AM · Restricted Project, Restricted Project
frasercrmck updated the diff for D125787: [RISCV] Fix RVV stack frame alignment bugs.

fix up a comment: RVV padding isn't only required when *accessing* RVV objects;
it affects the calculation of *any* objects when we have a non-zero RVV stack
section.

Thu, May 19, 3:59 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D125787: [RISCV] Fix RVV stack frame alignment bugs.

Reading through, it seems like your second bug mentioned could probably be reproduced and fixed independently of the others? Would it make sense to split that into it's own patch?

It's likely, yeah. It's something I came across most of the way through fixing everything else so I didn't really think about it. I'm sure I could come up with a test that exercises this, and I think the fix is relatively self-contained. I'll give it a bash later.

Thu, May 19, 3:56 AM · Restricted Project, Restricted Project
frasercrmck updated the diff for D125787: [RISCV] Fix RVV stack frame alignment bugs.

rebase on D125964

Thu, May 19, 3:54 AM · Restricted Project, Restricted Project
frasercrmck updated the summary of D125787: [RISCV] Fix RVV stack frame alignment bugs.
Thu, May 19, 3:54 AM · Restricted Project, Restricted Project
frasercrmck requested review of D125964: [RISCV] Fix logic for determining RVV stack padding.
Thu, May 19, 3:50 AM · Restricted Project, Restricted Project
frasercrmck requested review of D125962: [RISCV] Add a test showing overlapping stack offsets with RVV.
Thu, May 19, 3:32 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125546: [RISCV] Use tail agnostic if inserting subvector/element at the end of the vector..
Thu, May 19, 12:54 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125950: [LegalizeTypes][VP] Add widen and split support for VP_TRUNCATE.
Thu, May 19, 12:25 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125083: [RISCV] Use check-prefixes to reduce check lines.
Thu, May 19, 12:19 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125787: [RISCV] Fix RVV stack frame alignment bugs.
Thu, May 19, 12:09 AM · Restricted Project, Restricted Project

Wed, May 18

frasercrmck added a comment to D125787: [RISCV] Fix RVV stack frame alignment bugs.

Reading through, it seems like your second bug mentioned could probably be reproduced and fixed independently of the others? Would it make sense to split that into it's own patch?

Wed, May 18, 9:04 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D125271: [riscv] Enable strict assertions in InsertVSETVLI data flow.

Why was this reverted?

Wed, May 18, 2:21 AM · Restricted Project, Restricted Project
frasercrmck accepted D125858: [LegalizeTypes][VP][NFC] Use an if and two returns instead of ?: operator.

LGTM

Wed, May 18, 2:16 AM · Restricted Project, Restricted Project
frasercrmck accepted D125446: [LegalizeVectorTypes][VP] Add widen and split support for VP_SETCC.

LGTM - that last comment isn't a blocker, btw.

Wed, May 18, 2:08 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125446: [LegalizeVectorTypes][VP] Add widen and split support for VP_SETCC.
Wed, May 18, 2:07 AM · Restricted Project, Restricted Project

Tue, May 17

frasercrmck committed rGf7709a059ac0: [RISCV] Add a test showing incorrect RVV stack alignment (authored by frasercrmck).
[RISCV] Add a test showing incorrect RVV stack alignment
Tue, May 17, 8:06 AM · Restricted Project, Restricted Project
frasercrmck closed D110933: [RISCV] Add a test showing incorrect RVV stack alignment.
Tue, May 17, 8:06 AM · Restricted Project, Restricted Project
frasercrmck committed rG8430b8274195: [RISCV] Drop notion of "strict" vsetvli compatibility (authored by frasercrmck).
[RISCV] Drop notion of "strict" vsetvli compatibility
Tue, May 17, 7:37 AM · Restricted Project, Restricted Project
frasercrmck closed D125748: [RISCV] Drop notion of "strict" vsetvli compatibility.
Tue, May 17, 7:37 AM · Restricted Project, Restricted Project
frasercrmck requested review of D125787: [RISCV] Fix RVV stack frame alignment bugs.
Tue, May 17, 7:02 AM · Restricted Project, Restricted Project
frasercrmck updated the diff for D110933: [RISCV] Add a test showing incorrect RVV stack alignment.

add rv32 lines and zve64x

Tue, May 17, 6:58 AM · Restricted Project, Restricted Project
frasercrmck committed rGf00f894d5d82: [RISCV][NFC] Reword split SP adjustment comments (authored by frasercrmck).
[RISCV][NFC] Reword split SP adjustment comments
Tue, May 17, 2:16 AM · Restricted Project, Restricted Project
frasercrmck committed rG05ad4d4f3868: [RISCV][NFC] Fix comment typos in split SP adjustment (authored by frasercrmck).
[RISCV][NFC] Fix comment typos in split SP adjustment
Tue, May 17, 2:09 AM · Restricted Project, Restricted Project
frasercrmck requested review of D125748: [RISCV] Drop notion of "strict" vsetvli compatibility.
Tue, May 17, 1:06 AM · Restricted Project, Restricted Project
frasercrmck committed rG821522d343cd: [RISCV] Add a test w/ RVV stack objects misaligning non-RVV ones (authored by frasercrmck).
[RISCV] Add a test w/ RVV stack objects misaligning non-RVV ones
Tue, May 17, 1:02 AM · Restricted Project, Restricted Project
frasercrmck closed D125382: [RISCV] Add a test w/ RVV stack objects misaligning non-RVV ones.
Tue, May 17, 1:01 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125699: [StackColoring] Don't merge slots with differing StackIDs.
Tue, May 17, 12:51 AM · Restricted Project, Restricted Project
frasercrmck committed rG599ff247dee8: [StackColoring] Don't merge slots with differing StackIDs (authored by frasercrmck).
[StackColoring] Don't merge slots with differing StackIDs
Tue, May 17, 12:41 AM · Restricted Project, Restricted Project
frasercrmck closed D125699: [StackColoring] Don't merge slots with differing StackIDs.
Tue, May 17, 12:41 AM · Restricted Project, Restricted Project
frasercrmck updated the diff for D125699: [StackColoring] Don't merge slots with differing StackIDs.

apply suggestion

Tue, May 17, 12:40 AM · Restricted Project, Restricted Project

Mon, May 16

frasercrmck updated the diff for D125382: [RISCV] Add a test w/ RVV stack objects misaligning non-RVV ones.

add zve64x run lines: update comments

Mon, May 16, 10:08 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125382: [RISCV] Add a test w/ RVV stack objects misaligning non-RVV ones.
Mon, May 16, 9:39 AM · Restricted Project, Restricted Project
frasercrmck requested review of D125699: [StackColoring] Don't merge slots with differing StackIDs.
Mon, May 16, 8:56 AM · Restricted Project, Restricted Project

Thu, May 12

frasercrmck accepted D125408: [riscv] Extend dataflow workaround from D119518 to fallthrough blocks.

LGTM but yeah I think [RISCV] seems more canonical to me.

Thu, May 12, 9:57 AM · Restricted Project, Restricted Project
frasercrmck committed rG1106bc208c66: [CodeGen][NFC] Move some comments from the end of lines to above them (authored by frasercrmck).
[CodeGen][NFC] Move some comments from the end of lines to above them
Thu, May 12, 7:59 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D125449: [ConstantFold] Fold bitcasts on scalable vector splats..

From what I gather about the bug report, RISCV doesn't suffer from it as we always dyn_cast to Instruction. Is that right? Just wondering if we should add a similar test - I don't think we have constant expr coverage in sink-splat-operands.ll.

Thu, May 12, 2:28 AM · Restricted Project, Restricted Project
frasercrmck accepted D125452: [LegalizeTypes][VP] Add integer promotion support for vp.merge.

LGTM

Thu, May 12, 2:14 AM · Restricted Project, Restricted Project
frasercrmck accepted D125453: [LegalizeTypes][VP] Add integer promotion support for vp.setcc.

LGTM with a nit

Thu, May 12, 2:13 AM · Restricted Project, Restricted Project
frasercrmck added a reviewer for D125446: [LegalizeVectorTypes][VP] Add widen and split support for VP_SETCC: simoll.

I think @simoll should be included in VP reviews.

Thu, May 12, 2:07 AM · Restricted Project, Restricted Project
frasercrmck accepted D125424: [RISCV] Use tail agnostic policy when selecting riscv_fma_vl to instructions.

LGTM too

Thu, May 12, 1:59 AM · Restricted Project, Restricted Project

Wed, May 11

frasercrmck accepted D125392: [riscv] Canonicalize vsetvli (vsetvli avl, vtype1) vtype2 transitions.

LGTM

Wed, May 11, 10:30 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D125382: [RISCV] Add a test w/ RVV stack objects misaligning non-RVV ones.

I think this can be exhibited even more simply. If we have one RVV object and call a function, that called function expects its stack to be 16-byte aligned. We're not ensuring that.

Wed, May 11, 10:22 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125392: [riscv] Canonicalize vsetvli (vsetvli avl, vtype1) vtype2 transitions.
Wed, May 11, 10:05 AM · Restricted Project, Restricted Project
frasercrmck requested review of D125382: [RISCV] Add a test w/ RVV stack objects misaligning non-RVV ones.
Wed, May 11, 6:28 AM · Restricted Project, Restricted Project
frasercrmck committed rG27c7e922fe61: [RISCV][NFC] Rename variable to appease code style (authored by frasercrmck).
[RISCV][NFC] Rename variable to appease code style
Wed, May 11, 4:57 AM · Restricted Project, Restricted Project
frasercrmck committed rG874b802a6de1: [RISCV][NFC] Move variable down closer to its first use (authored by frasercrmck).
[RISCV][NFC] Move variable down closer to its first use
Wed, May 11, 4:45 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D110933: [RISCV] Add a test showing incorrect RVV stack alignment.

Yes. But I didn't understand why we need to alignTo(VLENB, 32) rather than just alignTo(32) ? The alignment of vector register is always 8, and the alloca instruction is not related to vector register.

Wed, May 11, 3:37 AM · Restricted Project, Restricted Project
frasercrmck updated the diff for D110933: [RISCV] Add a test showing incorrect RVV stack alignment.

resuscitate old test

Wed, May 11, 3:20 AM · Restricted Project, Restricted Project
frasercrmck accepted D125326: [RISCV] Add caching to the gather/scatter to strided load/store conversion..

LGTM

Wed, May 11, 3:00 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D125296: [VP] vp intrinsics are not speculatable.

This is what I was thinking of. Short of speculatively materializing an instruction only to throw it away, I don't see a better way.

Wed, May 11, 2:54 AM · Restricted Project, Restricted Project, Restricted Project
frasercrmck committed rGc1d48b35d88a: [SelectionDAG][VP] Rename VP sext/zext/trunc ISD opcodes (authored by frasercrmck).
[SelectionDAG][VP] Rename VP sext/zext/trunc ISD opcodes
Wed, May 11, 2:38 AM · Restricted Project, Restricted Project
frasercrmck closed D125298: [SelectionDAG][VP] Rename VP sext/zext/trunc ISD opcodes.
Wed, May 11, 2:38 AM · Restricted Project, Restricted Project
frasercrmck accepted D125359: [LegalizeVectorTypes] Enable WidenVecRes_SETCC work for scalable vector.

LGTM but I don't think you need to say [RISCV] in the title.

Wed, May 11, 2:35 AM · Restricted Project, Restricted Project
frasercrmck accepted D125337: [riscv] Prefer to use previous VL for scalar move instructions.

Also LGTM aside from nits and possible restructuring. Definitely nicer than the other patch.

Wed, May 11, 1:45 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D125344: [RISCV] Move implementation of getVLOpNum and getSEWOpNum from RISCVInsertVSETVLI to RISCVBaseInfo.h. NFC.

100% agreed, thank you. FWIW I think there's scope to do something similar for our ISD nodes.

Wed, May 11, 1:29 AM · Restricted Project, Restricted Project

Tue, May 10

frasercrmck accepted D125108: [RISCV] Enable subregister liveness tracking for RVV..

LGTM, I had kind of assumed we were already enabling this. So thanks! This should help us embedding liveness bugs deep into our code - I've seen targets struggle to right these when enabling subreg liveness.

Tue, May 10, 9:15 AM · Restricted Project, Restricted Project
frasercrmck committed rG0b2e7a7c72c7: [RISCV][NFC] Remove else after continue (authored by frasercrmck).
[RISCV][NFC] Remove else after continue
Tue, May 10, 3:28 AM · Restricted Project, Restricted Project
frasercrmck requested review of D125298: [SelectionDAG][VP] Rename VP sext/zext/trunc ISD opcodes.
Tue, May 10, 3:04 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D123112: [VP] Legalize the stride operand for EXPERIMENTAL_VP_STRIDED SDNodes.

Looks good to me but I'd defer to @craig.topper in case I've missed something.

Tue, May 10, 2:29 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125083: [RISCV] Use check-prefixes to reduce check lines.
Tue, May 10, 2:20 AM · Restricted Project, Restricted Project
frasercrmck accepted D123975: [RISCV] Add rvv codegen support for vp.fpext..

LGTM, thanks!

Tue, May 10, 2:05 AM · Restricted Project, Restricted Project

Mon, May 9

frasercrmck committed rG3b9a231d255c: [RISCV] Remove two unmasked RVV patterns (authored by frasercrmck).
[RISCV] Remove two unmasked RVV patterns
Mon, May 9, 9:07 AM · Restricted Project, Restricted Project
frasercrmck closed D125239: [RISCV] Remove two unmasked RVV patterns.
Mon, May 9, 9:06 AM · Restricted Project, Restricted Project
frasercrmck requested review of D125239: [RISCV] Remove two unmasked RVV patterns.
Mon, May 9, 8:26 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D125232: [riscv] Use classic dataflow for VSETVLI insertion .

Looks decent to me. It overlaps with what I have in D125021 and was playing around with locally, but improves on it nicely. Would be good to hear @craig.topper's and @rogfer01's thoughts if possible.

Mon, May 9, 7:53 AM · Restricted Project, Restricted Project
frasercrmck updated the diff for D125021: [RISCV] Fix VSETVLI insertion by syncing phases 2 and 3.

pre-emptively include D125133

Mon, May 9, 4:30 AM · Restricted Project, Restricted Project
frasercrmck accepted D125216: [RISCV] Add more tests for vector reduce mask operations.

LGTM, thanks

Mon, May 9, 3:50 AM · Restricted Project, Restricted Project
frasercrmck accepted D125133: [riscv] Fix state tracking bug on vsetvli (phi of vsetvli) peephole.

LGTM but yeah I prefer @gkm's suggestion.

Mon, May 9, 2:46 AM · Restricted Project, Restricted Project

Fri, May 6

frasercrmck accepted D125035: [riscv] Add strict asserts for VSETVLI insertion algorithm to help catch bugs.

LGTM, thanks

Fri, May 6, 8:59 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125035: [riscv] Add strict asserts for VSETVLI insertion algorithm to help catch bugs.
Fri, May 6, 8:54 AM · Restricted Project, Restricted Project
frasercrmck updated the diff for D125021: [RISCV] Fix VSETVLI insertion by syncing phases 2 and 3.

remove need for TmpStatus (and BBInfo.Change, really)

Fri, May 6, 8:52 AM · Restricted Project, Restricted Project
frasercrmck committed rGbafab9c09f68: [InstCombine] Fix scalable-vector bitwise select matching (authored by frasercrmck).
[InstCombine] Fix scalable-vector bitwise select matching
Fri, May 6, 5:12 AM · Restricted Project, Restricted Project
frasercrmck closed D124997: [InstCombine] Fix scalable-vector bitwise select matching.
Fri, May 6, 5:12 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125083: [RISCV] Use check-prefixes to reduce check lines.
Fri, May 6, 4:59 AM · Restricted Project, Restricted Project
frasercrmck updated the summary of D124997: [InstCombine] Fix scalable-vector bitwise select matching.
Fri, May 6, 4:55 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125035: [riscv] Add strict asserts for VSETVLI insertion algorithm to help catch bugs.
Fri, May 6, 4:41 AM · Restricted Project, Restricted Project
frasercrmck added inline comments to D125021: [RISCV] Fix VSETVLI insertion by syncing phases 2 and 3.
Fri, May 6, 4:31 AM · Restricted Project, Restricted Project
frasercrmck updated the diff for D125021: [RISCV] Fix VSETVLI insertion by syncing phases 2 and 3.

rebase on new test which now fails

Fri, May 6, 4:29 AM · Restricted Project, Restricted Project
frasercrmck committed rG588155aaa723: [RISCV] Add an extra vsetvli insertion test (authored by frasercrmck).
[RISCV] Add an extra vsetvli insertion test
Fri, May 6, 4:29 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D125021: [RISCV] Fix VSETVLI insertion by syncing phases 2 and 3.

Have you tried adding asserts to the end of emitVSETVLIs to ensure the final block state is as expected? I strongly suspect this change is insufficient to fix all the cases.

Fri, May 6, 2:17 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D125067: [RISCV] Add RISCVISD::FCLASS_VL..

It's uncommon to add nodes and patterns without test coverage. I realise that'd involve adding custom lowering code, but can't that be done in this patch too?

Fri, May 6, 2:02 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D124997: [InstCombine] Fix scalable-vector bitwise select matching.

The code comments could be improved. There are many different potential patterns within this block, and scalable vectors just make it harder to keep it all straight. :)
But after mucking around in here for a long time, I don't think the fix is sufficient.
I added a test with 7bad1d281c798929a to try to uncover another potential bug.
But I can't find a case currently where we would go wrong because code before here (ComputeNumSignBits) prevents matching a scalable vector with the right combination of bitcasts to trigger that bug.

A better fix should do something like this:

// If this is a vector, we may need to cast to match the condition's length.
Type *SelTy = A->getType();
if (auto *VecTy = dyn_cast<VectorType>(Cond->getType())) {
  // For a fixed or scalable vector get N from <{vscale x} N x iM>
  unsigned Elts = VecTy->getElementCount().getKnownMinValue();
  // For a fixed or scalable vector, get the value N x iM; for a scalar this is just M.
  unsigned SelEltSize = SelTy->getPrimitiveSizeInBits().getKnownMinSize();
  Type *EltTy = Builder.getIntNTy(SelEltSize / Elts);
  SelTy = VectorType::get(EltTy, VecTy->getElementCount());
}

I had a hard time making sense of the type and size APIs, so if anyone knows that better, please correct/improve if possible.

Fri, May 6, 1:58 AM · Restricted Project, Restricted Project
frasercrmck updated the diff for D124997: [InstCombine] Fix scalable-vector bitwise select matching.

fix and enable bitcasts for scalable vectors

Fri, May 6, 1:53 AM · Restricted Project, Restricted Project

Thu, May 5

frasercrmck updated the diff for D125021: [RISCV] Fix VSETVLI insertion by syncing phases 2 and 3.

adjust comments

Thu, May 5, 9:54 AM · Restricted Project, Restricted Project
frasercrmck requested review of D125021: [RISCV] Fix VSETVLI insertion by syncing phases 2 and 3.
Thu, May 5, 9:52 AM · Restricted Project, Restricted Project
frasercrmck added a comment to D124997: [InstCombine] Fix scalable-vector bitwise select matching.

We can still have a vector bitcast where the cast is to a type that matches the number of elements in the vector condition. That's the 2nd test IIUC, so if we just do the dyn_cast, it becomes:

define <vscale x 1 x i64> @vec_of_casted_bools_scalable(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 8 x i1> %cond) {
  %1 = bitcast <vscale x 1 x i64> %a to <vscale x 8 x i8>
  %2 = bitcast <vscale x 1 x i64> %b to <vscale x 8 x i8>
  %3 = select <vscale x 8 x i1> %cond, <vscale x 8 x i8> %1, <vscale x 8 x i8> %2
  %4 = bitcast <vscale x 8 x i8> %3 to <vscale x 1 x i64>
  ret <vscale x 1 x i64> %4
}
Thu, May 5, 8:40 AM · Restricted Project, Restricted Project