As mentioned, I plan to add R_RISCV_ALIGN support in future along with the suggested changes to the test cases.

I've made some changes in response to your feedback. No R_RISCV_ALIGN support
added yet but it is work in progress.

Thank you both for the valuable feedback, I will be working through addressing both of your suggestions.

Hello, thanks for uploading this, it s great to see more work in the same area. I have also been working on relocation relaxation in LLD. I have been focussing on relaxing R_RISCV_CALL relocations for now. My approach is not too dissimilar from yours. I plan to upload a similar patch in the future.

Looks good to me

Good point. It's reverted now.

Add test that march 'b' flag enables __riscv_bitmanip.

• Removed frontend changes, as these have been seperated out into a seperate patch here: https://reviews.llvm.org/D71553
• Made use of __riscv macro in intrin.h, rather than relying on __riscv32 || __riscv64.

In D67661#1767141, @lewis-revill wrote:

So I have a quick comment about this patch, perhaps it might help to get things moving again.

I'd like to see the actual frontend changes, IE separate from the header implementations, to be split into a separate patch. So we can have things like the __riscv_bitmanip macro and the target attribute parsing potentially landed sooner?

Add underscore in place of asm '.' in C function names

Re-add accidentally reverted update.

Update to include changes in v0.92.

Fixed typos in opcodes. Missing '.'s were added. e.g. adduw -> addu.w

We have a patch to add codegen pattern matching (https://reviews.llvm.org/D67348). Unfortunately we have found that we will not be able to rely on pattern matching here to guarantee that these instructions are emitted in all situations due to differences in optimisation levels and the complexity of some instructions.
The approach of using arch-specific intrinsics in the middle end (https://reviews.llvm.org/D66479) was an alternative way to bridge the gap between the C level builtins and the Bitmanip instructions.

Sorry I misread your original comment.

Add missing <>

I agree inline asm is a far from optimal solution but it seems like the lesser of two evils for now.

Currently dla instructions on 32-bit do not support using the 'at' register. The behavior is different to GAS unless using the -gpsize=0 option as the behavior without this option has not yet been implemented.

Hello. I will take a look at fixing the warnings coming from LLVMMipsAsmParser.

In D16455#343001, @dsanders wrote:

This change looks correct but it appears to expose a bug. One of the tests in macro-la-64bit.s emits different code to GAS. IAS gives:

2f0:   34068000        li      a2,0x8000
2f4:   00c6302d        daddu   a2,a2,a2

where the li clobbers the third operand of the daddu, whereas GAS emits:

2f0:   34018000        li      at,0x8000
2f4:   0026302d        daddu   a2,at,a2

I cannot recall the exact difference but I believe it is the 32bit equivalent of this difference. I can get more details on this if required. The correct behavior for when the -gpsize=0 option is not given has not been implemented yet. When it is implemented this test will start to fail without this option present.

Added the -gpsize=0 option to the test cases so that the IAS will emit the same code as GAS.

ping

ping

Responded to reviewers comments. In order to pass the newly added test cases, I had to produce another patch to fix issues whilst printing expressions. This patch requires this in order to pass all test cases. The patch ca be found here: http://reviews.llvm.org/D15949

ping

Responded to reviewers comments.

I have added test cases. I also had to update the patch to ensure all of the tests passed.

I've now added test cases which test everything that is tested for dla on 64-bit architecture. I had to update the patch to then pass these tests.

Responded to comments made on the mailing list.

The re-uploaded version is now available here: http://reviews.llvm.org/D12730

Abandoned as it will be re-uploaded with llvm-commits CC'd from the start.

Responded to reviewers comments. Also, changed 'mem' in operands to 'mem_simm9' in order to properly detect the upper bounds for these operands.

Fixed spacing issues.

Changed all references to "use-div-traps" to "use-tcc-in-div" to relect changes made to the llvm integrated assember in a different patch (http://reviews.llvm.org/D11675).

Responded to reviewer comments. Made a few minor changes to emit functions to account for changes on the trunk. Also fixed last upload which accidentally removed a significant amount of code.

Responded to reviewers comments.

Responded to reviewers comments.

Addressed reviewers comments. Also added dissambler tests.