Emit the CodeView `S_ARMSWITCHTABLE` debug symbol for jump tables

[dpaoliello]

Summary

The CodeView S_ARMSWITCHTABLE debug symbol is used to describe the layout of a jump table, it contains the following information:

• The address of the branch instruction that uses the jump table.
• The address of the jump table.
• The "base" address that the values in the jump table are relative to.
• The type of each entry (absolute pointer, a relative integer, a relative integer that is shifted).

Together this information can be used by debuggers and binary analysis tools to understand what an jump table indirect branch is doing and where it might jump to.

Documentation for the symbol can be found in the Microsoft PDB library dumper: https://github.com/microsoft/microsoft-pdb/blob/0fe89a942f9a0f8e061213313e438884f4c9b876/cvdump/dumpsym7.cpp#L5518

This change adds support to LLVM to emit the S_ARMSWITCHTABLE debug symbol as well as to dump it out (for testing purposes).

[efriedma]

Can you give an example of an existing tool which parses these for some useful purpose?

llvm/include/llvm/DebugInfo/CodeView/CodeView.h

631

Maybe worth explaining what these values actually mean? I assume "Int" is a signed offset, "Uint" is a signed offset, and ShiftLeft involves some sort of multiply. (The code you linked implies that it's a shift by 1, but maybe the interpretation is different for aarch64?)

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

3481

If a basic block is empty, this crashes, I think.

3486

This isn't obviously true; 32-bit x86 can do a table lookup and jump in one instruction.

3506

LLVM can target 32-bit ARM Windows.

llvm/test/DebugInfo/COFF/jump-table.ll

44

Why are all the section indexes "0"?

[dpaoliello]

Can you give an example of an existing tool which parses these for some useful purpose?

Unfortunately, I can't share specifics since the tools that I am focusing on are Microsoft-internal.

llvm/include/llvm/DebugInfo/CodeView/CodeView.h

631

I've added a comment to explain this enum. For the ShiftLeft values, the amount to shift by is implementation specific.

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

3486

I wasn't aware of that, thanks!

3506

I wasn't seeing ARM32 hit this code before, but it looks like it was because of the assumption that the branch instruction wasn't the one to use the jump table value.

I've fixed the code to handle ARM32 and added it to the tests, but there seems to be some bug where the offsets are always 0? If I run the test via llc then the correct labels appear in the debug info, but somewhere between llc -filetype=obj and llvm-readobj the offsets are lost...

llvm/test/DebugInfo/COFF/jump-table.ll

44

Looking at the other uses of emitCOFFSectionIndex (e.g., for S_THUNK32 and S_GPROC32_ID), I think this is called a "segment" not "section" in LLVM's vocabulary - I've updated the code and this test.

[dpaoliello]

Address PR comments:

• Don't assume branch can use the jump table address.
• Implement ARM32 support and add tests.

[efriedma]

llvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h

163

It looks like the other classes initialize all the fields to zero.

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

3506

In general, .secrel32 emits a relocation; llvm-readobj --codeview won't dump it, I think, but it should still be there. What's the relocation pointing to?

[dpaoliello]

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

3506

The "Branch" and "Base" are pointing to a label for the ADD instruction, and "Table" is pointing to the Jump Table itself:

If I run llc -mtriple=thumbv7a-windows < llvm\test\DebugInfo\COFF\jump-table.ll" I get:

        .text
        .syntax unified
        .file   "jump-table.cpp"
'x86-64' is not a recognized processor for this target (ignoring processor)
'+cx8' is not a recognized feature for this target (ignoring feature)
'+fxsr' is not a recognized feature for this target (ignoring feature)
'+mmx' is not a recognized feature for this target (ignoring feature)
'+sse' is not a recognized feature for this target (ignoring feature)
'+sse2' is not a recognized feature for this target (ignoring feature)
'+x87' is not a recognized feature for this target (ignoring feature)
'x86-64' is not a recognized processor for this target (ignoring processor)
'x86-64' is not a recognized processor for this target (ignoring processor)
'+cx8' is not a recognized feature for this target (ignoring feature)
'+fxsr' is not a recognized feature for this target (ignoring feature)
'+mmx' is not a recognized feature for this target (ignoring feature)
'+sse' is not a recognized feature for this target (ignoring feature)
'+sse2' is not a recognized feature for this target (ignoring feature)
'+x87' is not a recognized feature for this target (ignoring feature)
'x86-64' is not a recognized processor for this target (ignoring processor)
'x86-64' is not a recognized processor for this target (ignoring processor)
'x86-64' is not a recognized processor for this target (ignoring processor)
        .def    func;
        .scl    2;
        .type   32;
        .endef
        .globl  func                            @ -- Begin function func
        .p2align        2
        .code16                                 @ @func
        .thumb_func
func:
$Mfunc_begin0:
        .cv_func_id 0
        .cv_file        1 "C:\\llvm\\jump-table.cpp" "35610C7104C8080F83E2BF6A02DABFC9" 1
        .cv_loc 0 1 6 0                         @ .\jump-table.cpp:6:0
@ %bb.0:
        push    {r7, lr}
        sub     sp, #8
        str     r0, [sp, #4]
$Mtmp0:
        .cv_loc 0 1 7 0                         @ .\jump-table.cpp:7:0
        ldr     r0, [sp, #4]
        cmp     r0, #3
        bhi     ($MBB0_7)
@ %bb.1:
$Mtmp1:
        .p2align        2
        add     r0, pc
        ldrb    r0, [r0, #4]
        lsls    r0, r0, #1
.LCPI0_0:
        add     pc, r0
@ %bb.2:
        .p2align        2
.LJTI0_0:
        .byte   (($MBB0_3)-(.LCPI0_0+4))/2
        .byte   (($MBB0_4)-(.LCPI0_0+4))/2
        .byte   (($MBB0_5)-(.LCPI0_0+4))/2
        .byte   (($MBB0_6)-(.LCPI0_0+4))/2
        .p2align        1
$MBB0_3:
$Mtmp2:
        .cv_loc 0 1 8 0                         @ .\jump-table.cpp:8:0
        bl      f1
        b       ($MBB0_7)
$MBB0_4:
        .cv_loc 0 1 9 0                         @ .\jump-table.cpp:9:0
        bl      f2
        b       ($MBB0_7)
$MBB0_5:
        .cv_loc 0 1 10 0                        @ .\jump-table.cpp:10:0
        bl      f3
        b       ($MBB0_7)
$MBB0_6:
        .cv_loc 0 1 11 0                        @ .\jump-table.cpp:11:0
        bl      f4
        b       ($MBB0_7)
$Mtmp3:
$MBB0_7:
        .cv_loc 0 1 13 0                        @ .\jump-table.cpp:13:0
        ldr     r0, [sp, #4]
        subs    r0, r0, #1
        cmp     r0, #4
        bhi     ($MBB0_15)
@ %bb.8:
$Mtmp4:
        .p2align        2
        add     r0, pc
        ldrb    r0, [r0, #4]
        lsls    r0, r0, #1
.LCPI0_1:
        add     pc, r0
@ %bb.9:
        .p2align        2
.LJTI0_1:
        .byte   (($MBB0_10)-(.LCPI0_1+4))/2
        .byte   (($MBB0_11)-(.LCPI0_1+4))/2
        .byte   (($MBB0_12)-(.LCPI0_1+4))/2
        .byte   (($MBB0_13)-(.LCPI0_1+4))/2
        .byte   (($MBB0_14)-(.LCPI0_1+4))/2
        .p2align        1
$MBB0_10:
$Mtmp5:
        .cv_loc 0 1 14 0                        @ .\jump-table.cpp:14:0
        bl      f2
        b       ($MBB0_15)
$MBB0_11:
        .cv_loc 0 1 15 0                        @ .\jump-table.cpp:15:0
        bl      f3
        b       ($MBB0_15)
$MBB0_12:
        .cv_loc 0 1 16 0                        @ .\jump-table.cpp:16:0
        bl      f4
        b       ($MBB0_15)
$MBB0_13:
        .cv_loc 0 1 17 0                        @ .\jump-table.cpp:17:0
        bl      f5
        b       ($MBB0_15)
$MBB0_14:
        .cv_loc 0 1 18 0                        @ .\jump-table.cpp:18:0
        bl      f1
        b       ($MBB0_15)
$Mtmp6:
$MBB0_15:
        .cv_loc 0 1 20 0                        @ .\jump-table.cpp:20:0
        add     sp, #8
        pop     {r7}
        pop     {r0}
        mov     lr, r0
        bx      lr
$Mtmp7:
$Mfunc_end0:
                                        @ -- End function
        .section        .debug$S,"dr"
        .p2align        2, 0x0
        .long   4                               @ Debug section magic
        .long   241
        .long   ($Mtmp9)-($Mtmp8)               @ Subsection size
$Mtmp8:
        .short  ($Mtmp11)-($Mtmp10)             @ Record length
$Mtmp10:
        .short  4353                            @ Record kind: S_OBJNAME
        .long   0                               @ Signature
        .byte   0                               @ Object name
        .p2align        2, 0x0
$Mtmp11:
        .short  ($Mtmp13)-($Mtmp12)             @ Record length
$Mtmp12:
        .short  4412                            @ Record kind: S_COMPILE3
        .long   16385                           @ Flags and language
        .short  244                             @ CPUType
        .short  15                              @ Frontend version
        .short  0
        .short  1
        .short  0
        .short  17000                           @ Backend version
        .short  0
        .short  0
        .short  0
        .asciz  "clang version 15.0.1"          @ Null-terminated compiler version string
        .p2align        2, 0x0
$Mtmp13:
$Mtmp9:
        .p2align        2, 0x0
        .long   241                             @ Symbol subsection for func
        .long   ($Mtmp15)-($Mtmp14)             @ Subsection size
$Mtmp14:
        .short  ($Mtmp17)-($Mtmp16)             @ Record length
$Mtmp16:
        .short  4423                            @ Record kind: S_GPROC32_ID
        .long   0                               @ PtrParent
        .long   0                               @ PtrEnd
        .long   0                               @ PtrNext
        .long   ($Mfunc_end0)-func              @ Code size
        .long   0                               @ Offset after prologue
        .long   0                               @ Offset before epilogue
        .long   4098                            @ Function type index
        .secrel32       func                    @ Function section relative address
        .secidx func                            @ Function section index
        .byte   0                               @ Flags
        .asciz  "func"                          @ Function name
        .p2align        2, 0x0
$Mtmp17:
        .short  ($Mtmp19)-($Mtmp18)             @ Record length
$Mtmp18:
        .short  4114                            @ Record kind: S_FRAMEPROC
        .long   16                              @ FrameSize
        .long   0                               @ Padding
        .long   0                               @ Offset of padding
        .long   0                               @ Bytes of callee saved registers
        .long   0                               @ Exception handler offset
        .short  0                               @ Exception handler section
        .long   90112                           @ Flags (defines frame register)
        .p2align        2, 0x0
$Mtmp19:
        .short  ($Mtmp21)-($Mtmp20)             @ Record length
$Mtmp20:
        .short  4414                            @ Record kind: S_LOCAL
        .long   116                             @ TypeIndex
        .short  1                               @ Flags
        .asciz  "i"
        .p2align        2, 0x0
$Mtmp21:
        .cv_def_range    $Mtmp0 $Mtmp7, reg_rel, 23, 0, 4
        .short  ($Mtmp23)-($Mtmp22)             @ Record length
$Mtmp22:
        .short  4441                            @ Record kind: S_ARMSWITCHTABLE
        .secrel32       .LCPI0_0                @ Base offset
        .secidx .LCPI0_0                        @ Base section index
        .short  7                               @ Switch type
        .secrel32       .LCPI0_0                @ Branch offset
        .secrel32       .LJTI0_0                @ Table offset
        .secidx .LCPI0_0                        @ Branch section index
        .secidx .LJTI0_0                        @ Table section index
        .long   4                               @ Entries count
        .p2align        2, 0x0
$Mtmp23:
        .short  ($Mtmp25)-($Mtmp24)             @ Record length
$Mtmp24:
        .short  4441                            @ Record kind: S_ARMSWITCHTABLE
        .secrel32       .LCPI0_1                @ Base offset
        .secidx .LCPI0_1                        @ Base section index
        .short  7                               @ Switch type
        .secrel32       .LCPI0_1                @ Branch offset
        .secrel32       .LJTI0_1                @ Table offset
        .secidx .LCPI0_1                        @ Branch section index
        .secidx .LJTI0_1                        @ Table section index
        .long   5                               @ Entries count
        .p2align        2, 0x0
$Mtmp25:
        .short  2                               @ Record length
        .short  4431                            @ Record kind: S_PROC_ID_END
$Mtmp15:
        .p2align        2, 0x0
        .cv_linetable   0, func, $Mfunc_end0
        .cv_filechecksums                       @ File index to string table offset subsection
        .cv_stringtable                         @ String table
        .long   241
        .long   ($Mtmp27)-($Mtmp26)             @ Subsection size
$Mtmp26:
        .short  ($Mtmp29)-($Mtmp28)             @ Record length
$Mtmp28:
        .short  4428                            @ Record kind: S_BUILDINFO
        .long   4102                            @ LF_BUILDINFO index
        .p2align        2, 0x0
$Mtmp29:
$Mtmp27:
        .p2align        2, 0x0
        .section        .debug$T,"dr"
        .p2align        2, 0x0
        .long   4                               @ Debug section magic
        @ ArgList (0x1000)
        .short  0xa                             @ Record length
        .short  0x1201                          @ Record kind: LF_ARGLIST
        .long   0x1                             @ NumArgs
        .long   0x74                            @ Argument: int
        @ Procedure (0x1001)
        .short  0xe                             @ Record length
        .short  0x1008                          @ Record kind: LF_PROCEDURE
        .long   0x3                             @ ReturnType: void
        .byte   0x0                             @ CallingConvention: NearC
        .byte   0x0                             @ FunctionOptions
        .short  0x1                             @ NumParameters
        .long   0x1000                          @ ArgListType: (int)
        @ FuncId (0x1002)
        .short  0x12                            @ Record length
        .short  0x1601                          @ Record kind: LF_FUNC_ID
        .long   0x0                             @ ParentScope
        .long   0x1001                          @ FunctionType: void (int)
        .asciz  "func"                          @ Name
        .byte   243
        .byte   242
        .byte   241
        @ StringId (0x1003)
        .short  0xe                             @ Record length
        .short  0x1605                          @ Record kind: LF_STRING_ID
        .long   0x0                             @ Id
        .asciz  "C:\\llvm"                      @ StringData
        @ StringId (0x1004)
        .short  0x16                            @ Record length
        .short  0x1605                          @ Record kind: LF_STRING_ID
        .long   0x0                             @ Id
        .asciz  "jump-table.cpp"                @ StringData
        .byte   241
        @ StringId (0x1005)
        .short  0xa                             @ Record length
        .short  0x1605                          @ Record kind: LF_STRING_ID
        .long   0x0                             @ Id
        .byte   0                               @ StringData
        .byte   243
        .byte   242
        .byte   241
        @ BuildInfo (0x1006)
        .short  0x1a                            @ Record length
        .short  0x1603                          @ Record kind: LF_BUILDINFO
        .short  0x5                             @ NumArgs
        .long   0x1003                          @ Argument: C:\llvm
        .long   0x0                             @ Argument
        .long   0x1004                          @ Argument: jump-table.cpp
        .long   0x1005                          @ Argument
        .long   0x0                             @ Argument
        .byte   242
        .byte   241

[efriedma]

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

3506

That makes sense... I think it's pointing to the right location, there just isn't any offset because there's a symbol at that address. (Arguably there shouldn't be such a symbol, but that's not really related to your patch.) On other targets, the closest symbol is probably the function entry point.

Maybe we could teach llvm-readobj to dump this in a more useful way; instead of just dumping the offset, it could also dump any related relocations. But it doesn't look like the compiler is doing anything wrong.

[dpaoliello]

• Initialize JumpTableSym integer fields.
• Fix ARM32 to use a base address *after* the branch instructions.

[dpaoliello]

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

3506

@efriedma I'd prefer if we didn't block this change because of the ARM32 issue: LLVM has never fully supported ARM32 Windows (for example exception unwinding isn't implemented) and from a Microsoft perspective we haven't shipped an ARM32 OS since Windows 10 IoT Core in 2018 and ARM32 support is being removed from Windows 11 (https://learn.microsoft.com/en-us/windows/arm/arm32-to-arm64)

[efriedma]

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

3498

I'm concerned this could fail to find the jump table, or find the wrong jump table. It is possible to hoist some jump-table-related operations into an earlier block. For example:

extern "C" void f1();
extern "C" void f2();
extern "C" void f3();
extern "C" void f4();
extern "C" void f5();
extern "C" void func(int i, int j){
  for (int k = 0; k < j; ++k) {
    switch (i) {
        case 0: f1(); break;
        case 1: f2(); break;
        case 2: f3(); break;
        case 3: f4(); break;
    }
  }
}

On AArch64, we produce:

// %bb.1:
        mov     w19, w1
        mov     w20, w0
        mov     w21, w0
        adrp    x22, .LJTI0_0
        add     x22, x22, :lo12:.LJTI0_0
        b       .LBB0_4
.LBB0_2:                                // %sw.bb3
                                        //   in Loop: Header=BB0_4 Depth=1
        bl      f4
.LBB0_3:                                // %for.inc
                                        //   in Loop: Header=BB0_4 Depth=1
        subs    w19, w19, #1
        b.eq    .LBB0_9
.LBB0_4:                                // %for.body
                                        // =>This Inner Loop Header: Depth=1
        cmp     w20, #3
        b.hi    .LBB0_3
// %bb.5:                               // %for.body
                                        //   in Loop: Header=BB0_4 Depth=1
        adr     x8, .LBB0_2
        ldrb    w9, [x22, x21]
        add     x8, x8, x9, lsl #2
        br      x8

Off the top of my head, I'm not sure how to write a testcase where it actually finds the wrong table, but I suspect it's possible.

We might need to encode the associated jump table into the MachineInstrs some other way. I'm not sure what that looks like, exactly; maybe a pseudo-instruction just before the jump?

3506

My point was, if I'm understanding correctly, we're actually generating the correct code; it just looks weird in the dumps. So I don't think we need to do anything... except maybe add a few CHECK lines for the relocations in the regression tests. Teaching the dumping tools to make the dumps look less weird was just a "would be nice" thought.

[efriedma]

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

3498

Err, I guess on aarch64, you can pull the table out of the JumpTableDest32 instruction, which we currently don't hoist. But on x86, we don't do jump table compression, so there's no such operand.

[dpaoliello]

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

3498

I've been trying to figure out how to do this, and I'm lost: I can see where the branch instructions are added, but I don't know how to create a pseudo-instruction just before them. There also seems to be DbgValues, which seems like it may be useful but I also don't understand how to create those either.

Don't suppose someone can point me to an example where someone else has done something similar?

[efriedma]

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

3498

Not sure exactly where you're trying to add code to insert the pseudo-instructions, but maybe https://reviews.llvm.org/D125648 is helpful as reference?

[dpaoliello]

Remove the "scan back" for a jump table operand and replaced it with an explicit pseudo instruction

[dpaoliello]

Fix pseudo instruction getting dropped when building with all optimizations enabled

[dpaoliello]

Fix diff

[efriedma]

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

1587

Just to be on the safe side, I'd prefer to check for any arm/thumb target; I'm not sure we consistently end up with a "thumb" triple building for Thumb2. (You can assume any 32-bit ARM code on Windows is Thumb2; we don't support any targets other than windows 8/10.)

llvm/lib/Target/X86/X86ISelLowering.cpp

35744

Leftover debug code?

[dpaoliello]

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

1587

Per mapArchToCVCPUType (line 116 of this file), we only support thumb for ARM32 and any other value would result in a fatal error.

llvm/lib/Target/X86/X86ISelLowering.cpp

35744

Yep, will remove.

[dpaoliello]

Removed JUMP_TABLE_DEBUG_INFO from IsDebugInstr, this was causing the instruction to be moved or dropped incorrectly.

[dpaoliello]

Fix MIPS tests

[efriedma]

llvm/test/CodeGen/Mips/jumptable_labels.ll

1 ↗

(On Diff #534091)

What exactly was going wrong here? I guess we somehow assume we're emitting CodeView debug info, and then things explode?

Can we make the relevant codepaths check getCodeViewFlag() (which is apparently the canonical way to check according to AsmPrinter::doInitialization())?

[dpaoliello]

• Use getCodeViewFlag instead of isOSWindows to gate adding a jump table debug info node.
• Improve tests to workaround llvm-readobj not working for ARM32 correctly.

[dpaoliello]

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

3506

I've modified the test to check the assembly directly instead of using llvm-readobj: this also allows me to verify that the CodeView has the correct labels instead of verifying meaningless offsets.
I added another test case using llvm-readobj to make sure that the new symbol can be dumped correctly.

llvm/test/CodeGen/Mips/jumptable_labels.ll

1 ↗

(On Diff #534091)

Ah, ok, adding the jump table debug info node in TargetLowering::expandIndirectJTBranch was gated on isOSWindows which caused it to still be added for these tests. Changing it to getCodeViewFlag fixed the issue without having to change these tests.

[efriedma]

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

481

I apologize for the run-around on this, but I just realized we shouldn't use getCodeViewFlag() here because it'll cause codegen to change based on whether debug info is enabled, which we try to avoid.

Maybe just check isOSBinFormatCOFF().

[dpaoliello]

Change check in TargetLowering::expandIndirectJTBranch to isOSBinFormatCOFF

[dpaoliello]

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

481

No worries: done.

[dpaoliello]

Sync to HEAD

[dpaoliello]

Ping...

[efriedma]

LGTM

[erikdesjardins]

llvm/test/DebugInfo/COFF/jump-table.ll

4

This test is failing on the bots: https://lab.llvm.org/buildbot/#/builders/139/builds/48355

******************** TEST 'LLVM :: DebugInfo/COFF/jump-table.ll' FAILED ********************

<snip>

Exit Code: 2
Command Output (stderr):
--
/home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/build/bin/llc: error: unable to get target for 'aarch64-unknown-windows-msvc', see --version and --triple.

Please fix or revert.

[aeubanks]

this is causing crashes:

$ cat /tmp/a.ll
target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc19.34.0"

define i32 @f() !dbg !5 {
entry:
  indirectbr ptr null, [label %BC_SUCCEED]

BC_SUCCEED:                                       ; preds = %entry
  %0 = lshr i64 0, 0
  switch i64 %0, label %sw.default.i.i2445 [
    i64 3, label %sw.bb15.i.i
    i64 1, label %sw.bb7.i.i
    i64 2, label %sw.bb11.i.i2444
    i64 0, label %sw.bb3.i.i
  ]

sw.bb3.i.i:                                       ; preds = %BC_SUCCEED
  ret i32 0

sw.bb7.i.i:                                       ; preds = %BC_SUCCEED
  ret i32 0

sw.bb11.i.i2444:                                  ; preds = %BC_SUCCEED
  ret i32 0

sw.bb15.i.i:                                      ; preds = %BC_SUCCEED
  ret i32 0

sw.default.i.i2445:                               ; preds = %BC_SUCCEED
  ret i32 0
}

!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3, !4}

!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2, splitDebugInlining: false, nameTableKind: None)
!1 = !DIFile(filename: "../../v8/src/regexp\\regexp-interpreter.cc", directory: ".", checksumkind: CSK_MD5, checksum: "ddba353f72137fb1d64b5fc8ee071a9c")
!2 = !{}
!3 = !{i32 2, !"CodeView", i32 1}
!4 = !{i32 2, !"Debug Info Version", i32 3}
!5 = distinct !DISubprogram(name: "f", linkageName: "f", scope: !7, file: !6, line: 386, type: !10, scopeLine: 391, flags: DIFlagPrototyped, spFlags: DISPFlagLocalToUnit | DISPFlagDefinition | DISPFlagOptimized, unit: !0, templateParams: !2, retainedNodes: !2)
!6 = !DIFile(filename: "../../v8/src/regexp/regexp-interpreter.cc", directory: ".", checksumkind: CSK_MD5, checksum: "ddba353f72137fb1d64b5fc8ee071a9c")
!7 = !DINamespace(scope: !8)
!8 = !DINamespace(name: "internal", scope: !9)
!9 = !DINamespace(name: "v8", scope: null)
!10 = distinct !DISubroutineType(types: !2)
$ llc -o /dev/null /tmp/a.ll
llc: ../../llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp:3495: void forEachJumpTableBranch(const MachineFunction *, bool, const std::function<void (const MachineJumpTableInfo &, const MachineInstr &, int64_t)> &): Assertion `foundJTI' failed.

[aeubanks]

reverted in https://reviews.llvm.org/rG0a4fc4ac1c6e74eba7eb184d3da11772a06df65f, when relanding make sure to reland with the fixes mentioned in the revert description

[dpaoliello]

• Merged in test and build fixes.
• Changed assert to validate that all jump tables had an associated info instruction, rather than checking that all indirect branches have an JT info instruction

[aeubanks]

should be good to reland if you've fixed the crash

[dpaoliello]

Update to HEAD to fix build issue

llvm/include/llvm/CodeGen/AsmPrinter.h

 #include "llvm/ADT/DenseSet.h"
 #include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/BinaryFormat/Dwarf.h"
 #include "llvm/CodeGen/AsmPrinterHandler.h"
 #include "llvm/CodeGen/DwarfStringPoolEntry.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/StackMaps.h"
+#include "llvm/DebugInfo/CodeView/CodeView.h"
 #include "llvm/IR/InlineAsm.h"
 #include "llvm/Support/ErrorHandling.h"
 #include <cstdint>
 #include <memory>
 #include <utility>
 #include <vector>
 
 namespace llvm {
public:
   }
 
   void emitDwarfAbbrev(const DIEAbbrev &Abbrev) const;
 
   /// Recursively emit Dwarf DIE tree.
   void emitDwarfDIE(const DIE &Die) const;
 
   //===------------------------------------------------------------------===//
+  // CodeView Helper Routines
+  //===------------------------------------------------------------------===//
+
+  /// Gets information required to create a CodeView debug symbol for a jump
+  /// table.
+  /// Return value is <Base Address, Base Offset, Branch Address, Entry Size>
+  virtual std::tuple<const MCSymbol *, uint64_t, const MCSymbol *,
+                     codeview::JumpTableEntrySize>
+  getCodeViewJumpTableInfo(int JTI, const MachineInstr *BranchInstr,
+                           const MCSymbol *BranchLabel) const;
+
+  //===------------------------------------------------------------------===//
   // Inline Asm Support
   //===------------------------------------------------------------------===//
 
   // These are hooks that targets can override to implement inline asm
   // support.  These should probably be moved out of AsmPrinter someday.
 
   /// Print information related to the specified machine instr that is
   /// independent of the operand, and may be independent of the instr itself.

llvm/include/llvm/CodeGen/ISDOpcodes.h

   /// is the value to branch to, which must be of the same type as the
   /// target's pointer type.
   BRIND,
 
   /// BR_JT - Jumptable branch. The first operand is the chain, the second
   /// is the jumptable index, the last one is the jumptable entry index.
   BR_JT,
 
+  /// JUMP_TABLE_DEBUG_INFO - Jumptable debug info. The first operand is the
+  /// chain, the second is the jumptable index.
+  JUMP_TABLE_DEBUG_INFO,
+
   /// BRCOND - Conditional branch.  The first operand is the chain, the
   /// second is the condition, the third is the block to branch to if the
   /// condition is true.  If the type of the condition is not i1, then the
   /// high bits must conform to getBooleanContents. If the condition is undef,
   /// it nondeterministically jumps to the block.
   /// TODO: Its semantics w.r.t undef requires further discussion; we need to
   /// make it sure that it is consistent with optimizations in MIR & the
   /// meaning of IMPLICIT_DEF. See https://reviews.llvm.org/D92015

llvm/include/llvm/CodeGen/MachineInstr.h

if (!isDebugValue())
       return false;
     // If any $noreg locations are given, this DV is undef.
     for (const MachineOperand &Op : debug_operands())
       if (Op.isReg() && !Op.getReg().isValid())
         return true;
     return false;
   }
 
+  bool isJumpTableDebugInfo() const {
+    return getOpcode() == TargetOpcode::JUMP_TABLE_DEBUG_INFO;
+  }
+
   bool isPHI() const {
     return getOpcode() == TargetOpcode::PHI ||
            getOpcode() == TargetOpcode::G_PHI;
   }
   bool isKill() const { return getOpcode() == TargetOpcode::KILL; }
   bool isImplicitDef() const { return getOpcode()==TargetOpcode::IMPLICIT_DEF; }
   bool isInlineAsm() const {
     return getOpcode() == TargetOpcode::INLINEASM ||

llvm/include/llvm/CodeGen/SelectionDAG.h

#endif
   SDValue getTargetFrameIndex(int FI, EVT VT) {
     return getFrameIndex(FI, VT, true);
   }
   SDValue getJumpTable(int JTI, EVT VT, bool isTarget = false,
                        unsigned TargetFlags = 0);
   SDValue getTargetJumpTable(int JTI, EVT VT, unsigned TargetFlags = 0) {
     return getJumpTable(JTI, VT, true, TargetFlags);
   }
+  SDValue getJumpTableDebugInfo(int JTI, SDValue Chain, const SDLoc &DL);
   SDValue getConstantPool(const Constant *C, EVT VT,
                           MaybeAlign Align = std::nullopt, int Offs = 0,
                           bool isT = false, unsigned TargetFlags = 0);
   SDValue getTargetConstantPool(const Constant *C, EVT VT,
                                 MaybeAlign Align = std::nullopt, int Offset = 0,
                                 unsigned TargetFlags = 0) {
     return getConstantPool(C, VT, Align, Offset, true, TargetFlags);
   }

llvm/include/llvm/CodeGen/SelectionDAGISel.h

private:
   void Select_ARITH_FENCE(SDNode *N);
   void Select_MEMBARRIER(SDNode *N);
 
   void pushStackMapLiveVariable(SmallVectorImpl<SDValue> &Ops, SDValue Operand,
                                 SDLoc DL);
   void Select_STACKMAP(SDNode *N);
   void Select_PATCHPOINT(SDNode *N);
 
+  void Select_JUMP_TABLE_DEBUG_INFO(SDNode *N);
+
 private:
   void DoInstructionSelection();
   SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
                     ArrayRef<SDValue> Ops, unsigned EmitNodeInfo);
 
   /// Prepares the landing pad to take incoming values or do other EH
   /// personality specific tasks. Returns true if the block should be
   /// instruction selected, false if no code should be emitted for it.

llvm/include/llvm/CodeGen/TargetLowering.h

virtual SDValue emitStackGuardXorFP(SelectionDAG &DAG, SDValue Val,
     llvm_unreachable("not implemented for this target");
   }
 
   /// Lower TLS global address SDNode for target independent emulated TLS model.
   virtual SDValue LowerToTLSEmulatedModel(const GlobalAddressSDNode *GA,
                                           SelectionDAG &DAG) const;
 
   /// Expands target specific indirect branch for the case of JumpTable
-  /// expanasion.
-  virtual SDValue expandIndirectJTBranch(const SDLoc& dl, SDValue Value, SDValue Addr,
-                                         SelectionDAG &DAG) const {
-    return DAG.getNode(ISD::BRIND, dl, MVT::Other, Value, Addr);
-  }
+  /// expansion.
+  virtual SDValue expandIndirectJTBranch(const SDLoc &dl, SDValue Value,
+                                         SDValue Addr, int JTI,
+                                         SelectionDAG &DAG) const;
 
   // seteq(x, 0) -> truncate(srl(ctlz(zext(x)), log2(#bits)))
   // If we're comparing for equality to zero and isCtlzFast is true, expose the
   // fact that this can be implemented as a ctlz/srl pair, so that the dag
   // combiner can fold the new nodes.
   SDValue lowerCmpEqZeroToCtlzSrl(SDValue Op, SelectionDAG &DAG) const;
 
   // Return true if `X & Y eq/ne 0` is preferable to `X & Y ne/eq Y`

llvm/include/llvm/DebugInfo/CodeView/CodeView.h

 
 enum class CodeViewContainer { ObjectFile, Pdb };
 
 inline uint32_t alignOf(CodeViewContainer Container) {
   if (Container == CodeViewContainer::ObjectFile)
     return 1;
   return 4;
 }
+
+// Corresponds to CV_armswitchtype enum.
+// This enum represents the different ways that jump tables entries can be
+// encoded to represent the target address to jump to.
+// * Pointer: The absolute address to jump to.
+// * [U]Int[8|16|32]: A value that is added to some "base" address to get the
+//    address to jump to.
+// * [U]Int[8|16]ShiftLeft: A value that is shifted left by an implementation
+//    specified amount, then added to some "base" address to get the address to
+//    jump to.
+enum class JumpTableEntrySize : uint16_t {
+  Int8 = 0,
+  UInt8 = 1,
+  Int16 = 2,
+  UInt16 = 3,
+  Int32 = 4,
+  UInt32 = 5,
+  Pointer = 6,
+  UInt8ShiftLeft = 7,
+  UInt16ShiftLeft = 8,
+  Int8ShiftLeft = 9,
+  Int16ShiftLeft = 10,
+};
 }
 }
 
 #endif

llvm/include/llvm/DebugInfo/CodeView/CodeViewSymbols.def

 CV_SYMBOL(S_GPROCIA64_ID   , 0x114b)
 
 CV_SYMBOL(S_DEFRANGE_HLSL  , 0x1150)
 CV_SYMBOL(S_GDATA_HLSL     , 0x1151)
 CV_SYMBOL(S_LDATA_HLSL     , 0x1152)
 CV_SYMBOL(S_LOCAL_DPC_GROUPSHARED, 0x1154)
 CV_SYMBOL(S_DEFRANGE_DPC_PTR_TAG, 0x1157)
 CV_SYMBOL(S_DPC_SYM_TAG_MAP, 0x1158)
-CV_SYMBOL(S_ARMSWITCHTABLE , 0x1159)
 CV_SYMBOL(S_POGODATA       , 0x115c)
 CV_SYMBOL(S_INLINESITE2    , 0x115d)
 CV_SYMBOL(S_MOD_TYPEREF    , 0x115f)
 CV_SYMBOL(S_REF_MINIPDB    , 0x1160)
 CV_SYMBOL(S_PDBMAP         , 0x1161)
 CV_SYMBOL(S_GDATA_HLSL32   , 0x1162)
 CV_SYMBOL(S_LDATA_HLSL32   , 0x1163)
 CV_SYMBOL(S_GDATA_HLSL32_EX, 0x1164)

 SYMBOL_RECORD(S_COMPILE2      , 0x1116, Compile2Sym)
 SYMBOL_RECORD(S_COMPILE3      , 0x113c, Compile3Sym)
 SYMBOL_RECORD(S_FRAMEPROC     , 0x1012, FrameProcSym)
 SYMBOL_RECORD(S_CALLSITEINFO  , 0x1139, CallSiteInfoSym)
 SYMBOL_RECORD(S_FILESTATIC     , 0x1153, FileStaticSym)
 SYMBOL_RECORD(S_HEAPALLOCSITE  , 0x115e, HeapAllocationSiteSym)
 SYMBOL_RECORD(S_FRAMECOOKIE   , 0x113a, FrameCookieSym)
 
+SYMBOL_RECORD(S_ARMSWITCHTABLE, 0x1159, JumpTableSym)
+
 SYMBOL_RECORD(S_CALLEES        , 0x115a, CallerSym)
 SYMBOL_RECORD_ALIAS(S_CALLERS, 0x115b, CalleeSym, CallerSym)
 
 SYMBOL_RECORD(S_UDT           , 0x1108, UDTSym)
 SYMBOL_RECORD_ALIAS(S_COBOLUDT      , 0x1109, CobolUDT, UDTSym)
 
 SYMBOL_RECORD(S_BUILDINFO      , 0x114c, BuildInfoSym)
 SYMBOL_RECORD(S_BPREL32       , 0x110b, BPRelativeSym)

llvm/include/llvm/DebugInfo/CodeView/EnumTables.h

 ArrayRef<EnumEntry<uint16_t>> getMemberKindNames();
 ArrayRef<EnumEntry<uint8_t>> getPtrKindNames();
 ArrayRef<EnumEntry<uint8_t>> getPtrModeNames();
 ArrayRef<EnumEntry<uint16_t>> getPtrMemberRepNames();
 ArrayRef<EnumEntry<uint16_t>> getTypeModifierNames();
 ArrayRef<EnumEntry<uint8_t>> getCallingConventions();
 ArrayRef<EnumEntry<uint8_t>> getFunctionOptionEnum();
 ArrayRef<EnumEntry<uint16_t>> getLabelTypeEnum();
+ArrayRef<EnumEntry<uint16_t>> getJumpTableEntrySizeNames();
 
 } // end namespace codeview
 } // end namespace llvm
 
 #endif // LLVM_DEBUGINFO_CODEVIEW_ENUMTABLES_H

llvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h

 public:
   explicit ScopeEndSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
   ScopeEndSym(SymbolRecordKind Kind, uint32_t RecordOffset)
       : SymbolRecord(Kind), RecordOffset(RecordOffset) {}
 
   uint32_t RecordOffset = 0;
 };
 
+class JumpTableSym : public SymbolRecord {
+public:
+  explicit JumpTableSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
+  JumpTableSym(uint32_t RecordOffset)
+      : SymbolRecord(SymbolRecordKind::JumpTableSym),
+        RecordOffset(RecordOffset) {}
+
+  uint32_t BaseOffset = 0;
+  uint16_t BaseSegment = 0;
+
+  JumpTableEntrySize SwitchType;
+  uint32_t BranchOffset = 0;
+  uint32_t TableOffset = 0;
+  uint16_t BranchSegment = 0;
+  uint16_t TableSegment = 0;
+
+  uint32_t EntriesCount = 0;
+
+  uint32_t RecordOffset = 0;
+};
+
 class CallerSym : public SymbolRecord {
 public:
   explicit CallerSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
   CallerSym(SymbolRecordKind Kind, uint32_t RecordOffset)
       : SymbolRecord(Kind), RecordOffset(RecordOffset) {}
 
   std::vector<TypeIndex> Indices;
 

llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.h

public:
   Error visitKnownRecord(CVSymbol &Record, LocalSym &Local) override;
   Error visitKnownRecord(CVSymbol &Record, ObjNameSym &ObjName) override;
   Error visitKnownRecord(CVSymbol &Record, ProcSym &Proc) override;
   Error visitKnownRecord(CVSymbol &Record, RegRelativeSym &Local) override;
   Error visitKnownRecord(CVSymbol &Record, ScopeEndSym &ScopeEnd) override;
   Error visitKnownRecord(CVSymbol &Record, Thunk32Sym &Thunk) override;
   Error visitKnownRecord(CVSymbol &Record, UDTSym &UDT) override;
   Error visitKnownRecord(CVSymbol &Record, UsingNamespaceSym &UN) override;
+  Error visitKnownRecord(CVSymbol &Record, JumpTableSym &JumpTable) override;
 };
 
 // Visitor for CodeView types and symbols to populate elements.
 class LVLogicalVisitor final {
   LVCodeViewReader *Reader;
   ScopedPrinter &W;
 
   // Encapsulates access to the input file and any dependent type server,

llvm/include/llvm/Support/TargetOpcodes.def

 HANDLE_TARGET_OPCODE(PATCHABLE_TYPED_EVENT_CALL)
 
 HANDLE_TARGET_OPCODE(ICALL_BRANCH_FUNNEL)
 
 // This is a fence with the singlethread scope. It represents a compiler memory
 // barrier, but does not correspond to any generated instruction.
 HANDLE_TARGET_OPCODE(MEMBARRIER)
 
+// Provides information about what jump table the following indirect branch is
+// using.
+HANDLE_TARGET_OPCODE(JUMP_TABLE_DEBUG_INFO)
+
 /// The following generic opcodes are not supposed to appear after ISel.
 /// This is something we might want to relax, but for now, this is convenient
 /// to produce diagnostics.
 
 /// Instructions which should not exist past instruction selection, but do not
 /// generate code. These instructions only act as optimization hints.
 HANDLE_TARGET_OPCODE(G_ASSERT_SEXT)
 HANDLE_TARGET_OPCODE(G_ASSERT_ZEXT)

llvm/include/llvm/Target/Target.td

 def MEMBARRIER : StandardPseudoInstruction {
   let OutOperandList = (outs);
   let InOperandList = (ins);
   let AsmString = "";
   let hasSideEffects = true;
   let Size = 0;
   let isMeta = true;
 }
+def JUMP_TABLE_DEBUG_INFO : StandardPseudoInstruction {
+  let OutOperandList = (outs);
+  let InOperandList = (ins i64imm:$jti);
+  let AsmString = "";
+  let hasSideEffects = false;
+  let Size = 0;
+  let isMeta = true;
+}
 
 // Generic opcodes used in GlobalISel.
 include "llvm/Target/GenericOpcodes.td"
 
 //===----------------------------------------------------------------------===//
 // AsmParser - This class can be implemented by targets that wish to implement
 // .s file parsing.
 //

llvm/include/llvm/Target/TargetSelectionDAG.td

def prefetch   : SDNode<"ISD::PREFETCH"   , SDTPrefetch,
                          SDNPMemOperand]>;
 
 def readcyclecounter : SDNode<"ISD::READCYCLECOUNTER", SDTIntLeaf,
                      [SDNPHasChain, SDNPSideEffect]>;
 
 def membarrier : SDNode<"ISD::MEMBARRIER", SDTNone,
                         [SDNPHasChain, SDNPSideEffect]>;
 
+def jump_table_debug_info : SDNode<"ISD::JUMP_TABLE_DEBUG_INFO", SDTNone,
+                        [SDNPHasChain]>;
+
 def atomic_fence : SDNode<"ISD::ATOMIC_FENCE" , SDTAtomicFence,
                           [SDNPHasChain, SDNPSideEffect]>;
 
 def atomic_cmp_swap : SDNode<"ISD::ATOMIC_CMP_SWAP" , SDTAtomic3,
                     [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
 def atomic_load_add : SDNode<"ISD::ATOMIC_LOAD_ADD" , SDTAtomic2,
                     [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
 def atomic_swap     : SDNode<"ISD::ATOMIC_SWAP", SDTAtomic2,

llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp

for (auto &MI : MBB) {
         break;
       case TargetOpcode::ARITH_FENCE:
         if (isVerbose())
           OutStreamer->emitRawComment("ARITH_FENCE");
         break;
       case TargetOpcode::MEMBARRIER:
         OutStreamer->emitRawComment("MEMBARRIER");
         break;
+      case TargetOpcode::JUMP_TABLE_DEBUG_INFO:
+        // This instruction is only used to note jump table debug info, it's
+        // purely meta information.
+        break;
       default:
         emitInstruction(&MI);
         if (CanDoExtraAnalysis) {
           MCInst MCI;
           MCI.setOpcode(MI.getOpcode());
           auto Name = OutStreamer->getMnemonic(MCI);
           auto I = MnemonicCounts.insert({Name, 0u});
           I.first->second++;
return {getDwarfVersion(), uint8_t(MAI->getCodePointerSize()),
           OutStreamer->getContext().getDwarfFormat(),
           doesDwarfUseRelocationsAcrossSections()};
 }
 
 unsigned int AsmPrinter::getUnitLengthFieldByteSize() const {
   return dwarf::getUnitLengthFieldByteSize(
       OutStreamer->getContext().getDwarfFormat());
 }
+
+std::tuple<const MCSymbol *, uint64_t, const MCSymbol *,
+           codeview::JumpTableEntrySize>
+AsmPrinter::getCodeViewJumpTableInfo(int JTI, const MachineInstr *BranchInstr,
+                                     const MCSymbol *BranchLabel) const {
+  const auto TLI = MF->getSubtarget().getTargetLowering();
+  const auto BaseExpr =
+      TLI->getPICJumpTableRelocBaseExpr(MF, JTI, MMI->getContext());
+  const auto Base = &cast<MCSymbolRefExpr>(BaseExpr)->getSymbol();
+
+  // By default, for the architectures that support CodeView,
+  // EK_LabelDifference32 is implemented as an Int32 from the base address.
+  return std::make_tuple(Base, 0, BranchLabel,
+                         codeview::JumpTableEntrySize::Int32);
+}

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h

 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/DenseSet.h"
 #include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/PointerUnion.h"
 #include "llvm/ADT/SetVector.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/CodeGen/DbgEntityHistoryCalculator.h"
 #include "llvm/CodeGen/DebugHandlerBase.h"
+#include "llvm/CodeGen/MachineJumpTableInfo.h"
 #include "llvm/DebugInfo/CodeView/CodeView.h"
 #include "llvm/DebugInfo/CodeView/GlobalTypeTableBuilder.h"
 #include "llvm/DebugInfo/CodeView/TypeIndex.h"
 #include "llvm/IR/DebugLoc.h"
 #include "llvm/Support/Allocator.h"
 #include "llvm/Support/Compiler.h"
 #include <cstdint>
 #include <map>
struct LexicalBlock {
     SmallVector<LocalVariable, 1> Locals;
     SmallVector<CVGlobalVariable, 1> Globals;
     SmallVector<LexicalBlock *, 1> Children;
     const MCSymbol *Begin;
     const MCSymbol *End;
     StringRef Name;
   };
 
+  struct JumpTableInfo {
+    codeview::JumpTableEntrySize EntrySize;
+    const MCSymbol *Base;
+    uint64_t BaseOffset;
+    const MCSymbol *Branch;
+    const MCSymbol *Table;
+    size_t TableSize;
+  };
+
   // For each function, store a vector of labels to its instructions, as well as
   // to the end of the function.
   struct FunctionInfo {
     FunctionInfo() = default;
 
     // Uncopyable.
     FunctionInfo(const FunctionInfo &FI) = delete;
 
struct FunctionInfo {
 
     // Lexical blocks containing local variables.
     SmallVector<LexicalBlock *, 1> ChildBlocks;
 
     std::vector<std::pair<MCSymbol *, MDNode *>> Annotations;
     std::vector<std::tuple<const MCSymbol *, const MCSymbol *, const DIType *>>
         HeapAllocSites;
 
+    std::vector<JumpTableInfo> JumpTables;
+
     const MCSymbol *Begin = nullptr;
     const MCSymbol *End = nullptr;
     unsigned FuncId = 0;
     unsigned LastFileId = 0;
 
     /// Number of bytes allocated in the prologue for all local stack objects.
     unsigned FrameSize = 0;
 
private:
   const DISubprogram *
   collectParentScopeNames(const DIScope *Scope,
                           SmallVectorImpl<StringRef> &ParentScopeNames);
   std::string getFullyQualifiedName(const DIScope *Scope, StringRef Name);
   std::string getFullyQualifiedName(const DIScope *Scope);
 
   unsigned getPointerSizeInBytes();
 
+  void discoverJumpTableBranches(const MachineFunction *MF, bool isThumb);
+  void collectDebugInfoForJumpTables(const MachineFunction *MF, bool isThumb);
+  void emitDebugInfoForJumpTables(const FunctionInfo &FI);
+
 protected:
   /// Gather pre-function debug information.
   void beginFunctionImpl(const MachineFunction *MF) override;
 
   /// Gather post-function debug information.
   void endFunctionImpl(const MachineFunction *) override;
 
   /// Check if the current module is in Fortran.

llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

 //===- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp ----------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains support for writing Microsoft CodeView debug info.
 //
 //===----------------------------------------------------------------------===//
 
 #include "CodeViewDebug.h"
 #include "llvm/ADT/APSInt.h"
 #include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/SmallBitVector.h"
 #include "llvm/ADT/SmallString.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/TinyPtrVector.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/BinaryFormat/COFF.h"
 #include "llvm/BinaryFormat/Dwarf.h"
 #include "llvm/CodeGen/AsmPrinter.h"
 #include "llvm/CodeGen/LexicalScopes.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/TargetFrameLowering.h"
+#include "llvm/CodeGen/TargetLowering.h"
 #include "llvm/CodeGen/TargetRegisterInfo.h"
 #include "llvm/CodeGen/TargetSubtargetInfo.h"
 #include "llvm/Config/llvm-config.h"
 #include "llvm/DebugInfo/CodeView/CVTypeVisitor.h"
 #include "llvm/DebugInfo/CodeView/CodeViewRecordIO.h"
 #include "llvm/DebugInfo/CodeView/ContinuationRecordBuilder.h"
 #include "llvm/DebugInfo/CodeView/DebugInlineeLinesSubsection.h"
 #include "llvm/DebugInfo/CodeView/EnumTables.h"
for (auto HeapAllocSite : FI.HeapAllocSites) {
       OS.AddComment("Type index");
       OS.emitInt32(getCompleteTypeIndex(DITy).getIndex());
       endSymbolRecord(HeapAllocEnd);
     }
 
     if (SP != nullptr)
       emitDebugInfoForUDTs(LocalUDTs);
 
+    emitDebugInfoForJumpTables(FI);
+
     // We're done with this function.
     emitEndSymbolRecord(SymbolKind::S_PROC_ID_END);
   }
   endCVSubsection(SymbolsEnd);
 
   // We have an assembler directive that takes care of the whole line table.
   OS.emitCVLinetableDirective(FI.FuncId, Fn, FI.End);
 }
void CodeViewDebug::beginFunctionImpl(const MachineFunction *MF) {
   for (const auto &MBB : *MF) {
     for (const auto &MI : MBB) {
       if (MI.getHeapAllocMarker()) {
         requestLabelBeforeInsn(&MI);
         requestLabelAfterInsn(&MI);
       }
     }
   }
+
+  // Mark branches that may potentially be using jump tables with labels.
+  bool isThumb = Triple(MMI->getModule()->getTargetTriple()).getArch() ==
+                 llvm::Triple::ArchType::thumb;
+  discoverJumpTableBranches(MF, isThumb);
 }
 
 static bool shouldEmitUdt(const DIType *T) {
   if (!T)
     return false;
 
   // MSVC does not emit UDTs for typedefs that are scoped to classes.
   if (T->getTag() == dwarf::DW_TAG_typedef) {
for (const auto &MI : MBB) {
       if (MDNode *MD = MI.getHeapAllocMarker()) {
         CurFn->HeapAllocSites.push_back(std::make_tuple(getLabelBeforeInsn(&MI),
                                                         getLabelAfterInsn(&MI),
                                                         dyn_cast<DIType>(MD)));
       }
     }
   }
 
+  bool isThumb = Triple(MMI->getModule()->getTargetTriple()).getArch() ==
+                 llvm::Triple::ArchType::thumb;
+  collectDebugInfoForJumpTables(MF, isThumb);
+
   CurFn->Annotations = MF->getCodeViewAnnotations();
 
   CurFn->End = Asm->getFunctionEnd();
 
   CurFn = nullptr;
 }
 
 // Usable locations are valid with non-zero line numbers. A line number of zero
if (const GlobalVariable *GV =
     // Use unsigned for floats.
     bool isUnsigned = isFloatDIType(DIGV->getType())
                           ? true
                           : DebugHandlerBase::isUnsignedDIType(DIGV->getType());
     APSInt Value(APInt(/*BitWidth=*/64, DIE->getElement(1)), isUnsigned);
     emitConstantSymbolRecord(DIGV->getType(), Value, QualifiedName);
   }
 }
+
+void forEachJumpTableBranch(
+    const MachineFunction *MF, bool isThumb,
+    const std::function<void(const MachineJumpTableInfo &, const MachineInstr &,
+                             int64_t)> &Callback) {
+  auto JTI = MF->getJumpTableInfo();
+  if (JTI && !JTI->isEmpty()) {
+#ifndef NDEBUG
+    auto UsedJTs = llvm::SmallBitVector(JTI->getJumpTables().size());
+#endif
+    for (const auto &MBB : *MF) {
+      // Search for indirect branches...
+      const auto LastMI = MBB.getFirstTerminator();
+      if (LastMI != MBB.end() && LastMI->isIndirectBranch()) {
+        if (isThumb) {
+          // ... that directly use jump table operands.
+          // NOTE: ARM uses pattern matching to lower its BR_JT SDNode to
+          // machine instructions, hence inserting a JUMP_TABLE_DEBUG_INFO node
+          // interferes with this process *but* the resulting pseudo-instruction
+          // uses a Jump Table operand, so extract the jump table index directly
+          // from that.
+          for (const auto &MO : LastMI->operands()) {
+            if (MO.isJTI()) {
+              unsigned Index = MO.getIndex();
+#ifndef NDEBUG
+              UsedJTs.set(Index);
+#endif
+              Callback(*JTI, *LastMI, Index);
+              break;
+            }
+          }
+        } else {
+          // ... that have jump table debug info.
+          // NOTE: The debug info is inserted as a JUMP_TABLE_DEBUG_INFO node
+          // when lowering the BR_JT SDNode to an indirect branch.
+          for (auto I = MBB.instr_rbegin(), E = MBB.instr_rend(); I != E; ++I) {
+            if (I->isJumpTableDebugInfo()) {
+              unsigned Index = I->getOperand(0).getImm();
+#ifndef NDEBUG
+              UsedJTs.set(Index);
+#endif
+              Callback(*JTI, *LastMI, Index);
+              break;
+            }
+          }
+        }
+      }
+    }
+#ifndef NDEBUG
+    assert(UsedJTs.all() &&
+           "Some of jump tables were not used in a debug info instruction");
+#endif
+  }
+}
+
+void CodeViewDebug::discoverJumpTableBranches(const MachineFunction *MF,
+                                              bool isThumb) {
+  forEachJumpTableBranch(
+      MF, isThumb,
+      [this](const MachineJumpTableInfo &, const MachineInstr &BranchMI,
+             int64_t) { requestLabelBeforeInsn(&BranchMI); });
+}
+
+void CodeViewDebug::collectDebugInfoForJumpTables(const MachineFunction *MF,
+                                                  bool isThumb) {
+  forEachJumpTableBranch(
+      MF, isThumb,
+      [this, MF](const MachineJumpTableInfo &JTI, const MachineInstr &BranchMI,
+                 int64_t JumpTableIndex) {
+        // For label-difference jump tables, find the base expression.
+        // Otherwise the jump table uses an absolute address (so no base
+        // is required).
+        const MCSymbol *Base;
+        uint64_t BaseOffset = 0;
+        const MCSymbol *Branch = getLabelBeforeInsn(&BranchMI);
+        JumpTableEntrySize EntrySize;
+        switch (JTI.getEntryKind()) {
+        case MachineJumpTableInfo::EK_Custom32:
+        case MachineJumpTableInfo::EK_GPRel32BlockAddress:
+        case MachineJumpTableInfo::EK_GPRel64BlockAddress:
+          llvm_unreachable(
+              "EK_Custom32, EK_GPRel32BlockAddress, and "
+              "EK_GPRel64BlockAddress should never be emitted for COFF");
+        case MachineJumpTableInfo::EK_BlockAddress:
+          // Each entry is an absolute address.
+          EntrySize = JumpTableEntrySize::Pointer;
+          Base = nullptr;
+          break;
+        case MachineJumpTableInfo::EK_Inline:
+        case MachineJumpTableInfo::EK_LabelDifference32:
+          // Ask the AsmPrinter.
+          std::tie(Base, BaseOffset, Branch, EntrySize) =
+              Asm->getCodeViewJumpTableInfo(JumpTableIndex, &BranchMI, Branch);
+          break;
+        }
+
+        CurFn->JumpTables.push_back(
+            {EntrySize, Base, BaseOffset, Branch,
+             MF->getJTISymbol(JumpTableIndex, MMI->getContext()),
+             JTI.getJumpTables()[JumpTableIndex].MBBs.size()});
+      });
+}
+
+void CodeViewDebug::emitDebugInfoForJumpTables(const FunctionInfo &FI) {
+  for (auto JumpTable : FI.JumpTables) {
+    MCSymbol *JumpTableEnd = beginSymbolRecord(SymbolKind::S_ARMSWITCHTABLE);
+    if (JumpTable.Base) {
+      OS.AddComment("Base offset");
+      OS.emitCOFFSecRel32(JumpTable.Base, JumpTable.BaseOffset);
+      OS.AddComment("Base section index");
+      OS.emitCOFFSectionIndex(JumpTable.Base);
+    } else {
+      OS.AddComment("Base offset");
+      OS.emitInt32(0);
+      OS.AddComment("Base section index");
+      OS.emitInt16(0);
+    }
+    OS.AddComment("Switch type");
+    OS.emitInt16(static_cast<uint16_t>(JumpTable.EntrySize));
+    OS.AddComment("Branch offset");
+    OS.emitCOFFSecRel32(JumpTable.Branch, /*Offset=*/0);
+    OS.AddComment("Table offset");
+    OS.emitCOFFSecRel32(JumpTable.Table, /*Offset=*/0);
+    OS.AddComment("Branch section index");
+    OS.emitCOFFSectionIndex(JumpTable.Branch);
+    OS.AddComment("Table section index");
+    OS.emitCOFFSectionIndex(JumpTable.Table);
+    OS.AddComment("Entries count");
+    OS.emitInt32(JumpTable.TableSize);
+    endSymbolRecord(JumpTableEnd);
+  }
+}

llvm/lib/CodeGen/MachineCSE.cpp

while (LookAheadLeft) {
     ++I;
   }
 
   return false;
 }
 
 bool MachineCSE::isCSECandidate(MachineInstr *MI) {
   if (MI->isPosition() || MI->isPHI() || MI->isImplicitDef() || MI->isKill() ||
-      MI->isInlineAsm() || MI->isDebugInstr())
+      MI->isInlineAsm() || MI->isDebugInstr() || MI->isJumpTableDebugInfo())
     return false;
 
   // Ignore copies.
   if (MI->isCopyLike())
     return false;
 
   // Ignore stuff that we obviously can't move.
   if (MI->mayStore() || MI->isCall() || MI->isTerminator() ||

llvm/lib/CodeGen/MachineInstr.cpp

bool MachineInstr::isSafeToMove(AAResults *AA, bool &SawStore) const {
   // a load across an atomic load with Ordering > Monotonic.
   if (mayStore() || isCall() || isPHI() ||
       (mayLoad() && hasOrderedMemoryRef())) {
     SawStore = true;
     return false;
   }
 
   if (isPosition() || isDebugInstr() || isTerminator() ||
-      mayRaiseFPException() || hasUnmodeledSideEffects())
+      mayRaiseFPException() || hasUnmodeledSideEffects() ||
+      isJumpTableDebugInfo())
     return false;
 
   // See if this instruction does a load.  If so, we have to guarantee that the
   // loaded value doesn't change between the load and the its intended
   // destination. The check for isInvariantLoad gives the target the chance to
   // classify the load as always returning a constant, e.g. a constant pool
   // load.
   if (mayLoad() && !isDereferenceableInvariantLoad())

llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

case ISD::SELECT:
     }
     Tmp1->setFlags(Node->getFlags());
     Results.push_back(Tmp1);
     break;
   case ISD::BR_JT: {
     SDValue Chain = Node->getOperand(0);
     SDValue Table = Node->getOperand(1);
     SDValue Index = Node->getOperand(2);
+    int JTI = cast<JumpTableSDNode>(Table.getNode())->getIndex();
 
     const DataLayout &TD = DAG.getDataLayout();
     EVT PTy = TLI.getPointerTy(TD);
 
     unsigned EntrySize =
       DAG.getMachineFunction().getJumpTableInfo()->getEntrySize(TD);
 
     // For power-of-two jumptable entry sizes convert multiplication to a shift.
case ISD::BR_JT: {
     if (TLI.isJumpTableRelative()) {
       // For PIC, the sequence is:
       // BRIND(load(Jumptable + index) + RelocBase)
       // RelocBase can be JumpTable, GOT or some sort of global base.
       Addr = DAG.getNode(ISD::ADD, dl, PTy, Addr,
                           TLI.getPICJumpTableRelocBase(Table, DAG));
     }
 
-    Tmp1 = TLI.expandIndirectJTBranch(dl, LD.getValue(1), Addr, DAG);
+    Tmp1 = TLI.expandIndirectJTBranch(dl, LD.getValue(1), Addr, JTI, DAG);
     Results.push_back(Tmp1);
     break;
   }
   case ISD::BRCOND:
     // Expand brcond's setcc into its constituent parts and create a BR_CC
     // Node.
     Tmp1 = Node->getOperand(0);
     Tmp2 = Node->getOperand(1);

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

if (SDNode *E = FindNodeOrInsertPos(ID, IP))
     return SDValue(E, 0);
 
   auto *N = newSDNode<JumpTableSDNode>(JTI, VT, isTarget, TargetFlags);
   CSEMap.InsertNode(N, IP);
   InsertNode(N);
   return SDValue(N, 0);
 }
 
+SDValue SelectionDAG::getJumpTableDebugInfo(int JTI, SDValue Chain,
+                                            const SDLoc &DL) {
+  EVT PTy = getTargetLoweringInfo().getPointerTy(getDataLayout());
+  return getNode(ISD::JUMP_TABLE_DEBUG_INFO, DL, MVT::Glue, Chain,
+                 getTargetConstant(static_cast<uint64_t>(JTI), DL, PTy, true));
+}
+
 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
                                       MaybeAlign Alignment, int Offset,
                                       bool isTarget, unsigned TargetFlags) {
   assert((TargetFlags == 0 || isTarget) &&
          "Cannot set target flags on target-independent globals");
   if (!Alignment)
     Alignment = shouldOptForSize()
                     ? getDataLayout().getABITypeAlign(C->getType())

llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

case ISD::Constant:
     if (cast<ConstantSDNode>(this)->isOpaque())
       return "OpaqueConstant";
     return "Constant";
   case ISD::ConstantFP:                 return "ConstantFP";
   case ISD::GlobalAddress:              return "GlobalAddress";
   case ISD::GlobalTLSAddress:           return "GlobalTLSAddress";
   case ISD::FrameIndex:                 return "FrameIndex";
   case ISD::JumpTable:                  return "JumpTable";
+  case ISD::JUMP_TABLE_DEBUG_INFO:
+    return "JUMP_TABLE_DEBUG_INFO";
   case ISD::GLOBAL_OFFSET_TABLE:        return "GLOBAL_OFFSET_TABLE";
   case ISD::RETURNADDR:                 return "RETURNADDR";
   case ISD::ADDROFRETURNADDR:           return "ADDROFRETURNADDR";
   case ISD::FRAMEADDR:                  return "FRAMEADDR";
   case ISD::SPONENTRY:                  return "SPONENTRY";
   case ISD::LOCAL_RECOVER:              return "LOCAL_RECOVER";
   case ISD::READ_REGISTER:              return "READ_REGISTER";
   case ISD::WRITE_REGISTER:             return "WRITE_REGISTER";

llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

do {
     NextBits = MatcherTable[Idx++];
     Val |= (NextBits&127) << Shift;
     Shift += 7;
   } while (NextBits & 128);
 
   return Val;
 }
 
+void SelectionDAGISel::Select_JUMP_TABLE_DEBUG_INFO(SDNode *N) {
+  SDLoc dl(N);
+  CurDAG->SelectNodeTo(N, TargetOpcode::JUMP_TABLE_DEBUG_INFO, MVT::Glue,
+                       CurDAG->getTargetConstant(N->getConstantOperandVal(1),
+                                                 dl, MVT::i64, true));
+}
+
 /// When a match is complete, this method updates uses of interior chain results
 /// to use the new results.
 void SelectionDAGISel::UpdateChains(
     SDNode *NodeToMatch, SDValue InputChain,
     SmallVectorImpl<SDNode *> &ChainNodesMatched, bool isMorphNodeTo) {
   SmallVector<SDNode*, 4> NowDeadNodes;
 
   // Now that all the normal results are replaced, we replace the chain and
case ISD::MEMBARRIER:
     Select_MEMBARRIER(NodeToMatch);
     return;
   case ISD::STACKMAP:
     Select_STACKMAP(NodeToMatch);
     return;
   case ISD::PATCHPOINT:
     Select_PATCHPOINT(NodeToMatch);
     return;
+  case ISD::JUMP_TABLE_DEBUG_INFO:
+    Select_JUMP_TABLE_DEBUG_INFO(NodeToMatch);
+    return;
   }
 
   assert(!NodeToMatch->isMachineOpcode() && "Node already selected!");
 
   // Set up the node stack with NodeToMatch as the only node on the stack.
   SmallVector<SDValue, 8> NodeStack;
   SDValue N = SDValue(NodeToMatch, 0);
   NodeStack.push_back(N);

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

 #include "llvm/CodeGen/TargetLowering.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/Analysis/VectorUtils.h"
 #include "llvm/CodeGen/CallingConvLower.h"
 #include "llvm/CodeGen/CodeGenCommonISel.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineJumpTableInfo.h"
+#include "llvm/CodeGen/MachineModuleInfoImpls.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/TargetRegisterInfo.h"
 #include "llvm/IR/DataLayout.h"
 #include "llvm/IR/DerivedTypes.h"
 #include "llvm/IR/GlobalVariable.h"
 #include "llvm/IR/LLVMContext.h"
 #include "llvm/MC/MCAsmInfo.h"

 /// getPICJumpTableRelocBase, but as an MCExpr.
 const MCExpr *
 TargetLowering::getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
                                              unsigned JTI,MCContext &Ctx) const{
   // The normal PIC reloc base is the label at the start of the jump table.
   return MCSymbolRefExpr::create(MF->getJTISymbol(JTI, Ctx), Ctx);
 }
 
+SDValue TargetLowering::expandIndirectJTBranch(const SDLoc &dl, SDValue Value,
+                                               SDValue Addr, int JTI,
+                                               SelectionDAG &DAG) const {
+  SDValue Chain = Value;
+  // Jump table debug info is only needed if CodeView is enabled.
+  if (DAG.getTarget().getTargetTriple().isOSBinFormatCOFF()) {
+    Chain = DAG.getJumpTableDebugInfo(JTI, Chain, dl);
+  }
+  return DAG.getNode(ISD::BRIND, dl, MVT::Other, Chain, Addr);
+}
+
 bool
 TargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
   const TargetMachine &TM = getTargetMachine();
   const GlobalValue *GV = GA->getGlobal();
 
   // If the address is not even local to this DSO we will have to load it from
   // a got and then add the offset.
   if (!TM.shouldAssumeDSOLocal(*GV->getParent(), GV))

llvm/lib/DebugInfo/CodeView/EnumTables.cpp

static const EnumEntry<uint8_t> FunctionOptionEnum[] = {
     CV_ENUM_CLASS_ENT(FunctionOptions, ConstructorWithVirtualBases),
 };
 
 static const EnumEntry<uint16_t> LabelTypeEnum[] = {
     CV_ENUM_CLASS_ENT(LabelType, Near),
     CV_ENUM_CLASS_ENT(LabelType, Far),
 };
 
+static const EnumEntry<uint16_t> JumpTableEntrySizeNames[] = {
+    CV_ENUM_CLASS_ENT(JumpTableEntrySize, Int8),
+    CV_ENUM_CLASS_ENT(JumpTableEntrySize, UInt8),
+    CV_ENUM_CLASS_ENT(JumpTableEntrySize, Int16),
+    CV_ENUM_CLASS_ENT(JumpTableEntrySize, UInt16),
+    CV_ENUM_CLASS_ENT(JumpTableEntrySize, Int32),
+    CV_ENUM_CLASS_ENT(JumpTableEntrySize, UInt32),
+    CV_ENUM_CLASS_ENT(JumpTableEntrySize, Pointer),
+    CV_ENUM_CLASS_ENT(JumpTableEntrySize, UInt8ShiftLeft),
+    CV_ENUM_CLASS_ENT(JumpTableEntrySize, UInt16ShiftLeft),
+    CV_ENUM_CLASS_ENT(JumpTableEntrySize, Int8ShiftLeft),
+    CV_ENUM_CLASS_ENT(JumpTableEntrySize, Int16ShiftLeft),
+};
+
 namespace llvm {
 namespace codeview {
 
 ArrayRef<EnumEntry<SymbolKind>> getSymbolTypeNames() {
   return ArrayRef(SymbolTypeNames);
 }
 
 ArrayRef<EnumEntry<TypeLeafKind>> getTypeLeafNames() {

 ArrayRef<EnumEntry<uint8_t>> getFunctionOptionEnum() {
   return ArrayRef(FunctionOptionEnum);
 }
 
 ArrayRef<EnumEntry<uint16_t>> getLabelTypeEnum() {
   return ArrayRef(LabelTypeEnum);
 }
 
+ArrayRef<EnumEntry<uint16_t>> getJumpTableEntrySizeNames() {
+  return ArrayRef(JumpTableEntrySizeNames);
+}
+
 } // end namespace codeview
 } // end namespace llvm

llvm/lib/DebugInfo/CodeView/SymbolDumper.cpp

Error CVSymbolDumperImpl::visitKnownRecord(CVSymbol &CVR,
 
   ListScope S(W, "Strings");
   for (StringRef Str : Annot.Strings)
     W.printString(Str);
 
   return Error::success();
 }
 
+Error CVSymbolDumperImpl::visitKnownRecord(CVSymbol &CVR,
+                                           JumpTableSym &JumpTable) {
+  W.printHex("BaseOffset", JumpTable.BaseOffset);
+  W.printNumber("BaseSegment", JumpTable.BaseSegment);
+  W.printEnum("SwitchType", static_cast<uint16_t>(JumpTable.SwitchType),
+              getJumpTableEntrySizeNames());
+  W.printHex("BranchOffset", JumpTable.BranchOffset);
+  W.printHex("TableOffset", JumpTable.TableOffset);
+  W.printNumber("BranchSegment", JumpTable.BranchSegment);
+  W.printNumber("TableSegment", JumpTable.TableSegment);
+  W.printNumber("EntriesCount", JumpTable.EntriesCount);
+  return Error::success();
+}
+
 Error CVSymbolDumperImpl::visitUnknownSymbol(CVSymbol &CVR) {
   W.printNumber("Length", CVR.length());
   return Error::success();
 }
 
 Error CVSymbolDumper::dump(CVRecord<SymbolKind> &Record) {
   SymbolVisitorCallbackPipeline Pipeline;
   SymbolDeserializer Deserializer(ObjDelegate.get(), Container);

llvm/lib/DebugInfo/CodeView/SymbolRecordMapping.cpp

Error SymbolRecordMapping::visitKnownRecord(CVSymbol &CVR,
   error(IO.mapInteger(Annot.Segment));
   error(IO.mapVectorN<uint16_t>(
       Annot.Strings,
       [](CodeViewRecordIO &IO, StringRef &S) { return IO.mapStringZ(S); }));
 
   return Error::success();
 }
 
+Error SymbolRecordMapping::visitKnownRecord(CVSymbol &CVR,
+                                            JumpTableSym &JumpTable) {
+  error(IO.mapInteger(JumpTable.BaseOffset));
+  error(IO.mapInteger(JumpTable.BaseSegment));
+  error(IO.mapEnum(JumpTable.SwitchType));
+  error(IO.mapInteger(JumpTable.BranchOffset));
+  error(IO.mapInteger(JumpTable.TableOffset));
+  error(IO.mapInteger(JumpTable.BranchSegment));
+  error(IO.mapInteger(JumpTable.TableSegment));
+  error(IO.mapInteger(JumpTable.EntriesCount));
+  return Error::success();
+}
+
 RegisterId codeview::decodeFramePtrReg(EncodedFramePtrReg EncodedReg,
                                        CPUType CPU) {
   assert(unsigned(EncodedReg) < 4);
   switch (CPU) {
   // FIXME: Add ARM and AArch64 variants here.
   default:
     break;
   case CPUType::Intel8080:

llvm/lib/DebugInfo/CodeView/TypeIndexDiscovery.cpp

static bool discoverTypeIndices(ArrayRef<uint8_t> Content, SymbolKind Kind,
   case SymbolKind::S_COMPILE2:
   case SymbolKind::S_COMPILE3:
   case SymbolKind::S_ENVBLOCK:
   case SymbolKind::S_BLOCK32:
   case SymbolKind::S_FRAMEPROC:
   case SymbolKind::S_THUNK32:
   case SymbolKind::S_FRAMECOOKIE:
   case SymbolKind::S_UNAMESPACE:
+  case SymbolKind::S_ARMSWITCHTABLE:
     break;
   // Scope ending symbols.
   case SymbolKind::S_END:
   case SymbolKind::S_INLINESITE_END:
   case SymbolKind::S_PROC_ID_END:
     break;
   default:
     return false; // Unknown symbol.

llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp

 
 // S_UNAMESPACE
 Error LVSymbolVisitor::visitKnownRecord(CVSymbol &Record,
                                         UsingNamespaceSym &UN) {
   LLVM_DEBUG({ W.printString("Namespace", UN.Name); });
   return Error::success();
 }
 
+// S_ARMSWITCHTABLE
+Error LVSymbolVisitor::visitKnownRecord(CVSymbol &CVR,
+                                        JumpTableSym &JumpTable) {
+  LLVM_DEBUG({
+    W.printHex("BaseOffset", JumpTable.BaseOffset);
+    W.printNumber("BaseSegment", JumpTable.BaseSegment);
+    W.printFlags("SwitchType", static_cast<uint16_t>(JumpTable.SwitchType),
+                 getJumpTableEntrySizeNames());
+    W.printHex("BranchOffset", JumpTable.BranchOffset);
+    W.printHex("TableOffset", JumpTable.TableOffset);
+    W.printNumber("BranchSegment", JumpTable.BranchSegment);
+    W.printNumber("TableSegment", JumpTable.TableSegment);
+    W.printNumber("EntriesCount", JumpTable.EntriesCount);
+  });
+  return Error::success();
+}
+
 #undef DEBUG_TYPE
 #define DEBUG_TYPE "CodeViewLogicalVisitor"
 
 //===----------------------------------------------------------------------===//
 // Logical visitor.
 //===----------------------------------------------------------------------===//
 LVLogicalVisitor::LVLogicalVisitor(LVCodeViewReader *Reader, ScopedPrinter &W,
                                    InputFile &Input)

llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp

 LLVM_YAML_DECLARE_BITSET_TRAITS(PublicSymFlags)
 LLVM_YAML_DECLARE_BITSET_TRAITS(LocalSymFlags)
 LLVM_YAML_DECLARE_BITSET_TRAITS(ProcSymFlags)
 LLVM_YAML_DECLARE_BITSET_TRAITS(FrameProcedureOptions)
 LLVM_YAML_DECLARE_ENUM_TRAITS(CPUType)
 LLVM_YAML_DECLARE_ENUM_TRAITS(RegisterId)
 LLVM_YAML_DECLARE_ENUM_TRAITS(TrampolineType)
 LLVM_YAML_DECLARE_ENUM_TRAITS(ThunkOrdinal)
+LLVM_YAML_DECLARE_ENUM_TRAITS(JumpTableEntrySize)
 
 LLVM_YAML_STRONG_TYPEDEF(StringRef, TypeName)
 
 LLVM_YAML_DECLARE_SCALAR_TRAITS(TypeName, QuotingType::Single)
 
 StringRef ScalarTraits<TypeName>::input(StringRef S, void *V, TypeName &T) {
   return ScalarTraits<StringRef>::input(S, V, T.value);
 }
void ScalarEnumerationTraits<FrameCookieKind>::enumeration(
     IO &io, FrameCookieKind &FC) {
   auto ThunkNames = getFrameCookieKindNames();
   for (const auto &E : ThunkNames) {
     io.enumCase(FC, E.Name.str().c_str(),
                 static_cast<FrameCookieKind>(E.Value));
   }
 }
 
+void ScalarEnumerationTraits<JumpTableEntrySize>::enumeration(
+    IO &io, JumpTableEntrySize &FC) {
+  auto ThunkNames = getJumpTableEntrySizeNames();
+  for (const auto &E : ThunkNames) {
+    io.enumCase(FC, E.Name.str().c_str(),
+                static_cast<JumpTableEntrySize>(E.Value));
+  }
+}
+
 namespace llvm {
 namespace yaml {
 template <> struct MappingTraits<LocalVariableAddrRange> {
   static void mapping(IO &io, LocalVariableAddrRange &Range) {
     io.mapRequired("OffsetStart", Range.OffsetStart);
     io.mapRequired("ISectStart", Range.ISectStart);
     io.mapRequired("Range", Range.Range);
   }

 }
 
 template <> void SymbolRecordImpl<AnnotationSym>::map(IO &IO) {
   IO.mapOptional("Offset", Symbol.CodeOffset, 0U);
   IO.mapOptional("Segment", Symbol.Segment, uint16_t(0));
   IO.mapRequired("Strings", Symbol.Strings);
 }
 
+template <> void SymbolRecordImpl<JumpTableSym>::map(IO &IO) {
+  IO.mapRequired("BaseOffset", Symbol.BaseOffset);
+  IO.mapRequired("BaseSegment", Symbol.BaseSegment);
+  IO.mapRequired("SwitchType", Symbol.SwitchType);
+  IO.mapRequired("BranchOffset", Symbol.BranchOffset);
+  IO.mapRequired("TableOffset", Symbol.TableOffset);
+  IO.mapRequired("BranchSegment", Symbol.BranchSegment);
+  IO.mapRequired("TableSegment", Symbol.TableSegment);
+  IO.mapRequired("EntriesCount", Symbol.EntriesCount);
+}
+
 } // end namespace detail
 } // end namespace CodeViewYAML
 } // end namespace llvm
 
 CVSymbol CodeViewYAML::SymbolRecord::toCodeViewSymbol(
     BumpPtrAllocator &Allocator, CodeViewContainer Container) const {
   return Symbol->toCodeViewSymbol(Allocator, Container);
 }

llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp

public:
   /// Wrapper for MCInstLowering.lowerOperand() for the
   /// tblgen'erated pseudo lowering.
   bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const {
     return MCInstLowering.lowerOperand(MO, MCOp);
   }
 
   void emitStartOfAsmFile(Module &M) override;
   void emitJumpTableInfo() override;
+  std::tuple<const MCSymbol *, uint64_t, const MCSymbol *,
+             codeview::JumpTableEntrySize>
+  getCodeViewJumpTableInfo(int JTI, const MachineInstr *BranchInstr,
+                           const MCSymbol *BranchLabel) const override;
 
   void emitFunctionEntryLabel() override;
 
   void LowerJumpTableDest(MCStreamer &OutStreamer, const MachineInstr &MI);
 
   void LowerMOPS(MCStreamer &OutStreamer, const MachineInstr &MI);
 
   void LowerSTACKMAP(MCStreamer &OutStreamer, StackMaps &SM,
for (auto *JTBB : JTBBs) {
         Value = MCBinaryExpr::createLShr(
             Value, MCConstantExpr::create(2, OutContext), OutContext);
 
       OutStreamer->emitValue(Value, Size);
     }
   }
 }
 
+std::tuple<const MCSymbol *, uint64_t, const MCSymbol *,
+           codeview::JumpTableEntrySize>
+AArch64AsmPrinter::getCodeViewJumpTableInfo(int JTI,
+                                            const MachineInstr *BranchInstr,
+                                            const MCSymbol *BranchLabel) const {
+  const auto AFI = MF->getInfo<AArch64FunctionInfo>();
+  const auto Base = AArch64FI->getJumpTableEntryPCRelSymbol(JTI);
+  codeview::JumpTableEntrySize EntrySize;
+  switch (AFI->getJumpTableEntrySize(JTI)) {
+  case 1:
+    EntrySize = codeview::JumpTableEntrySize::UInt8ShiftLeft;
+    break;
+  case 2:
+    EntrySize = codeview::JumpTableEntrySize::UInt16ShiftLeft;
+    break;
+  case 4:
+    EntrySize = codeview::JumpTableEntrySize::Int32;
+    break;
+  default:
+    llvm_unreachable("Unexpected jump table entry size");
+  }
+  return std::make_tuple(Base, 0, BranchLabel, EntrySize);
+}
+
 void AArch64AsmPrinter::emitFunctionEntryLabel() {
   if (MF->getFunction().getCallingConv() == CallingConv::AArch64_VectorCall ||
       MF->getFunction().getCallingConv() ==
           CallingConv::AArch64_SVE_VectorCall ||
       MF->getInfo<AArch64FunctionInfo>()->isSVECC()) {
     auto *TS =
         static_cast<AArch64TargetStreamer *>(OutStreamer->getTargetStreamer());
     TS->emitDirectiveVariantPCS(CurrentFnSym);

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

SDValue AArch64TargetLowering::LowerBR_JT(SDValue Op,
   int JTI = cast<JumpTableSDNode>(JT.getNode())->getIndex();
 
   auto *AFI = DAG.getMachineFunction().getInfo<AArch64FunctionInfo>();
   AFI->setJumpTableEntryInfo(JTI, 4, nullptr);
 
   SDNode *Dest =
       DAG.getMachineNode(AArch64::JumpTableDest32, DL, MVT::i64, MVT::i64, JT,
                          Entry, DAG.getTargetJumpTable(JTI, MVT::i32));
-  return DAG.getNode(ISD::BRIND, DL, MVT::Other, Op.getOperand(0),
-                     SDValue(Dest, 0));
+  SDValue JTInfo = DAG.getJumpTableDebugInfo(JTI, Op.getOperand(0), DL);
+  return DAG.getNode(ISD::BRIND, DL, MVT::Other, JTInfo, SDValue(Dest, 0));
 }
 
 SDValue AArch64TargetLowering::LowerConstantPool(SDValue Op,
                                                  SelectionDAG &DAG) const {
   ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op);
 
   if (getTargetMachine().getCodeModel() == CodeModel::Large) {
     // Use the GOT for the large code model on iOS.

llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp

bool AArch64InstructionSelector::selectBrJT(MachineInstr &I,
 
   Register TargetReg = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
   Register ScratchReg = MRI.createVirtualRegister(&AArch64::GPR64spRegClass);
 
   MF->getInfo<AArch64FunctionInfo>()->setJumpTableEntryInfo(JTI, 4, nullptr);
   auto JumpTableInst = MIB.buildInstr(AArch64::JumpTableDest32,
                                       {TargetReg, ScratchReg}, {JTAddr, Index})
                            .addJumpTableIndex(JTI);
+  // Save the jump table info.
+  MIB.buildInstr(TargetOpcode::JUMP_TABLE_DEBUG_INFO, {},
+                 {static_cast<int64_t>(JTI)});
   // Build the indirect branch.
   MIB.buildInstr(AArch64::BR, {}, {TargetReg});
   I.eraseFromParent();
   return constrainSelectedInstRegOperands(*JumpTableInst, TII, TRI, RBI);
 }
 
 bool AArch64InstructionSelector::selectJumpTable(MachineInstr &I,
                                                  MachineRegisterInfo &MRI) {

llvm/lib/Target/ARM/ARMAsmPrinter.h

public:
   void emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,
                         const MCSubtargetInfo *EndInfo) const override;
 
   void emitJumpTableAddrs(const MachineInstr *MI);
   void emitJumpTableInsts(const MachineInstr *MI);
   void emitJumpTableTBInst(const MachineInstr *MI, unsigned OffsetWidth);
   void emitInstruction(const MachineInstr *MI) override;
   bool runOnMachineFunction(MachineFunction &F) override;
+  std::tuple<const MCSymbol *, uint64_t, const MCSymbol *,
+             codeview::JumpTableEntrySize>
+  getCodeViewJumpTableInfo(int JTI, const MachineInstr *BranchInstr,
+                           const MCSymbol *BranchLabel) const override;
 
   void emitConstantPool() override {
     // we emit constant pools customly!
   }
   void emitFunctionBodyEnd() override;
   void emitFunctionEntryLabel() override;
   void emitStartOfAsmFile(Module &M) override;
   void emitEndOfAsmFile(Module &M) override;

llvm/lib/Target/ARM/ARMAsmPrinter.cpp

void ARMAsmPrinter::emitJumpTableTBInst(const MachineInstr *MI,
   // actual branch instructions here, so we don't mark those as a data-region
   // at all.
   OutStreamer->emitDataRegion(MCDR_DataRegionEnd);
 
   // Make sure the next instruction is 2-byte aligned.
   emitAlignment(Align(2));
 }
 
+std::tuple<const MCSymbol *, uint64_t, const MCSymbol *,
+           codeview::JumpTableEntrySize>
+ARMAsmPrinter::getCodeViewJumpTableInfo(int JTI,
+                                        const MachineInstr *BranchInstr,
+                                        const MCSymbol *BranchLabel) const {
+  codeview::JumpTableEntrySize EntrySize;
+  const MCSymbol *BaseLabel;
+  uint64_t BaseOffset = 0;
+  switch (BranchInstr->getOpcode()) {
+  case ARM::BR_JTadd:
+  case ARM::BR_JTr:
+  case ARM::tBR_JTr:
+    // Word relative to the jump table address.
+    EntrySize = codeview::JumpTableEntrySize::UInt32;
+    BaseLabel = GetARMJTIPICJumpTableLabel(JTI);
+    break;
+  case ARM::tTBH_JT:
+  case ARM::t2TBH_JT:
+    // half-word shifted left, relative to *after* the branch instruction.
+    EntrySize = codeview::JumpTableEntrySize::UInt16ShiftLeft;
+    BranchLabel = GetCPISymbol(BranchInstr->getOperand(3).getImm());
+    BaseLabel = BranchLabel;
+    BaseOffset = 4;
+    break;
+  case ARM::tTBB_JT:
+  case ARM::t2TBB_JT:
+    // byte shifted left, relative to *after* the branch instruction.
+    EntrySize = codeview::JumpTableEntrySize::UInt8ShiftLeft;
+    BranchLabel = GetCPISymbol(BranchInstr->getOperand(3).getImm());
+    BaseLabel = BranchLabel;
+    BaseOffset = 4;
+    break;
+  case ARM::t2BR_JT:
+    // Direct jump.
+    BaseLabel = nullptr;
+    EntrySize = codeview::JumpTableEntrySize::Pointer;
+    break;
+  default:
+    llvm_unreachable("Unknown jump table instruction");
+  }
+
+  return std::make_tuple(BaseLabel, BaseOffset, BranchLabel, EntrySize);
+}
+
 void ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) {
   assert(MI->getFlag(MachineInstr::FrameSetup) &&
       "Only instruction which are involved into frame setup code are allowed");
 
   MCTargetStreamer &TS = *OutStreamer->getTargetStreamer();
   ARMTargetStreamer &ATS = static_cast<ARMTargetStreamer &>(TS);
   const MachineFunction &MF = *MI->getParent()->getParent();
   const TargetRegisterInfo *TargetRegInfo =

llvm/lib/Target/X86/X86ISelLowering.h

bool lowerInterleavedLoad(LoadInst *LI,
                               ArrayRef<unsigned> Indices,
                               unsigned Factor) const override;
 
     /// Lower interleaved store(s) into target specific
     /// instructions/intrinsics.
     bool lowerInterleavedStore(StoreInst *SI, ShuffleVectorInst *SVI,
                                unsigned Factor) const override;
 
-    SDValue expandIndirectJTBranch(const SDLoc& dl, SDValue Value,
-                                   SDValue Addr, SelectionDAG &DAG)
-                                   const override;
+    SDValue expandIndirectJTBranch(const SDLoc &dl, SDValue Value, SDValue Addr,
+                                   int JTI, SelectionDAG &DAG) const override;
 
     Align getPrefLoopAlignment(MachineLoop *ML) const override;
 
     EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const override {
       if (VT == MVT::f80)
         return EVT::getIntegerVT(Context, 96);
       return TargetLoweringBase::getTypeToTransformTo(Context, VT);
     }

llvm/lib/Target/X86/X86ISelLowering.cpp

case MachineJumpTableInfo::EK_LabelDifference32: {
       // movsx OReg64, OReg
       BuildMI(DispContBB, MIMD, TII->get(X86::MOVSX64rr32), OReg64)
           .addReg(OReg);
       // addq BReg, OReg64, TReg
       BuildMI(DispContBB, MIMD, TII->get(X86::ADD64rr), TReg)
           .addReg(OReg64)
           .addReg(BReg);
       // jmpq *TReg
       BuildMI(DispContBB, MIMD, TII->get(X86::JMP64r)).addReg(TReg);
       break;
     }
     default:
       llvm_unreachable("Unexpected jump table encoding");
     }
   } else {
     // jmpl *.LJTI0_0(,IReg,4)
     BuildMI(DispContBB, MIMD, TII->get(X86::JMP32m))
case ISD::XOR:
       return false;
     }
   }
 
   // Any legal type not explicitly accounted for above here is desirable.
   return true;
 }
 
-SDValue X86TargetLowering::expandIndirectJTBranch(const SDLoc& dl,
+SDValue X86TargetLowering::expandIndirectJTBranch(const SDLoc &dl,
                                                   SDValue Value, SDValue Addr,
+                                                  int JTI,
                                                   SelectionDAG &DAG) const {
   const Module *M = DAG.getMachineFunction().getMMI().getModule();
   Metadata *IsCFProtectionSupported = M->getModuleFlag("cf-protection-branch");
   if (IsCFProtectionSupported) {
     // In case control-flow branch protection is enabled, we need to add
     // notrack prefix to the indirect branch.
     // In order to do that we create NT_BRIND SDNode.
     // Upon ISEL, the pattern will convert it to jmp with NoTrack prefix.
-    return DAG.getNode(X86ISD::NT_BRIND, dl, MVT::Other, Value, Addr);
+    SDValue JTInfo = DAG.getJumpTableDebugInfo(JTI, Value, dl);
+    return DAG.getNode(X86ISD::NT_BRIND, dl, MVT::Other, JTInfo, Addr);
   }
 
-  return TargetLowering::expandIndirectJTBranch(dl, Value, Addr, DAG);
+  return TargetLowering::expandIndirectJTBranch(dl, Value, Addr, JTI, DAG);
 }
 
 TargetLowering::AndOrSETCCFoldKind
 X86TargetLowering::isDesirableToCombineLogicOpOfSETCC(
     const SDNode *LogicOp, const SDNode *SETCC0, const SDNode *SETCC1) const {
   using AndOrSETCCFoldKind = TargetLowering::AndOrSETCCFoldKind;
   EVT VT = LogicOp->getValueType(0);
   EVT OpVT = SETCC0->getOperand(0).getValueType();

llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt-constrain.mir

body:             |
   ; CHECK-NEXT:   [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[SUBREG_TO_REG]], 8, 0, implicit-def $nzcv
   ; CHECK-NEXT:   Bcc 8, %bb.3, implicit $nzcv
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1:
   ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[MOVaddrJT:%[0-9]+]]:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0
   ; CHECK-NEXT:   early-clobber %5:gpr64, early-clobber %6:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.0
+  ; CHECK-NEXT:   JUMP_TABLE_DEBUG_INFO 0
   ; CHECK-NEXT:   BR %5
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2:
   ; CHECK-NEXT:   successors: %bb.3(0x80000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   B %bb.3
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.3:

llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt.mir

body:             |
   ; CHECK-NEXT:   Bcc 8, %bb.4, implicit $nzcv
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1.entry:
   ; CHECK-NEXT:   successors: %bb.3(0x2aaaaaab), %bb.4(0x2aaaaaab), %bb.2(0x2aaaaaab)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
   ; CHECK-NEXT:   [[MOVaddrJT:%[0-9]+]]:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0
   ; CHECK-NEXT:   early-clobber %17:gpr64, early-clobber %18:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.0
+  ; CHECK-NEXT:   JUMP_TABLE_DEBUG_INFO 0
   ; CHECK-NEXT:   BR %17
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2.sw.bb:
   ; CHECK-NEXT:   successors: %bb.4(0x80000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[ADDWri:%[0-9]+]]:gpr32sp = nsw ADDWri [[COPY]], 42, 0
   ; CHECK-NEXT:   B %bb.4
   ; CHECK-NEXT: {{  $}}

llvm/test/DebugInfo/COFF/jump-table-with-indirect-ptr-null.ll

+; REQUIRES: x86-registered-target
+; RUN: llc < %s | FileCheck %s
+
+; Repro for issue https://reviews.llvm.org/D149367#4619121
+; Validates that `indirect ptr null` and a jump table can be used in the same function.
+
+; Verify branch labels match what's in the CodeView
+; CHECK:            .Ltmp2:
+; CHECK-NEXT:       jmpq    *%{{.*}}
+
+; Verify jump table have the same entry size, base offset and shift as what's in the CodeView
+; CHECK:          {{\.?}}LJTI0_0:
+; CHECK-NEXT:     .long   .LBB0_[[#]]-.LJTI0_0
+
+; Verify CodeView
+; CHECK:          .short  4441          # Record kind: S_ARMSWITCHTABLE
+; CHECK-NEXT:     .secrel32 .LJTI0_0    # Base offset
+; CHECK-NEXT:     .secidx .LJTI0_0      # Base section index
+; CHECK-NEXT:     .short  4             # Switch type
+; CHECK-NEXT:     .secrel32 .Ltmp2      # Branch offset
+; CHECK-NEXT:     .secrel32 .LJTI0_0    # Table offset
+; CHECK-NEXT:     .secidx .Ltmp2        # Branch section index
+; CHECK-NEXT:     .secidx .LJTI0_0      # Table section index
+; CHECK-NEXT:     .long 4               # Entries count
+; CHECK-NOT:      .short  4441          # Record kind: S_ARMSWITCHTABLE
+
+target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-pc-windows-msvc19.34.0"
+
+define i32 @f() !dbg !5 {
+entry:
+  indirectbr ptr null, [label %BC_SUCCEED], !dbg !11
+
+BC_SUCCEED:                                       ; preds = %entry
+  %0 = lshr i64 0, 0
+  switch i64 %0, label %sw.default.i.i2445 [
+    i64 3, label %sw.bb15.i.i
+    i64 1, label %sw.bb7.i.i
+    i64 2, label %sw.bb11.i.i2444
+    i64 0, label %sw.bb3.i.i
+  ]
+
+sw.bb3.i.i:                                       ; preds = %BC_SUCCEED
+  ret i32 0
+
+sw.bb7.i.i:                                       ; preds = %BC_SUCCEED
+  ret i32 0
+
+sw.bb11.i.i2444:                                  ; preds = %BC_SUCCEED
+  ret i32 0
+
+sw.bb15.i.i:                                      ; preds = %BC_SUCCEED
+  ret i32 0
+
+sw.default.i.i2445:                               ; preds = %BC_SUCCEED
+  ret i32 0
+}
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!3, !4}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "../../v8/src/regexp\\regexp-interpreter.cc", directory: ".", checksumkind: CSK_MD5, checksum: "ddba353f72137fb1d64b5fc8ee071a9c")
+!2 = !{}
+!3 = !{i32 2, !"CodeView", i32 1}
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!5 = distinct !DISubprogram(name: "f", linkageName: "f", scope: !7, file: !6, line: 386, type: !10, scopeLine: 391, flags: DIFlagPrototyped, spFlags: DISPFlagLocalToUnit | DISPFlagDefinition | DISPFlagOptimized, unit: !0, templateParams: !2, retainedNodes: !2)
+!6 = !DIFile(filename: "../../v8/src/regexp/regexp-interpreter.cc", directory: ".", checksumkind: CSK_MD5, checksum: "ddba353f72137fb1d64b5fc8ee071a9c")
+!7 = !DINamespace(scope: !8)
+!8 = !DINamespace(name: "internal", scope: !9)
+!9 = !DINamespace(name: "v8", scope: null)
+!10 = distinct !DISubroutineType(types: !2)
+!11 = !DILocation(line: 1, scope: !5)
 No newline at end of file

llvm/test/DebugInfo/COFF/jump-table.ll

+; REQUIRES: arm-registered-target
+; REQUIRES: aarch64-registered-target
+; REQUIRES: x86-registered-target
+; RUN: llc -mtriple=i686-windows < %s | FileCheck %s --check-prefixes=CHECK,I686,NOTA32
+; RUN: llc -mtriple=x86_64-windows < %s | FileCheck %s --check-prefixes=CHECK,X64,NOTA32
+; RUN: llc -mtriple=aarch64-windows < %s | FileCheck %s --check-prefixes=CHECK,A64,NOTA32
+; RUN: llc -mtriple=thumbv7a-windows < %s | FileCheck %s --check-prefixes=CHECK,A32
+; RUN: llc -mtriple=x86_64-windows -filetype=obj < %s | llvm-readobj - --codeview | FileCheck %s --check-prefixes=CV
+
+; Generated by clang++ -S -c -std=c++11 -emit-llvm -g from the following C++11 source:
+; extern "C" void f1();
+; extern "C" void f2();
+; extern "C" void f3();
+; extern "C" void f4();
+; extern "C" void f5();
+; extern "C" void func(int i){
+;     switch (i) {
+;         case 0: f1(); break;
+;         case 1: f2(); break;
+;         case 2: f3(); break;
+;         case 3: f4(); break;
+;     }
+;     switch (i) {
+;         case 1: f2(); break;
+;         case 2: f3(); break;
+;         case 3: f4(); break;
+;         case 4: f5(); break;
+;         case 5: f1(); break;
+;     }
+; }
+
+; i686 entries are absolute addresses (Base = 0, SwitchType = Pointer).
+; x86_64 entries are fixed-size and relative to the jump table (Base = Table,
+;   SwitchType = Int32).
+; aarch64 entries are variable-sized and relative to the first entry's BB if
+;   compressed (Base = Branch+0x4, SwitchType = UInt8ShiftLeft/UInt16ShiftLeft)
+;   otherwise relative to the ADR instruction (Base = Branch-0xc, SwitchType =
+;   Int32).
+; thumbv7a entries are either absolute addresses (Base = 0, SwitchType =
+;   Pointer) OR variable-sized and relative to *after* the branch instruction
+;   (Base = Branch+0x4, SwitchType = UInt8ShiftLeft/UInt16ShiftLeft/UInt32) but
+;   there appears to be a bug where the offsets are always 0.
+
+; Verify branch labels match what's in the CodeView
+; X64:            .Ltmp1:
+; X64-NEXT:       jmpq    *%{{.*}}
+; X64:            .Ltmp4:
+; X64-NEXT:       jmpq    *%{{.*}}
+; A32:            .LCPI0_0:
+; A32-NEXT        add     pc, r{{.*}}
+; NOTE: thumbv7a places the jump tables just after the branch, so verify the other branch below
+; A64:            .Ltmp1:
+; A64-NEXT:       br      x{{.*}}
+; A64:            .Ltmp4:
+; A64-NEXT:       br      x{{.*}}
+
+; Verify jump table have the same entry size, base offset and shift as what's in the CodeView
+; CHECK:          {{\.?}}LJTI0_0:
+; I686-NEXT:      .long   LBB0_[[#]]
+; X64-NEXT:       .long   .LBB0_[[#]]-.LJTI0_0
+; A32-NEXT:       .byte   (($MBB0_[[#]])-(.LCPI0_0+4))/2
+; A64-NEXT:       .byte   (.LBB0_[[FIRSTBLOCK:[0-9]+]]-.LBB0_[[FIRSTBLOCK]])>>2
+; NOTE: thumbv7a places the jump tables just after the branch, so check for the other branch now
+; A32:            .LCPI0_1:
+; A32-NEXT        add     pc, r{{.*}}
+; CHECK:          {{\.?}}LJTI0_1:
+; I686-NEXT:      .long   LBB0_[[#]]
+; X64-NEXT:       .long   .LBB0_[[#]]-.LJTI0_1
+; A32-NEXT:       .byte   (($MBB0_[[#]])-(.LCPI0_1+4))/2
+; A64-NEXT:       .byte   (.LBB0_[[SECONDBLOCK:[0-9]+]]-.LBB0_[[SECONDBLOCK]])>>2
+
+; Verify CodeView
+; CHECK:          [[INT16:\.short|\.hword]] 4441        [[COMMENT:#|//|@]] Record kind: S_ARMSWITCHTABLE
+; I686-NEXT:      .long 0                               [[COMMENT]] Base offset
+; I686-NEXT:      .short 0                              [[COMMENT]] Base section index
+; X64-NEXT:       .secrel32 .LJTI0_0                    [[COMMENT]] Base offset
+; X64-NEXT:       .secidx .LJTI0_0                      [[COMMENT]] Base section index
+; A32-NEXT:       .secrel32 .LCPI0_0+4                  [[COMMENT]] Base offset
+; A32-NEXT:       .secidx .LCPI0_0                      [[COMMENT]] Base section index
+; A64-NEXT:       .secrel32 .LBB0_[[FIRSTBLOCK]]        [[COMMENT]] Base offset
+; A64-NEXT:       .secidx .LBB0_[[FIRSTBLOCK]]          [[COMMENT]] Base section index
+; I686-NEXT:      .short  6                             [[COMMENT]] Switch type
+; X64-NEXT:       .short  4                             [[COMMENT]] Switch type
+; A32-NEXT:       .short  7                             [[COMMENT]] Switch type
+; A64-NEXT:       .hword  7                             [[COMMENT]] Switch type
+; NOTA32-NEXT:    .secrel32 {{\.?}}Ltmp1                [[COMMENT]] Branch offset
+; A32-NEXT:       .secrel32 .LCPI0_0                    [[COMMENT]] Branch offset
+; CHECK-NEXT:     .secrel32 {{\.?}}LJTI0_0              [[COMMENT]] Table offset
+; NOTA32-NEXT:    .secidx {{\.?}}Ltmp1                  [[COMMENT]] Branch section index
+; A32-NEXT:       .secidx .LCPI0_0                      [[COMMENT]] Branch section index
+; CHECK-NEXT:     .secidx {{\.?}}LJTI0_0                [[COMMENT]] Table section index
+; CHECK-NEXT:     [[INT32:\.long|\.word]] 4             [[COMMENT]] Entries count
+; CHECK:          [[INT16]] 4441                        [[COMMENT]] Record kind: S_ARMSWITCHTABLE
+; I686-NEXT:      .long 0                               [[COMMENT]] Base offset
+; I686-NEXT:      .short 0                              [[COMMENT]] Base section index
+; X64-NEXT:       .secrel32 .LJTI0_1                    [[COMMENT]] Base offset
+; X64-NEXT:       .secidx .LJTI0_1                      [[COMMENT]] Base section index
+; A32-NEXT:       .secrel32 .LCPI0_1+4                  [[COMMENT]] Base offset
+; A32-NEXT:       .secidx .LCPI0_1                      [[COMMENT]] Base section index
+; A64-NEXT:       .secrel32 .LBB0_[[SECONDBLOCK]]       [[COMMENT]] Base offset
+; A64-NEXT:       .secidx .LBB0_[[SECONDBLOCK]]         [[COMMENT]] Base section index
+; I686-NEXT:      .short  6                             [[COMMENT]] Switch type
+; X64-NEXT:       .short  4                             [[COMMENT]] Switch type
+; A32-NEXT:       .short  7                             [[COMMENT]] Switch type
+; A64-NEXT:       .hword  7                             [[COMMENT]] Switch type
+; NOTA32-NEXT:    .secrel32 {{\.?}}Ltmp4                [[COMMENT]] Branch offset
+; A32-NEXT:       .secrel32 .LCPI0_1                    [[COMMENT]] Branch offset
+; CHECK-NEXT:     .secrel32 {{\.?}}LJTI0_1              [[COMMENT]] Table offset
+; NOTA32-NEXT:    .secidx {{\.?}}Ltmp4                  [[COMMENT]] Branch section index
+; A32-NEXT:       .secidx .LCPI0_1                      [[COMMENT]] Branch section index
+; CHECK-NEXT:     .secidx {{\.?}}LJTI0_1                [[COMMENT]] Table section index
+; CHECK-NEXT:     [[INT32]] 5                           [[COMMENT]] Entries count
+; CHECK-NOT:      [[INT16]] 4441                        [[COMMENT]] Record kind: S_ARMSWITCHTABLE
+
+; Verify CodeView as dumped by llvm-readobj
+; CV:      Subsection [
+; CV:         SubSectionType: Symbols (0xF1)
+; CV:         GlobalProcIdSym {
+; CV:           DisplayName: func
+; CV-NOT:     GlobalProcIdSym
+; CV:           JumpTableSym {
+; CV-NEXT:        Kind: S_ARMSWITCHTABLE (0x1159)
+; CV-NEXT:        BaseOffset: 0x0
+; CV-NEXT:        BaseSegment: 0
+; CV-NEXT:        SwitchType: Int32 (0x4)
+; CV-NEXT:        BranchOffset: 0x23
+; CV-NEXT:        TableOffset: 0x0
+; CV-NEXT:        BranchSegment: 0
+; CV-NEXT:        TableSegment: 0
+; CV-NEXT:        EntriesCount: 4
+; CV-NEXT:      }
+; CV-NEXT:      JumpTableSym {
+; CV-NEXT:        Kind: S_ARMSWITCHTABLE (0x1159)
+; CV-NEXT:        BaseOffset: 0x10
+; CV-NEXT:        BaseSegment: 0
+; CV-NEXT:        SwitchType: Int32 (0x4)
+; CV-NEXT:        BranchOffset: 0x5A
+; CV-NEXT:        TableOffset: 0x10
+; CV-NEXT:        BranchSegment: 0
+; CV-NEXT:        TableSegment: 0
+; CV-NEXT:        EntriesCount: 5
+; CV-NEXT:      }
+; CV-NOT:       JumpTableSym {
+
+source_filename = ".\\jump-table.cpp"
+target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-pc-windows-msvc19.35.32216"
+
+; Function Attrs: mustprogress noinline optnone uwtable
+define dso_local void @func(i32 noundef %0) #0 !dbg !8 {
+  %2 = alloca i32, align 4
+  store i32 %0, ptr %2, align 4
+  call void @llvm.dbg.declare(metadata ptr %2, metadata !14, metadata !DIExpression()), !dbg !15
+  %3 = load i32, ptr %2, align 4, !dbg !16
+  switch i32 %3, label %8 [
+    i32 0, label %4
+    i32 1, label %5
+    i32 2, label %6
+    i32 3, label %7
+  ], !dbg !16
+
+4:                                                ; preds = %1
+  call void @f1(), !dbg !17
+  br label %8, !dbg !17
+
+5:                                                ; preds = %1
+  call void @f2(), !dbg !19
+  br label %8, !dbg !19
+
+6:                                                ; preds = %1
+  call void @f3(), !dbg !20
+  br label %8, !dbg !20
+
+7:                                                ; preds = %1
+  call void @f4(), !dbg !21
+  br label %8, !dbg !21
+
+8:                                                ; preds = %1, %7, %6, %5, %4
+  %9 = load i32, ptr %2, align 4, !dbg !22
+  switch i32 %9, label %15 [
+    i32 1, label %10
+    i32 2, label %11
+    i32 3, label %12
+    i32 4, label %13
+    i32 5, label %14
+  ], !dbg !22
+
+10:                                               ; preds = %8
+  call void @f2(), !dbg !23
+  br label %15, !dbg !23
+
+11:                                               ; preds = %8
+  call void @f3(), !dbg !25
+  br label %15, !dbg !25
+
+12:                                               ; preds = %8
+  call void @f4(), !dbg !26
+  br label %15, !dbg !26
+
+13:                                               ; preds = %8
+  call void @f5(), !dbg !27
+  br label %15, !dbg !27
+
+14:                                               ; preds = %8
+  call void @f1(), !dbg !28
+  br label %15, !dbg !28
+
+15:                                               ; preds = %8, %14, %13, %12, %11, %10
+  ret void, !dbg !29
+}
+
+; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+
+declare dso_local void @f1() #2
+
+declare dso_local void @f2() #2
+
+declare dso_local void @f3() #2
+
+declare dso_local void @f4() #2
+
+declare dso_local void @f5() #2
+
+attributes #0 = { mustprogress noinline optnone uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
+attributes #1 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
+attributes #2 = { "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3, !4, !5, !6}
+!llvm.ident = !{!7}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_11, file: !1, producer: "clang version 15.0.1", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "jump-table.cpp", directory: "C:\\llvm", checksumkind: CSK_MD5, checksum: "35610c7104c8080f83e2bf6a02dabfc9")
+!2 = !{i32 2, !"CodeView", i32 1}
+!3 = !{i32 2, !"Debug Info Version", i32 3}
+!4 = !{i32 1, !"wchar_size", i32 2}
+!5 = !{i32 7, !"PIC Level", i32 2}
+!6 = !{i32 7, !"uwtable", i32 2}
+!7 = !{!"clang version 15.0.1"}
+!8 = distinct !DISubprogram(name: "func", scope: !9, file: !9, line: 6, type: !10, scopeLine: 6, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !13)
+!9 = !DIFile(filename: ".\\jump-table.cpp", directory: "C:\\llvm", checksumkind: CSK_MD5, checksum: "35610c7104c8080f83e2bf6a02dabfc9")
+!10 = !DISubroutineType(types: !11)
+!11 = !{null, !12}
+!12 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!13 = !{}
+!14 = !DILocalVariable(name: "i", arg: 1, scope: !8, file: !9, line: 6, type: !12)
+!15 = !DILocation(line: 6, scope: !8)
+!16 = !DILocation(line: 7, scope: !8)
+!17 = !DILocation(line: 8, scope: !18)
+!18 = distinct !DILexicalBlock(scope: !8, file: !9, line: 7)
+!19 = !DILocation(line: 9, scope: !18)
+!20 = !DILocation(line: 10, scope: !18)
+!21 = !DILocation(line: 11, scope: !18)
+!22 = !DILocation(line: 13, scope: !8)
+!23 = !DILocation(line: 14, scope: !24)
+!24 = distinct !DILexicalBlock(scope: !8, file: !9, line: 13)
+!25 = !DILocation(line: 15, scope: !24)
+!26 = !DILocation(line: 16, scope: !24)
+!27 = !DILocation(line: 17, scope: !24)
+!28 = !DILocation(line: 18, scope: !24)
+!29 = !DILocation(line: 20, scope: !8)

llvm/tools/llvm-pdbutil/MinimalSymbolDumper.cpp

static std::string formatGaps(uint32_t IndentLevel,
                               ArrayRef<LocalVariableAddrGap> Gaps) {
   std::vector<std::string> GapStrs;
   for (const auto &G : Gaps) {
     GapStrs.push_back(formatv("({0},{1})", G.GapStartOffset, G.Range).str());
   }
   return typesetItemList(GapStrs, 7, IndentLevel, ", ");
 }
 
+static std::string formatJumpTableEntrySize(JumpTableEntrySize EntrySize) {
+  switch (EntrySize) {
+    RETURN_CASE(JumpTableEntrySize, Int8, "int8");
+    RETURN_CASE(JumpTableEntrySize, UInt8, "uin8");
+    RETURN_CASE(JumpTableEntrySize, Int16, "int16");
+    RETURN_CASE(JumpTableEntrySize, UInt16, "uint16");
+    RETURN_CASE(JumpTableEntrySize, Int32, "int32");
+    RETURN_CASE(JumpTableEntrySize, UInt32, "uint32");
+    RETURN_CASE(JumpTableEntrySize, Pointer, "pointer");
+    RETURN_CASE(JumpTableEntrySize, UInt8ShiftLeft, "uint8shl");
+    RETURN_CASE(JumpTableEntrySize, UInt16ShiftLeft, "uint16shl");
+    RETURN_CASE(JumpTableEntrySize, Int8ShiftLeft, "int8shl");
+    RETURN_CASE(JumpTableEntrySize, Int16ShiftLeft, "int16shl");
+  }
+  return formatUnknownEnum(EntrySize);
+}
+
 Error MinimalSymbolDumper::visitSymbolBegin(codeview::CVSymbol &Record) {
   return visitSymbolBegin(Record, 0);
 }
 
 Error MinimalSymbolDumper::visitSymbolBegin(codeview::CVSymbol &Record,
                                             uint32_t Offset) {
   // formatLine puts the newline at the beginning, so we use formatLine here
   // to start a new line, and then individual visit methods use format to

 Error MinimalSymbolDumper::visitKnownRecord(CVSymbol &CVR,
                                             AnnotationSym &Annot) {
   AutoIndent Indent(P, 7);
   P.formatLine("addr = {0}", formatSegmentOffset(Annot.Segment, Annot.CodeOffset));
   P.formatLine("strings = {0}", typesetStringList(P.getIndentLevel() + 9 + 2,
                                                    Annot.Strings));
   return Error::success();
 }
+
+Error MinimalSymbolDumper::visitKnownRecord(CVSymbol &CVR,
+                                            JumpTableSym &JumpTable) {
+  AutoIndent Indent(P, 7);
+  P.formatLine(
+      "base = {0}, switchtype = {1}, branch = {2}, table = {3}, entriescount = "
+      "{4}",
+      formatSegmentOffset(JumpTable.BaseSegment, JumpTable.BaseOffset),
+      formatJumpTableEntrySize(JumpTable.SwitchType),
+      formatSegmentOffset(JumpTable.BranchSegment, JumpTable.BranchOffset),
+      formatSegmentOffset(JumpTable.TableSegment, JumpTable.TableOffset),
+      JumpTable.EntriesCount);
+  return Error::success();
+}