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pengfei (Pengfei Wang)
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User Since
Dec 12 2018, 5:57 PM (51 w, 5 d)

Recent Activity

Today

pengfei added inline comments to D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86.
Tue, Dec 10, 12:06 AM · Restricted Project

Yesterday

pengfei updated the diff for D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86.

Fix few format problems.

Mon, Dec 9, 11:48 PM · Restricted Project
pengfei added a comment to D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86.

Thanks for the review!

Mon, Dec 9, 11:21 PM · Restricted Project
pengfei updated the diff for D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86.

Address review comments.

Mon, Dec 9, 11:12 PM · Restricted Project
pengfei updated the diff for D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86.

Add signaling intrinsic handling.

Mon, Dec 9, 7:19 AM · Restricted Project

Fri, Dec 6

pengfei added inline comments to D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86.
Fri, Dec 6, 12:54 AM · Restricted Project

Thu, Dec 5

pengfei added inline comments to D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86.
Thu, Dec 5, 8:06 PM · Restricted Project
pengfei added inline comments to D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86.
Thu, Dec 5, 6:44 PM · Restricted Project
pengfei added a comment to D69281: [FPEnv] Constrained FCmp intrinsics.

Adding an extra argument to the DAGnode (sort of like FP_ROUND) also need special code all over the place to handle ...

Hi @uweigand, I don't quite understand why we need special code all over the place to handle. From what I can see, STRICT_FSETCCS always have the same action with STRICT_FSETCC in common code.

I had the variant with the extra operand implemented initially, and what I was seeing was that made the node "special" because now we don't have the same set of operands between SETCC and STRICT_FSETCC any more. Usually, the STRICT_ opcodes have the same set of operands as the regular operands, with the exception of the chain. Code tends to assume that this is the case (e.g. when morphing a strict node into a regular node, or when writing a single legalization or other transformation that applies to both the strict and the regular node). Having not just the chain, but one additional extra operand required code changes to handle that operand in various places. Instead, with two DAG opcodes, you usually just have to add two more cases to a switch and that's it.

But those were really minor issues; the primary reason for me to switch was that I needed a way to tell common code which operations are legal, where the ISA has differences between signaling and quiet operations. (On Z we always have both for scalar types, but for vector types we got the signaling operations at a later ISA level than the quiet ones). This is trivial with two opcodes, but would require quite a bit of custom code if when using just a single one.

Thu, Dec 5, 4:33 PM · Restricted Project
pengfei added a comment to D69281: [FPEnv] Constrained FCmp intrinsics.

Adding an extra argument to the DAGnode (sort of like FP_ROUND) also need special code all over the place to handle ...

Hi @uweigand, I don't quite understand why we need special code all over the place to handle. From what I can see, STRICT_FSETCCS always have the same action with STRICT_FSETCC in common code.

Thu, Dec 5, 6:11 AM · Restricted Project

Tue, Dec 3

pengfei added a comment to D70874: [X86] Add initialization of MXCSR in llvm-exegesis.

Please note that currently we only state the rounding modes and the IEEE masks bits of MXCSR. This means instructions like VRSQRT14PS, which only have dependence on FTZ and DAZ, wouldn't be modeled.

FTZ and DAZ are modeled now by commit rGc8995de06994. Thanks.

Tue, Dec 3, 5:24 PM · Restricted Project
pengfei committed rGc8995de06994: [X86] Model DAZ and FTZ (authored by pengfei).
[X86] Model DAZ and FTZ
Tue, Dec 3, 4:38 PM
pengfei closed D70938: [X86] Model DAZ and FTZ.
Tue, Dec 3, 4:38 PM · Restricted Project
pengfei committed rGc1c673303dcf: [X86] Model MXCSR for all AVX512 instructions (authored by pengfei).
[X86] Model MXCSR for all AVX512 instructions
Tue, Dec 3, 4:29 PM
pengfei closed D70881: [X86] Model MXCSR for all AVX512 instructions.
Tue, Dec 3, 4:28 PM · Restricted Project

Mon, Dec 2

pengfei added inline comments to D70938: [X86] Model DAZ and FTZ.
Mon, Dec 2, 10:03 PM · Restricted Project
pengfei updated the diff for D70938: [X86] Model DAZ and FTZ.

Address review comments.

Mon, Dec 2, 10:03 PM · Restricted Project
pengfei added inline comments to D70881: [X86] Model MXCSR for all AVX512 instructions.
Mon, Dec 2, 9:35 PM · Restricted Project
pengfei updated the diff for D70881: [X86] Model MXCSR for all AVX512 instructions.

Address review comments.

Mon, Dec 2, 9:35 PM · Restricted Project
pengfei updated the diff for D70938: [X86] Model DAZ and FTZ.

Add test case.

Mon, Dec 2, 7:36 PM · Restricted Project
pengfei added a child revision for D70881: [X86] Model MXCSR for all AVX512 instructions: D70938: [X86] Model DAZ and FTZ.
Mon, Dec 2, 7:18 PM · Restricted Project
pengfei created D70938: [X86] Model DAZ and FTZ.
Mon, Dec 2, 7:18 PM · Restricted Project
pengfei added a parent revision for D70938: [X86] Model DAZ and FTZ: D70881: [X86] Model MXCSR for all AVX512 instructions.
Mon, Dec 2, 7:18 PM · Restricted Project
pengfei added a comment to D70881: [X86] Model MXCSR for all AVX512 instructions.

I think SAE instructions and embedded rounding instructions still read the DAZ and FTZ bits from MXCSR

I think so, but currently we don't model DAZ and FTZ, right?

The comment in X86RegisterInfo.td says that, but where was that discussed?

Mon, Dec 2, 5:26 PM · Restricted Project
pengfei committed rGcf81714a7eb3: [X86] Model MXCSR for AVX instructions other than AVX512 (authored by pengfei).
[X86] Model MXCSR for AVX instructions other than AVX512
Mon, Dec 2, 4:58 PM
pengfei closed D70875: [X86] Model MXCSR for AVX instructions other than AVX512.
Mon, Dec 2, 4:58 PM · Restricted Project
pengfei added a comment to D70881: [X86] Model MXCSR for all AVX512 instructions.
Mon, Dec 2, 4:16 PM · Restricted Project
pengfei added a comment to D70903: [llvm-exegesis] Fix 44b9942898c7..

Thanks and sorry for the mistake.

Mon, Dec 2, 4:07 PM · Restricted Project
pengfei added a comment to D70891: [X86] Add initialization of FPCW in llvm-exegesis.

Thanks for the review!

Mon, Dec 2, 4:21 AM · Restricted Project
pengfei committed rG76b70f6f75e9: [X86] Add initialization of FPCW in llvm-exegesis (authored by pengfei).
[X86] Add initialization of FPCW in llvm-exegesis
Mon, Dec 2, 4:21 AM
pengfei closed D70891: [X86] Add initialization of FPCW in llvm-exegesis.
Mon, Dec 2, 4:21 AM · Restricted Project
pengfei created D70891: [X86] Add initialization of FPCW in llvm-exegesis.
Mon, Dec 2, 3:44 AM · Restricted Project
pengfei added a comment to D70874: [X86] Add initialization of MXCSR in llvm-exegesis.

We make sure that every register that is used by an instruction in the snippet is initialized. This is to avoid having fluctuations in measurements due to performance depending on values in registers. I think it's great if SSE/AVX instructions start explicitly state their deps on MXCSR, because the behaviour does indeed depend on the value of these flags.

Thanks for the explanation. Please note that currently we only state the rounding modes and the IEEE masks bits of MXCSR. This means instructions like VRSQRT14PS, which only have dependence on FTZ and DAZ, wouldn't be modeled.

Mon, Dec 2, 2:41 AM · Restricted Project
pengfei committed rG44b9942898c7: [X86] Add initialization of MXCSR in llvm-exegesis (authored by pengfei).
[X86] Add initialization of MXCSR in llvm-exegesis
Mon, Dec 2, 2:32 AM
pengfei closed D70874: [X86] Add initialization of MXCSR in llvm-exegesis.
Mon, Dec 2, 2:32 AM · Restricted Project
pengfei updated the diff for D70881: [X86] Model MXCSR for all AVX512 instructions.

Address review comments.

Mon, Dec 2, 2:14 AM · Restricted Project
pengfei added a comment to D70881: [X86] Model MXCSR for all AVX512 instructions.

Removed MXCSR and mayRaiseExceptions from SAE opcodes.

Mon, Dec 2, 2:14 AM · Restricted Project

Sun, Dec 1

pengfei added a child revision for D70875: [X86] Model MXCSR for AVX instructions other than AVX512: D70881: [X86] Model MXCSR for all AVX512 instructions.
Sun, Dec 1, 6:12 PM · Restricted Project
pengfei added a parent revision for D70881: [X86] Model MXCSR for all AVX512 instructions: D70875: [X86] Model MXCSR for AVX instructions other than AVX512.
Sun, Dec 1, 6:12 PM · Restricted Project
pengfei created D70881: [X86] Model MXCSR for all AVX512 instructions.
Sun, Dec 1, 6:11 PM · Restricted Project
pengfei added a comment to D70874: [X86] Add initialization of MXCSR in llvm-exegesis.

I'm not sure I understand why this needs to be initialized. Why don't we need to do it for FPCW?

Sun, Dec 1, 2:17 AM · Restricted Project
pengfei updated the diff for D70874: [X86] Add initialization of MXCSR in llvm-exegesis.

Fix typo.

Sun, Dec 1, 1:59 AM · Restricted Project
pengfei added inline comments to D70874: [X86] Add initialization of MXCSR in llvm-exegesis.
Sun, Dec 1, 1:59 AM · Restricted Project

Sat, Nov 30

pengfei added a child revision for D70874: [X86] Add initialization of MXCSR in llvm-exegesis: D70875: [X86] Model MXCSR for AVX instructions other than AVX512.
Sat, Nov 30, 10:05 PM · Restricted Project
pengfei added a parent revision for D70875: [X86] Model MXCSR for AVX instructions other than AVX512: D70874: [X86] Add initialization of MXCSR in llvm-exegesis.
Sat, Nov 30, 10:05 PM · Restricted Project
pengfei created D70875: [X86] Model MXCSR for AVX instructions other than AVX512.
Sat, Nov 30, 10:05 PM · Restricted Project
pengfei created D70874: [X86] Add initialization of MXCSR in llvm-exegesis.
Sat, Nov 30, 9:56 PM · Restricted Project

Wed, Nov 27

pengfei committed rG1bc5c52afdcb: [X86][NFC] Rename test file for following changes. (authored by pengfei).
[X86][NFC] Rename test file for following changes.
Wed, Nov 27, 11:12 PM

Tue, Nov 26

pengfei accepted D70706: [X86][NFC] Modify the testcase name.

LGTM.

Tue, Nov 26, 4:33 AM · Restricted Project

Mon, Nov 25

pengfei updated subscribers of D69986: [X86] Bugfix for rL349334.
Mon, Nov 25, 10:01 PM · Restricted Project
pengfei committed rG92f1446b8b8a: [X86] Updated strict fp scalar tests and add fp80 tests for D68857, NFC. (authored by pengfei).
[X86] Updated strict fp scalar tests and add fp80 tests for D68857, NFC.
Mon, Nov 25, 9:45 PM
pengfei added a comment to D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86.

@pengfei : I've updated the D69281 patch, which will require follow-on changes here. In particular, signaling comparisons (STRICT_FSETCCS) need to be handled.

Mon, Nov 25, 5:40 PM · Restricted Project
pengfei accepted D70504: [X86] Add support for STRICT_FP_ROUND/STRICT_FP_EXTEND from/to fp128 to/from f32/f64/f80 in 64-bit mode..

LGTM.

Mon, Nov 25, 5:31 PM · Restricted Project

Fri, Nov 22

pengfei added a comment to D70504: [X86] Add support for STRICT_FP_ROUND/STRICT_FP_EXTEND from/to fp128 to/from f32/f64/f80 in 64-bit mode..

LGTM.

Fri, Nov 22, 12:05 AM · Restricted Project

Thu, Nov 21

pengfei added inline comments to D70504: [X86] Add support for STRICT_FP_ROUND/STRICT_FP_EXTEND from/to fp128 to/from f32/f64/f80 in 64-bit mode..
Thu, Nov 21, 9:28 PM · Restricted Project
pengfei committed rG085d7847aa6d: [X86] Add option 'disable-strictnode-mutation' for tests that respect strict fp… (authored by pengfei).
[X86] Add option 'disable-strictnode-mutation' for tests that respect strict fp…
Thu, Nov 21, 8:33 PM
pengfei updated the diff for D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86.

Fix a bug & Add Fix me to tests.

Thu, Nov 21, 7:39 PM · Restricted Project
pengfei added a child revision for D69281: [FPEnv] Constrained FCmp intrinsics: D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86.
Thu, Nov 21, 6:35 PM · Restricted Project
pengfei added a parent revision for D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86: D69281: [FPEnv] Constrained FCmp intrinsics.
Thu, Nov 21, 6:35 PM · Restricted Project
pengfei created D70582: [FPEnv][X86] Constrained FCmp intrinsics enabling on X86.
Thu, Nov 21, 6:35 PM · Restricted Project
pengfei committed rG22a0edd070e4: [FPEnv] Add an option to disable strict float node mutating to an normal float… (authored by pengfei).
[FPEnv] Add an option to disable strict float node mutating to an normal float…
Thu, Nov 21, 6:08 PM
pengfei closed D70226: Add an option to disable strict float node mutating to an normal float node.
Thu, Nov 21, 6:08 PM · Restricted Project

Tue, Nov 19

pengfei added a comment to D70224: [WinEH] Fix the wrong alignment orientation during calculating EH frame..

Thanks for the reminding! I will follow this rule in future work.

Tue, Nov 19, 7:48 PM · Restricted Project

Mon, Nov 18

pengfei added a comment to D70226: Add an option to disable strict float node mutating to an normal float node.

My main point is that the difference between 1) and 3) has to be determined on a case-by-case basis by inspecting the particular expansion sequence, and therefore this should be checked in-line in each expansion sequence. This is why I'd prefer to have each affected custom expansion sequence implementation directly the flag check whether or not strict semantics must be enforced or not; I don't believe this can be a single check just at the top of ExpandNode.

Thanks for the explanation! It very helpful for us to understand the workflow of strict semantics.

Mon, Nov 18, 5:58 PM · Restricted Project
pengfei updated subscribers of D70226: Add an option to disable strict float node mutating to an normal float node.
Mon, Nov 18, 6:58 AM · Restricted Project

Sun, Nov 17

pengfei added a comment to D70224: [WinEH] Fix the wrong alignment orientation during calculating EH frame..

Thanks for the detailed guidance. I have merged it to 9.0 branch now. Thank you!

Sun, Nov 17, 5:46 PM · Restricted Project
pengfei committed rG3437c7fc4470: [WinEH] Fix the wrong alignment orientation during calculating EH frame. (authored by pengfei).
[WinEH] Fix the wrong alignment orientation during calculating EH frame.
Sun, Nov 17, 5:12 PM

Fri, Nov 15

pengfei added inline comments to D70226: Add an option to disable strict float node mutating to an normal float node.
Fri, Nov 15, 1:08 AM · Restricted Project

Thu, Nov 14

pengfei added a comment to D70224: [WinEH] Fix the wrong alignment orientation during calculating EH frame..

Hi @rnk, I guess we need to merge it to 9.0 branch, right? I haven't did such before, do I need wait for someone approval? Is there someone responsible for committing, or I can do it myself?

Thu, Nov 14, 6:07 PM · Restricted Project
pengfei committed rG8723b95cefa4: [WinEH] Fix the wrong alignment orientation during calculating EH frame. (authored by pengfei).
[WinEH] Fix the wrong alignment orientation during calculating EH frame.
Thu, Nov 14, 5:49 PM
pengfei closed D70224: [WinEH] Fix the wrong alignment orientation during calculating EH frame..
Thu, Nov 14, 5:49 PM · Restricted Project

Wed, Nov 13

pengfei created D70224: [WinEH] Fix the wrong alignment orientation during calculating EH frame..
Wed, Nov 13, 11:29 PM · Restricted Project
pengfei updated subscribers of D70214: [X86] Add custom type legalization and lowering for scalar STRICT_FP_TO_SINT/UINT.
Wed, Nov 13, 5:18 PM · Restricted Project

Tue, Nov 12

pengfei added a comment to D68857: [X86] Add strict fp support for operations of X87 instructions.

How about we add a command line option to SelectionDAGISel to disable the mutation code and pass that option on the tests?

Tue, Nov 12, 9:52 PM · Restricted Project
pengfei added a comment to D68857: [X86] Add strict fp support for operations of X87 instructions.
Tue, Nov 12, 9:05 PM · Restricted Project

Nov 3 2019

pengfei committed rG8d7ccb37440e: Set the floating point status register as reserved (authored by pengfei).
Set the floating point status register as reserved
Nov 3 2019, 11:20 PM
pengfei closed D69784: Set the floating point status register as reserved.
Nov 3 2019, 11:20 PM · Restricted Project

Nov 2 2019

pengfei committed rGd5fc36bbdadf: [X86][NFC] Fix buildbot failure on clang-x64-windows-msvc after commit… (authored by pengfei).
[X86][NFC] Fix buildbot failure on clang-x64-windows-msvc after commit…
Nov 2 2019, 1:31 AM

Nov 1 2019

pengfei committed rG02728f49da7b: [X86] Model MXCSR for MMX FP instructions (authored by pengfei).
[X86] Model MXCSR for MMX FP instructions
Nov 1 2019, 10:18 PM
pengfei closed D69702: [X86] Model MXCSR for MMX FP instructions.
Nov 1 2019, 10:18 PM · Restricted Project
pengfei committed rGaf3a7de20c3f: [X86] add mayRaiseFPException flag and FPCW registers for X87 instructions (authored by pengfei).
[X86] add mayRaiseFPException flag and FPCW registers for X87 instructions
Nov 1 2019, 9:15 PM
pengfei closed D68854: [X86] add mayRaiseFPException flag and FPCW registers for X87 instructions.
Nov 1 2019, 9:15 PM · Restricted Project, Restricted Project

Oct 31 2019

pengfei created D69702: [X86] Model MXCSR for MMX FP instructions.
Oct 31 2019, 11:11 PM · Restricted Project
pengfei added inline comments to D68757: [X86] Add strict fp support for instructions fadd/fsub/fmul/fdiv.
Oct 31 2019, 1:44 AM · Restricted Project
pengfei abandoned D68686: [X86] Model MXCSR for [v]add|sub|mul|div* instructions.

This patch is abandoned due to the similar patch D68121 was accepted.

Oct 31 2019, 12:11 AM · Restricted Project

Oct 13 2019

pengfei updated the diff for D68757: [X86] Add strict fp support for instructions fadd/fsub/fmul/fdiv.

Add the missing attributes #0 = { strictfp }

Oct 13 2019, 8:23 PM · Restricted Project

Oct 10 2019

pengfei retitled D68686: [X86] Model MXCSR for [v]add|sub|mul|div* instructions from [X86] Add strict fp support for instructions fadd/fsub/fmul/fdiv to [X86] Model MXCSR for [v]add|sub|mul|div* instructions.
Oct 10 2019, 5:40 PM · Restricted Project

Oct 9 2019

pengfei updated the diff for D68757: [X86] Add strict fp support for instructions fadd/fsub/fmul/fdiv.

Rename scalar test file to fp-strict-scalar.

Oct 9 2019, 10:20 PM · Restricted Project
pengfei updated the diff for D68757: [X86] Add strict fp support for instructions fadd/fsub/fmul/fdiv.

Add test case for scalar instructions.

Oct 9 2019, 10:11 PM · Restricted Project
pengfei created D68757: [X86] Add strict fp support for instructions fadd/fsub/fmul/fdiv.
Oct 9 2019, 8:12 PM · Restricted Project
pengfei updated the diff for D68686: [X86] Model MXCSR for [v]add|sub|mul|div* instructions.

Separate strict node handling from former patch. This patch only models MXCSR.

Oct 9 2019, 7:17 PM · Restricted Project
pengfei created D68686: [X86] Model MXCSR for [v]add|sub|mul|div* instructions.
Oct 9 2019, 12:29 AM · Restricted Project

Sep 29 2019

pengfei added inline comments to D68121: [X86] Model MXCSR for all SSE instructions.
Sep 29 2019, 6:46 AM · Restricted Project
pengfei updated the diff for D68121: [X86] Model MXCSR for all SSE instructions.

Address review comments, add affected tests.

Sep 29 2019, 12:37 AM · Restricted Project

Sep 27 2019

pengfei added a comment to D68121: [X86] Model MXCSR for all SSE instructions.

Does this really not affect any tests? I would have thought some test would print MIR output that would show the implicit use that wasn't there before.

Sep 27 2019, 5:50 AM · Restricted Project
pengfei added a comment to D68121: [X86] Model MXCSR for all SSE instructions.

Instead of attributing all these instructions with MXCSR first wouldn't we be better off starting just attributing (V)LDMXCSR/(V)STMXCSR in this patch and then future patches sets up groups of instructions with suitable tests?

The difficult is we may have X87/SSE/AVX/AVX512 instructions under the same node, so I'm planning to mode the attribute of instructions by X87/SSE/AVX/AVX512 first, then set up instructions by node.
And we don't need to model MXCSR for (V)LDMXCSR/(V)STMXCSR, because they are using hasSideEffects and cannot be replaced due to we only modeling rounding and exception bits in MXCSR.

Sep 27 2019, 5:47 AM · Restricted Project

Sep 26 2019

pengfei created D68121: [X86] Model MXCSR for all SSE instructions.
Sep 26 2019, 11:41 PM · Restricted Project

Sep 25 2019

pengfei added a comment to D67839: [FPEnv] Document requirement of function attributes with constrained floating point.

@pengfei , do you think the "strictfp" attribute on an intrinsic would tell you enough for X86 instruction selection? I think for any x86 instructions that take rounding mode operands the intrinsic would already have that explicitly specified, right?

I think the exception attribute on architecture-specific intrinsics should accept option ignore/maytrap/strict like the constrained intrinsics do. "strictfp" is not enough if we want to attach exception attribute to intrinsic.
For rounding mode, AFAIK, some SSE/AVX intrinsics may implicitly use MXCSR.RC, e.g. __m128i _mm_cvtpd_epi32 (__m128d a), AVX512 intrinsics as well as partial SSE/AVX intrinsics can be specified through parameter, but they still may use MAXCSR.RC if specified with _MM_FROUND_CUR_DIRECTION. Should we attach the rounding attribute to intrinsic, if we had explicitly specified MXCSR.RC?

Sep 25 2019, 7:43 PM · Restricted Project

Sep 24 2019

pengfei committed rG1f3a15c3973e: [x86] Adding support for some missing intrinsics: _castf32_u32, _castf64_u64… (authored by pengfei).
[x86] Adding support for some missing intrinsics: _castf32_u32, _castf64_u64…
Sep 24 2019, 7:23 PM
pengfei committed rL372802: [x86] Adding support for some missing intrinsics: _castf32_u32, _castf64_u64….
[x86] Adding support for some missing intrinsics: _castf32_u32, _castf64_u64…
Sep 24 2019, 7:22 PM