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arsenm (Matt Arsenault)
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User Since
Dec 5 2012, 4:53 PM (494 w, 1 d)

Recent Activity

Tue, May 24

arsenm added inline comments to D126312: [AMDGPU] Fix image opcodes GlobalISel on gfx90a..
Tue, May 24, 12:29 PM · Restricted Project, Restricted Project

Mon, May 23

arsenm accepted D125766: [llvm-reduce] improve bb removal.

This isn’t the change I expected but should work for now. I’m working on the machine equivalent of this reduction now and may make additional changes here

Mon, May 23, 6:50 AM · Restricted Project, Restricted Project

Fri, May 20

arsenm added inline comments to D126025: AMDGPU: allow reordering of functions in AMDGPUResourceUsageAnalysis.
Fri, May 20, 1:25 AM · Restricted Project, Restricted Project, Restricted Project

Thu, May 19

arsenm added a comment to D87936: [GISel] Add new combines for G_ADD.

I think addressing modes are less of a factor given that g_ptr_add is separate

Thu, May 19, 10:55 AM · Restricted Project, Restricted Project
arsenm added a comment to D87936: [GISel] Add new combines for G_ADD.

I think addressing modes are less of a factor given that g_ptr_add is separate

Thu, May 19, 10:54 AM · Restricted Project, Restricted Project

Wed, May 18

arsenm requested changes to D125846: [StackProtector] Allow targets to specify an instruction is part of terminator sequence.

Why can't you just mark these instructions as being terminators? AMDGPU has to glue a lot of ALU instructions to terminators, and we just define terminator and nonterminator pseudo variants

Wed, May 18, 3:26 PM · Restricted Project, Restricted Project
arsenm added a comment to D87936: [GISel] Add new combines for G_ADD.

I do think the add -> or has some value, but it should be separate with the helper function

Wed, May 18, 3:16 PM · Restricted Project, Restricted Project
arsenm added a comment to D124044: llvm-reduce: Add pass to reduce MIR instruction flags.

As far as FrameSetup/FrameDestroy are concerned, it's a bug if the targets break on them.

You can probably debate that with target authors :)... Anyway I don't have strong feelings and this seems valuable to move forward with.

If there's some required property, it would need to be checked by the verifier. If it's not checked by the verifier, you can't rely on it. Cases that fail the verifier are filtered out

Wed, May 18, 2:05 PM · Restricted Project, Restricted Project
arsenm requested changes to D125766: [llvm-reduce] improve bb removal.
Wed, May 18, 2:02 PM · Restricted Project, Restricted Project
arsenm added a comment to D124044: llvm-reduce: Add pass to reduce MIR instruction flags.

ping

Wed, May 18, 2:00 PM · Restricted Project, Restricted Project
arsenm accepted D125819: [GISel] Add new combines for G_FMINNUM/MAXNUM and G_FMINIMUM/MAXIMUM.
Wed, May 18, 11:58 AM · Restricted Project, Restricted Project
arsenm added a comment to D125766: [llvm-reduce] improve bb removal.

If you blindly scan forward, you're going to run into blocks that have phis that are now missing an input for the new predecessor

Wed, May 18, 9:35 AM · Restricted Project, Restricted Project
arsenm accepted D125900: [AMDGPU][NFC] Fix FileCheck directives in phi-vgpr-input-moveimm.mir..

LGTM, this kind of fix doesn't really need review

Wed, May 18, 9:12 AM · Restricted Project, Restricted Project
arsenm added a comment to D125335: Give option to use isCopyInstr to determine which MI is treated as Copy instruction in MCP.

Can you avoid adding a second run by moving the current run? The ad-hoc physreg liveness tracking after allocation is really expensive

Wed, May 18, 9:09 AM · Restricted Project, Restricted Project
arsenm added a comment to D88595: [TableGen] Add not_all_same constraint check.

Could you use hasExtraSrcRegAllocReq/hasExtraDefRegAllocReq?

Wed, May 18, 8:25 AM · Restricted Project, Restricted Project

Tue, May 17

arsenm added a comment to D123943: MachineModuleInfo: Move AddrLabelSymbols to AsmPrinter.

Hi Matt @arsenm !

May I check with you why commit https://reviews.llvm.org/rG9209a519180b478f7a77d7c4781ea857536d77ed does not have a link to this patch?

Thanks!!

FYI @zibi

I don't use arc which adds those comments

Ah got it! Thanks so much for getting back to me! I am a new contributor so I am trying to understand the convention from the community. If you don't mind, could you help me understand if I myself should or should not use arc? For commits I am working myself, should I link the reviews to them? Could you offer some pointers for me to stare at? I have gone through https://llvm.org/docs/Contributing.html#how-to-submit-a-patch and https://llvm.org/docs/CodeReview.html and it is not clear to me what convention I should follow.

Thanks for your patience!

Tue, May 17, 3:14 PM · Restricted Project, Restricted Project
arsenm added inline comments to D124219: [AMDGPU] Fine tune LDS misaligned access speed.
Tue, May 17, 3:07 PM · Restricted Project, Restricted Project
arsenm requested changes to D124192: [AMDGPU] Callee must always spill writelane VGPRs.
Tue, May 17, 3:06 PM · Restricted Project, Restricted Project
arsenm added inline comments to D124193: [AMDGPU] Add WWM reserved VGPRs to lane VGPRs list.
Tue, May 17, 2:55 PM · Restricted Project, Restricted Project
arsenm added inline comments to D124508: [NFC][AMDGPU][CodeGen] Use ArrayRef in TargetLowering functions.
Tue, May 17, 2:53 PM · Restricted Project, Restricted Project
arsenm added inline comments to D124671: [AMDGPU] Do not raise wave priority beyond a specific number of VALU instructions..
Tue, May 17, 2:46 PM · Restricted Project, Restricted Project
arsenm added inline comments to D124192: [AMDGPU] Callee must always spill writelane VGPRs.
Tue, May 17, 2:40 PM · Restricted Project, Restricted Project
arsenm added inline comments to D124219: [AMDGPU] Fine tune LDS misaligned access speed.
Tue, May 17, 2:38 PM · Restricted Project, Restricted Project
arsenm added a comment to D123508: GlobalISel: Allow forming atomic/volatile G_ZEXTLOAD.

At a high level, I do very much think having atomic loads simply be normal loads with some atomic flags makes a lot of sense.

Tue, May 17, 2:36 PM · Restricted Project, Restricted Project
arsenm added inline comments to D124697: Distinguish between different forms of "address-taken" MachineBasicBlocks.
Tue, May 17, 2:08 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125824: [AMDGPU] gfx11 export instructions.
Tue, May 17, 1:58 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125515: [WebAssembly] Fix register use-def in FixIrreducibleControlFlow.
Tue, May 17, 1:53 PM · Restricted Project, Restricted Project
arsenm accepted D114643: [AMDGPU] Aggressively fold immediates in SIFoldOperands.
Tue, May 17, 1:20 PM · Restricted Project, Restricted Project
arsenm accepted D125822: [AMDGPU] gfx11 scalar memory instructions.
Tue, May 17, 1:00 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125819: [GISel] Add new combines for G_FMINNUM/MAXNUM and G_FMINIMUM/MAXIMUM.
Tue, May 17, 12:58 PM · Restricted Project, Restricted Project
arsenm accepted D125803: [AMDGPU] Shrink F16 MAD/FMA to MADAK/MADMK/FMAAK/FMAMK on GFX10.
Tue, May 17, 12:39 PM · Restricted Project, Restricted Project
arsenm accepted D114644: [AMDGPU] Aggressively fold immediates in SIShrinkInstructions.
Tue, May 17, 12:14 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125820: [AMDGPU] gfx11 LDSDIR instructions MC support.
Tue, May 17, 11:55 AM · Restricted Project, Restricted Project
arsenm accepted D125126: [AMDGPU] Enable FLAT LDS DMA on gfx9/10 before gfx940.
Tue, May 17, 11:54 AM · Restricted Project, Restricted Project
arsenm added inline comments to D124218: [LoadStoreVectorizer] Consider if operation is faster than before.
Tue, May 17, 9:04 AM · Restricted Project, Restricted Project
arsenm accepted D124884: [AMDGPU] Add intrinsics llvm.amdgcn.{raw|struct}.buffer.load.lds.
Tue, May 17, 9:03 AM · Restricted Project, Restricted Project
arsenm added inline comments to D114643: [AMDGPU] Aggressively fold immediates in SIFoldOperands.
Tue, May 17, 9:02 AM · Restricted Project, Restricted Project
arsenm accepted D125753: [AMDGPU][MC][GFX10] Add missing s_scratch_load tests..
Tue, May 17, 9:01 AM · Restricted Project, Restricted Project
arsenm accepted D125498: [AMDGPU] gfx11 scalar alu instructions.
Tue, May 17, 8:23 AM · Restricted Project, Restricted Project
arsenm added a comment to D125680: Correctly legalise stackmap operands.

I don't particularly care about splitting the patch. You can't really break this down very far, and the individual changes aren't really individually testable

Tue, May 17, 8:17 AM · Restricted Project, Restricted Project
arsenm added inline comments to D125759: [AMDGPU] Remove isLiteralConstant and isLiteralConstantLike.
Tue, May 17, 7:34 AM · Restricted Project, Restricted Project
arsenm added inline comments to D125680: Correctly legalise stackmap operands.
Tue, May 17, 7:30 AM · Restricted Project, Restricted Project
arsenm added inline comments to D125759: [AMDGPU] Remove isLiteralConstant and isLiteralConstantLike.
Tue, May 17, 6:27 AM · Restricted Project, Restricted Project
arsenm added a comment to D125212: [GlobalISel] Implement the Has{No}Use builtin predicates.

I agree with you on omitting the predicates if the field is set to
false/uninitialized. In that case, how about we add the following to
PatFrags:

// If set to true, a predicate is added that checks for at least one use of
// the return value; Otherwise no predicate is added.
bit HasUse = ?;
// If set to true, a predicate is added that checks for no use of the return
// value; Otherwise no predicate is added.
//
// The TableGen backend asserts that both HasUse and HasNoUse is not set to
// true.
bit HasNoUse = ?;
Tue, May 17, 6:26 AM · Restricted Project, Restricted Project
arsenm added inline comments to D125700: [AMDGPU][GFX9] Support base+soffset+offset SMEM loads..
Tue, May 17, 6:21 AM · Restricted Project, Restricted Project

Mon, May 16

arsenm accepted D124843: AMDGPU: Add G_AMDGPU_MAD_64_32 instructions.
Mon, May 16, 3:55 PM · Restricted Project, Restricted Project
arsenm accepted D124844: AMDGPU/GISel: Introduce custom legalization of G_MUL.
Mon, May 16, 3:50 PM · Restricted Project, Restricted Project
arsenm added a comment to D124844: AMDGPU/GISel: Introduce custom legalization of G_MUL.

I do plan to look into handling zero-/sign-extended sources soon. My current thinking is to make GISelKnownBits available during legalization. Are there any concerns with that / does anybody have a better idea?

Mon, May 16, 3:43 PM · Restricted Project, Restricted Project
arsenm added inline comments to D124843: AMDGPU: Add G_AMDGPU_MAD_64_32 instructions.
Mon, May 16, 3:30 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125515: [WebAssembly] Fix register use-def in FixIrreducibleControlFlow.
Mon, May 16, 3:17 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125719: [Attribute] Add attribute NeverOptimizeNone.
Mon, May 16, 3:13 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125279: [AMDGPU] Add llvm.amdgcn.global.load.lds intrinsic.
Mon, May 16, 3:00 PM · Restricted Project, Restricted Project
arsenm added a comment to D125212: [GlobalISel] Implement the Has{No}Use builtin predicates.

I do think there should be a builtin hasOneUse pattern predicate the emitter could use to verify

If we have a bit HasNoUse builtin predicate in PatFrags we can get the matcher
table to check the empty usage of the result without the generic C++ predicates.
The problem I'm seeing here is that the default behaviour should be to not check
for the use count since most of the selection doesn't care about it. Having a
ternary HasNoUse builtin is fine since we could set it to false for selection
that needs at least 1 use (e.g.: AMDGPU's return atomic ops), true for selection
that needs no use (e.g.: AMDGPU's no return atomic ops), "don't care" for the
majority of the other selections. I don't think we can rely on the '?'
(uninitialized) value since TreePredicateFn::isPredefinedPredicateEqualTo()
return false for uninitialized fields.

How should we do this?

Mon, May 16, 2:56 PM · Restricted Project, Restricted Project
arsenm accepted D125324: AMDGPU/GISel: Factor out AMDGPURegisterBankInfo::buildReadFirstLane.
Mon, May 16, 2:52 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125279: [AMDGPU] Add llvm.amdgcn.global.load.lds intrinsic.
Mon, May 16, 2:50 PM · Restricted Project, Restricted Project
arsenm added inline comments to D124697: Distinguish between different forms of "address-taken" MachineBasicBlocks.
Mon, May 16, 2:44 PM · Restricted Project, Restricted Project
arsenm added a comment to D125404: [SPIRV] Add simple tests to improve test coverage.

Removed more metadata mentioned by @zuban32 and removed dynamic-memmove.ll and experimental.noalias.scope.decl.ll tests mentioned by @arsenm .

Mon, May 16, 2:39 PM · Restricted Project, Restricted Project
arsenm accepted D125279: [AMDGPU] Add llvm.amdgcn.global.load.lds intrinsic.

Typo amdgc. in description

Mon, May 16, 2:39 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125498: [AMDGPU] gfx11 scalar alu instructions.
Mon, May 16, 2:18 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125404: [SPIRV] Add simple tests to improve test coverage.
Mon, May 16, 2:11 PM · Restricted Project, Restricted Project
arsenm added inline comments to D124884: [AMDGPU] Add intrinsics llvm.amdgcn.{raw|struct}.buffer.load.lds.
Mon, May 16, 2:10 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125680: Correctly legalise stackmap operands.
Mon, May 16, 2:03 PM · Restricted Project, Restricted Project
arsenm added a comment to D125700: [AMDGPU][GFX9] Support base+soffset+offset SMEM loads..

I thought we codegened these already? Is this missing a codegen change to use the offsets?

Mon, May 16, 2:01 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125700: [AMDGPU][GFX9] Support base+soffset+offset SMEM loads..
Mon, May 16, 2:00 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125404: [SPIRV] Add simple tests to improve test coverage.
Mon, May 16, 1:55 PM · Restricted Project, Restricted Project
arsenm added a comment to D125335: Give option to use isCopyInstr to determine which MI is treated as Copy instruction in MCP.

I don't understand the problem this is supposed to solve

Mon, May 16, 1:51 PM · Restricted Project, Restricted Project
arsenm accepted D125699: [StackColoring] Don't merge slots with differing StackIDs.

I feel like I fixed this one before

Mon, May 16, 1:47 PM · Restricted Project, Restricted Project
arsenm added inline comments to D125680: Correctly legalise stackmap operands.
Mon, May 16, 6:44 AM · Restricted Project, Restricted Project
arsenm added inline comments to D77804: [DAG] Enable ISD::SRL SimplifyMultipleUseDemandedBits handling inside SimplifyDemandedBits (WIP).
Mon, May 16, 6:23 AM · Restricted Project, Restricted Project
arsenm added inline comments to D125680: Correctly legalise stackmap operands.
Mon, May 16, 6:20 AM · Restricted Project, Restricted Project
arsenm accepted D125567: [AMDGPU] Shrink MAD/FMA to MADAK/MADMK/FMAAK/FMAMK on GFX10.
Mon, May 16, 6:18 AM · Restricted Project, Restricted Project
arsenm added inline comments to D77804: [DAG] Enable ISD::SRL SimplifyMultipleUseDemandedBits handling inside SimplifyDemandedBits (WIP).
Mon, May 16, 6:17 AM · Restricted Project, Restricted Project
arsenm added inline comments to D125567: [AMDGPU] Shrink MAD/FMA to MADAK/MADMK/FMAAK/FMAMK on GFX10.
Mon, May 16, 6:06 AM · Restricted Project, Restricted Project
arsenm added inline comments to D125680: Correctly legalise stackmap operands.
Mon, May 16, 6:04 AM · Restricted Project, Restricted Project
arsenm accepted D125565: [AMDGPU] Extract SIInstrInfo::removeModOperands. NFC..
Mon, May 16, 1:33 AM · Restricted Project, Restricted Project

Sat, May 14

arsenm accepted D125612: [AMDGPU] Fix typo in cttz_zero_undef(x) -> cttz(x) fold test.
Sat, May 14, 12:19 PM · Restricted Project, Restricted Project
arsenm added a comment to D123878: [AMDGPU] Add remarks to output some resource usage.

If possible, I would like to keep some kind of delimiter. I like the idea of having it at the beginning and at the end of the section. The best option would be to convince clang to print new lines.

But it’s not a section and no actual grouping concept here. You just happen to see this printed in order. Any delimiter should be introduced as a display function, not emitted as part of the remarks themselves

Sat, May 14, 3:10 AM · Restricted Project, Restricted Project, Restricted Project

Fri, May 13

arsenm accepted D125566: [AMDGPU] SIShrinkInstructions: change static functions to methods.
Fri, May 13, 10:41 AM · Restricted Project, Restricted Project
arsenm added inline comments to D125565: [AMDGPU] Extract SIInstrInfo::removeModOperands. NFC..
Fri, May 13, 10:33 AM · Restricted Project, Restricted Project
arsenm accepted D125516: [GlobalISel] Handle constant splat in funnel shift combine.
Fri, May 13, 6:53 AM · Restricted Project, Restricted Project
arsenm added inline comments to D124884: [AMDGPU] Add intrinsics llvm.amdgcn.{raw|struct}.buffer.load.lds.
Fri, May 13, 2:55 AM · Restricted Project, Restricted Project
arsenm added inline comments to D125409: [AMDGPU] Revert wide LDS DMA support..
Fri, May 13, 2:51 AM · Restricted Project, Restricted Project

Thu, May 12

arsenm added a comment to D125498: [AMDGPU] gfx11 scalar alu instructions.

Missing test for intrinsics selection?

Thu, May 12, 2:57 PM · Restricted Project, Restricted Project

Wed, May 11

arsenm added inline comments to D120150: Constant folding of llvm.amdgcn.trig.preop.
Wed, May 11, 4:18 PM · Restricted Project, Restricted Project

Mon, May 9

arsenm added inline comments to D124697: Distinguish between different forms of "address-taken" MachineBasicBlocks.
Mon, May 9, 10:06 AM · Restricted Project, Restricted Project
arsenm added a comment to D125212: [GlobalISel] Implement the Has{No}Use builtin predicates.

I do think there should be a builtin hasOneUse pattern predicate the emitter could use to verify

Mon, May 9, 2:49 AM · Restricted Project, Restricted Project
arsenm accepted D125213: [AMDGPU][GlobalISel] Enable no-ret atomic selection.
Mon, May 9, 2:48 AM · Restricted Project, Restricted Project

Sat, May 7

arsenm accepted D125173: [AMDGPU] lowerEXTRACT_VECTOR_ELT - fold from a SCALAR_TO_VECTOR source.
Sat, May 7, 10:39 AM · Restricted Project, Restricted Project
arsenm added a comment to D125126: [AMDGPU] Enable FLAT LDS DMA on gfx9/10 before gfx940.

A potentially better alternative is to use gfx940 names with _LDS_ in the mnemonic instead of a modifier. This is logically a different opcode anyway. The only downside it is not compatible with the documentation and sp3. But then it was not implemented before and therefore not used, so there shall be no compatibility problem on practice. Well, it will also be different from MUBUF. Given the difference in both semantics and addressing mode I personally would prefer it to be different opcodes. At a pseudo level it is certainly easier to have separate ops for this.

Preferences?

Sat, May 7, 2:58 AM · Restricted Project, Restricted Project
arsenm added inline comments to D124697: Distinguish between different forms of "address-taken" MachineBasicBlocks.
Sat, May 7, 2:52 AM · Restricted Project, Restricted Project

Fri, May 6

arsenm added a comment to D125102: [RegAllocGreedy] New hook regClassPriorityTrumpsGlobalness.

Also could use a test where it makes a difference

Fri, May 6, 10:29 AM · Restricted Project, Restricted Project
arsenm added a comment to D125060: [amdgpu][wip] Implement lds kernel id intrinsic.

I have to look closer but my main concern is about adding an SGPR argument for this. It doesn’t correspond to a real kernel input, and we didn’t add this to the new ABI register layout proposal. What happened to using some kind of relocation for the kernel ID?

Fri, May 6, 7:20 AM · Restricted Project, Restricted Project

Thu, May 5

arsenm added inline comments to D125041: [GlobalISel] Combine G_SHL, G_ASHR, G_SHL of undef shifts to undef..
Thu, May 5, 1:59 PM · Restricted Project, Restricted Project

Wed, May 4

arsenm added inline comments to D124884: [AMDGPU] Add intrinsics llvm.amdgcn.{raw|struct}.buffer.load.lds.
Wed, May 4, 2:33 PM · Restricted Project, Restricted Project
arsenm accepted D122091: [amdgpu] Elide module lds allocation in kernels with no callees.
Wed, May 4, 1:59 PM · Restricted Project, Restricted Project
arsenm accepted D124550: [AMDGPU] Handle LDS DMA and LDS_DIRECT hazards.
Wed, May 4, 1:58 PM · Restricted Project, Restricted Project
arsenm added a comment to D124915: Check for resource exhaustion when recursively parsing declarators.

I think I've seen this one before

Wed, May 4, 5:03 AM · Restricted Project, Restricted Project
arsenm added inline comments to D124843: AMDGPU: Add G_AMDGPU_MAD_64_32 instructions.
Wed, May 4, 4:55 AM · Restricted Project, Restricted Project
arsenm added a comment to D124884: [AMDGPU] Add intrinsics llvm.amdgcn.{raw|struct}.buffer.load.lds.

What's wrong with the idea of an i32 imm %size argument? That seems to me more in line with the philosophy of caring less about types.

Wed, May 4, 4:26 AM · Restricted Project, Restricted Project
arsenm added a comment to D124884: [AMDGPU] Add intrinsics llvm.amdgcn.{raw|struct}.buffer.load.lds.

To confirm: is that OK to add yet another imm to the end of operands of the intrinsic to select a byte size? And then remove the overload. If yes I will do it tomorrow.

There's the elementtype attribute for this case which some arm intrinsics seem to be using. Not sure how you're supposed to define an intrinsic to use it though

Wed, May 4, 2:57 AM · Restricted Project, Restricted Project