Page MenuHomePhabricator

[WIP][RISCV][GlobalISel] Select ALU GPR instructions
Needs ReviewPublic

Authored by lewis-revill on Mar 19 2020, 12:22 PM.

Details

Reviewers
asb
simoncook
Joe
Summary

Some instruction selection patterns required for ALU GPR instructions have already been automatically imported from existing TableGen descriptions - this patch simply adds testing for them. Logic for selecting constants and copies has been added.

Diff Detail

Unit TestsFailed

TimeTest
5,560 msLLVM.CodeGen/RISCV/GlobalISel/instruction-select::Unknown Unit Message ("")
Script: -- : 'RUN: at line 1'; /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/llc -march=riscv32 -x mir -run-pass=instruction-select -simplify-mir -verify-machineinstrs < /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu32.mir | /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/FileCheck -check-prefix=RV32I /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu32.mir
5,400 msLLVM.CodeGen/RISCV/GlobalISel/instruction-select::Unknown Unit Message ("")
Script: -- : 'RUN: at line 1'; /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/llc -march=riscv32 -mattr=+m -x mir -run-pass=instruction-select -simplify-mir -verify-machineinstrs < /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu32_m.mir | /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/FileCheck -check-prefix=RV32I /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu32_m.mir
5,520 msLLVM.CodeGen/RISCV/GlobalISel/instruction-select::Unknown Unit Message ("")
Script: -- : 'RUN: at line 1'; /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/llc -march=riscv64 -x mir -run-pass=instruction-select -simplify-mir -verify-machineinstrs < /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu64.mir | /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/FileCheck -check-prefix=RV64I /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu64.mir
5,470 msLLVM.CodeGen/RISCV/GlobalISel/instruction-select::Unknown Unit Message ("")
Script: -- : 'RUN: at line 1'; /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/llc -march=riscv64 -mattr=+m -x mir -run-pass=instruction-select -simplify-mir -verify-machineinstrs < /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu64_m.mir | /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/FileCheck -check-prefix=RV64I /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu64_m.mir

Event Timeline

lewis-revill created this revision.Mar 19 2020, 12:22 PM

Add tests for AND/OR/XOR.

Use utils/update_mir_test_checks.py

lewis-revill retitled this revision from [RISCV][GlobalISel] Add tests for selecting ALU GPR instructions to [WIP][RISCV][GlobalISel] Select ALU GPR instructions.
lewis-revill edited the summary of this revision. (Show Details)

Add custom selection for copies and for constants. Significantly expand tests over more types.

Bug fix - ensure selectConstant produces copies with fully constrained registers.

arsenm added a subscriber: arsenm.Aug 11 2020, 12:36 PM

Missing copy tests for all permutations of virtual and physical registers

llvm/lib/Target/RISCV/RISCVInstructionSelector.cpp
114–115 ↗(On Diff #258538)

This can't early return, it still needs to constrain a virtual source