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Differential D76445

[WIP][RISCV][GlobalISel] Select ALU GPR instructions
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Authored by lewis-revill on Mar 19 2020, 12:22 PM.

Details

Reviewers
asb
simoncook
Joe
Summary

Some instruction selection patterns required for ALU GPR instructions have already been automatically imported from existing TableGen descriptions - this patch simply adds testing for them. Logic for selecting constants and copies has been added.

Diff Detail

Unit TestsFailed
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TimeTest
5,560 msLLVM.CodeGen/RISCV/GlobalISel/instruction-select::Unknown Unit Message ("")
Script: -- : 'RUN: at line 1'; /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/llc -march=riscv32 -x mir -run-pass=instruction-select -simplify-mir -verify-machineinstrs < /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu32.mir | /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/FileCheck -check-prefix=RV32I /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu32.mir
5,400 msLLVM.CodeGen/RISCV/GlobalISel/instruction-select::Unknown Unit Message ("")
Script: -- : 'RUN: at line 1'; /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/llc -march=riscv32 -mattr=+m -x mir -run-pass=instruction-select -simplify-mir -verify-machineinstrs < /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu32_m.mir | /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/FileCheck -check-prefix=RV32I /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu32_m.mir
5,520 msLLVM.CodeGen/RISCV/GlobalISel/instruction-select::Unknown Unit Message ("")
Script: -- : 'RUN: at line 1'; /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/llc -march=riscv64 -x mir -run-pass=instruction-select -simplify-mir -verify-machineinstrs < /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu64.mir | /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/FileCheck -check-prefix=RV64I /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu64.mir
5,470 msLLVM.CodeGen/RISCV/GlobalISel/instruction-select::Unknown Unit Message ("")
Script: -- : 'RUN: at line 1'; /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/llc -march=riscv64 -mattr=+m -x mir -run-pass=instruction-select -simplify-mir -verify-machineinstrs < /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu64_m.mir | /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/build/bin/FileCheck -check-prefix=RV64I /mnt/disks/ssd0/agent/workspace/amd64_debian_testing_clang8/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu64_m.mir

Event Timeline

lewis-revill created this revision.Mar 19 2020, 12:22 PM
Herald added a project: Restricted Project. · View Herald TranscriptMar 19 2020, 12:22 PM
Herald added subscribers: llvm-commits, evandro, luismarques and 26 others. · View Herald Transcript
Harbormaster failed remote builds in B49778: Diff 251435!Mar 19 2020, 1:09 PM
lewis-revill added parent revisions: D76051: [WIP][RISCV][GlobalISel] Select register banks for GPR ALU instructions, D76354: [WIP][RISCV][GlobalISel] Legalize types for ALU operations.Apr 1 2020, 3:54 AM
lewis-revill updated this revision to Diff 255758.Apr 7 2020, 12:09 PM

Add tests for AND/OR/XOR.

Harbormaster failed remote builds in B52206: Diff 255758!Apr 7 2020, 1:04 PM
lewis-revill updated this revision to Diff 256533.Apr 10 2020, 2:31 AM

Use utils/update_mir_test_checks.py

Harbormaster failed remote builds in B52653: Diff 256533!Apr 10 2020, 3:12 AM
lewis-revill updated this revision to Diff 258267.Apr 17 2020, 2:18 AM
lewis-revill retitled this revision from [RISCV][GlobalISel] Add tests for selecting ALU GPR instructions to [WIP][RISCV][GlobalISel] Select ALU GPR instructions.
lewis-revill edited the summary of this revision. (Show Details)

Add custom selection for copies and for constants. Significantly expand tests over more types.

Herald added a subscriber: hiraditya. · View Herald TranscriptApr 17 2020, 2:18 AM
Harbormaster failed remote builds in B53699: Diff 258267!Apr 17 2020, 2:40 AM
lewis-revill updated this revision to Diff 258538.Apr 18 2020, 12:00 PM

Bug fix - ensure selectConstant produces copies with fully constrained registers.

Harbormaster failed remote builds in B53860: Diff 258538!Apr 18 2020, 12:22 PM
arsenm added a subscriber: arsenm.Aug 11 2020, 12:36 PM

Missing copy tests for all permutations of virtual and physical registers

llvm/lib/Target/RISCV/RISCVInstructionSelector.cpp
114–115 ↗(On Diff #258538)

This can't early return, it still needs to constrain a virtual source

craig.topper mentioned this in D91931: [RISCV][GlobalISel] Select add i32, i32.Nov 22 2020, 11:09 AM

Revision Contents
Changeset List

PathSize
llvm/
test/
CodeGen/
RISCV/
GlobalISel/
instruction-select/
57 lines
132 lines
57 lines
132 lines

Diff 251435

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llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu32.mir

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llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu32_m.mir

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llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu64.mir

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llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu64_m.mir

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