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aemerson (Amara Emerson)
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Sep 9 2013, 3:45 AM (289 w, 17 h)

Compilers at a fruit company

Recent Activity

Fri, Mar 22

aemerson added a comment to D59615: [AArch64] When creating SISD intrinsic calls widen scalar args into a zero vectors, not undef.

Did you look into a scalar variant of the intrinsic call instead? These instructions have non-vector variants (e.g. sqadd s0, s0, s0), and that's actually why the intrinsics exist in the first place. It'd be a shame to always require this extra work.

This looks quite involved as the scalar intrinsics have illegal types etc, and at the moment I don't have a lot of time to spend on this, it was just intended as a fix for the unstable tests: http://lab.llvm.org:8011/builders/clang-cmake-aarch64-lld/builds/6257

Fri, Mar 22, 2:44 PM · Restricted Project

Thu, Mar 21

aemerson committed rGc10b24691a02: [AArch64] Split the neon.addp intrinsic into integer and fp variants. (authored by aemerson).
[AArch64] Split the neon.addp intrinsic into integer and fp variants.
Thu, Mar 21, 3:31 PM
aemerson committed rC356722: [AArch64] Split the neon.addp intrinsic into integer and fp variants..
[AArch64] Split the neon.addp intrinsic into integer and fp variants.
Thu, Mar 21, 3:30 PM
aemerson committed rL356722: [AArch64] Split the neon.addp intrinsic into integer and fp variants..
[AArch64] Split the neon.addp intrinsic into integer and fp variants.
Thu, Mar 21, 3:30 PM
aemerson closed D59655: [AArch64] Split the neon.addp intrinsic into integer and fp variants.
Thu, Mar 21, 3:30 PM · Restricted Project, Restricted Project
aemerson updated the diff for D59657: [LangRef] Clarify codegen expectations for intrinsics with fp/integer-only overloads.

Re-wording and making it more explicit who this is for.

Thu, Mar 21, 3:02 PM · Restricted Project
aemerson updated the diff for D59655: [AArch64] Split the neon.addp intrinsic into integer and fp variants.

Simplify logic and don't try to upgrade if IR is invalid.

Thu, Mar 21, 1:50 PM · Restricted Project, Restricted Project
aemerson added inline comments to D59655: [AArch64] Split the neon.addp intrinsic into integer and fp variants.
Thu, Mar 21, 1:00 PM · Restricted Project, Restricted Project
aemerson added a comment to D59657: [LangRef] Clarify codegen expectations for intrinsics with fp/integer-only overloads.

I don't understand what this is supposed to mean to who the audience of this statement is?

Thu, Mar 21, 12:19 PM · Restricted Project
aemerson created D59657: [LangRef] Clarify codegen expectations for intrinsics with fp/integer-only overloads.
Thu, Mar 21, 11:27 AM · Restricted Project
aemerson added a comment to D59655: [AArch64] Split the neon.addp intrinsic into integer and fp variants.

I've put up a langref change as a separate review: D59657

Thu, Mar 21, 11:27 AM · Restricted Project, Restricted Project
aemerson updated the diff for D59655: [AArch64] Split the neon.addp intrinsic into integer and fp variants.

Minor test tweak.

Thu, Mar 21, 11:01 AM · Restricted Project, Restricted Project
aemerson created D59655: [AArch64] Split the neon.addp intrinsic into integer and fp variants.
Thu, Mar 21, 10:57 AM · Restricted Project, Restricted Project

Wed, Mar 20

aemerson created D59615: [AArch64] When creating SISD intrinsic calls widen scalar args into a zero vectors, not undef.
Wed, Mar 20, 2:40 PM · Restricted Project

Tue, Mar 19

aemerson committed rG761ca2e53b84: [AArch64][GlobalISel] Add an optimization to select vector DUP instructions. (authored by aemerson).
[AArch64][GlobalISel] Add an optimization to select vector DUP instructions.
Tue, Mar 19, 2:43 PM
aemerson committed rG18e2c5724ac6: [AArch64][GlobalISel] Make v4s32 G_IMPLICIT_DEF legal. (authored by aemerson).
[AArch64][GlobalISel] Make v4s32 G_IMPLICIT_DEF legal.
Tue, Mar 19, 2:42 PM
aemerson committed rL356526: [AArch64][GlobalISel] Add an optimization to select vector DUP instructions..
[AArch64][GlobalISel] Add an optimization to select vector DUP instructions.
Tue, Mar 19, 2:42 PM
aemerson closed D59558: [AArch64][GlobalISel] Add an optimization to select vector DUP instructions.
Tue, Mar 19, 2:42 PM · Restricted Project
aemerson committed rL356525: [AArch64][GlobalISel] Make v4s32 G_IMPLICIT_DEF legal..
[AArch64][GlobalISel] Make v4s32 G_IMPLICIT_DEF legal.
Tue, Mar 19, 2:42 PM
aemerson created D59558: [AArch64][GlobalISel] Add an optimization to select vector DUP instructions.
Tue, Mar 19, 1:28 PM · Restricted Project

Mon, Mar 18

aemerson committed rGa140276a1e0f: [GlobalISel] Include missing change from r356396 (authored by aemerson).
[GlobalISel] Include missing change from r356396
Mon, Mar 18, 2:29 PM
aemerson committed rL356411: [GlobalISel] Include missing change from r356396.
[GlobalISel] Include missing change from r356396
Mon, Mar 18, 2:29 PM
aemerson committed rG8627178d4680: Revert r356304: remove subreg parameter from MachineIRBuilder::buildCopy() (authored by aemerson).
Revert r356304: remove subreg parameter from MachineIRBuilder::buildCopy()
Mon, Mar 18, 12:20 PM
aemerson committed rL356396: Revert r356304: remove subreg parameter from MachineIRBuilder::buildCopy().
Revert r356304: remove subreg parameter from MachineIRBuilder::buildCopy()
Mon, Mar 18, 12:19 PM
aemerson abandoned D59444: [GlobalISel] Change MachineIRBuilder's SrcOp to contain subregister info.

In general I'm not too fond of building very target specific instructions involving subregs with the MachineIRBuilder (As these are only likely to be used in a few places in the selector). Specifically for this case of building a subreg, you can say

Builder.buildInstr(COPY, {Dst},{})
  .addReg(Src, 0, SubReg);

which is not too much larger than (and doesn't require making every SrcOp bigger).

Builder.buildInstr(COPY, {Dst}, {{Src, SubReg}});

While adding CSE support for COPYs with Subregs is great, I'm not sure how often it'll trigger and be useful (If it does occur then great). Also should we start adding support for building other kinds of target instructions - Adding immediate operands/target index nodes etc?
My approach for building non generic instructions have been with using the .addImm(..).addReg(...)... pattern - but if others strongly feel the need to add the ability to pass in all of the operands at once to the builder interfaces, and enabling CSE for them, then we can go ahead with this change.

In that case I'll revert r356304 keeping in mind that we should take care not to enable COPY CSE in the selector in future, as it won't be subreg safe.

Mon, Mar 18, 11:32 AM · Restricted Project

Fri, Mar 15

aemerson added a comment to D59444: [GlobalISel] Change MachineIRBuilder's SrcOp to contain subregister info.

I would think we would want to avoid any subregister indexes until as late as possible. Does the verifier reject them for G_* instructions?

Fri, Mar 15, 7:10 PM · Restricted Project
aemerson committed rG7097e83dab7a: [GlobalISel] Make isel verification checks of vregs run under NDEBUG only. (authored by aemerson).
[GlobalISel] Make isel verification checks of vregs run under NDEBUG only.
Fri, Mar 15, 6:05 PM
aemerson committed rL356309: [GlobalISel] Make isel verification checks of vregs run under NDEBUG only..
[GlobalISel] Make isel verification checks of vregs run under NDEBUG only.
Fri, Mar 15, 6:01 PM
aemerson created D59444: [GlobalISel] Change MachineIRBuilder's SrcOp to contain subregister info.
Fri, Mar 15, 5:50 PM · Restricted Project
aemerson committed rG3739a2087573: [GlobalISel] Allow MachineIRBuilder to build subregister copies. (authored by aemerson).
[GlobalISel] Allow MachineIRBuilder to build subregister copies.
Fri, Mar 15, 3:01 PM
aemerson committed rL356304: [GlobalISel] Allow MachineIRBuilder to build subregister copies..
[GlobalISel] Allow MachineIRBuilder to build subregister copies.
Fri, Mar 15, 3:00 PM
aemerson closed D59434: [GlobalISel] Allow MachineIRBuilder to build subregister copies.
Fri, Mar 15, 3:00 PM · Restricted Project
aemerson created D59434: [GlobalISel] Allow MachineIRBuilder to build subregister copies.
Fri, Mar 15, 2:44 PM · Restricted Project
aemerson closed D59392: [AArch64][GlobalISel] Implement selection for G_UNMERGE of vectors to vectors.

Committed in r356213

Fri, Mar 15, 2:39 PM · Restricted Project
aemerson committed rGd55016b2760d: [AArch64][GlobalISel] Regbankselect: Fix G_BUILD_VECTOR trying to use s16 gpr… (authored by aemerson).
[AArch64][GlobalISel] Regbankselect: Fix G_BUILD_VECTOR trying to use s16 gpr…
Fri, Mar 15, 10:59 AM
aemerson committed rL356282: [AArch64][GlobalISel] Regbankselect: Fix G_BUILD_VECTOR trying to use s16 gpr….
[AArch64][GlobalISel] Regbankselect: Fix G_BUILD_VECTOR trying to use s16 gpr…
Fri, Mar 15, 10:59 AM

Thu, Mar 14

aemerson committed rGd61b89be8d73: [AArch64][GlobalISel] Implement selection for G_UNMERGE of vectors to vectors. (authored by aemerson).
[AArch64][GlobalISel] Implement selection for G_UNMERGE of vectors to vectors.
Thu, Mar 14, 3:51 PM
aemerson committed rG2ff2298c3e25: [AArch64][GlobalISel] Add some support for G_CONCAT_VECTORS. (authored by aemerson).
[AArch64][GlobalISel] Add some support for G_CONCAT_VECTORS.
Thu, Mar 14, 3:51 PM
aemerson committed rL356213: [AArch64][GlobalISel] Implement selection for G_UNMERGE of vectors to vectors..
[AArch64][GlobalISel] Implement selection for G_UNMERGE of vectors to vectors.
Thu, Mar 14, 3:51 PM
aemerson committed rL356212: [AArch64][GlobalISel] Add some support for G_CONCAT_VECTORS..
[AArch64][GlobalISel] Add some support for G_CONCAT_VECTORS.
Thu, Mar 14, 3:51 PM
aemerson closed D59390: [AArch64][GlobalISel] Add some support for G_CONCAT_VECTORS.
Thu, Mar 14, 3:51 PM · Restricted Project
aemerson added a child revision for D59390: [AArch64][GlobalISel] Add some support for G_CONCAT_VECTORS: D59392: [AArch64][GlobalISel] Implement selection for G_UNMERGE of vectors to vectors.
Thu, Mar 14, 3:11 PM · Restricted Project
aemerson added a parent revision for D59392: [AArch64][GlobalISel] Implement selection for G_UNMERGE of vectors to vectors: D59390: [AArch64][GlobalISel] Add some support for G_CONCAT_VECTORS.
Thu, Mar 14, 3:11 PM · Restricted Project
aemerson created D59392: [AArch64][GlobalISel] Implement selection for G_UNMERGE of vectors to vectors.
Thu, Mar 14, 3:11 PM · Restricted Project
aemerson created D59390: [AArch64][GlobalISel] Add some support for G_CONCAT_VECTORS.
Thu, Mar 14, 3:11 PM · Restricted Project
aemerson added a comment to D59356: [SelectionDAGBuilder] Use accumulator value in VECREDUCE_FADD/FMUL.

@nikic thanks for pointing me to that discussion! I clearly misread the LangRef for this change :)
I agree it makes more sense to change these intrinsics and to make its accumulator argument always relevant (regardless of what flags are set) and AutoUpgrading older IR. Given that I'm currently working on this, I'd be happy to move this forward with patches and a proposal/discussion on the mailing list to change the experimental reduction intrinsics. @aemerson you expressed an intention to work on it later this year, do you have any objection to me moving forward with this now?

If you're going down the auto-upgrade route then I suggest proposing that we promote these from experimental to first class intrinsics. That way you can auto-upgrade form one intrinsic to another without any risk of breaking older code (i.e. you can't just start using an accumulator arg that before could be unused and therefore undef).

I'm not sure I agree - we shouldn't drop the experimental state unless we're certain the intrinsic is not going to need to be further tweaked in the future. I still think not including an accumulator argument at all would be for the best.

Thu, Mar 14, 3:06 PM
aemerson accepted D58734: [AArch64][GlobalISel] Add isel support for G_UADDO on s32s and s64s.

Can you switch to using MachineIRBuilder before committing.

Thu, Mar 14, 1:04 PM · Restricted Project
aemerson added a comment to D58419: [GISel]: Allow G_EXTRACT_VEC_ELT's result to be larger the source element type.

I think this should be symmetric with G_BUILD_VECTOR_TRUNC, so either a separate opcode or re-merge BUILD_VECTOR_TRUNC with BUILD_VECTOR

Thu, Mar 14, 1:04 PM · Restricted Project
aemerson added a comment to D59356: [SelectionDAGBuilder] Use accumulator value in VECREDUCE_FADD/FMUL.

@nikic thanks for pointing me to that discussion! I clearly misread the LangRef for this change :)
I agree it makes more sense to change these intrinsics and to make its accumulator argument always relevant (regardless of what flags are set) and AutoUpgrading older IR. Given that I'm currently working on this, I'd be happy to move this forward with patches and a proposal/discussion on the mailing list to change the experimental reduction intrinsics. @aemerson you expressed an intention to work on it later this year, do you have any objection to me moving forward with this now?

Thu, Mar 14, 1:01 PM
aemerson accepted D59325: [GlobalISel][AArch64] Add partial selection support for G_INSERT_VECTOR_ELT.
Thu, Mar 14, 10:58 AM · Restricted Project
aemerson added inline comments to D59325: [GlobalISel][AArch64] Add partial selection support for G_INSERT_VECTOR_ELT.
Thu, Mar 14, 9:48 AM · Restricted Project

Wed, Mar 13

aemerson added inline comments to D59325: [GlobalISel][AArch64] Add partial selection support for G_INSERT_VECTOR_ELT.
Wed, Mar 13, 4:45 PM · Restricted Project
aemerson accepted D59323: [AArch64][GlobalISel] Gardening: Simplify subregister copy in selectBuildVector.

LGTM.

Wed, Mar 13, 3:21 PM · Restricted Project
aemerson accepted D59322: [GlobalISel][AArch64] Gardening: Factor out vector inserts.
Wed, Mar 13, 3:19 PM · Restricted Project
aemerson accepted D59324: [GlobalISel][AArch64] Gardening: Factor out code to find lane indices.

LGTM.

Wed, Mar 13, 2:05 PM · Restricted Project
aemerson added inline comments to D59322: [GlobalISel][AArch64] Gardening: Factor out vector inserts.
Wed, Mar 13, 2:04 PM · Restricted Project

Mon, Mar 11

aemerson added inline comments to D58015: [SelectionDAG][AArch64] Legalize VECREDUCE.
Mon, Mar 11, 7:09 PM · Restricted Project

Fri, Mar 8

aemerson committed rG7a05d1c1f116: [AArch64][GlobalISel] Fix i1 arguments not being zero-extended as required by… (authored by aemerson).
[AArch64][GlobalISel] Fix i1 arguments not being zero-extended as required by…
Fri, Mar 8, 2:17 PM
aemerson committed rL355745: [AArch64][GlobalISel] Fix i1 arguments not being zero-extended as required by….
[AArch64][GlobalISel] Fix i1 arguments not being zero-extended as required by…
Fri, Mar 8, 2:17 PM

Thu, Mar 7

aemerson accepted D59062: [GlobalISel][AArch64] Always fall back on aarch64.neon.addp.*.

LGTM, can you rename the test to something more specific like "fallback-ambiguous-addp-intrinsic.mir"

Thu, Mar 7, 3:38 PM · Restricted Project
aemerson added inline comments to D59062: [GlobalISel][AArch64] Always fall back on aarch64.neon.addp.*.
Thu, Mar 7, 3:06 PM · Restricted Project
aemerson added inline comments to D59062: [GlobalISel][AArch64] Always fall back on aarch64.neon.addp.*.
Thu, Mar 7, 8:55 AM · Restricted Project

Wed, Mar 6

aemerson committed rG21f44dfe9c04: [AArch64] Remove a stray test from the AArch64 directory. (authored by aemerson).
[AArch64] Remove a stray test from the AArch64 directory.
Wed, Mar 6, 10:54 AM
aemerson committed rL355534: [AArch64] Remove a stray test from the AArch64 directory..
[AArch64] Remove a stray test from the AArch64 directory.
Wed, Mar 6, 10:53 AM

Tue, Mar 5

aemerson added a comment to D58320: [Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the builtins library..

I've no objections to adding the command line as a Darwin only option. Implementation looks fine to me although I've not got any prior experience with Darwin.

Tue, Mar 5, 8:48 AM · Restricted Project

Mon, Mar 4

aemerson updated the diff for D58320: [Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the builtins library..

Since we can't use the proposed alternatives of -nolibc and -nostdlib++ reviving this patch as an Apple specific flag.

Mon, Mar 4, 5:05 PM · Restricted Project
aemerson accepted D58747: [GlobalISel][AArch64] Legalize vector G_SELECT.

LGTM, though eventually we might want to change scalarizations to more efficient expansion lowerings.

Mon, Mar 4, 11:28 AM · Restricted Project
aemerson accepted D58469: [GlobalISel][AArch64] Add selection support for G_EXTRACT_VECTOR_ELT with FPR dest.

LGTM with small change.

Mon, Mar 4, 11:19 AM · Restricted Project
aemerson committed rG8acb0d9c82ed: Re-commit r355104: "[AArch64][GlobalISel] Add support for 64 bit vector shuffle… (authored by aemerson).
Re-commit r355104: "[AArch64][GlobalISel] Add support for 64 bit vector shuffle…
Mon, Mar 4, 11:18 AM
aemerson committed rL355326: Re-commit r355104: "[AArch64][GlobalISel] Add support for 64 bit vector shuffle….
Re-commit r355104: "[AArch64][GlobalISel] Add support for 64 bit vector shuffle…
Mon, Mar 4, 11:18 AM

Sun, Mar 3

aemerson accepted D58834: [AArch64/ARM] Fix two compiler warnings in InstructionSelector, NFCI.
Sun, Mar 3, 10:06 PM · Restricted Project
aemerson added a comment to D58015: [SelectionDAG][AArch64] Legalize VECREDUCE.

What about expanding the reductions into shuffle vector sequences? If we add support for that, such that the resulting constructed SDAG would be the same as the IR expansion shuffle vector sequence, then we pave the way for a move to using the intrinsics for all targets as the canonical form. So what we'd do is:

  1. Add the expansion to shuffle vector sequences (instead of a naive implementation)
  2. Move targets to use the intrinsic representation unconditionally. This means we don't need the useReductionIntrinsic TTI took any more. Targets' TargetLowering would need to specify which reduction kinds to expand using the new SDAG expansion code.
  3. ...and as a result we can kill the ExpandReductions pass and finally move these intrinsics from experimental to fully supported and preferred representations.
Sun, Mar 3, 10:03 PM · Restricted Project

Thu, Feb 28

aemerson committed rG8d70e6425c7b: Revert "[AArch64][GlobalISel] Add support for 64 bit vector shuffle using TBL1." (authored by aemerson).
Revert "[AArch64][GlobalISel] Add support for 64 bit vector shuffle using TBL1."
Thu, Feb 28, 10:48 AM
aemerson committed rL355115: Revert "[AArch64][GlobalISel] Add support for 64 bit vector shuffle using TBL1.".
Revert "[AArch64][GlobalISel] Add support for 64 bit vector shuffle using TBL1."
Thu, Feb 28, 10:46 AM
aemerson committed rG85c3afd7f6b1: [AArch64][GlobalISel] Add support for 64 bit vector shuffle using TBL1. (authored by aemerson).
[AArch64][GlobalISel] Add support for 64 bit vector shuffle using TBL1.
Thu, Feb 28, 8:43 AM
aemerson committed rL355104: [AArch64][GlobalISel] Add support for 64 bit vector shuffle using TBL1..
[AArch64][GlobalISel] Add support for 64 bit vector shuffle using TBL1.
Thu, Feb 28, 8:42 AM
aemerson closed D58684: [AArch64][GlobalISel] Add support for 64 bit vector shuffle using TBL1.
Thu, Feb 28, 8:42 AM · Restricted Project

Tue, Feb 26

aemerson updated the diff for D58684: [AArch64][GlobalISel] Add support for 64 bit vector shuffle using TBL1.

Explicitly check for valid element sizes or error out if not valid.

Tue, Feb 26, 3:15 PM · Restricted Project
aemerson added inline comments to D58684: [AArch64][GlobalISel] Add support for 64 bit vector shuffle using TBL1.
Tue, Feb 26, 3:12 PM · Restricted Project
aemerson created D58684: [AArch64][GlobalISel] Add support for 64 bit vector shuffle using TBL1.
Tue, Feb 26, 9:47 AM · Restricted Project

Mon, Feb 25

aemerson committed rG6bcfa1c419f2: [AArch64][GlobalISel] Refactor selectBuildVector to use MachineIRBuilder. NFC. (authored by aemerson).
[AArch64][GlobalISel] Refactor selectBuildVector to use MachineIRBuilder. NFC.
Mon, Feb 25, 10:53 AM
aemerson committed rL354807: [AArch64][GlobalISel] Refactor selectBuildVector to use MachineIRBuilder. NFC..
[AArch64][GlobalISel] Refactor selectBuildVector to use MachineIRBuilder. NFC.
Mon, Feb 25, 10:53 AM
aemerson closed D58528: [AArch64][GlobalISel] Refactor selectBuildVector to use MachineIRBuilder. NFC..
Mon, Feb 25, 10:52 AM · Restricted Project

Feb 22 2019

aemerson added a comment to D58469: [GlobalISel][AArch64] Add selection support for G_EXTRACT_VECTOR_ELT with FPR dest.

Please add a test for regbank select.

Feb 22 2019, 4:07 PM · Restricted Project
aemerson added inline comments to D58528: [AArch64][GlobalISel] Refactor selectBuildVector to use MachineIRBuilder. NFC..
Feb 22 2019, 11:15 AM · Restricted Project
aemerson accepted D55238: MIR: Preserve incoming frame index numbers.

I see. LGTM then.

Feb 22 2019, 11:11 AM
aemerson added a comment to D55238: MIR: Preserve incoming frame index numbers.

Why is it valid for instructions to reference a dead frame index?

Feb 22 2019, 10:01 AM

Feb 21 2019

aemerson created D58528: [AArch64][GlobalISel] Refactor selectBuildVector to use MachineIRBuilder. NFC..
Feb 21 2019, 3:11 PM · Restricted Project
aemerson committed rG1abe05c0dd2c: Re-land "[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR"" (authored by aemerson).
Re-land "[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR""
Feb 21 2019, 12:20 PM
aemerson committed rL354616: Re-land "[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR"".
Re-land "[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR""
Feb 21 2019, 12:19 PM
aemerson added a comment to D58469: [GlobalISel][AArch64] Add selection support for G_EXTRACT_VECTOR_ELT with FPR dest.

Apart from the aforementioned refactorings which can be done later, using MachineIRBuilder would also simplify some the code.

Feb 21 2019, 11:11 AM · Restricted Project

Feb 20 2019

aemerson committed rG71f2a5e60f44: Revert "[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR" (authored by aemerson).
Revert "[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR"
Feb 20 2019, 4:32 PM
aemerson committed rL354532: Revert "[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR".
Revert "[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR"
Feb 20 2019, 4:32 PM
aemerson committed rG883000d8880b: [GlobalISel] Add -O0 to some tests to see if it fixes them. I can't reproduce… (authored by aemerson).
[GlobalISel] Add -O0 to some tests to see if it fixes them. I can't reproduce…
Feb 20 2019, 3:24 PM
aemerson committed rL354529: [GlobalISel] Add -O0 to some tests to see if it fixes them. I can't reproduce….
[GlobalISel] Add -O0 to some tests to see if it fixes them. I can't reproduce…
Feb 20 2019, 3:24 PM
aemerson committed rGa946d057b41a: [AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR (authored by aemerson).
[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR
Feb 20 2019, 2:13 PM
aemerson committed rL354521: [AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR.
[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR
Feb 20 2019, 2:12 PM
aemerson closed D58466: [AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR.
Feb 20 2019, 2:12 PM · Restricted Project
aemerson added inline comments to D58466: [AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR.
Feb 20 2019, 2:01 PM · Restricted Project
aemerson updated the diff for D58466: [AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR.

Addressed review comments. Also add an extra legalization check for source vector types being the same as the dest, this broke a lit test I missed.

Feb 20 2019, 1:58 PM · Restricted Project