The sea was angry that day, my friends - like an old man trying to send back soup in a deli.
User Details
- User Since
- Sep 9 2013, 3:45 AM (384 w, 19 h)
Sat, Jan 16
LGTM.
Fri, Jan 15
Thu, Jan 14
LGTM.
Each pass has to respect the semantics though. At the moment we fall back in the translator for strict-align, but when we do add support places like this will need to correct. Unless you add alignment checks for this combine, this might create unaligned wide loads which are illegal with strict-align, since we’re not allowed to assume that unaligned loads are safe.
It it possible to extend the existing combine in prelegalizer combiner to handle this too? Or will that cause us to still miss some cases?
Wed, Jan 13
Why is this in lowering instead of combine?
We also need to check for the strict-align function attribute before we generate wider loads.
LGTM.
Fix clang-format warnings.
Tue, Jan 12
Improve the performance of the insertion queue flushing.
Does this metric count the misses where there were no registers?
Is this meant to say *greater* than 1?
- Avg regs/missed combine is the number of registers in RegsToVisit when the combine misses
Note that a lot of the time, the combine does miss with 0 registers (because you just don't find anything with a single use, for example).
LGTM with the getFPImm nit fixed.
Sat, Jan 9
LGTM. Having looked into this recently we should definitely from the MIRBuilder's observer.
Fri, Jan 8
Thanks for tackling this. The logic seems sound to me, but I have some efficiency concerns. (Note, this is conjecture, I don't know if this is realistically a big problem)
Thu, Jan 7
Is this going to be used anywhere?
Wed, Jan 6
Mon, Dec 28
We do this condition splitting optimization in GlobalISel too, so that will also need fixing: see IRTranslator.cpp.
Sun, Dec 27
Fri, Dec 25
Dec 17 2020
This seems to have caused failures on Darwin platforms. I've pushed a fix in 48e7b34f but let me know if you disagree with the approach.
Dec 16 2020
Dec 15 2020
Dec 14 2020
Yes, a test would be good.
Dec 12 2020
Dec 10 2020
Dec 8 2020
LGTM.
Dec 7 2020
Dec 4 2020
Can you also check if there's any code size impact at -O0 and -Os. I'm wary of regressing -O0 and leaving extra unnecessary moves around.
As discussed offline, this also needs an implementation for GlobalISel. You can just add check lines to the test with -global-isel -global-isel-abort=1 for the tests.
Dec 3 2020
LGTM.
Dec 2 2020
Dec 1 2020
Nov 30 2020
Nov 23 2020
ping
Nov 20 2020
Nov 19 2020
@simon_tatham Can you take a look?
Nov 18 2020
Nov 17 2020
Add buildShuffleSplat and buildShuffleVector to MachineIRBuilder and use.
Nov 16 2020
Nov 13 2020
LGTM once we use the new matcher.
LGTM.
Nov 12 2020
Maybe use PatternMatch for this too?
LGTM with nit.
Nov 11 2020
Nov 10 2020
Check for SEXT_INREG and use copy instead of modifying operand reg.