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lewis-revill (Lewis Revill)
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User Since
Jul 31 2018, 10:55 AM (38 w, 1 d)

Recent Activity

Today

lewis-revill updated the diff for D58843: [WIP][MC][RISCV] Allow targets to defer forcing relocations.

Rebased and added documentation comments

Wed, Apr 24, 4:01 AM · Restricted Project

Yesterday

lewis-revill added a comment to D60657: [RISCV] Fix evaluation of %pcrel_lo.

Thanks for this. I realize D58843 is a very heavy-handed approach so I'd be happy if we could avoid it cleanly with target-specific changes, however I'm not certain we would be able to cover all the combinations we would need to with patches like this?

Tue, Apr 23, 8:01 AM · Restricted Project
lewis-revill committed rGdf3cb477a314: [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers (authored by lewis-revill).
[RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers
Tue, Apr 23, 7:47 AM
lewis-revill committed rL358994: [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers.
[RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers
Tue, Apr 23, 7:44 AM
lewis-revill closed D55342: [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers.
Tue, Apr 23, 7:44 AM · Restricted Project
lewis-revill updated the diff for D55342: [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers.

Rebased prior to commit.

Tue, Apr 23, 7:31 AM · Restricted Project
lewis-revill added inline comments to D58843: [WIP][MC][RISCV] Allow targets to defer forcing relocations.
Tue, Apr 23, 7:31 AM · Restricted Project

Thu, Apr 4

lewis-revill committed rGaa79a3fe8e09: [RISCV] Support assembling TLS add and associated modifiers (authored by lewis-revill).
[RISCV] Support assembling TLS add and associated modifiers
Thu, Apr 4, 7:13 AM
lewis-revill committed rL357698: [RISCV] Support assembling TLS add and associated modifiers.
[RISCV] Support assembling TLS add and associated modifiers
Thu, Apr 4, 7:12 AM
lewis-revill closed D55341: [RISCV] Support assembling TLS add and associated modifiers.
Thu, Apr 4, 7:12 AM · Restricted Project

Wed, Apr 3

lewis-revill committed rG24a74096a494: Test commit: Remove double variable assignment (authored by lewis-revill).
Test commit: Remove double variable assignment
Wed, Apr 3, 8:55 AM
lewis-revill committed rL357601: Test commit: Remove double variable assignment.
Test commit: Remove double variable assignment
Wed, Apr 3, 8:55 AM
lewis-revill added inline comments to D59477: [RISCV] Custom lower SHL_PARTS, SRA_PARTS, SRL_PARTS.
Wed, Apr 3, 8:26 AM · Restricted Project
lewis-revill added inline comments to D59477: [RISCV] Custom lower SHL_PARTS, SRA_PARTS, SRL_PARTS.
Wed, Apr 3, 8:14 AM · Restricted Project
lewis-revill added inline comments to D59477: [RISCV] Custom lower SHL_PARTS, SRA_PARTS, SRL_PARTS.
Wed, Apr 3, 8:08 AM · Restricted Project
lewis-revill added a comment to D60136: [RISCV] Implement adding a displacement to a BlockAddress.

Thanks, I didn't realise this was the case.

Wed, Apr 3, 6:18 AM · Restricted Project

Tue, Apr 2

lewis-revill added a comment to D55341: [RISCV] Support assembling TLS add and associated modifiers.

@asb thanks, I've just requested commit access!

Tue, Apr 2, 7:48 AM · Restricted Project

Mar 6 2019

lewis-revill removed a parent revision for D58843: [WIP][MC][RISCV] Allow targets to defer forcing relocations: D57240: [RISCV] Don't incorrectly force relocation for %pcrel_lo.
Mar 6 2019, 7:37 AM · Restricted Project
lewis-revill removed a child revision for D57240: [RISCV] Don't incorrectly force relocation for %pcrel_lo: D58843: [WIP][MC][RISCV] Allow targets to defer forcing relocations.
Mar 6 2019, 7:37 AM · Restricted Project
lewis-revill updated the diff for D58843: [WIP][MC][RISCV] Allow targets to defer forcing relocations.

Remove dependency.

Mar 6 2019, 7:37 AM · Restricted Project
lewis-revill added a comment to D58943: [RISCV][MC] Find matching pcrel_hi fixup in more cases..

On balance this patch seems a more appropriate solution given it doesn't touch generic code. I hope there isn't a case that isn't covered by this because I honestly can't think of one.

Mar 6 2019, 5:52 AM · Restricted Project

Mar 4 2019

lewis-revill added a comment to D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi.

Could you re-title the revision to start with [RISCV] and preferably [MC]? As it is, it may not be seen by all the relevant people.

Mar 4 2019, 1:48 AM

Mar 1 2019

lewis-revill added a comment to D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi.

I don't understand why it necessary to ensure the label is attached to the "correct" fragment; it's still pointing to the same address either way. Could you try a little harder in RISCVMCExpr::getPCRelHiFixup() to find the symbol? (Given an MCFragment, you can call getPrevNode() to get the previous MCFragment.)

Mar 1 2019, 11:11 PM
lewis-revill updated the summary of D58843: [WIP][MC][RISCV] Allow targets to defer forcing relocations.
Mar 1 2019, 12:50 PM · Restricted Project
lewis-revill added a parent revision for D58843: [WIP][MC][RISCV] Allow targets to defer forcing relocations: D57240: [RISCV] Don't incorrectly force relocation for %pcrel_lo.
Mar 1 2019, 12:50 PM · Restricted Project
lewis-revill added a child revision for D57240: [RISCV] Don't incorrectly force relocation for %pcrel_lo: D58843: [WIP][MC][RISCV] Allow targets to defer forcing relocations.
Mar 1 2019, 12:50 PM · Restricted Project
lewis-revill added a comment to D58843: [WIP][MC][RISCV] Allow targets to defer forcing relocations.

I have yet to add a RISC-V test for the behaviour we're trying to fix, but for now see the discussion on D57240.

Mar 1 2019, 12:49 PM · Restricted Project
lewis-revill created D58843: [WIP][MC][RISCV] Allow targets to defer forcing relocations.
Mar 1 2019, 12:48 PM · Restricted Project

Feb 28 2019

lewis-revill added a comment to D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi.

Lewis, is this what you had in mind, I only changed RISC-V parser path.

Feb 28 2019, 1:53 AM

Feb 25 2019

lewis-revill added a comment to D57240: [RISCV] Don't incorrectly force relocation for %pcrel_lo.

My suspicion is that it would be easier to teach MCAssembler::evaluateFixup how to deal with an extra level of indirection, since the problem stems from it believing the relocation can be evaluated and not knowing about the *real* symbol/relocation we care about.

Feb 25 2019, 7:49 AM · Restricted Project
lewis-revill added a comment to D54029: [RISCV] Properly evaluate fixup_riscv_pcrel_lo12.

Hi James, I encountered another case not handled yet in this patch. It produces the error: could not find corresponding %pcrel_hi

.option push
.option norelax
la gp, __global_pointer$
.option pop
la sp, _sp

This also occurs when you manually expand la.

Regardless I believe the problem is caused because EmitLabel doesn't have any checks for whether a new data fragment should be introduced, whereas EmitInstToData does. So when the .Lpcrel_hiX label is expanded/parsed it's parent fragment is the one before the directive changed the STI flags, but the auipc and its %pcrel_hi fixup is located in the fragment after.

When getPCRelHiFixup() searches for the %pcrel_hi it fails to find it since it uses the fragment & offset of the label to search, whereas the fixup is in another fragment.

This is just from some initial debugging, so I'm not sure whether this is the only issue and/or what the best solution would be.

Feb 25 2019, 3:22 AM · Restricted Project

Feb 22 2019

lewis-revill added a comment to D54029: [RISCV] Properly evaluate fixup_riscv_pcrel_lo12.

Hi James, I encountered another case not handled yet in this patch. It produces the error: could not find corresponding %pcrel_hi

.option push
.option norelax
la gp, __global_pointer$
.option pop
la sp, _sp
Feb 22 2019, 5:28 AM · Restricted Project

Feb 19 2019

lewis-revill updated the diff for D54295: [WIP, RISCV] Add inline asm constraint A for RISC-V.

Correct test.

Feb 19 2019, 2:55 AM · Restricted Project, Restricted Project
lewis-revill updated the diff for D54093: [RISCV] Lower inline asm constraints I, J & K for RISC-V.

Don't use zero register for 'J' constraint.

Feb 19 2019, 2:55 AM · Restricted Project

Feb 15 2019

lewis-revill added a comment to D54093: [RISCV] Lower inline asm constraints I, J & K for RISC-V.

I think I ended up being thrown off at the time by the output of something with the '%z' modifier, which I see you have now implemented @jrtc27. I'll correct this patch.

Feb 15 2019, 6:49 AM · Restricted Project

Feb 11 2019

lewis-revill updated the diff for D55667: [RISCV] Support assembling TLS LA pseudo instructions.

Rebased.

Feb 11 2019, 7:11 AM · Restricted Project
lewis-revill updated the diff for D55342: [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers.

Don't incorrectly set RelaxCandidate for GOT fixups.

Feb 11 2019, 7:10 AM · Restricted Project
lewis-revill updated the diff for D55341: [RISCV] Support assembling TLS add and associated modifiers.

Correct local rebasing of older patch; add fixup_riscv_relax as well as tprel_add where appropriate; seperate reporting of errors for incorrectly expanding a tprel_add fixup.

Feb 11 2019, 7:08 AM · Restricted Project
lewis-revill updated the diff for D55560: [RISCV] Attach VK_RISCV_CALL to symbols upon creation.

Rebased

Feb 11 2019, 7:05 AM · Restricted Project
lewis-revill updated the diff for D54143: [RISCV] Generate address sequences suitable for mcmodel=medium.

Rebased

Feb 11 2019, 7:03 AM · Restricted Project

Feb 5 2019

lewis-revill added a comment to D57240: [RISCV] Don't incorrectly force relocation for %pcrel_lo.

Could we not have a situation where the pcrel_hi20 is seen *after* the lo12, in which case the lo12 would be forced but the hi20 could still be evaluated? E.g. I think the following would be problematic:

foo:
    j 1f
0:  addi a0, a0, %pcrel_lo(1f)
    ret
1: auipc a0, %pcrel_hi(bar)
    j 0b

.align 2
bar:
    # ...

Obviously extremely pathological code, but nonetheless valid.

Feb 5 2019, 9:05 AM · Restricted Project
lewis-revill added a parent revision for D54296: [WIP, RISCV] Lower inline asm constraint A for RISC-V: D57141: [RISCV] Add implied zero offset load/store alias patterns.
Feb 5 2019, 7:45 AM · Restricted Project
lewis-revill added a child revision for D57141: [RISCV] Add implied zero offset load/store alias patterns: D54296: [WIP, RISCV] Lower inline asm constraint A for RISC-V.
Feb 5 2019, 7:45 AM · Restricted Project
lewis-revill updated the diff for D54296: [WIP, RISCV] Lower inline asm constraint A for RISC-V.

Don't output an additional '0' when printing indirect memory operands.

Feb 5 2019, 7:45 AM · Restricted Project
lewis-revill updated the diff for D57055: [RISCV] Mark TLS as supported.

Added RISC-V to thread specifier test as a means of checking TLS is supported.

Feb 5 2019, 4:43 AM · Restricted Project
lewis-revill updated the diff for D55342: [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers.

Rebased with updated dependency

Feb 5 2019, 2:12 AM · Restricted Project
lewis-revill updated the diff for D55341: [RISCV] Support assembling TLS add and associated modifiers.

Rebased with updated dependency

Feb 5 2019, 2:12 AM · Restricted Project
lewis-revill updated the diff for D55335: [RISCV] Support assembling @plt symbol operands.

Rebased with updated dependency

Feb 5 2019, 2:07 AM · Restricted Project
lewis-revill edited parent revisions for D54143: [RISCV] Generate address sequences suitable for mcmodel=medium, added: 1; removed: 1.
Feb 5 2019, 2:03 AM · Restricted Project
lewis-revill removed a child revision for D54029: [RISCV] Properly evaluate fixup_riscv_pcrel_lo12: D54143: [RISCV] Generate address sequences suitable for mcmodel=medium.
Feb 5 2019, 2:03 AM · Restricted Project
lewis-revill added a child revision for D57240: [RISCV] Don't incorrectly force relocation for %pcrel_lo: D54143: [RISCV] Generate address sequences suitable for mcmodel=medium.
Feb 5 2019, 2:03 AM · Restricted Project

Feb 1 2019

lewis-revill abandoned D57242: [RISCV] Specify MaxAtomicInlineWidth for RISC-V.

Abandoned in favour of D57450

Feb 1 2019, 2:29 AM · Restricted Project

Jan 28 2019

lewis-revill added a comment to D57332: [RISCV] Allow parsing of bare symbols with offsets.

Should this only support constant offsets to a symbol? It seems sensible to only support offsets to the symbol, IE add/sub rather than more complex expressions, but the RHS could be any expression at the moment.

Jan 28 2019, 8:21 AM
lewis-revill created D57332: [RISCV] Allow parsing of bare symbols with offsets.
Jan 28 2019, 8:19 AM
lewis-revill updated the diff for D57320: [RISCV] Allow parsing immediates that use tilde & exclaim.

Also parse exlaim (!) as a valid token to start an immediate. Add some CSR tests.

Jan 28 2019, 7:55 AM
lewis-revill updated the diff for D57319: [RISCV] Fix failure to parse parenthesized immediates.

Save the token for the parsed LParen rather than reconstructing one. Add some more tests.

Jan 28 2019, 7:51 AM
lewis-revill added a comment to D57320: [RISCV] Allow parsing immediates that use tilde & exclaim.

There's also AsmToken::Exclaim for logical not that we could allow (although that's not one I've ever seen in real-world assembly). Please add tests for the CSR change?

Jan 28 2019, 6:06 AM
lewis-revill added a comment to D57319: [RISCV] Fix failure to parse parenthesized immediates.

You should save the original AsmToken rather than reconstructing it, so as to retain the SMLoc, and Buf no longer needs to be at function scope. Also, I had some more exhaustive tests in mine; I think the important one is addi a1, a0, (1) to ensure that we can parse parenthesised immediate expressions when *not* part of a memory reference.

Jan 28 2019, 6:03 AM
lewis-revill created D57320: [RISCV] Allow parsing immediates that use tilde & exclaim.
Jan 28 2019, 3:25 AM
lewis-revill created D57319: [RISCV] Fix failure to parse parenthesized immediates.
Jan 28 2019, 3:06 AM

Jan 25 2019

lewis-revill created D57242: [RISCV] Specify MaxAtomicInlineWidth for RISC-V.
Jan 25 2019, 8:47 AM · Restricted Project
lewis-revill updated the diff for D57240: [RISCV] Don't incorrectly force relocation for %pcrel_lo.

Remove irrelevant dependencies.

Jan 25 2019, 8:17 AM · Restricted Project
lewis-revill created D57240: [RISCV] Don't incorrectly force relocation for %pcrel_lo.
Jan 25 2019, 8:10 AM · Restricted Project

Jan 24 2019

lewis-revill added a comment to D57141: [RISCV] Add implied zero offset load/store alias patterns.

Some basic tests should probably be included for completeness.

Jan 24 2019, 8:35 AM · Restricted Project
lewis-revill added inline comments to D57141: [RISCV] Add implied zero offset load/store alias patterns.
Jan 24 2019, 8:32 AM · Restricted Project
lewis-revill added inline comments to D50496: [RISCV] Implment pseudo instructions for load/store from a symbol address..
Jan 24 2019, 6:04 AM · Restricted Project
lewis-revill added a comment to D50496: [RISCV] Implment pseudo instructions for load/store from a symbol address..

This patch doesnt interact well with instructions like sw a3, CONST(a4) introduced by D52298. Looks like MatchOperandParserImpl is happy to match the 'CONST' as a bare symbol for the pseudo before parseImmediate can be called. Perhaps one way to fix it is to have parseBareSymbol check for a trailing parenthesis?

Jan 24 2019, 4:35 AM · Restricted Project
lewis-revill added inline comments to D50496: [RISCV] Implment pseudo instructions for load/store from a symbol address..
Jan 24 2019, 1:53 AM · Restricted Project

Jan 22 2019

lewis-revill updated the diff for D57055: [RISCV] Mark TLS as supported.

Rely on default value rather than explicitly marking TLSSupported as true.

Jan 22 2019, 8:03 AM · Restricted Project
lewis-revill added a parent revision for D57055: [RISCV] Mark TLS as supported: D55305: [RISCV] Add lowering of global TLS addresses.
Jan 22 2019, 7:38 AM · Restricted Project
lewis-revill added a child revision for D55305: [RISCV] Add lowering of global TLS addresses: D57055: [RISCV] Mark TLS as supported.
Jan 22 2019, 7:38 AM
lewis-revill created D57055: [RISCV] Mark TLS as supported.
Jan 22 2019, 7:38 AM · Restricted Project
lewis-revill added inline comments to D53235: [RISCV] Add RV64F codegen support.
Jan 22 2019, 6:26 AM

Jan 8 2019

lewis-revill updated the diff for D55305: [RISCV] Add lowering of global TLS addresses.

Rebased and fixed FileCheck lines.

Jan 8 2019, 3:06 AM
lewis-revill updated the diff for D55667: [RISCV] Support assembling TLS LA pseudo instructions.

Rebased.

Jan 8 2019, 3:05 AM · Restricted Project
lewis-revill updated the diff for D55342: [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers.

Rebased (assuming updates to D55279)

Jan 8 2019, 3:03 AM · Restricted Project
lewis-revill updated the diff for D55341: [RISCV] Support assembling TLS add and associated modifiers.

Rebased (assuming updates to D55279)

Jan 8 2019, 3:02 AM · Restricted Project

Jan 7 2019

lewis-revill updated the diff for D55304: [RISCV] Lower calls through PLT.

Rebased.

Jan 7 2019, 6:00 AM
lewis-revill updated the diff for D55335: [RISCV] Support assembling @plt symbol operands.

Rebased.

Jan 7 2019, 5:57 AM · Restricted Project
lewis-revill updated the diff for D55560: [RISCV] Attach VK_RISCV_CALL to symbols upon creation.

Rebased.

Jan 7 2019, 5:55 AM · Restricted Project
lewis-revill updated the diff for D55303: [RISCV] Add lowering of addressing sequences for PIC.

Rebased and updated comments.

Jan 7 2019, 5:55 AM · Restricted Project
lewis-revill updated the diff for D54143: [RISCV] Generate address sequences suitable for mcmodel=medium.

Rebased and updated comment.

Jan 7 2019, 5:45 AM · Restricted Project
lewis-revill added a comment to D55279: [RISCV] Support assembling %got_pcrel_hi operator.

Can this be rebased to apply cleanly with the upstreamed D54029?

Jan 7 2019, 1:32 AM · Restricted Project

Dec 13 2018

lewis-revill edited parent revisions for D55305: [RISCV] Add lowering of global TLS addresses, added: 2; removed: 1.
Dec 13 2018, 1:28 PM
lewis-revill removed a child revision for D55342: [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers: D55305: [RISCV] Add lowering of global TLS addresses.
Dec 13 2018, 1:28 PM · Restricted Project
lewis-revill added a child revision for D55303: [RISCV] Add lowering of addressing sequences for PIC: D55305: [RISCV] Add lowering of global TLS addresses.
Dec 13 2018, 1:28 PM · Restricted Project
lewis-revill added a child revision for D55667: [RISCV] Support assembling TLS LA pseudo instructions: D55305: [RISCV] Add lowering of global TLS addresses.
Dec 13 2018, 1:28 PM · Restricted Project
lewis-revill updated the diff for D55305: [RISCV] Add lowering of global TLS addresses.

Rebase with updated dependencies. Use and expand the la.tls.ie and la.tls.gd pseudo instructions.

Dec 13 2018, 1:27 PM
lewis-revill added a parent revision for D55667: [RISCV] Support assembling TLS LA pseudo instructions: D55342: [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers.
Dec 13 2018, 12:56 PM · Restricted Project
lewis-revill added a child revision for D55342: [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers: D55667: [RISCV] Support assembling TLS LA pseudo instructions.
Dec 13 2018, 12:56 PM · Restricted Project
lewis-revill created D55667: [RISCV] Support assembling TLS LA pseudo instructions.
Dec 13 2018, 12:55 PM · Restricted Project
lewis-revill added inline comments to D55325: [RISCV] Add assembler support for LA pseudo-instruction.
Dec 13 2018, 12:21 PM · Restricted Project
lewis-revill added inline comments to D55325: [RISCV] Add assembler support for LA pseudo-instruction.
Dec 13 2018, 12:18 PM · Restricted Project
lewis-revill edited parent revisions for D55341: [RISCV] Support assembling TLS add and associated modifiers, added: 1; removed: 1.
Dec 13 2018, 12:13 PM · Restricted Project
lewis-revill added a child revision for D55325: [RISCV] Add assembler support for LA pseudo-instruction: D55341: [RISCV] Support assembling TLS add and associated modifiers.
Dec 13 2018, 12:13 PM · Restricted Project
lewis-revill removed a child revision for D55279: [RISCV] Support assembling %got_pcrel_hi operator: D55341: [RISCV] Support assembling TLS add and associated modifiers.
Dec 13 2018, 12:13 PM · Restricted Project
lewis-revill removed a parent revision for D55342: [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers: D54029: [RISCV] Properly evaluate fixup_riscv_pcrel_lo12.
Dec 13 2018, 12:09 PM · Restricted Project
lewis-revill removed a child revision for D54029: [RISCV] Properly evaluate fixup_riscv_pcrel_lo12: D55342: [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers.
Dec 13 2018, 12:09 PM · Restricted Project
lewis-revill updated the diff for D55342: [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers.

Rebased with updated dependencies. Renamed ie_hi to got_hi to match relocation, and rearrange to be adjacent to gd_hi in most files. Added tests to relocations.s, and ensured that fixups evaluate correctly.

Dec 13 2018, 12:08 PM · Restricted Project
lewis-revill updated the diff for D55341: [RISCV] Support assembling TLS add and associated modifiers.

Fix bad merge and failing tests

Dec 13 2018, 11:43 AM · Restricted Project