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- Jul 31 2018, 10:55 AM (243 w, 4 d)
Aug 29 2022
I believe this patch is still relevant/necessary when using LTO for RISCV, so can I ask if @khchen is able to update it to rebase/address the feedback? If not, are there are any objections to me commandeering this revision to get it landed?
May 25 2022
Rebased prior to commit
Apr 28 2022
Apr 25 2022
Rebased including an update from using isShiftedUIntN to the templated replacement isShiftedUInt<N, S>. Addressed the issue of inserting incorrect instructions to copy FP registers to compressible FP registers by using FSGNJ_S and FSGNJ_D instead. We note that we can't have an additional offset to adjust the resulting register by if it is an FP register.
Apr 7 2022
Mar 29 2022
Mar 16 2022
Mar 15 2022
Mar 14 2022
Feb 16 2022
Feb 15 2022
Feb 10 2022
Feb 9 2022
Bump - is anyone able to review this?
Bump - is anyone able to review this?
Feb 2 2022
Abandoned in favour of D118766
Feb 1 2022
Restructure slightly, add more cases for selectCopy along with tests, add selection patterns for RV64 W instructions.
Remove unnecessary loop checking legality
Address review comments; primarily avoid selecting directly until the instruction selector.
Jan 26 2022
Use ValueAssigners to avoid rewriting generic infrastructure and use determineAndHandleAssignments instead.
Introduce an IncomingValueAssigner to allow us to call determineAndHandleAssignments.
Don't reinvent existing generic functions; instead introduce an OutgoingValueAssigner to allow us to call determineAndHandleAssignments.
Jan 14 2022
Still need to address testing permutations of copying virtual/physical registers.
Rebased. Added the first GIComplexPatternEquiv definition in order to handle the operands to shifts, which are now covered by a ComplexPattern in SelectionDAG. Updated the tests to match the output of the regbank selector.
Rebased. Updated tests to match the output of the legalizer.
Rebased.
Rebased.
Rebased, and updated where appropriate to continue to build correctly.
Rebased, and updated where appropriate to continue to build correctly.
Nov 23 2020
Aug 21 2020
Aug 20 2020
Jul 15 2020
Sure I'll land these apologies for the delay..
Jul 14 2020
See nitpick, otherwise LGTM
LGTM
See nitpicks, otherwise LGTM
LGTM
Thanks Paolo, tests are all passing and apart from the nitpicks this is a green light from me, as with the rest in this series.
Jul 9 2020
Jun 28 2020
Bumping this patch - Looking at the output of the riscv-expand-pseudos pass I'd say these values are accurate. I'd say comments here, and in the functions which expand the instructions to ensure things don't get changed - seems to me like tests would be a little tricky so perhaps omitting that would be fine just to get this landed.
Apr 18 2020
Bug fix - ensure selectConstant produces copies with fully constrained registers.
Bug fix - don't try to access the size of a $noreg register.
Add target flags to calls in tests.
Bug fix - add target flags to call instruction.
Apr 17 2020
Add custom selection for copies and for constants. Significantly expand tests over more types.
Add more operand mappings and expand tests over more types.
Tweak test order
Apr 16 2020
Add testing for shifts. Include a version of handling single word operations on RV64 involving directly lowering to the final opcode.
Apr 13 2020
Expand patch to include operations for other types as introduced by the legalizer.
Apr 12 2020
Expand patch to correctly cover more methods of types being legalized - IE: single word instructions on RV64, split operations (add with carry etc.) and libcalls up to s128.
Apr 10 2020
Use utils/update_mir_test_checks.py
Use utils/update_mir_test_checks.py
Use utils/update_mir_test_checks.py
Removed unnecessary line
Apr 7 2020
Add tests for AND/OR/XOR.
Support AND/OR/XOR.
Support AND/OR/XOR.
Rebased.
Apr 1 2020
Mar 30 2020
Address comments relating to supported types.
Mar 29 2020
Rewrote the global RegBanks array to be constant. Instead of modifying RegisterBanks after construction, provide HwMode to the constructor of RegisterBankInfo and move size calculation logic for RegisterBanks to that class.