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lenary (Sam Elliott)
Compiler Developer at lowRISC CIC

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User Since
Nov 21 2016, 2:12 PM (138 w, 6 d)

Recent Activity

Today

lenary added inline comments to D54296: [RISCV] Lower inline asm constraint A for RISC-V.
Mon, Jul 22, 2:38 AM · Restricted Project

Fri, Jul 12

lenary added inline comments to D63415: [AsmPrinter] Make the encoding of call sites in .gcc_except_table configurable.
Fri, Jul 12, 3:51 AM · Restricted Project
lenary committed rGfafec5155e39: [RISCV] Allow parsing dot '.' in assembly (authored by lenary).
[RISCV] Allow parsing dot '.' in assembly
Fri, Jul 12, 1:37 AM
lenary committed rL365881: [RISCV] Allow parsing dot '.' in assembly.
[RISCV] Allow parsing dot '.' in assembly
Fri, Jul 12, 1:36 AM
lenary closed D63669: [RISCV] Allow parsing dot '.' in assembly.
Fri, Jul 12, 1:36 AM · Restricted Project

Thu, Jul 11

lenary accepted D61597: [test-suite] Fix support for user mode emulation when using cmake/lit..

FWIW, I also have a downstream patch for LNT to use comma as the separator, rather than semi-colon. I find that results in less clicking being needed when opening the CSV file in Excel. Happy to upstream that too if you also find out that commas, rather than semi-colons, as a field separator in CSV files works better.

Thu, Jul 11, 2:22 AM · Restricted Project

Wed, Jul 10

lenary committed rL365610: [test-suite] Fix RISC-V Support in benchmark 1.3.0.
[test-suite] Fix RISC-V Support in benchmark 1.3.0
Wed, Jul 10, 3:23 AM
lenary closed D64237: [test-suite] Fix RISC-V Support in benchmark 1.3.0.
Wed, Jul 10, 3:23 AM · Restricted Project
lenary added a comment to D61597: [test-suite] Fix support for user mode emulation when using cmake/lit..

I wonder what the other issues are you're seeing after applying this patch?
I also wonder if you've also tried the corresponding lnt patch at D61598 that makes it possible to use this new functionality from lnt runtest test-suite?

Wed, Jul 10, 1:13 AM · Restricted Project

Tue, Jul 9

lenary updated the diff for D64237: [test-suite] Fix RISC-V Support in benchmark 1.3.0.

Address comments:

Tue, Jul 9, 9:40 AM · Restricted Project
lenary committed rG114d2db49b13: [RISCV] Fix ICE in isDesirableToCommuteWithShift (authored by lenary).
[RISCV] Fix ICE in isDesirableToCommuteWithShift
Tue, Jul 9, 9:26 AM
lenary committed rL365511: [RISCV] Fix ICE in isDesirableToCommuteWithShift.
[RISCV] Fix ICE in isDesirableToCommuteWithShift
Tue, Jul 9, 9:26 AM
lenary closed D64425: [RISCV] Fix ICE in isDesirableToCommuteWithShift.
Tue, Jul 9, 9:26 AM · Restricted Project
lenary created D64425: [RISCV] Fix ICE in isDesirableToCommuteWithShift.
Tue, Jul 9, 9:17 AM · Restricted Project
lenary accepted D64390: [RISCV] Fix RISCVTTIImpl::getIntImmCost for immediates where getMinSignedBits() > 64.

Whoops, good catch.

Tue, Jul 9, 2:31 AM · Restricted Project
lenary accepted D63669: [RISCV] Allow parsing dot '.' in assembly.

If you make the test change suggested by @jrtc27, I'm happy for this to land.

Tue, Jul 9, 2:30 AM · Restricted Project

Fri, Jul 5

lenary added a comment to D61584: [DebugInfo] Some fields do not need relocations even relax is enabled..

I added D58335 as a parent revision, as the relax-debug-frame.ll file is created in that revision, and this patch does not apply without it.

Fri, Jul 5, 7:59 AM · Restricted Project
lenary added a child revision for D58335: [DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame.: D61584: [DebugInfo] Some fields do not need relocations even relax is enabled..
Fri, Jul 5, 7:58 AM · Restricted Project
lenary added a parent revision for D61584: [DebugInfo] Some fields do not need relocations even relax is enabled.: D58335: [DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame..
Fri, Jul 5, 7:58 AM · Restricted Project
lenary committed rGb2c9eed0d7d7: [RISCV] Support @llvm.readcyclecounter() Intrinsic (authored by lenary).
[RISCV] Support @llvm.readcyclecounter() Intrinsic
Fri, Jul 5, 5:38 AM
lenary committed rL365201: [RISCV] Support @llvm.readcyclecounter() Intrinsic.
[RISCV] Support @llvm.readcyclecounter() Intrinsic
Fri, Jul 5, 5:35 AM
lenary closed D64125: [RISCV] Support @llvm.readcyclecounter() Intrinsic.
Fri, Jul 5, 5:35 AM · Restricted Project
lenary committed rG6884d5e0403c: [RISCV][NFC] Replace hard-coded CSR duplication with symbolic references (authored by lenary).
[RISCV][NFC] Replace hard-coded CSR duplication with symbolic references
Fri, Jul 5, 5:18 AM
lenary committed rL365195: [RISCV][NFC] Replace hard-coded CSR duplication with symbolic references.
[RISCV][NFC] Replace hard-coded CSR duplication with symbolic references
Fri, Jul 5, 5:16 AM
lenary closed D64139: [RISCV][NFC] Replace hard-coded CSR duplication with symbolic references.
Fri, Jul 5, 5:16 AM · Restricted Project
lenary updated the diff for D64125: [RISCV] Support @llvm.readcyclecounter() Intrinsic.
  • Update Comment
Fri, Jul 5, 3:05 AM · Restricted Project
lenary created D64237: [test-suite] Fix RISC-V Support in benchmark 1.3.0.
Fri, Jul 5, 2:23 AM · Restricted Project

Thu, Jul 4

lenary added inline comments to D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls.
Thu, Jul 4, 1:12 PM · Restricted Project
Herald updated subscribers of D55277: [RISCV] Match GNU tools canonical JALR and add aliases.
Thu, Jul 4, 1:02 PM · Restricted Project
lenary accepted D64012: [RISCV][NFC] Split PseudoCALL pattern out from instruction.

This looks good to me!

Thu, Jul 4, 12:24 PM · Restricted Project
lenary accepted D64011: [RISCV][NFC] Fix HasStedExtA -> HasStdExtA typo in comment.

Thanks!

Thu, Jul 4, 5:58 AM · Restricted Project
lenary added a comment to D61597: [test-suite] Fix support for user mode emulation when using cmake/lit..

We have also been running into issues trying to run the test suite under qemu (for risc-v).

Thu, Jul 4, 5:10 AM · Restricted Project
lenary updated the diff for D64125: [RISCV] Support @llvm.readcyclecounter() Intrinsic.

Incorporate changes based on D64139, in order to avoid magic numbers.

Thu, Jul 4, 2:43 AM · Restricted Project

Wed, Jul 3

lenary added inline comments to D64125: [RISCV] Support @llvm.readcyclecounter() Intrinsic.
Wed, Jul 3, 10:04 AM · Restricted Project
lenary accepted D64139: [RISCV][NFC] Replace hard-coded CSR duplication with symbolic references.

This looks good to me!

Wed, Jul 3, 10:04 AM · Restricted Project
lenary added a child revision for D64139: [RISCV][NFC] Replace hard-coded CSR duplication with symbolic references: D64125: [RISCV] Support @llvm.readcyclecounter() Intrinsic.
Wed, Jul 3, 10:04 AM · Restricted Project
lenary added a parent revision for D64125: [RISCV] Support @llvm.readcyclecounter() Intrinsic: D64139: [RISCV][NFC] Replace hard-coded CSR duplication with symbolic references.
Wed, Jul 3, 10:04 AM · Restricted Project
lenary updated the diff for D64125: [RISCV] Support @llvm.readcyclecounter() Intrinsic.

Address Review Feedback

  • Updated lots of comments
  • Added some asserts to trigger if we try to introduce or lower the custom pseudo-instruction on rv64.
  • Clarify some magic numbers
Wed, Jul 3, 9:55 AM · Restricted Project
lenary added a reviewer for D64139: [RISCV][NFC] Replace hard-coded CSR duplication with symbolic references: lenary.
Wed, Jul 3, 9:03 AM · Restricted Project
lenary requested changes to D63669: [RISCV] Allow parsing dot '.' in assembly.

Ok, after further discussion, I'm not sure about the test coverage of this change.

  1. The tests you've added should probably go with the other tests of the j instruction in llvm/test/MC/RISCV/rvi-aliases-valid.s (and should match the others in that file).
  2. Please add a test of jalr %lo(.) to rv32i-valid.s. This will test that . can go in more complex places, and is not an instruction alias.
  3. Please add a test to rv32i-aliases-invalid.s to test something like addi x1, . which will show what happens if someone provides . as an immediate somewhere that doesn't make sense.
Wed, Jul 3, 3:54 AM · Restricted Project
lenary accepted D63669: [RISCV] Allow parsing dot '.' in assembly.
Wed, Jul 3, 3:40 AM · Restricted Project
lenary added a comment to D63669: [RISCV] Allow parsing dot '.' in assembly.

This looks good! It seems to match what other implementations do, so I'd be happy for this to land.

Wed, Jul 3, 3:38 AM · Restricted Project
lenary updated the diff for D64125: [RISCV] Support @llvm.readcyclecounter() Intrinsic.
  • Run Clang-Format
Wed, Jul 3, 3:29 AM · Restricted Project
lenary added inline comments to D64125: [RISCV] Support @llvm.readcyclecounter() Intrinsic.
Wed, Jul 3, 3:21 AM · Restricted Project
lenary updated the diff for D64125: [RISCV] Support @llvm.readcyclecounter() Intrinsic.
  • Update test to add nounwind.
Wed, Jul 3, 3:20 AM · Restricted Project
lenary created D64125: [RISCV] Support @llvm.readcyclecounter() Intrinsic.
Wed, Jul 3, 2:48 AM · Restricted Project

Mon, Jul 1

lenary committed rG28145735f7bd: [RISCV] Avoid save-restore target feature warning (authored by lenary).
[RISCV] Avoid save-restore target feature warning
Mon, Jul 1, 7:54 AM
lenary committed rL364777: [RISCV] Avoid save-restore target feature warning.
[RISCV] Avoid save-restore target feature warning
Mon, Jul 1, 7:54 AM
lenary closed D64008: [RISCV] Avoid save-restore target feature warning.
Mon, Jul 1, 7:54 AM · Restricted Project, Restricted Project
lenary created D64008: [RISCV] Avoid save-restore target feature warning.
Mon, Jul 1, 7:08 AM · Restricted Project, Restricted Project

Jun 21 2019

lenary committed rG96c8bc7956d9: [RISCV] Add RISCV-specific TargetTransformInfo (authored by lenary).
[RISCV] Add RISCV-specific TargetTransformInfo
Jun 21 2019, 6:36 AM
lenary committed rL364046: [RISCV] Add RISCV-specific TargetTransformInfo.
[RISCV] Add RISCV-specific TargetTransformInfo
Jun 21 2019, 6:32 AM
lenary closed D63433: [RISCV] Add RISCV-specific TargetTransformInfo.
Jun 21 2019, 6:32 AM · Restricted Project
lenary updated the diff for D63433: [RISCV] Add RISCV-specific TargetTransformInfo.

Address Review Comments:

  • Make getIntMatCost significantly more conservative, to avoid regressions.
  • Make getIntMatCost prevent hoisting for all intrinsics to avoid a bug.
Jun 21 2019, 6:10 AM · Restricted Project
lenary added a comment to D63433: [RISCV] Add RISCV-specific TargetTransformInfo.
In D63433#1553128, @asb wrote:

Thanks for the update Sam. In the previous version of the patch, int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty); just called int getIntImmCost(const APInt &Imm, Type *Ty), but this one adds some logic to the former function that makes an estimate based on RISC-V instruction set knowledge. Right now you're ignoring the Idx argument and assuming that all binops can take a 12-bit immediate. Did you consider adding similar logic to the PPC and AArch64 versions of this function, having the switch setting ImmIdx appropriately and then using that to determine the cost? It looks like it wouldn't be much more complex or lengthy than what you have no to have a small switch(...) for the opcodes, and would have the advantage that getIntImmCost would be "done".

Jun 21 2019, 6:01 AM · Restricted Project
lenary committed rG3e53e0e4d48d: [RISC-V] Add -msave-restore and -mno-save-restore to clang driver (authored by lenary).
[RISC-V] Add -msave-restore and -mno-save-restore to clang driver
Jun 21 2019, 3:01 AM
lenary committed rL364018: [RISC-V] Add -msave-restore and -mno-save-restore to clang driver.
[RISC-V] Add -msave-restore and -mno-save-restore to clang driver
Jun 21 2019, 3:00 AM
lenary closed D63498: [RISC-V] Add -msave-restore and -mno-save-restore to clang driver.
Jun 21 2019, 3:00 AM · Restricted Project, Restricted Project

Jun 20 2019

lenary updated the diff for D63498: [RISC-V] Add -msave-restore and -mno-save-restore to clang driver.
  • Add CHECK lines for warnings Hopefully these will work regardless of race conditions in the merging of stdout and stderr.
Jun 20 2019, 9:50 AM · Restricted Project, Restricted Project
lenary updated the diff for D63433: [RISCV] Add RISCV-specific TargetTransformInfo.

Address review feedback:

  • Return TCC_Free in many more unknown cases, to prevent constant hoisting
  • Only return TCC_Free for 12-bit immediates in arithmetic operations
  • Use RISCVMatInt::getIntMatCost to accurately estimate materialisation cost
  • Remove some useless lines and update comments and asserts.
Jun 20 2019, 9:12 AM · Restricted Project

Jun 18 2019

lenary committed rG9f155bc6e592: [RISCV] Prevent re-ordering some adds after shifts (authored by lenary).
[RISCV] Prevent re-ordering some adds after shifts
Jun 18 2019, 1:36 PM
lenary committed rL363736: [RISCV] Prevent re-ordering some adds after shifts.
[RISCV] Prevent re-ordering some adds after shifts
Jun 18 2019, 1:35 PM
lenary closed D62857: [RISCV] Prevent re-ordering some adds after shifts.
Jun 18 2019, 1:35 PM · Restricted Project
lenary created D63498: [RISC-V] Add -msave-restore and -mno-save-restore to clang driver.
Jun 18 2019, 9:48 AM · Restricted Project, Restricted Project
lenary added inline comments to D62857: [RISCV] Prevent re-ordering some adds after shifts.
Jun 18 2019, 7:58 AM · Restricted Project
lenary updated the diff for D62857: [RISCV] Prevent re-ordering some adds after shifts.

Address review feedback

Jun 18 2019, 7:55 AM · Restricted Project
lenary added a parent revision for D63433: [RISCV] Add RISCV-specific TargetTransformInfo: D62857: [RISCV] Prevent re-ordering some adds after shifts.
Jun 18 2019, 1:49 AM · Restricted Project
lenary updated the summary of D63433: [RISCV] Add RISCV-specific TargetTransformInfo.
Jun 18 2019, 1:49 AM · Restricted Project
lenary added a child revision for D62857: [RISCV] Prevent re-ordering some adds after shifts: D63433: [RISCV] Add RISCV-specific TargetTransformInfo.
Jun 18 2019, 1:49 AM · Restricted Project

Jun 17 2019

lenary updated the diff for D63433: [RISCV] Add RISCV-specific TargetTransformInfo.
Jun 17 2019, 8:35 AM · Restricted Project
lenary added a comment to D63433: [RISCV] Add RISCV-specific TargetTransformInfo.

This is blocked on D62857

Jun 17 2019, 8:29 AM · Restricted Project
lenary created D63433: [RISCV] Add RISCV-specific TargetTransformInfo.
Jun 17 2019, 8:29 AM · Restricted Project
lenary abandoned D63007: [RISCV] Add RISCV-specific TargetTransformInfo.

I attempted to update this diff, but with a rebased branch arc didn't cope. Starting again.

Jun 17 2019, 8:25 AM · Restricted Project
lenary updated the diff for D63007: [RISCV] Add RISCV-specific TargetTransformInfo.
  • Address review feedback
Jun 17 2019, 8:20 AM · Restricted Project
lenary updated the diff for D62857: [RISCV] Prevent re-ordering some adds after shifts.

Address review feedback

  • Introduce new getIntMatCost(const APInt &Val, bool IsRV64) API, which can materialise much wider constants than the previous method.
  • Clarify and check grammar in comments.
Jun 17 2019, 6:49 AM · Restricted Project
lenary added inline comments to D63007: [RISCV] Add RISCV-specific TargetTransformInfo.
Jun 17 2019, 1:16 AM · Restricted Project

Jun 7 2019

lenary created D63007: [RISCV] Add RISCV-specific TargetTransformInfo.
Jun 7 2019, 8:08 AM · Restricted Project
lenary committed rGf720647ddd71: [RISCV] Support Bit-Preserving FP in F/D Extensions (authored by lenary).
[RISCV] Support Bit-Preserving FP in F/D Extensions
Jun 7 2019, 5:18 AM
lenary committed rL362790: [RISCV] Support Bit-Preserving FP in F/D Extensions.
[RISCV] Support Bit-Preserving FP in F/D Extensions
Jun 7 2019, 5:18 AM
lenary closed D62900: [RISCV] Support Bit-Preserving FP in F/D Extensions.
Jun 7 2019, 5:18 AM · Restricted Project
lenary updated the diff for D62857: [RISCV] Prevent re-ordering some adds after shifts.
  • Allow Combine if C1 << C2 will fit into an immediate
  • Explain restrictions on RISCVMatInt::getIntMatCost
Jun 7 2019, 3:21 AM · Restricted Project

Jun 6 2019

lenary added inline comments to D62857: [RISCV] Prevent re-ordering some adds after shifts.
Jun 6 2019, 4:08 AM · Restricted Project
lenary retitled D62857: [RISCV] Prevent re-ordering some adds after shifts from [RISCV] Prevent hoisting some adds after shifts to [RISCV] Prevent re-ordering some adds after shifts.
Jun 6 2019, 3:48 AM · Restricted Project
lenary updated the summary of D62857: [RISCV] Prevent re-ordering some adds after shifts.
Jun 6 2019, 3:35 AM · Restricted Project
lenary added inline comments to D62900: [RISCV] Support Bit-Preserving FP in F/D Extensions.
Jun 6 2019, 2:50 AM · Restricted Project
lenary updated the diff for D62900: [RISCV] Support Bit-Preserving FP in F/D Extensions.
  • Add nounwind directives to testcases
Jun 6 2019, 2:50 AM · Restricted Project
lenary updated the diff for D62857: [RISCV] Prevent re-ordering some adds after shifts.
  • Remove out-of-date comments
Jun 6 2019, 2:43 AM · Restricted Project
lenary updated the diff for D62857: [RISCV] Prevent re-ordering some adds after shifts.
  • Abstract away calculation of Materialisation Cost
Jun 6 2019, 2:35 AM · Restricted Project

Jun 5 2019

lenary updated the diff for D62857: [RISCV] Prevent re-ordering some adds after shifts.
  • Generalise optimisation to check materialisation cost
Jun 5 2019, 8:58 AM · Restricted Project
lenary updated the diff for D62900: [RISCV] Support Bit-Preserving FP in F/D Extensions.
  • Update Testcase Comment
Jun 5 2019, 6:55 AM · Restricted Project
lenary created D62900: [RISCV] Support Bit-Preserving FP in F/D Extensions.
Jun 5 2019, 6:52 AM · Restricted Project

Jun 4 2019

lenary updated the diff for D62857: [RISCV] Prevent re-ordering some adds after shifts.
  • Add commets about larger constants. These can be improved at a later date
Jun 4 2019, 7:41 AM · Restricted Project
lenary created D62857: [RISCV] Prevent re-ordering some adds after shifts.
Jun 4 2019, 7:06 AM · Restricted Project

Aug 21 2017

lenary committed rL311380: [ORE] Remove Old Optimization Remark API.
[ORE] Remove Old Optimization Remark API
Aug 21 2017, 1:31 PM
lenary closed D36972: [ORE] Remove Old Optimization Remark API by committing rL311380: [ORE] Remove Old Optimization Remark API.
Aug 21 2017, 1:31 PM
lenary created D36972: [ORE] Remove Old Optimization Remark API.
Aug 21 2017, 10:01 AM
lenary committed rL311352: Migrate WholeProgramDevirt to new Optimization Remark API.
Migrate WholeProgramDevirt to new Optimization Remark API
Aug 21 2017, 9:58 AM
lenary closed D36943: Migrate WholeProgramDevirt to new Optimization Remark API by committing rL311352: Migrate WholeProgramDevirt to new Optimization Remark API.
Aug 21 2017, 9:58 AM
lenary updated the diff for D36943: Migrate WholeProgramDevirt to new Optimization Remark API.

Add comments, remove unused code

Aug 21 2017, 9:56 AM
lenary committed rL311349: Emit only A Single Opt Remark When Inlining.
Emit only A Single Opt Remark When Inlining
Aug 21 2017, 9:47 AM