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lenary (Sam Elliott)
Compiler Developer at lowRISC CIC

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User Since
Nov 21 2016, 2:12 PM (147 w, 6 d)

Recent Activity

Thu, Sep 19

lenary updated the diff for D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.

Address Review Feedback

  • This patch no longer contains the tests, to make review easier. It contains all required licencing files, and the build configuration
  • Updates to build configuration based on review feedback and extensive triage
Thu, Sep 19, 10:26 AM · Restricted Project
lenary added a comment to D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.

Thanks for the review!

Thu, Sep 19, 10:18 AM · Restricted Project
lenary added inline comments to D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls.
Thu, Sep 19, 9:08 AM · Restricted Project, Restricted Project
lenary added a comment to D67698: [RISCV] Remove RA from reserved register to use as callee saved register.

We discussed this in the RISC-V meeting on 19 Sep 2019.

Thu, Sep 19, 9:02 AM · Restricted Project
lenary added a comment to D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls.

Two nits, that I wanted to submit before the meeting, but didn't get around to.

Thu, Sep 19, 8:29 AM · Restricted Project, Restricted Project
lenary added a comment to D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls.

We discussed this in the RISC-V meeting on 19 Sept 2019. @apazos says there are some SPEC failures in both 2006 and 2017, which would be good to triage.

Thu, Sep 19, 8:26 AM · Restricted Project, Restricted Project
lenary added a comment to D66210: [RFC/WIP][RISCV] Enable the machine outliner for RISC-V.

We discussed this at the RISC-V meeting on 19 Sept 2019. @apazos says she is willing to test this on SPEC.

Thu, Sep 19, 8:26 AM · Restricted Project

Tue, Sep 17

lenary accepted D66210: [RFC/WIP][RISCV] Enable the machine outliner for RISC-V.

LGTM. Please wait for a review from @asb before landing this.

Tue, Sep 17, 7:19 AM · Restricted Project
lenary added a comment to D66210: [RFC/WIP][RISCV] Enable the machine outliner for RISC-V.

Two small nits, other than that it's looking pretty good.

Tue, Sep 17, 5:27 AM · Restricted Project
lenary added a comment to D67409: [RISCV] enable LTO support, pass some options to linker..

I have some nits about explicit comments for arguments and default argument values for backwards compatibility. Other than that, it looks like a nice code cleanup.

Tue, Sep 17, 3:56 AM · Restricted Project
lenary added a comment to D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls.

There is an option to Clang for '-msave-restore' which should be utilized to enable this.

Tue, Sep 17, 3:46 AM · Restricted Project, Restricted Project
lenary accepted D67640: [RISCV] Fix static analysis issues.

LGTM

Tue, Sep 17, 3:42 AM · Restricted Project
lenary added a comment to D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.

Noted about the toplevel LICENCE.TXT - I shall update that shortly (hoping not to invalidate the links below).

Tue, Sep 17, 3:26 AM · Restricted Project

Mon, Sep 16

lenary added inline comments to D61675: [WIP] Update IRBuilder::CreateFNeg(...) to return a UnaryOperator.
Mon, Sep 16, 12:11 PM · Restricted Project
lenary added a comment to D67423: [RISCV] Rename FPRs and use Register arithmetic.

One suggestion, then LGTM

Mon, Sep 16, 10:22 AM · Restricted Project
lenary accepted D67526: [RISCV][NFC] Use NoRegister instead of 0 literal.

LGTM

Mon, Sep 16, 10:22 AM · Restricted Project

Fri, Sep 13

lenary added a comment to D67423: [RISCV] Rename FPRs and use Register arithmetic.

This is looking good. I have just one question this time.

Fri, Sep 13, 3:09 AM · Restricted Project

Thu, Sep 12

lenary added a reviewer for D67508: [RISCV] support mutilib in baremetal environment: asb.
Thu, Sep 12, 10:17 AM · Restricted Project
lenary accepted D61884: [RISCV] Support stack offset exceed 32-bit for RV64.

Great! This looks good to me! I'm glad we're getting rid of all those mov a0, a0 (which are really useless addi a0, a0, 0).

Thu, Sep 12, 8:58 AM · Restricted Project
lenary created D67495: [RISCV] Collect Statistics on Compressed Instructions.
Thu, Sep 12, 5:53 AM · Restricted Project
lenary accepted D67066: [RISCV] Add option aliases: -mcmodel=medany and -mcmodel=medlow.

Looks good to me!

Thu, Sep 12, 5:40 AM · Restricted Project, Restricted Project
lenary updated the diff for D67493: [RISCV] Move DebugLoc Copy into CompressInstEmitter.
  • Update Location Copy Code
Thu, Sep 12, 4:57 AM · Restricted Project
lenary created D67493: [RISCV] Move DebugLoc Copy into CompressInstEmitter.
Thu, Sep 12, 4:55 AM · Restricted Project
lenary added a reviewer for D66870: [Sanitizers] Add support for RISC-V 64-bit: luismarques.

@schwab Sorry there's been a delay reviewing this. I think it's probably fallen down the crack between "people who are familiar with RISC-V", and "people who are familiar with the sanitizers".

Thu, Sep 12, 3:36 AM · Restricted Project, Restricted Project
lenary added a comment to D67409: [RISCV] enable LTO support, pass some options to linker..

Can you add a test for riscv64-unknown-linux-gnu? I think RISCVToolchain.cpp is only used by the riscv64-unknown-elf target, but I could be wrong.

Thu, Sep 12, 3:34 AM · Restricted Project
lenary added inline comments to D67397: [RISCV] Add MachineInstr immediate verification.
Thu, Sep 12, 2:57 AM · Restricted Project
lenary accepted D66973: [RISCV] Switch to the Machine Scheduler.

Ok, I'm happy with the test changes in this patch. Let's get it landed!

Thu, Sep 12, 2:57 AM · Restricted Project
lenary requested changes to D61884: [RISCV] Support stack offset exceed 32-bit for RV64.

Nice, this is looking a lot better.

I chatted to @asb about this this morning, and he's not sure of the value of using t1 (if it's free) instead of any general-purpose-register. This is going to compromise how many of these instructions we can compress when the C extension is enabled. If you use a virtual register, then the register allocator can use a0-5 if it wishes, which can be compressed, unlike t1. Do you have a justification for explicitly choosing t1?

To my understanding, the caller saved registers which are not parameter registers(a0-7) could be used as temp register for prologue and epilogue without any spill because the lifetime of these registers won't cross function call, and it would start after prologue and end before the epilogue. For the virtual register, if there are not enough scratch registers, the allocator will try to spill one. So choosing t1 could avoid spill and GCC choose t1, too. If the offset need to be rematlize, the constant after spilit might not fit in the C extension instructions in most cases.

Thu, Sep 12, 2:39 AM · Restricted Project

Wed, Sep 11

lenary added a comment to D61884: [RISCV] Support stack offset exceed 32-bit for RV64.

Nice, this is looking a lot better.

Wed, Sep 11, 7:38 AM · Restricted Project
lenary abandoned D67396: [ConstantHoisting] Do not attempt to hoist ImmArgs.

See D58233

Wed, Sep 11, 3:46 AM · Restricted Project

Tue, Sep 10

lenary committed rL371534: [RISCV] Support llvm-objdump -M no-aliases and -M numeric.
[RISCV] Support llvm-objdump -M no-aliases and -M numeric
Tue, Sep 10, 9:28 AM
lenary committed rGd57de491be0b: [RISCV] Support llvm-objdump -M no-aliases and -M numeric (authored by lenary).
[RISCV] Support llvm-objdump -M no-aliases and -M numeric
Tue, Sep 10, 9:28 AM
lenary closed D66139: [RISCV] Support llvm-objdump -M no-aliases and -M numeric.
Tue, Sep 10, 9:28 AM · Restricted Project
lenary updated the diff for D66139: [RISCV] Support llvm-objdump -M no-aliases and -M numeric.

Rebase after landing D65950

Tue, Sep 10, 9:11 AM · Restricted Project
lenary committed rG6b877f6aac3d: [RISCV] Add Option for Printing Architectural Register Names (authored by lenary).
[RISCV] Add Option for Printing Architectural Register Names
Tue, Sep 10, 8:55 AM
lenary committed rL371531: [RISCV] Add Option for Printing Architectural Register Names.
[RISCV] Add Option for Printing Architectural Register Names
Tue, Sep 10, 8:54 AM
lenary closed D65950: [RISCV] Add Option for Printing Architectural Register Names.
Tue, Sep 10, 8:54 AM · Restricted Project
lenary added a comment to D61884: [RISCV] Support stack offset exceed 32-bit for RV64.

Thanks for the patch! I have two comments, which I think will help improve this patch.

Tue, Sep 10, 8:11 AM · Restricted Project
lenary added a comment to D66973: [RISCV] Switch to the Machine Scheduler.

Three nits about changes to the testcases that go beyond just reordering.

Tue, Sep 10, 7:51 AM · Restricted Project
lenary added a comment to D66973: [RISCV] Switch to the Machine Scheduler.

%hi and %lo don't need to be adjacent to relax them; the ABI has been designed with this in mind (and bfd keeps to that) So long as the result of the %hi is always "consumed" by a relaxable %lo, things will work.

Tue, Sep 10, 7:42 AM · Restricted Project
lenary added a comment to D67397: [RISCV] Add MachineInstr immediate verification.

Is there a way to write a test for this? I realise any assembly goes through the parser, so will be caught before it hits this code. Is there another way of making this work? a MIR-based test?

Tue, Sep 10, 7:37 AM · Restricted Project
lenary added reviewers for D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite: hfinkel, kristof.beyls, asb.
Tue, Sep 10, 7:01 AM · Restricted Project
lenary added a comment to D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.

This was discussed on the LLVM-Dev list: http://lists.llvm.org/pipermail/llvm-dev/2019-September/134890.html

Tue, Sep 10, 7:00 AM · Restricted Project
lenary created D67396: [ConstantHoisting] Do not attempt to hoist ImmArgs.
Tue, Sep 10, 6:41 AM · Restricted Project
lenary added a comment to D67065: [RISCV] Define __riscv_cmodel_medlow and __riscv_cmodel_medany correctly.

LGTM, now I've looked at how LLVM itself supports code models. I don't mind if that TODO is or isn't deleted.

Tue, Sep 10, 2:59 AM · Restricted Project, Restricted Project
lenary updated subscribers of D67185: [RISCV] Add support for -ffixed-xX flags.

Nice, I like this new approach! One naming nit, but overall I think this is much better than the first version of the patch.

Tue, Sep 10, 2:32 AM · Restricted Project, Restricted Project

Mon, Sep 9

lenary added inline comments to D67046: [RISCV] Add InstrInfo areMemAccessesTriviallyDisjoint hook.
Mon, Sep 9, 10:25 AM · Restricted Project
lenary updated the diff for D66139: [RISCV] Support llvm-objdump -M no-aliases and -M numeric.
  • Use -M no-aliases in new tests
Mon, Sep 9, 10:20 AM · Restricted Project
lenary updated the diff for D66139: [RISCV] Support llvm-objdump -M no-aliases and -M numeric.

Address review feedback in D65950

  • That patch now adds numeric-reg-names.s, and we now just update the LLC invocation at the top of the file.
  • This patch now adds no tests of its own, it just updates all tests to use the -M options.
Mon, Sep 9, 10:11 AM · Restricted Project
lenary added a comment to D65950: [RISCV] Add Option for Printing Architectural Register Names.

Tests updated, they're now a more reasonable size. I'll need to update D66139.

Mon, Sep 9, 10:03 AM · Restricted Project
lenary updated the diff for D65950: [RISCV] Add Option for Printing Architectural Register Names.

Address Review Feedback:

  • Use numeric-reg-names*.s, based on arch-reg-names.s from D66139
  • Revert changes to inline-asm-*abi-names.ll
  • Rebase changes
Mon, Sep 9, 10:03 AM · Restricted Project
lenary added a comment to D66725: [DAGCombiner][TargetLowering] Target hook for FCOPYSIGN arg cast folding.

I am happy with this. I think this hook is the correct way to go about choosing how to do this optimisation, and accurately conveys what's going on.

Mon, Sep 9, 7:56 AM · Restricted Project
lenary accepted D65634: [RISCV] Default to ilp32d/lp64d in RISC-V Linux.

I think my feeling is that this patch can land and we can change the default abi for baremetal targets in a follow-up patch.

Mon, Sep 9, 7:42 AM · Restricted Project, Restricted Project

Wed, Sep 4

lenary added a comment to D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.

This diff is huge, apologies.

Wed, Sep 4, 11:01 AM · Restricted Project
lenary updated the diff for D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.
  • Remove unused file
Wed, Sep 4, 10:58 AM · Restricted Project
lenary updated the diff for D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.

I have updated the patch to import the testcases, as this seems to be the
consensus on llvm-dev about what to do.

Wed, Sep 4, 10:58 AM · Restricted Project
lenary added a comment to D67185: [RISCV] Add support for -ffixed-xX flags.

I don't quite understand all the details of this patch. I understand reserving registers that the compiler would otherwise be using as general-purpose registers.

Wed, Sep 4, 10:02 AM · Restricted Project, Restricted Project

Tue, Sep 3

lenary added a comment to D67093: [test-suite][WIP] Allow GCC to build test suite.

There are still failures I need to address in:

  • MultiSource/MultiSource.Benchmarks.Trimaran.enc-pc1/enc-pc1.test (this is very odd, some numbers are printed as 2048 less than they should be, usually turning them negative)
  • MicroBenchmarks/MicroBenchmarks.XRay.FDRMode/fdrmode-bench.test (not investigated)
  • MicroBenchmarks/MicroBenchmarks.XRay.ReturnReference/retref-bench.test (not investigated)
Tue, Sep 3, 5:44 AM · Restricted Project
lenary created D67093: [test-suite][WIP] Allow GCC to build test suite.
Tue, Sep 3, 5:39 AM · Restricted Project
lenary added a reviewer for D66340: [RISCV] Support NonLazyBind: jrtc27.

@jrtc27 your input here would be valuable.

Tue, Sep 3, 2:46 AM · Restricted Project
lenary accepted D66278: [RISCV] Enable tail call opt for variadic function.

Ok, I'm happy with this patch and your explanation.

Tue, Sep 3, 2:40 AM · Restricted Project
lenary added a comment to D66870: [Sanitizers] Add support for RISC-V 64-bit.

I have two comments/queries below.

Tue, Sep 3, 1:59 AM · Restricted Project, Restricted Project
lenary committed rG03c9e139c7a7: [RISCV] Correct Logic around ilp32e macros (authored by lenary).
[RISCV] Correct Logic around ilp32e macros
Tue, Sep 3, 1:49 AM
lenary committed rL370709: [RISCV] Correct Logic around ilp32e macros.
[RISCV] Correct Logic around ilp32e macros
Tue, Sep 3, 1:47 AM
lenary closed D66591: [RISCV] Correct Logic around ilp32e macros.
Tue, Sep 3, 1:47 AM · Restricted Project, Restricted Project
lenary added a comment to D57450: [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics.

Backported to 9.0 in rL370181

Tue, Sep 3, 1:46 AM · Restricted Project, Restricted Project

Mon, Sep 2

lenary added inline comments to D67065: [RISCV] Define __riscv_cmodel_medlow and __riscv_cmodel_medany correctly.
Mon, Sep 2, 12:34 PM · Restricted Project, Restricted Project

Sat, Aug 31

lenary committed rL370572: Request commit access for lenary.
Request commit access for lenary
Sat, Aug 31, 2:50 AM

Fri, Aug 30

lenary updated the diff for D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.
  • Update subdirectory logic in CMake
  • Update test blacklist (using x86 for main blacklist)
  • add notes on riscv blacklist
  • take into account dg-additional-options
Fri, Aug 30, 8:17 AM · Restricted Project

Thu, Aug 29

lenary updated the diff for D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.
  • Update gcc-c-torture README
Thu, Aug 29, 7:19 AM · Restricted Project
lenary added a comment to D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.

Yeah, I need to review the list of tests to skip, which is on my list to do. I will probably initially review that list by testing on the x86-backend, and then letting other backends add their own lists of tests to skip (as we already have for the riscv backend).

Thu, Aug 29, 7:18 AM · Restricted Project
lenary updated the diff for D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.
  • Ignore target-specific dg-options
  • remove support for compile-only tests (LNT wants to run things)
  • Target-specific Files to Skip
  • set lit config.single_source
Thu, Aug 29, 7:10 AM · Restricted Project
lenary updated the diff for D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.
  • Better support for dg-options
  • Clarify rev in README
Thu, Aug 29, 1:52 AM · Restricted Project

Wed, Aug 28

lenary updated the summary of D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.
Wed, Aug 28, 11:19 AM · Restricted Project
lenary updated the diff for D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.
  • Support dg-options and compile tests properly
  • Document checkout path
Wed, Aug 28, 11:18 AM · Restricted Project
lenary created D66887: [test-suite][WIP] Add GCC C Torture Suite as External Test Suite.
Wed, Aug 28, 8:54 AM · Restricted Project

Tue, Aug 27

lenary committed rL370073: [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64….
[RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64…
Tue, Aug 27, 9:07 AM
lenary committed rGf260630e8f4c: [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64… (authored by lenary).
[RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64…
Tue, Aug 27, 9:05 AM
lenary closed D57450: [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics.
Tue, Aug 27, 9:00 AM · Restricted Project, Restricted Project
lenary added inline comments to D66725: [DAGCombiner][TargetLowering] Target hook for FCOPYSIGN arg cast folding.
Tue, Aug 27, 8:56 AM · Restricted Project
lenary updated the diff for D57450: [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics.

Address review feedback:

Tue, Aug 27, 8:31 AM · Restricted Project, Restricted Project
lenary accepted D66752: [RISCV] Implement RISCVRegisterInfo::getPointerRegClass.

This should be causing an assert everywhere it's used right now, shouldn't it? I'm confused that we're not seeing any of those asserts/failures in our testcases.

That's because overall it's not used much, so we were "lucky" not to hit the assert. But your reasoning makes sense.

Tue, Aug 27, 4:47 AM · Restricted Project
lenary added a comment to D66278: [RISCV] Enable tail call opt for variadic function.

Please may you explain a bit further why calls using varargs (when not passed by the stack) are allowed to be tail-call-optimised?

Tue, Aug 27, 4:02 AM · Restricted Project
lenary added a comment to D57450: [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics.

@jyknight I hear where you're coming from. I'll see what I can do about the psABI document.

In that ticket, it's mentioned that the Darwin ABI explicitly says that non-power-of-two atomic types should be padded and realigned, but I cannot find any documentation explaining this. That would be useful, given presumably GCC does have to pad/align on Darwin.

AFAIK, there is no such documentation, at least publicly. Possibly Apple has some internally, but I suspect it more likely just some in-person conversation or something.

GCC is not really supported on Darwin, so I suspect it just gets it wrong.

Tue, Aug 27, 4:02 AM · Restricted Project, Restricted Project
lenary added a comment to D66752: [RISCV] Implement RISCVRegisterInfo::getPointerRegClass.

LGTM with one question:

Tue, Aug 27, 3:29 AM · Restricted Project

Aug 22 2019

lenary added a comment to D57450: [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics.

@jyknight I hear where you're coming from. I'll see what I can do about the psABI document.

Aug 22 2019, 7:59 AM · Restricted Project, Restricted Project
lenary created D66591: [RISCV] Correct Logic around ilp32e macros.
Aug 22 2019, 7:23 AM · Restricted Project, Restricted Project
lenary added a comment to D57450: [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics.

Cross linking to the relevant psABI pull request (still pending): https://github.com/riscv/riscv-elf-psabi-doc/pull/112

Aug 22 2019, 6:51 AM · Restricted Project, Restricted Project
lenary updated the diff for D57450: [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics.

Update MaxAtomicPromote width to treat it like an ABI feature, and set it to 128

Aug 22 2019, 6:15 AM · Restricted Project, Restricted Project

Aug 16 2019

lenary planned changes to D57450: [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics.

Upon further thought, I realise that MaxAtomicPromoteWidth should be set to 128 regardless of whether a target HasA. I will be updating the patch with the new width and conditions early next week.

Aug 16 2019, 7:35 AM · Restricted Project, Restricted Project
lenary commandeered D57450: [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics.

Chatted to @asb and he wants me to take over this set of changes.

Aug 16 2019, 6:14 AM · Restricted Project, Restricted Project
lenary updated subscribers of D57332: [RISCV] Allow parsing of bare symbols with offsets.

@hans please can you backport rL369097 to the 9.0 branch?

Aug 16 2019, 6:14 AM · Restricted Project
lenary accepted D66252: [RISCV] Convert registers from unsigned to Register.

LGTM!

Aug 16 2019, 6:09 AM · Restricted Project
lenary added a comment to D66252: [RISCV] Convert registers from unsigned to Register.

I'm pretty happy with this. Just one question to answer (below) and then it can probably be merged.

Aug 16 2019, 5:03 AM · Restricted Project
lenary added a comment to D57450: [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics.

Given this is an ABI-compatibility issue, I've been looking at how GCC and Clang differ in how they deal with issues around size and alignment of atomic objects.

Aug 16 2019, 3:41 AM · Restricted Project, Restricted Project

Aug 15 2019

lenary added inline comments to D65950: [RISCV] Add Option for Printing Architectural Register Names.
Aug 15 2019, 5:59 AM · Restricted Project
lenary updated the diff for D65950: [RISCV] Add Option for Printing Architectural Register Names.

Address review feedback

  • Update flag description
Aug 15 2019, 5:59 AM · Restricted Project
lenary added a comment to D66266: [WIP][RISCV] Set MaxAtomicPromoteWidth and MaxAtomicInlineWidth.

Hi Pengxuan,

Aug 15 2019, 3:00 AM · Restricted Project
lenary added a comment to D39323: [lld] Support dynamic linking in RISC-V.

Am I correct in thinking that this functionality has already been upstreamed into LLD, and that this patch can now been abandoned?

Aug 15 2019, 2:52 AM · Restricted Project, lld
lenary added a comment to D39324: [lld] Support TLS in RISC-V.

Am I correct in thinking that this functionality has already been upstreamed into LLD, and that this patch can now been abandoned?

Aug 15 2019, 2:52 AM · lld