Page MenuHomePhabricator

lenary (Sam Elliott)
Compiler Developer at lowRISC CIC

Projects

User does not belong to any projects.

User Details

User Since
Nov 21 2016, 2:12 PM (204 w, 11 h)

Recent Activity

Yesterday

lenary added a comment to D89288: [RISCV] Enable the use of the old sptbr name.

I think supporting the old CSR names is a small, simple thing that we can do which removes a barrier to people moving to using LLVM rather than GCC. Better this than death by a thousand cuts when people try to move their software over. Yes, people *should* just update their software (and dependencies). The question is will they?

Mon, Oct 19, 6:12 AM · Restricted Project

Thu, Oct 15

lenary accepted D86457: [compiler-rt][builtins][RISCV] Always include __mul[sd]i3 builtin definitions.

LGTM. Yes you got all my changes.

Thu, Oct 15, 5:14 AM · Restricted Project

Mon, Oct 12

lenary added inline comments to D89244: [RISCV][ASAN] Fix TLS offsets.
Mon, Oct 12, 8:28 AM · Restricted Project
lenary added a comment to D89237: [RISCV] Do not grow the stack a second time when we need to realign the stack.

I thought we were over-allocating stack frame sizes, but I hadn't had time to investigate this properly, thanks for the thorough investigation Roger!

Mon, Oct 12, 8:14 AM · Restricted Project
lenary accepted D89139: [DAG][ARM][MIPS][RISCV] Improve funnel shift promotion to use 'double shift' patterns.

RISC-V Changes LGTM

Mon, Oct 12, 1:58 AM · Restricted Project

Thu, Sep 24

lenary added a comment to D88252: z_Linux_asm.S modifications for arm64 (AARCH64) for Darwin/macOS.

.size is accepted, but IIRC not required, in the risc-v assembler.

Thu, Sep 24, 11:59 AM · Restricted Project, Restricted Project

Wed, Sep 23

lenary added a comment to D87579: [RISCV][ASAN] unwind fixup.

LGTM

Does gcc use the same frame record layout? We've had issues like that with Arm, see GetCanonicFrame. If not, maybe it's not too late to fix?

I'll double-check.

Looks like it does.

Wed, Sep 23, 8:11 AM · Restricted Project

Sep 3 2020

lenary accepted D87069: [NFC][RISCV] Simplify pass arg of RISCVMergeBaseOffsetOpt.
Sep 3 2020, 3:09 AM · Restricted Project

Aug 25 2020

lenary accepted D86518: [RISC-V] fmv.s/fmv.d should be as cheap as a move.

LGTM!

Aug 25 2020, 5:34 AM · Restricted Project

Aug 24 2020

lenary added a comment to D84414: [RISCV] Support Shadow Call Stack.
In D84414#2234327, @pcc wrote:

FWIW, on aarch64 we decided to make -fsanitize=shadow-call-stack require the x18 reservation (instead of implying it) to try to avoid ABI mismatch problems. That is, it should be safe to mix and match code compiled with and without -fsanitize=shadow-call-stack. If we make -fsanitize=shadow-call-stack imply the x18 reservation, it makes it more likely that someone will accidentally build and link in incompatible code that does not reserve x18.

Aug 24 2020, 11:47 AM · Restricted Project, Restricted Project
lenary added a comment to D84414: [RISCV] Support Shadow Call Stack.

Why do we have to pass -ffixed-x18 when compiling? Is it enough to just reserve x18 whenever the function has the shadow call stack attribute?

When SCS is on, x18 must be preserved across calls. Given it's a callee-saved, value in x18 is preserved by functions that do not have SCS attribute.

However, saving x18 on stack risks leaking SCS's location in memory, making the defense useless.

Aug 24 2020, 11:13 AM · Restricted Project, Restricted Project
lenary added a comment to D84414: [RISCV] Support Shadow Call Stack.

Why do we have to pass -ffixed-x18 when compiling? Is it enough to just reserve x18 whenever the function has the shadow call stack attribute?

Aug 24 2020, 10:24 AM · Restricted Project, Restricted Project
lenary added a comment to D86457: [compiler-rt][builtins][RISCV] Always include __mul[sd]i3 builtin definitions.

Two nits about the implementations. Otherwise, LGTM!

Aug 24 2020, 8:46 AM · Restricted Project
lenary added a comment to D86036: [compiler-rt][RISCV] Use muldi3 builtin assembly implementation.

@thakis this also matches the #ifdefs in the files themselves.

Hopefully not for long: D86457 :-)

Aug 24 2020, 7:16 AM · Restricted Project
lenary added a comment to D86036: [compiler-rt][RISCV] Use muldi3 builtin assembly implementation.

@thakis this also matches the #ifdefs in the files themselves.

Aug 24 2020, 7:06 AM · Restricted Project

Aug 20 2020

lenary accepted D86036: [compiler-rt][RISCV] Use muldi3 builtin assembly implementation.

I haven't had time to try building compiler-rt with this fix, however there is nowhere else in the build system that riscv/muldi3.S is referenced, so I'm happy to accept this patch as improving compiler-rt.

Aug 20 2020, 9:12 AM · Restricted Project
lenary accepted D86286: [RISCV] Fix inaccurate annotations on PseudoBRIND.

LGTM! Nice Catch!

Aug 20 2020, 9:06 AM · Restricted Project
lenary added a comment to D84414: [RISCV] Support Shadow Call Stack.

There is a possibly-compelling argument against using x18: RV32E only gives x0-x15, so would not be able to support the current implementation.

Aug 20 2020, 8:59 AM · Restricted Project, Restricted Project
lenary added inline comments to D81348: [compiler-rt][builtins] Add tests for atomic builtins support functions.
Aug 20 2020, 4:08 AM · Restricted Project

Aug 17 2020

lenary committed rG3f7068ad986d: [RISCV] Enable the use of the old mucounteren name (authored by lenary).
[RISCV] Enable the use of the old mucounteren name
Aug 17 2020, 5:14 AM
lenary closed D85067: [RISCV] Enable the use of the old mucounteren name.
Aug 17 2020, 5:13 AM · Restricted Project
lenary committed rG5f9ecc5d857f: [RISCV] Indirect branch generation in position independent code (authored by lenary).
[RISCV] Indirect branch generation in position independent code
Aug 17 2020, 5:10 AM
lenary closed D84833: Implement indirect branch generation in position independent code for the RISC-V target.
Aug 17 2020, 5:09 AM · Restricted Project
lenary added a comment to D84833: Implement indirect branch generation in position independent code for the RISC-V target.

Sorry, I was away. It's on my list to get to today!

Aug 17 2020, 2:54 AM · Restricted Project

Aug 6 2020

lenary added a comment to D85366: [RISCV] Do not mandate scheduling for CSR instructions.

Given the comment on isBarrier in Target.td, I'm not sure it applies: bit isBarrier = 0; // Can control flow fall through this instruction?

Aug 6 2020, 1:44 AM · Restricted Project

Aug 5 2020

lenary added a comment to D85067: [RISCV] Enable the use of the old mucounteren name.

@jrtc27 Do you have any remaining concerns?

Aug 5 2020, 6:03 AM · Restricted Project

Aug 4 2020

lenary added a comment to D85067: [RISCV] Enable the use of the old mucounteren name.

@pzheng please may you use the "Add Action…" dropdown to mark as approved?

Aug 4 2020, 1:34 AM · Restricted Project

Aug 3 2020

lenary accepted D85015: [RISCV] Enable MCCodeEmitter instruction predicate verifier.

LGTM!

Aug 3 2020, 2:45 AM · Restricted Project
lenary accepted D85067: [RISCV] Enable the use of the old mucounteren name.

LGTM with one minor change. Once we get the LGTM from @jrtc27 and @pzheng, then I'll commit this for you @mmxsrup!

Aug 3 2020, 1:52 AM · Restricted Project

Jul 31 2020

lenary accepted D85002: [RISCV] eliminate the repetition declare of SDLoc DL.

LGTM!

Jul 31 2020, 3:20 AM · Restricted Project

Jul 29 2020

lenary added a comment to D84833: Implement indirect branch generation in position independent code for the RISC-V target.

Context: this is part of the patch which fixes an issue seen when building rust-analyzer for riscv64 linux hosts. I think this patch also fixes an issue seen by the Zig toolchain developers, who were trying to compile the LLVM NVPTX backend for riscv64 linux hosts.

Jul 29 2020, 4:09 AM · Restricted Project

Jul 28 2020

lenary added a reviewer for D84727: [RISC-V] Add support for AddressSanitizer: lenary.

There is only support for 64-bit RISC-V in the sanitizer implementation: rG977205b595c. Until the 32-bit risc-v linux ABI is stable, this should not be landed.

Jul 28 2020, 2:29 AM

Jul 23 2020

lenary added a comment to D81391: [RISC-V] Do not crash when using -ftrapping-math.

You will need to rebase past D80952, which made constrained fp a target opt-in - though in all honesty, with that patch, this patch is less of a priority as the compiler will not crash any more.

Jul 23 2020, 2:48 AM · Restricted Project

Jul 15 2020

lenary accepted D71124: [RISCV] support clang driver to select cpu.

I am happy with this. I think we should get it landed so we can backport it to the LLVM 11 branch.

Jul 15 2020, 8:22 AM · Restricted Project, Restricted Project
lenary added a comment to D71124: [RISCV] support clang driver to select cpu.

Thanks for the fix!

Jul 15 2020, 5:43 AM · Restricted Project, Restricted Project

Jul 14 2020

lenary planned changes to D82988: [RISCV] Avoid Splitting MBB in RISCVExpandPseudo.
Jul 14 2020, 10:28 AM · Restricted Project
lenary added a comment to D82988: [RISCV] Avoid Splitting MBB in RISCVExpandPseudo.

@rogfer01 @efriedma I would love this pass to happen early in the pipeline, so that auipc/l{d,w} can be rescheduled or shared. Maybe the easy solution is to mark the auipc as not duplicatable (as that's the thing you want to share, anyway), so the l{d,w} can be duplicated if necessary?

Jul 14 2020, 10:27 AM · Restricted Project
lenary added a comment to D71124: [RISCV] support clang driver to select cpu.

I've got one major issue (inline below), and I'm confused by some other behaviour:

Jul 14 2020, 8:28 AM · Restricted Project, Restricted Project
lenary accepted D83750: [NFC][RISCV] Test for D81805.

LGTM

Jul 14 2020, 4:10 AM · Restricted Project
lenary added a comment to D82988: [RISCV] Avoid Splitting MBB in RISCVExpandPseudo.

Reverted in rG1d15bbb9d91

Jul 14 2020, 3:16 AM · Restricted Project
lenary added a reverting change for rG97106f9d80f6: [RISCV] Avoid Splitting MBB in RISCVExpandPseudo: rG1d15bbb9d916: Revert "[RISCV] Avoid Splitting MBB in RISCVExpandPseudo".
Jul 14 2020, 3:16 AM
lenary committed rG1d15bbb9d916: Revert "[RISCV] Avoid Splitting MBB in RISCVExpandPseudo" (authored by lenary).
Revert "[RISCV] Avoid Splitting MBB in RISCVExpandPseudo"
Jul 14 2020, 3:16 AM
lenary reopened D82988: [RISCV] Avoid Splitting MBB in RISCVExpandPseudo.

We're close to the branch date. I'm going to revert rG97106f9d80f6 and look at this again. Sound good?

Jul 14 2020, 3:13 AM · Restricted Project
lenary added a comment to D83750: [NFC][RISCV] Test for D81805.

Are we sure we want to branch on undef to one of two unreachables?

Jul 14 2020, 2:43 AM · Restricted Project

Jul 9 2020

lenary added a comment to D65802: [DAGCombiner] Rebuild (setcc x, y, ==) from (xor (xor x, y), 1).

Ping? This is mentioned in a RISC-V bug on llvm bugzilla, and seems like a nice improvement to multiple targets if we can land it.

Jul 9 2020, 7:15 AM · Restricted Project
lenary committed rG97106f9d80f6: [RISCV] Avoid Splitting MBB in RISCVExpandPseudo (authored by lenary).
[RISCV] Avoid Splitting MBB in RISCVExpandPseudo
Jul 9 2020, 5:55 AM
lenary closed D82988: [RISCV] Avoid Splitting MBB in RISCVExpandPseudo.
Jul 9 2020, 5:55 AM · Restricted Project
lenary updated the summary of D82988: [RISCV] Avoid Splitting MBB in RISCVExpandPseudo.
Jul 9 2020, 3:16 AM · Restricted Project
lenary added a comment to D82988: [RISCV] Avoid Splitting MBB in RISCVExpandPseudo.

The RISCVTargetMachine changes are not distinct. You can only use virtual registers (ScratchReg) if you are before register allocation, as I understand it.

Jul 9 2020, 2:54 AM · Restricted Project

Jul 8 2020

lenary added a comment to D71124: [RISCV] support clang driver to select cpu.

I realise this is almost certainly something we want to land before the LLVM 11 branch date, as we included schedules in LLVM 10 with no way to use them, and would like users to be able to use them. I'll bring it up on the call tomorrow - I hope this PR implements what we agreed from the previous calls.

Jul 8 2020, 3:31 PM · Restricted Project, Restricted Project

Jul 7 2020

lenary added a comment to D82660: [RISCV] Optimize multiplication by constant.

One issue, then I'm happy.

Jul 7 2020, 1:17 AM · Restricted Project

Jul 6 2020

lenary added a comment to D83153: [DAGCombiner] Prevent regression in isMulAddWithConstProfitable.

If it's not too much trouble, I've added D83159 as a parent patch, which are the tests for this change in the RISC-V backend.

Jul 6 2020, 3:59 AM · Restricted Project
lenary accepted D83159: [RISCV][test] Add a new codegen test of add-mul transform.

Please ask for commit access and land this yourself. There's more about this, and what that entails, in this document: https://llvm.org/docs/DeveloperPolicy.html

Jul 6 2020, 3:32 AM · Restricted Project

Jul 2 2020

lenary updated the diff for D83059: [RISCV] Use Generated Instruction Uncompresser.
  • Enable More Relaxations
Jul 2 2020, 11:19 AM · Restricted Project
lenary planned changes to D83059: [RISCV] Use Generated Instruction Uncompresser.

Oh there's more to do, which may involve changes to llvm/utils/TableGen/RISCVCompressInstEmitter.cpp

Jul 2 2020, 10:14 AM · Restricted Project
lenary created D83059: [RISCV] Use Generated Instruction Uncompresser.
Jul 2 2020, 10:14 AM · Restricted Project
lenary added inline comments to D81348: [compiler-rt][builtins] Add tests for atomic builtins support functions.
Jul 2 2020, 4:48 AM · Restricted Project
lenary added a comment to D82660: [RISCV] Optimize multiplication by constant.

I'm happy with this optimisation where this patch removes multiply libcalls.

Jul 2 2020, 4:15 AM · Restricted Project

Jul 1 2020

lenary committed rG003a086ffc0d: [RISCV][NFC] Pre-commit tests for D82660 (authored by benshi001).
[RISCV][NFC] Pre-commit tests for D82660
Jul 1 2020, 3:09 PM
lenary added a comment to D82660: [RISCV] Optimize multiplication by constant.

This is looking good.

I'm going to pre-commit the test additions today - if you could rebase your changes on top, that will allow us to see how this change affects the new testcases you added. I'll keep you as the author and let you know the sha so you can rebase on top of the commit.

Jul 1 2020, 3:09 PM · Restricted Project
lenary added a comment to D82660: [RISCV] Optimize multiplication by constant.

This is looking good.

Jul 1 2020, 2:36 PM · Restricted Project
lenary added inline comments to D82988: [RISCV] Avoid Splitting MBB in RISCVExpandPseudo.
Jul 1 2020, 2:04 PM · Restricted Project
lenary updated the diff for D82988: [RISCV] Avoid Splitting MBB in RISCVExpandPseudo.

I have a question out to llvm-dev about the stability of PreInstrSymbol, but
given it's used by the retpoline pass, I am reasonably confident the
functionality is complete enough for our uses.

Jul 1 2020, 2:04 PM · Restricted Project
lenary created D82988: [RISCV] Avoid Splitting MBB in RISCVExpandPseudo.
Jul 1 2020, 11:54 AM · Restricted Project
lenary added a comment to D79635: [RISCV] Split the pseudo instruction splitting pass.

Should these blocks just be manually split, that way you don't have to hack around tracking that an arbitrary instruction in the stream is a branch target?

Jul 1 2020, 10:15 AM · Restricted Project
lenary added a comment to D79635: [RISCV] Split the pseudo instruction splitting pass.

@luismarques yep, you've got my analysis correct.

Jul 1 2020, 10:15 AM · Restricted Project
lenary accepted D79690: [RISCV] Fold ADDIs into load/stores with nonzero offsets.

LGTM!

Jul 1 2020, 7:32 AM · Restricted Project
lenary abandoned D65959: [RISCV] Implement targetHandlesStackFrameRounding to prevent stack over-allocation.
Jul 1 2020, 5:22 AM · Restricted Project
lenary committed rG7dc892661edd: [RISCV] Implement Hooks to avoid chaining SELECT (authored by lenary).
[RISCV] Implement Hooks to avoid chaining SELECT
Jul 1 2020, 4:18 AM
lenary committed rGc44266dc4816: [RISCV][NFC] Add Test for (select (or B1, B2), X, Y) (authored by lenary).
[RISCV][NFC] Add Test for (select (or B1, B2), X, Y)
Jul 1 2020, 4:18 AM
lenary closed D79268: [RISCV] Implement Hooks to avoid chaining SELECT.
Jul 1 2020, 4:17 AM · Restricted Project
lenary closed D79267: [RISCV][NFC] Add Test for (select (or B1, B2), X, Y).
Jul 1 2020, 4:17 AM · Restricted Project
lenary updated the summary of D79268: [RISCV] Implement Hooks to avoid chaining SELECT.
Jul 1 2020, 3:11 AM · Restricted Project
lenary updated the summary of D79268: [RISCV] Implement Hooks to avoid chaining SELECT.
Jul 1 2020, 2:40 AM · Restricted Project

Jun 30 2020

lenary updated the diff for D79268: [RISCV] Implement Hooks to avoid chaining SELECT.
  • Update tests for last time
Jun 30 2020, 10:50 AM · Restricted Project
lenary updated the diff for D79267: [RISCV][NFC] Add Test for (select (or B1, B2), X, Y).
  • Simplify and test to ensure branchy code is generated.
Jun 30 2020, 10:50 AM · Restricted Project
lenary updated the diff for D79268: [RISCV] Implement Hooks to avoid chaining SELECT.
  • Update tests due to changes in D79267
Jun 30 2020, 10:50 AM · Restricted Project
lenary updated the diff for D79267: [RISCV][NFC] Add Test for (select (or B1, B2), X, Y).
  • Expand select(or/and) tests to include if(or/and) cases
Jun 30 2020, 10:49 AM · Restricted Project
lenary closed D77988: [test-suite] Exclude another UB tests from the gcc-torture suite.

Merged in https://github.com/llvm/llvm-test-suite/commit/0bfeb655e49fc6feeeb63d534019019bf4bb4d7c (there's no auto-close for llvm-test-suite since the move to github).

Jun 30 2020, 2:08 AM

Jun 29 2020

lenary added a comment to D77988: [test-suite] Exclude another UB tests from the gcc-torture suite.

I can land it for you today, if that's easier. I have a checkout of the test suite handy

Jun 29 2020, 10:48 AM
lenary added a comment to D77988: [test-suite] Exclude another UB tests from the gcc-torture suite.

@jdoerfert I don't think this landed yet?

Jun 29 2020, 6:26 AM
lenary updated the diff for D79267: [RISCV][NFC] Add Test for (select (or B1, B2), X, Y).
  • Added (select (and A, B), X, Y) test.
Jun 29 2020, 3:44 AM · Restricted Project

Jun 26 2020

lenary added a comment to D82660: [RISCV] Optimize multiplication by constant.

Thanks for the patch!

Jun 26 2020, 8:44 AM · Restricted Project

Jun 23 2020

lenary accepted D79689: [RISCV][NFC] Add tests for folds of ADDIs into load/stores.

Nice work, let's get this landed!

Jun 23 2020, 1:26 PM · Restricted Project
lenary added a reviewer for D82262: [RISCV] optimize addition with a pair of (addi imm): luismarques.
Jun 23 2020, 3:40 AM · Restricted Project

Jun 15 2020

lenary added inline comments to D81801: Remove KillTheDoctor.
Jun 15 2020, 7:00 AM · Restricted Project, Restricted Project

Jun 10 2020

lenary added a comment to D78931: [libunwind][RISCV] Track PC separately from RA.

@Amanieu given you've now had a few commits approved successfully, do request LLVM committer access and land this yourself. There's details as to how to do so here: https://llvm.org/docs/DeveloperPolicy.html#obtaining-commit-access

Jun 10 2020, 5:58 AM · Restricted Project, Restricted Project

Jun 4 2020

lenary added inline comments to D81083: [Clang] Allow "vector_size" applied to Booleans.
Jun 4 2020, 7:04 AM · Restricted Project, Restricted Project

Jun 1 2020

lenary created D80963: [WIP][clang] Allow {u}int_fastN_t to be different to {u}int_leastN_t.
Jun 1 2020, 5:21 PM · Restricted Project

May 31 2020

lenary abandoned D78906: [RISCV] Add patterns for indirect float conversions.
May 31 2020, 11:42 AM · Restricted Project
lenary abandoned D78905: [RISCV][NFC] Tests for indirect float conversion.
May 31 2020, 11:42 AM · Restricted Project
lenary abandoned D79187: [DAGCombiner] fold (fp_round (int_to_fp X)) -> (int_to_fp X).

rGc048a02b5b26 does this transform in IR. Do we still need a backend transform?

May 31 2020, 11:26 AM · Restricted Project

May 28 2020

lenary accepted D78931: [libunwind][RISCV] Track PC separately from RA.

From the RISC-V side, I'm happy with this (having looked at how gcc's libunwind works). Any comments @bsdjhb and @jrtc27?

May 28 2020, 11:33 AM · Restricted Project, Restricted Project

May 18 2020

lenary planned changes to D78910: [RISCV] RISCBoy Scheduling Model.

I still need to implement Forwarding, LoopMicroOpBufferSize should definitely be zero, and the whole model should refer to the Core, which is now officially called Hazard5 (and is being used in more projects).

May 18 2020, 10:48 AM · Restricted Project

May 15 2020

lenary added inline comments to D79690: [RISCV] Fold ADDIs into load/stores with nonzero offsets.
May 15 2020, 5:53 AM · Restricted Project
lenary added inline comments to D79322: [FEnv] Small fixes to implementation of flt.rounds.
May 15 2020, 4:29 AM · Restricted Project, Restricted Project

May 14 2020

lenary accepted D79928: [RISCV] Make visibility of overridden methods in RISCVISelLowering match the parent.

I am in favour of this reasoning around matching the visibility - it serves downstream users best (in general), and there's no good reason not to allow people to subclass these classes for their own usage (though I don't know how much this happens in reality).

May 14 2020, 4:47 AM · Restricted Project

May 13 2020

lenary added a comment to D78272: [DAGCombiner] Combine shifts into multiply-high .

Since it would seem that this can't immediately be combined with the only other target that seems to want this, I would recommend that we keep this in the PPC back end for now. If there is interest in commoning it up in the future, we revisit this then.
Does that sound like a good plan?
And of course, thanks for all your feedback @craig.topper @RKSimon!

May 13 2020, 3:43 AM · Restricted Project

May 12 2020

lenary added a comment to D79492: [RISCV] Improve constant materialization.

Alex's concerns about the retry-based algorithm seem reasonable to me, but I have been advocating the approach of "this is an improvement, we can make more improvements later", so I think I still err towards landing this patch.

May 12 2020, 3:43 AM · Restricted Project
lenary added a comment to D78545: [RISCV] Make CanLowerReturn protected for downstream maintenance.

Sorry, this is my fault, I should have asked Jim to wait for more approvals.

May 12 2020, 3:43 AM · Restricted Project