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clang/test/CodeGen/X86/cmpccxadd-builtins-error.c | ||
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3 | Add 32-bit test coverage to ensure the intrinsics aren't visible? |
llvm/CMakeLists.txt | ||
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887 ↗ | (On Diff #467668) | What is this for? |
clang/include/clang/Basic/BuiltinsX86_64.def | ||
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140 | There was a blank line here. Put it back. | |
clang/lib/Basic/Targets/X86.cpp | ||
785 | What is CMPCCXADD_SUPPORTED for? | |
llvm/lib/Target/X86/X86.td | ||
262 | Why AVX2? | |
llvm/lib/Target/X86/X86InstrSSE.td | ||
8118 ↗ | (On Diff #468395) | This feels like it belongs somewhere other than X86InstrSSE.td since it's not vector related. |
8131 ↗ | (On Diff #468395) | Any possibility of doing this like how JCC_1, SETCCr, and CMOV32rr using an immediate for the lower 4 bits of the opcode? |
8145–8146 ↗ | (On Diff #468395) | Should there be aliases for consistency with Jcc, Setcc, and cmovcc. To support A, AE, GT, GE etc.? |
llvm/lib/Target/X86/X86InstrSSE.td | ||
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8118 ↗ | (On Diff #468395) | Missing Defs = [EFLAGS] I think |
llvm/test/MC/X86/x86-64-cmpccxadd-att.s | ||
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1 ↗ | (On Diff #468395) | Drop the -att.s and add intel test coverage? |
Address comments. THX for review!
llvm/lib/Target/X86/X86.td | ||
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262 | Removed. | |
llvm/lib/Target/X86/X86InstrSSE.td | ||
8118 ↗ | (On Diff #468395) | Yes. Moved to llvm/lib/Target/X86/X86InstrCompiler.td |
8131 ↗ | (On Diff #468395) | Yes. Changed so. |
8145–8146 ↗ | (On Diff #468395) | Yes, changed so. |
clang/lib/Basic/Targets/X86.cpp | ||
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976 | This list is alphabetized or was supposed to be | |
1005 | This list is alphabetized | |
llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | ||
1071 | This comment is out of date. | |
llvm/lib/Target/X86/X86ISelLowering.cpp | ||
5652 | Probably need MOVolatile too | |
llvm/lib/Target/X86/X86InstrCompiler.td | ||
1026 ↗ | (On Diff #469456) | X86InstrCompiler.td is for pseudos and isCodeGenOnly=1 instructions. Basically things only needed by CodeGen and not the assembler/disassembler. |
llvm/utils/TableGen/X86RecognizableInstr.cpp | ||
874 | Extra space after MRMDestMem4VOp3CC |
llvm/lib/Target/X86/X86InstrCompiler.td | ||
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1026 ↗ | (On Diff #469456) | I was to make it near "cmpxchg". What about llvm/lib/Target/X86/X86InstrInfo.td? |
llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | ||
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1071 | I'd prefer if you fixed the comment rather than deleting it. | |
llvm/lib/Target/X86/X86InstrInfo.td | ||
3027 | Can we put $dstsrc2 before $dstsrc1 in the ins list? That would remove the need for the change in getOperandBias I think. But maybe it complicates the encoder and disassembler? | |
llvm/lib/Target/X86/X86InstrSSE.td | ||
8125 ↗ | (On Diff #469470) | Looks like there's a blank line being deleted here? |
llvm/lib/Target/X86/X86ISelLowering.cpp | ||
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5645–5655 | This can be merged with above. |
llvm/lib/Target/X86/X86InstrInfo.td | ||
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3028 | +1 for craig. Usually if the input is tied to ouput, it should be the 1st input. These two instructions use a new Format MRMDestMem4VOp3CC rather than an existing one, I belive it won't increase the complexity. |
clang/test/Driver/x86-target-features.c | ||
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313 | Use -target=xxx -march=xxx to match with others. xxx can be x86_64 I think. | |
314 | ditto. | |
llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | ||
1073 | Unrelated change. | |
1127 | Maybe move it to line 1133? MRMDestMem4VOp3CC is used for VEX encoding only. | |
llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | ||
816 | Also this is not needed. | |
820 | ditto. | |
llvm/lib/Target/X86/X86ISelLowering.cpp | ||
34174 | ditto. | |
llvm/lib/Target/X86/X86ISelLowering.h | ||
872 | Add comments for them? | |
873 | This node seems not used. | |
llvm/lib/Target/X86/X86InstrInfo.td | ||
348 | Change to CMPCCXADD since it's shared. |
llvm/lib/Target/X86/X86InstrInfo.td | ||
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3035 | set GR64:$dst, EFLAGS ...? |
clang/lib/Headers/cmpccxaddintrin.h | ||
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20–35 | Could you use the same suffix for the condition code as ./llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h? e.g NB->AE Z->E NZ->NE NBE->A and so on. |
llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp | ||
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32 ↗ | (On Diff #470079) | Capitalize 1st char |
llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | ||
1455–1457 | Minor suggestion emitMemModRMByte(MI, ++CurOp, getX86RegNum(MI.getOperand(0)), TSFlags, HasREX, StartByte, OS, Fixups, STI, false); CurOp = SrcRegNum + 2; // skip VEX_V4 and CC would be more clear b/c you use "skip VEX_V4 and CC" in the comments. |
There was a blank line here. Put it back.