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LuoYuanke (LuoYuanke)
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User Since
Sep 24 2018, 10:28 PM (42 w, 6 d)

Recent Activity

Fri, Jul 19

LuoYuanke added a comment to D56772: [MIR] Add simple PRE pass to MachineCSE.

@anton-afanasyev
Hi,
Did you look into the SPEC cpu2017/500.perlbench_r issue? There is some significant performance drop on X86 with the patch. I ask you to revert the patch first, and when the SPEC2017 regression is fixed, we can submit the patch again. How do you think?

Fri, Jul 19, 12:24 AM · Restricted Project

Mon, Jul 1

LuoYuanke added inline comments to D56772: [MIR] Add simple PRE pass to MachineCSE.
Mon, Jul 1, 6:16 PM · Restricted Project

Sat, Jun 22

LuoYuanke added inline comments to D56772: [MIR] Add simple PRE pass to MachineCSE.
Sat, Jun 22, 6:15 PM · Restricted Project

Jun 19 2019

LuoYuanke added inline comments to D56772: [MIR] Add simple PRE pass to MachineCSE.
Jun 19 2019, 7:51 PM · Restricted Project

Jun 10 2019

LuoYuanke accepted D62115: fix a issue that clang is incompatible with gcc with -H option..
Jun 10 2019, 12:24 AM · Restricted Project

May 6 2019

LuoYuanke committed rG844f66293235: Enable intrinsics of AVX512_BF16, which are supported for BFLOAT16 in Cooper… (authored by LuoYuanke).
Enable intrinsics of AVX512_BF16, which are supported for BFLOAT16 in Cooper…
May 6 2019, 1:24 AM
LuoYuanke committed rC360018: Enable intrinsics of AVX512_BF16, which are supported for BFLOAT16 in Cooper….
Enable intrinsics of AVX512_BF16, which are supported for BFLOAT16 in Cooper…
May 6 2019, 1:24 AM
LuoYuanke committed rL360018: Enable intrinsics of AVX512_BF16, which are supported for BFLOAT16 in Cooper….
Enable intrinsics of AVX512_BF16, which are supported for BFLOAT16 in Cooper…
May 6 2019, 1:23 AM
LuoYuanke closed D60552: [X86] Enable intrinsics of AVX512_BF16, which are supported for BFLOAT16 in Cooper Lake.
May 6 2019, 1:23 AM · Restricted Project, Restricted Project
LuoYuanke committed rGbeec41c656e7: Enable AVX512_BF16 instructions, which are supported for BFLOAT16 in Cooper Lake (authored by LuoYuanke).
Enable AVX512_BF16 instructions, which are supported for BFLOAT16 in Cooper Lake
May 6 2019, 1:21 AM
LuoYuanke committed rL360017: Enable AVX512_BF16 instructions, which are supported for BFLOAT16 in Cooper Lake.
Enable AVX512_BF16 instructions, which are supported for BFLOAT16 in Cooper Lake
May 6 2019, 1:21 AM
LuoYuanke closed D60550: [X86] Enable AVX512_BF16 instructions, which are supported for BFLOAT16 in Cooper Lake.
May 6 2019, 1:21 AM · Restricted Project

May 5 2019

LuoYuanke accepted D61580: [NFC] This is a test for the commit access..
May 5 2019, 7:49 PM · Restricted Project

Apr 11 2019

LuoYuanke added a comment to D60437: Add MM register mapping from CodeView to MC register id.

Okay, let's not worry too much about the test case, the patch seems obviously good.

Do you have commit access, or would you like me to commit for you?

Apr 11 2019, 8:04 AM · Restricted Project
LuoYuanke committed rGa2b4d3fab623: [X86] Add MM register mapping from CodeView to MC register id (authored by LuoYuanke).
[X86] Add MM register mapping from CodeView to MC register id
Apr 11 2019, 8:01 AM
LuoYuanke committed rL358179: [X86] Add MM register mapping from CodeView to MC register id.
[X86] Add MM register mapping from CodeView to MC register id
Apr 11 2019, 8:01 AM
LuoYuanke closed D60437: Add MM register mapping from CodeView to MC register id.
Apr 11 2019, 8:01 AM · Restricted Project
LuoYuanke added a comment to D60437: Add MM register mapping from CodeView to MC register id.

I'm not familiar with the CodeView stuff, rnk is the better person for that, but would it be possible to add a test that exercises this mapping? Or to put it another way, what does this fix that's currently broken, and is it possible to add a test for it?

I try to add such test case, but I don't find any existing test case for mapping codeveiw register to MC register.
@rnk
Do you know if there is any reference test case in llvm/test code?

You can try removing a bunch of the entries in RegMap and see which tests fail. They're all in llvm/tests/DebugInfo/COFF/
I don't think there's any test for the mapping itself, but the tests rely on it to work.

That's what my second question was about: what is currently not working that your patch is fixing, and can that be used to write a test?

Thank you for the suggestion. I disable the code of xmm0 - xmm7 mapping and there is no case failure in llvm/tests/DebugInfo/COFF/. However when I disable general register (rax -r15), some of the test cases (.e.g test/DebugInfo/COFF/types-basic.ll) fail. There is pretty much code for the failed test case which I'm investigating. To create a small test case, we may need to cause much pressure on register allocator for mm0 - mm7 with __m64 variable in c code. However I have not figured out how to created such case.
Nevertheless, does anybody know why the mm0-mm7 registers are not mapped. Is there any reasons on it?

I'm guessing it's just an oversight.

Would it be possible to use inline assembly to trigger use of these registers in some way?

If this turns out to be hard, I think we can just check in your patch as is, it seems like an obvious fix.

Apr 11 2019, 7:12 AM · Restricted Project
LuoYuanke added a comment to D60437: Add MM register mapping from CodeView to MC register id.

I'm not familiar with the CodeView stuff, rnk is the better person for that, but would it be possible to add a test that exercises this mapping? Or to put it another way, what does this fix that's currently broken, and is it possible to add a test for it?

I try to add such test case, but I don't find any existing test case for mapping codeveiw register to MC register.
@rnk
Do you know if there is any reference test case in llvm/test code?

You can try removing a bunch of the entries in RegMap and see which tests fail. They're all in llvm/tests/DebugInfo/COFF/
I don't think there's any test for the mapping itself, but the tests rely on it to work.

That's what my second question was about: what is currently not working that your patch is fixing, and can that be used to write a test?

Apr 11 2019, 6:30 AM · Restricted Project

Apr 10 2019

LuoYuanke added a comment to D60437: Add MM register mapping from CodeView to MC register id.

I'm not familiar with the CodeView stuff, rnk is the better person for that, but would it be possible to add a test that exercises this mapping? Or to put it another way, what does this fix that's currently broken, and is it possible to add a test for it?

Apr 10 2019, 10:25 PM · Restricted Project

Apr 8 2019

LuoYuanke added a comment to D60039: Fix the bug of garbage collection of siod..

@jyknight
I don't have permission to commit the patch. Could you help to commit it? Thanks.

Apr 8 2019, 10:15 PM · Restricted Project
LuoYuanke created D60437: Add MM register mapping from CodeView to MC register id.
Apr 8 2019, 7:06 PM · Restricted Project
LuoYuanke added a comment to D60039: Fix the bug of garbage collection of siod..

If you change to condition on GLIBC instead of linux, I think this is fine to commit (although it still seems unfortunate to me that we're carrying an abandoned codebase which depends on weird broken stuff like this...)

Apr 8 2019, 6:16 AM · Restricted Project
LuoYuanke updated the diff for D60039: Fix the bug of garbage collection of siod..

Fix the issue only when GLIBC is defined.

Apr 8 2019, 6:14 AM · Restricted Project

Apr 7 2019

LuoYuanke added inline comments to D60039: Fix the bug of garbage collection of siod..
Apr 7 2019, 7:35 PM · Restricted Project
LuoYuanke added inline comments to D60039: Fix the bug of garbage collection of siod..
Apr 7 2019, 6:42 PM · Restricted Project

Apr 3 2019

LuoYuanke added inline comments to D60039: Fix the bug of garbage collection of siod..
Apr 3 2019, 9:38 PM · Restricted Project
LuoYuanke updated the diff for D60039: Fix the bug of garbage collection of siod..

Use getcontext() only on linux platform.

Apr 3 2019, 8:11 PM · Restricted Project
LuoYuanke added a comment to D60039: Fix the bug of garbage collection of siod..

I would question whether it's actually worth it to attempt to keep software working that seems to have been abandoned for a decade as part of the llvm test suite? Should this code just be removed, instead of patched?

I'd note that not all platforms support getcontext -- at least Windows and OpenBSD don't. I don't actually know if this is expected to work on those platforms, but it definitely won't after this change.

Apr 3 2019, 7:47 PM · Restricted Project

Apr 1 2019

LuoYuanke added a comment to D60039: Fix the bug of garbage collection of siod..

I believe this is saving rbp but mangling it while doing so in a reversible way.

0x00007ffff6f93fa3 <+3>:     mov    %rbp,%rax
0x00007ffff6f93fa6 <+6>:     xor    %fs:0x30,%rax
0x00007ffff6f93faf <+15>:    rol    $0x11,%rax
0x00007ffff6f93fb3 <+19>:    mov    %rax,0x8(%rdi)
Apr 1 2019, 7:47 PM · Restricted Project
LuoYuanke added a comment to D60039: Fix the bug of garbage collection of siod..

Are sure RBP isn't in the jmp buffer? There's a macro used by setjmp called PTR_MANGLE that can xor the pointer with another variable which can obscure the value. It gets xored again in longjmp to demangle it. But in either case its not a good idea to examine the contents of jmp_buf so I think this is the right fix.

Apr 1 2019, 6:24 PM · Restricted Project

Mar 30 2019

LuoYuanke created D60039: Fix the bug of garbage collection of siod..
Mar 30 2019, 6:36 PM · Restricted Project

Mar 9 2019

Herald added projects to D53608: [builtins] Build float128 soft float builtins for x86_64.: Restricted Project, Restricted Project.

Hi
What's the status for __float128 support? Has it already been finished?

Mar 9 2019, 2:04 AM · Restricted Project, Restricted Project

Feb 21 2019

LuoYuanke added a comment to D58336: [X86] Fix tls variable lowering issue with large code model.

@rnk
Do you agree to just fix the " X86ISD::WrapperRIP TargetGlobalTLSAddress" issue in this patch? Do you have some other concern of comments for the patch?

Feb 21 2019, 5:29 PM · Restricted Project

Feb 20 2019

LuoYuanke updated the diff for D58336: [X86] Fix tls variable lowering issue with large code model.

Add "FIXME" for tls compiled with pic but without pie option.

Feb 20 2019, 6:58 PM · Restricted Project
LuoYuanke added inline comments to D58336: [X86] Fix tls variable lowering issue with large code model.
Feb 20 2019, 5:59 PM · Restricted Project
LuoYuanke added inline comments to D58336: [X86] Fix tls variable lowering issue with large code model.
Feb 20 2019, 5:49 PM · Restricted Project
LuoYuanke updated the diff for D58336: [X86] Fix tls variable lowering issue with large code model.

Fix typo of comments.

Feb 20 2019, 5:47 PM · Restricted Project
LuoYuanke added inline comments to D58336: [X86] Fix tls variable lowering issue with large code model.
Feb 20 2019, 5:37 PM · Restricted Project

Feb 19 2019

LuoYuanke added a comment to D58102: Support X86 Control-flow Enforcement Technology (CET) in LLD.

Hi ruiu

Feb 19 2019, 9:47 PM · Restricted Project, lld
LuoYuanke added a comment to D58102: Support X86 Control-flow Enforcement Technology (CET) in LLD.

I think SPLT has better compatibility compared to change the original PLT entry. Given the platform is old, and use the old dynamic linker, the new library that build with SPLT can still be linked by dynamic linker. I am not sure if it still works if we change the struct of PLT entry.
The second issue is GNU toolchain has already adopt SPLT, if we want to change the design, we need also influence the GNU community to revise the design and all their libraries which are built with CET enabled toolchain.

Feb 19 2019, 6:17 PM · Restricted Project, lld

Feb 18 2019

LuoYuanke added inline comments to D58363: [X86] Bugfix for nullptr check by klocwork.
Feb 18 2019, 9:05 PM · Restricted Project
LuoYuanke added a comment to D58336: [X86] Fix tls variable lowering issue with large code model.

Hi rnk,
Could you help to review? Thanks

Feb 18 2019, 6:14 PM · Restricted Project

Feb 17 2019

LuoYuanke added a reviewer for D58336: [X86] Fix tls variable lowering issue with large code model: wxiao3.
Feb 17 2019, 6:13 PM · Restricted Project
LuoYuanke added a comment to D58328: [X86] Fix tls variable lowering issue with large code model.

Thanks. I abandon the review and create a new review at https://reviews.llvm.org/D58336.

Feb 17 2019, 5:08 PM
LuoYuanke abandoned D58328: [X86] Fix tls variable lowering issue with large code model.
Feb 17 2019, 5:07 PM
LuoYuanke created D58336: [X86] Fix tls variable lowering issue with large code model.
Feb 17 2019, 5:06 PM · Restricted Project
LuoYuanke created D58328: [X86] Fix tls variable lowering issue with large code model.
Feb 17 2019, 5:56 AM

Feb 2 2019

LuoYuanke added a reviewer for D57501: Fix the lowering issue of intrinsics llvm.localaddress on X86: wxiao3.
Feb 2 2019, 5:57 PM · Restricted Project

Jan 31 2019

LuoYuanke added inline comments to D57501: Fix the lowering issue of intrinsics llvm.localaddress on X86.
Jan 31 2019, 6:36 PM · Restricted Project

Jan 30 2019

LuoYuanke added a reviewer for D57501: Fix the lowering issue of intrinsics llvm.localaddress on X86: smaslov.
Jan 30 2019, 11:54 PM · Restricted Project
LuoYuanke created D57501: Fix the lowering issue of intrinsics llvm.localaddress on X86.
Jan 30 2019, 11:48 PM · Restricted Project

Nov 1 2018

LuoYuanke added a comment to D53123: Change the timestamp of llvmcache-foo file to meet the thinLTO prune policy.

Hi Johnson,

Nov 1 2018, 6:10 PM

Oct 10 2018

LuoYuanke created D53123: Change the timestamp of llvmcache-foo file to meet the thinLTO prune policy.
Oct 10 2018, 7:34 PM
LuoYuanke created D53122: Polish the comments of cache.ll.
Oct 10 2018, 7:16 PM
LuoYuanke added inline comments to D52452: Change the timestamp of llvmcache-foo file to meet the thinLTO prune policy.
Oct 10 2018, 7:58 AM

Oct 9 2018

LuoYuanke added inline comments to D52452: Change the timestamp of llvmcache-foo file to meet the thinLTO prune policy.
Oct 9 2018, 11:05 PM

Oct 7 2018

LuoYuanke updated the diff for D52452: Change the timestamp of llvmcache-foo file to meet the thinLTO prune policy.

Add context for the patch.

Oct 7 2018, 11:27 PM

Sep 26 2018

LuoYuanke added a reviewer for D52452: Change the timestamp of llvmcache-foo file to meet the thinLTO prune policy: craig.topper.
Sep 26 2018, 6:46 AM

Sep 24 2018

LuoYuanke added a comment to D52452: Change the timestamp of llvmcache-foo file to meet the thinLTO prune policy.

The case will randomly fail if we test it with command "
while llvm-lit test/tools/gold/X86/cache.ll ; do true; done". It is because the llvmcache-foo file is younger than llvmcache-349F039B8EB076D412007D82778442BED3148C4E and llvmcache-A8107945C65C2B2BBEE8E61AA604C311D60D58D6. But due to timestamp precision reason their timestamp is the same. Given the same timestamp, the file prune policy is to remove bigger size file first, so mostly foo file is removed for its bigger size. And the files size is under threshold after deleting foo file. That's what test case expect.

Sep 24 2018, 10:55 PM
LuoYuanke retitled D52452: Change the timestamp of llvmcache-foo file to meet the thinLTO prune policy from The change the timestamp of llvmcache-foo file to meet the thinLTO prune policy to Change the timestamp of llvmcache-foo file to meet the thinLTO prune policy.
Sep 24 2018, 10:50 PM
LuoYuanke created D52452: Change the timestamp of llvmcache-foo file to meet the thinLTO prune policy.
Sep 24 2018, 10:49 PM