Address Phoebe's comments.

Add test case to check function can return correctly with
extra prolog and epilog.

Address Phoebe's comments.

@rupprecht, could you help to check if https://reviews.llvm.org/D146862 can fix your issue?

repro_test`Halide::Runtime::Internal::halide_get_cpu_features:

0x55555806e23e <+1246>: movq   -0x48(%rbp), %r10
0x55555806e242 <+1250>: leaq   -0x28(%rbp), %rsp
0x55555806e246 <+1254>: popq   %rbx
0x55555806e247 <+1255>: popq   %r12
0x55555806e249 <+1257>: popq   %r13
0x55555806e24b <+1259>: popq   %r14
0x55555806e24d <+1261>: popq   %r15
0x55555806e24f <+1263>: popq   %rbp
0x55555806e250 <+1264>: leaq   -0x10(%r10), %rsp

-> 0x55555806e254 <+1268>: retq
(lldb) x/2 $rsp
0x7fffffffb810: 0xffffb890 0x00007fff
(lldb) x/2 0x7fffffffb818
0x7fffffffb818: 0x5806dc35 0x00005555

@akshaykhadse, do you want me to help merge the patch?

LGMT with NIT comments.

LGTM

There are live range issue for the physical register. Let me revert the patch first.

In D145650#4209068, @nikic wrote:

It looks like this broke the expensive checks build (x86-64-baseptr.ll and i386-baseptr.ll fail).

Address Phoebe's comments.

Address Simon's comments.

The patch is ready for review.

1. Use scratch register for argument base pointer.
2. Fix CFI instruction
3. Enhance replacement of frame pointer with argument base pointer.
4. c++ test case (https://reviews.llvm.org/D145926) can pass with -g.

Update test cases.

Update test cases.

Address Phoebe's comments.
Use virtual register for argument stack slot rebase.

Address some of Phoebe's comments. Need another patch
to create new register class.

Add unwind attibute to test cfi instruction emit.

This is the most straightforward/maintainable, probably.

In D145275#4168604, @efriedma wrote:

Hoisting like this is completely unsafe; dynamic allocation is dynamic for a reason (because the allocation is variable size, or happens in a loop).

How do you end up with IR that looks like "@hoist"? clang shouldn't generate IR like that.

In D144541#4155710, @efriedma wrote:

Why it would mess unwinding?

I meant fp-based unwinding for profiling etc., not DWARF unwind.

That register (other register) may also be clobbered in another inline asm

We don't have to use the same register for each inline asm.

The base pointer register is reserved by compiler, we can't reserve too much register?

Don't know what ech cif_escape means

llvm-readobj --unwind can decode the DWARF for you.

The important thing is that it allocates a variable amount of space between the arguments and the frame pointer, and saves the incoming value of esp on the stack.

LGTM.

Possible alternatives:

• Use ebp... but this messes with unwinding, and doesn't actually solve the issue in general (if the inline asm references function arguments, those references are ebp-relative).

Why it would mess unwinding? The cfi instruction can indicate %esi to compute CFA. The assembly code may look like below. Yes, there is still issue if inline asm references function arguments after modifying %esi.

Deal. And because I am on busy for a long time and it is also better to let intel guy handle x86-related feature, I am happy with the patch being commandeered.

In D144541#4152619, @efriedma wrote:

What happens if an inline asm both has a memory reference, and clobbers the base pointer? How do we refer to memory?

Rebase and update test case.

Address Phoebe's comments.

In D144625#4150401, @ArchDRobison wrote:

It's been a decade since I've worked with LLVM. The change looks okay to me.

update test case.

I create https://reviews.llvm.org/D144625 to address the issues.

Address Craig's comments.