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LuoYuanke (LuoYuanke)
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Sep 24 2018, 10:28 PM (197 w, 2 d)

Recent Activity

Yesterday

LuoYuanke updated the diff for D129037: [globalisel] Select register bank for DBG_VALUE.

Add TODO for debug instructions and rebase.

Wed, Jul 6, 10:06 PM · Restricted Project, Restricted Project
LuoYuanke committed rGb45829dcdf47: [AArch64][GlobalISel] update the gisel test case (authored by LuoYuanke).
[AArch64][GlobalISel] update the gisel test case
Wed, Jul 6, 8:44 PM · Restricted Project, Restricted Project
LuoYuanke updated the diff for D129037: [globalisel] Select register bank for DBG_VALUE.

Address Arsenault's comments.

Wed, Jul 6, 7:22 PM · Restricted Project, Restricted Project
LuoYuanke committed rG21007259dc95: [AArch64][GlobalISel] update the test case with update_mir_test_checks.py (authored by LuoYuanke).
[AArch64][GlobalISel] update the test case with update_mir_test_checks.py
Wed, Jul 6, 6:04 PM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D129037: [globalisel] Select register bank for DBG_VALUE.
Wed, Jul 6, 4:27 PM · Restricted Project, Restricted Project
LuoYuanke accepted D129169: [X86] Fix collectLeaves for adds used by phi that forms loop.

LGTM. Pls wait for 1 or 2 days in case there are comments from other reviewers.

Wed, Jul 6, 5:32 AM · Restricted Project, Restricted Project

Tue, Jul 5

LuoYuanke added inline comments to D129169: [X86] Fix collectLeaves for adds used by phi that forms loop.
Tue, Jul 5, 10:35 PM · Restricted Project, Restricted Project
LuoYuanke updated the diff for D129037: [globalisel] Select register bank for DBG_VALUE.

Address Arsenault's comments.

Tue, Jul 5, 8:54 PM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D129037: [globalisel] Select register bank for DBG_VALUE.
Tue, Jul 5, 8:14 PM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D129037: [globalisel] Select register bank for DBG_VALUE.
Tue, Jul 5, 6:49 PM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D129037: [globalisel] Select register bank for DBG_VALUE.
Tue, Jul 5, 6:18 PM · Restricted Project, Restricted Project

Mon, Jul 4

LuoYuanke added a reviewer for D129037: [globalisel] Select register bank for DBG_VALUE: ab.
Mon, Jul 4, 5:48 PM · Restricted Project, Restricted Project

Sat, Jul 2

LuoYuanke added a comment to D129037: [globalisel] Select register bank for DBG_VALUE.

This patch is to fix the global ISel issue encountered in D126771 and http://45.33.8.238/macm1/37938/step_11.txt.

Sat, Jul 2, 2:57 AM · Restricted Project, Restricted Project
LuoYuanke added a comment to D126771: [fastalloc] Support allocate specific register class in fastalloc..

I create a patch (D129037) to fix the global ISel issue.

Sat, Jul 2, 2:54 AM · Restricted Project, Restricted Project
LuoYuanke added reviewers for D129037: [globalisel] Select register bank for DBG_VALUE: arsenm, MatzeB, qcolombet, pengfei, xiangzhangllvm.
Sat, Jul 2, 2:54 AM · Restricted Project, Restricted Project
LuoYuanke requested review of D129037: [globalisel] Select register bank for DBG_VALUE.
Sat, Jul 2, 2:51 AM · Restricted Project, Restricted Project
LuoYuanke committed rG23ee84f43201: [globalisel] Add test case for regbank selection. (authored by LuoYuanke).
[globalisel] Add test case for regbank selection.
Sat, Jul 2, 2:15 AM · Restricted Project, Restricted Project

Thu, Jun 30

LuoYuanke accepted D128570: [ISel] Round down mask bit when merge undef(s) for DAG combine.
Thu, Jun 30, 5:47 PM · Restricted Project, Restricted Project

Wed, Jun 29

LuoYuanke committed rGfa8656d28d79: [greedyalloc] Return early when there is no register to allocate. (authored by LuoYuanke).
[greedyalloc] Return early when there is no register to allocate.
Wed, Jun 29, 8:12 PM · Restricted Project, Restricted Project
LuoYuanke closed D128804: [greedyalloc] Return early when there is no register to allocate..
Wed, Jun 29, 8:12 PM · Restricted Project, Restricted Project
LuoYuanke updated the diff for D128804: [greedyalloc] Return early when there is no register to allocate..

Address Xiang's comments.

Wed, Jun 29, 6:34 PM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D128804: [greedyalloc] Return early when there is no register to allocate..
Wed, Jun 29, 6:16 PM · Restricted Project, Restricted Project
LuoYuanke added a comment to D128804: [greedyalloc] Return early when there is no register to allocate..

@nikic , could you help to check if this patch can fix the regression caused by D128584?

Wed, Jun 29, 5:10 AM · Restricted Project, Restricted Project
LuoYuanke added a comment to D128584: [X86][AMX] Split greedy RA for tile register.

@nikic , could you help to check if D128804 can fix the regression?

Wed, Jun 29, 5:08 AM · Restricted Project, Restricted Project
LuoYuanke added reviewers for D128804: [greedyalloc] Return early when there is no register to allocate.: nikic, xiangzhangllvm.
Wed, Jun 29, 4:35 AM · Restricted Project, Restricted Project
LuoYuanke added a comment to D125075: [X86][AMX] Multiple configure for AMX register..
Wed, Jun 29, 4:34 AM · Restricted Project, Restricted Project
LuoYuanke requested review of D128804: [greedyalloc] Return early when there is no register to allocate..
Wed, Jun 29, 4:31 AM · Restricted Project, Restricted Project
LuoYuanke added a comment to D128584: [X86][AMX] Split greedy RA for tile register.

It looks like this change had some compile-time impact: http://llvm-compile-time-tracker.com/compare.php?from=fc2d96c334a15d00965eb57a99d49e46728641db&to=5cb09798700aecff1f9f61b7cd80852c61e10fa8&stat=instructions I wonder whether there is any easy way to avoid the overhead if tile registers are not used?

We check the ShouldAllocateClass() in RegAllocBase::enqueue(). The overhead looks small because in the first GreedyRA pass most vritual register is not enqueued yet, but it seems I was wrong. I notice the regession is in O3 build, let me check if any more passes are added unexpectedly in O3

Wed, Jun 29, 2:30 AM · Restricted Project, Restricted Project
LuoYuanke added a comment to D128584: [X86][AMX] Split greedy RA for tile register.

It looks like this change had some compile-time impact: http://llvm-compile-time-tracker.com/compare.php?from=fc2d96c334a15d00965eb57a99d49e46728641db&to=5cb09798700aecff1f9f61b7cd80852c61e10fa8&stat=instructions I wonder whether there is any easy way to avoid the overhead if tile registers are not used?

Wed, Jun 29, 2:00 AM · Restricted Project, Restricted Project

Tue, Jun 28

LuoYuanke committed rG5cb09798700a: [X86][AMX] Split greedy RA for tile register (authored by LuoYuanke).
[X86][AMX] Split greedy RA for tile register
Tue, Jun 28, 7:36 PM · Restricted Project, Restricted Project
LuoYuanke closed D128584: [X86][AMX] Split greedy RA for tile register.
Tue, Jun 28, 7:36 PM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D128570: [ISel] Round down mask bit when merge undef(s) for DAG combine.
Tue, Jun 28, 12:24 AM · Restricted Project, Restricted Project

Mon, Jun 27

LuoYuanke added a comment to D125075: [X86][AMX] Multiple configure for AMX register..

I can duplicated the regression with "llc -mtriple=aarch64 test/DebugInfo/Generic/two-cus-from-same-file.ll -O2 -o -". This is a ISel bug on "DBG_VALUE", I'll file a bug for it.

Mon, Jun 27, 8:07 PM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D128584: [X86][AMX] Split greedy RA for tile register.
Mon, Jun 27, 8:02 PM · Restricted Project, Restricted Project
LuoYuanke added a comment to D128584: [X86][AMX] Split greedy RA for tile register.

I think the spill/split should still cover the shape regs:

Let me first simply remember our previous action about greedy allocation for AMX:

1 We collected shapes (MOs) in allocating tile regs (by hint tile for same shape) in greedy
2 After greedy we insert the "fill" instructions to set the shape to ldtilecfg's mem. (They are still virtual)
3 Then the rewriter assign to physic regs to them.

The order of related passes:

Greedy Register Allocator
Verify generated machine code
Tile Register Configure
Verify generated machine code
Virtual Register Rewriter
Verify generated machine code
Register Allocation Pass Scoring

Example: After Tile Register Configure

96B       VMOVUPSZmr %stack.0, 1, $noreg, 0, $noreg, %13:vr512 :: (store (s512) into %stack.0, align 4)
104B      MOV8mi %stack.0, 1, $noreg, 0, $noreg, 1 :: (store (s512) into %stack.0, align 4)
112B      MOV16mi %stack.0, 1, $noreg, 18, $noreg, 8 :: (store (s512) into %stack.0 + 18, align 2, basealign 4)
116B      MOV8mi %stack.0, 1, $noreg, 50, $noreg, 8 :: (store (s512) into %stack.0 + 50, align 2, basealign 4)
124B      MOV16mr %stack.0, 1, $noreg, 20, $noreg, %1.sub_16bit:gr32 :: (store (s512) into %stack.0 + 20, align 4)
132B      MOV8mr %stack.0, 1, $noreg, 49, $noreg, %0.sub_8bit:gr32 :: (store (s512) into %stack.0 + 49, align 1, basealign 4)
140B      MOV16mr %stack.0, 1, $noreg, 16, $noreg, %1.sub_16bit:gr32 :: (store (s512) into %stack.0 + 16, align 4)
148B      MOV8mr %stack.0, 1, $noreg, 48, $noreg, %0.sub_8bit:gr32 :: (store (s512) into %stack.0 + 48, align 4)
172B      PLDTILECFGV %stack.0, 1, $noreg, 0, $noreg, implicit-def dead $tmm0,  xxx
Mon, Jun 27, 8:01 PM · Restricted Project, Restricted Project

Sat, Jun 25

LuoYuanke updated the diff for D128584: [X86][AMX] Split greedy RA for tile register.

Fix typo.

Sat, Jun 25, 7:17 AM · Restricted Project, Restricted Project
LuoYuanke added reviewers for D128584: [X86][AMX] Split greedy RA for tile register: xiangzhangllvm, yubing.
Sat, Jun 25, 7:11 AM · Restricted Project, Restricted Project
LuoYuanke requested review of D128584: [X86][AMX] Split greedy RA for tile register.
Sat, Jun 25, 7:11 AM · Restricted Project, Restricted Project

Thu, Jun 23

LuoYuanke abandoned D128437: [fastregalloc] Fix bug when there is no register class..
Thu, Jun 23, 7:24 PM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D128437: [fastregalloc] Fix bug when there is no register class..
Thu, Jun 23, 6:51 AM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D128437: [fastregalloc] Fix bug when there is no register class..
Thu, Jun 23, 6:49 AM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D128437: [fastregalloc] Fix bug when there is no register class..
Thu, Jun 23, 6:39 AM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D128437: [fastregalloc] Fix bug when there is no register class..
Thu, Jun 23, 6:18 AM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D126771: [fastalloc] Support allocate specific register class in fastalloc..
Thu, Jun 23, 6:07 AM · Restricted Project, Restricted Project
LuoYuanke added a comment to D126771: [fastalloc] Support allocate specific register class in fastalloc..

I create a patch at https://reviews.llvm.org/D128437.

Thu, Jun 23, 6:05 AM · Restricted Project, Restricted Project
LuoYuanke added a reviewer for D128437: [fastregalloc] Fix bug when there is no register class.: arsenm.
Thu, Jun 23, 6:04 AM · Restricted Project, Restricted Project
LuoYuanke added reviewers for D128437: [fastregalloc] Fix bug when there is no register class.: thakis, xiangzhangllvm, nikic.
Thu, Jun 23, 6:03 AM · Restricted Project, Restricted Project
LuoYuanke requested review of D128437: [fastregalloc] Fix bug when there is no register class..
Thu, Jun 23, 6:02 AM · Restricted Project, Restricted Project
LuoYuanke added a comment to D126771: [fastalloc] Support allocate specific register class in fastalloc..

I was able to duplicate this issue with --global-isel. I'll come up with a patch to fix it.

Thu, Jun 23, 5:36 AM · Restricted Project, Restricted Project
LuoYuanke added a comment to D126771: [fastalloc] Support allocate specific register class in fastalloc..

I also bisected an lldb failure down to this: https://lab.llvm.org/buildbot/#/builders/96/builds/25038/steps/6/logs/stdio

It has backtrace of a sort but it's probably not much help, I will get hold of the reproducer files.

Thu, Jun 23, 5:23 AM · Restricted Project, Restricted Project
LuoYuanke added a comment to D126771: [fastalloc] Support allocate specific register class in fastalloc..

This also broke check-llvm on macOS: http://45.33.8.238/macm1/37938/step_11.txt (this both is an M1 mac, not sure if intel vs arm matter).

Please take a look at that too, and revert for now if it takes a while to fix.

(This failure was masked by the check-clang failure. But I locally bisected and verified that it's due to this change, and that locally reverting fixes the check-llvm failure.)

Thu, Jun 23, 5:14 AM · Restricted Project, Restricted Project
LuoYuanke accepted D128424: [X86][AMX] Update tests to use opaque pointers.

LGTM, except minor format issue. Thanks, @nikic

Thu, Jun 23, 4:22 AM · Restricted Project, Restricted Project
LuoYuanke added a comment to D126771: [fastalloc] Support allocate specific register class in fastalloc..

On many of the official bots too, eg https://lab.llvm.org/buildbot/#/builders/109/builds/41178 (did that not generate an email?)

Thu, Jun 23, 4:09 AM · Restricted Project, Restricted Project
LuoYuanke added reviewers for D128419: [X86][AMX] Split RA for AMX register from the other register: xiangzhangllvm, yubing.
Thu, Jun 23, 3:18 AM · Restricted Project, Restricted Project
LuoYuanke requested review of D128419: [X86][AMX] Split RA for AMX register from the other register.
Thu, Jun 23, 3:16 AM · Restricted Project, Restricted Project

Wed, Jun 22

LuoYuanke committed rG719658d078c4: [fastalloc] Support allocating specific register class in fastalloc (authored by LuoYuanke).
[fastalloc] Support allocating specific register class in fastalloc
Wed, Jun 22, 11:43 PM · Restricted Project, Restricted Project
LuoYuanke closed D126771: [fastalloc] Support allocate specific register class in fastalloc..
Wed, Jun 22, 11:42 PM · Restricted Project, Restricted Project
LuoYuanke updated the diff for D126771: [fastalloc] Support allocate specific register class in fastalloc..

Removed the change of X86 test case.

Wed, Jun 22, 8:36 PM · Restricted Project, Restricted Project
LuoYuanke updated the summary of D126771: [fastalloc] Support allocate specific register class in fastalloc..
Wed, Jun 22, 6:26 PM · Restricted Project, Restricted Project
LuoYuanke updated the diff for D126771: [fastalloc] Support allocate specific register class in fastalloc..

Remove X86 related code.

Wed, Jun 22, 6:20 PM · Restricted Project, Restricted Project
LuoYuanke updated the diff for D126771: [fastalloc] Support allocate specific register class in fastalloc..

Add test case to stop after fast RA.

Wed, Jun 22, 2:33 AM · Restricted Project, Restricted Project

Tue, Jun 21

LuoYuanke added a comment to D126771: [fastalloc] Support allocate specific register class in fastalloc..

@arsenm , could you take a look at the AMDGPU test case?

Tue, Jun 21, 4:42 AM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D126771: [fastalloc] Support allocate specific register class in fastalloc..
Tue, Jun 21, 4:39 AM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D126771: [fastalloc] Support allocate specific register class in fastalloc..
Tue, Jun 21, 4:02 AM · Restricted Project, Restricted Project
LuoYuanke updated the diff for D126771: [fastalloc] Support allocate specific register class in fastalloc..

Fix AMDGPU test case failure.

Tue, Jun 21, 3:59 AM · Restricted Project, Restricted Project

Mon, Jun 20

LuoYuanke committed rG44e8a205f4cf: [fastregalloc] Enhance the heuristics for liveout in self loop. (authored by LuoYuanke).
[fastregalloc] Enhance the heuristics for liveout in self loop.
Mon, Jun 20, 6:19 PM · Restricted Project, Restricted Project
LuoYuanke closed D125079: [fastregalloc] Enhance the heuristics for liveout in self loop..
Mon, Jun 20, 6:19 PM · Restricted Project, Restricted Project
LuoYuanke updated the diff for D125079: [fastregalloc] Enhance the heuristics for liveout in self loop..

Rebase

Mon, Jun 20, 6:01 PM · Restricted Project, Restricted Project
LuoYuanke updated the diff for D126771: [fastalloc] Support allocate specific register class in fastalloc..

Address Xiang's comments and add a test case to clobber tmm register.

Mon, Jun 20, 6:13 AM · Restricted Project, Restricted Project

Sun, Jun 19

LuoYuanke added inline comments to D126771: [fastalloc] Support allocate specific register class in fastalloc..
Sun, Jun 19, 11:20 PM · Restricted Project, Restricted Project

Fri, Jun 17

LuoYuanke added inline comments to D126771: [fastalloc] Support allocate specific register class in fastalloc..
Fri, Jun 17, 6:37 AM · Restricted Project, Restricted Project

Wed, Jun 15

LuoYuanke added a comment to D127848: [CodeGen] Fix the bug of machine sink.

I see this code in the MachineVerifier:

} else if (MRI->def_empty(Reg)) {
  report("Reading virtual register without a def", MO, MONum);

Which reads to me that we do not allow virtual registers without a definition if there is at least 1 read of the register. But I guess that means you can indeed have a vreg without a def if all the uses are marked undef or are debug operands or similar situations where MO.readsReg() is false.

Wed, Jun 15, 9:01 AM · Restricted Project, Restricted Project
LuoYuanke added a comment to D127848: [CodeGen] Fix the bug of machine sink.

I'm also not sure right now if vregs without definitions are even legal MIR while we are still in MachineSSA... Checking that now

Wed, Jun 15, 8:51 AM · Restricted Project, Restricted Project
LuoYuanke committed rG16547f9fbbd5: [CodeGen] Fix the bug of machine sink (authored by LuoYuanke).
[CodeGen] Fix the bug of machine sink
Wed, Jun 15, 8:47 AM · Restricted Project, Restricted Project
LuoYuanke closed D127848: [CodeGen] Fix the bug of machine sink.
Wed, Jun 15, 8:47 AM · Restricted Project, Restricted Project
LuoYuanke added a comment to D127848: [CodeGen] Fix the bug of machine sink.

Thanks @shchenz for review. Let me land this patch first and we can improve the code later.

Wed, Jun 15, 8:25 AM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D127848: [CodeGen] Fix the bug of machine sink.
Wed, Jun 15, 8:14 AM · Restricted Project, Restricted Project
LuoYuanke added reviewers for D127848: [CodeGen] Fix the bug of machine sink: shchenz, MatzeB.
Wed, Jun 15, 5:06 AM · Restricted Project, Restricted Project
LuoYuanke requested review of D127848: [CodeGen] Fix the bug of machine sink.
Wed, Jun 15, 5:04 AM · Restricted Project, Restricted Project

Tue, Jun 14

LuoYuanke committed rG54ec8e25fcc5: [X86][AMX] Fix klockwork issue. (authored by LuoYuanke).
[X86][AMX] Fix klockwork issue.
Tue, Jun 14, 6:27 PM · Restricted Project, Restricted Project

Mon, Jun 13

LuoYuanke added a comment to D126771: [fastalloc] Support allocate specific register class in fastalloc..

I think the idea of "split" special registers RA pass is good (especially for the registers who need to be config).
I notice all the "isVirtual<Register>" places need carefully to "exclude" the special registers.
Seems we may no need to do it if we can make sure that we handle these special registers before normal fast RA.
(because they have be allocated to physic registers)

Mon, Jun 13, 6:38 AM · Restricted Project, Restricted Project

Sun, Jun 12

LuoYuanke added a comment to D126771: [fastalloc] Support allocate specific register class in fastalloc..

ping

Sun, Jun 12, 6:58 PM · Restricted Project, Restricted Project
LuoYuanke retitled D125602: [X86][AMX][fastalloc] Allocate tile register based on its shape. from [X86][AMX][fastalloc] Allocate tile register separately. to [X86][AMX][fastalloc] Allocate tile register based on its shape..
Sun, Jun 12, 6:58 PM · Restricted Project, Restricted Project

Fri, Jun 10

LuoYuanke accepted D107082: [X86][RFC] Enable `_Float16` type support on X86 following the psABI.

LGTM, thanks.

Fri, Jun 10, 10:17 PM · Restricted Project, Restricted Project, Restricted Project

Wed, Jun 8

LuoYuanke added inline comments to D107082: [X86][RFC] Enable `_Float16` type support on X86 following the psABI.
Wed, Jun 8, 11:51 PM · Restricted Project, Restricted Project, Restricted Project
LuoYuanke added inline comments to D107082: [X86][RFC] Enable `_Float16` type support on X86 following the psABI.
Wed, Jun 8, 7:33 AM · Restricted Project, Restricted Project, Restricted Project
LuoYuanke added inline comments to D107082: [X86][RFC] Enable `_Float16` type support on X86 following the psABI.
Wed, Jun 8, 2:01 AM · Restricted Project, Restricted Project, Restricted Project

Jun 5 2022

LuoYuanke accepted D127050: [Clang][FP16] Add 4 builtins for _Float16.
Jun 5 2022, 4:29 PM · Restricted Project, Restricted Project
LuoYuanke requested review of D127071: [X86][AMX] Fallback to multi-config if single-config fails..
Jun 5 2022, 5:35 AM · Restricted Project, Restricted Project

Jun 4 2022

LuoYuanke added inline comments to D127050: [Clang][FP16] Add 4 builtins for _Float16.
Jun 4 2022, 8:01 PM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D127050: [Clang][FP16] Add 4 builtins for _Float16.
Jun 4 2022, 7:13 PM · Restricted Project, Restricted Project
LuoYuanke added inline comments to D127050: [Clang][FP16] Add 4 builtins for _Float16.
Jun 4 2022, 6:04 PM · Restricted Project, Restricted Project

Jun 3 2022

LuoYuanke added reviewers for D127043: [X86][AMX] Fill the shape information with virtual register.: xiangzhangllvm, yubing.
Jun 3 2022, 8:38 PM · Restricted Project, Restricted Project
LuoYuanke requested review of D127043: [X86][AMX] Fill the shape information with virtual register..
Jun 3 2022, 8:36 PM · Restricted Project, Restricted Project

Jun 1 2022

LuoYuanke added a comment to D126771: [fastalloc] Support allocate specific register class in fastalloc..

I thought I implemented this before. We do need to add some AMDGPU tests for this. @cdevadas recently noticed this was broken

Jun 1 2022, 5:57 AM · Restricted Project, Restricted Project
LuoYuanke added reviewers for D126771: [fastalloc] Support allocate specific register class in fastalloc.: MatzeB, efriedma, arsenm, xiangzhangllvm.
Jun 1 2022, 4:47 AM · Restricted Project, Restricted Project
LuoYuanke requested review of D126771: [fastalloc] Support allocate specific register class in fastalloc..
Jun 1 2022, 4:46 AM · Restricted Project, Restricted Project
LuoYuanke added a comment to D125602: [X86][AMX][fastalloc] Allocate tile register based on its shape..

There's a lot going on here.

  • Could you extract the ShouldAllocClass fixes for fastregalloc into a separate diff so we can get discuss them separately and get feedback from AMDGPU folks who introduced this and are the major other user of this AFAIK.
Jun 1 2022, 4:01 AM · Restricted Project, Restricted Project

May 31 2022

LuoYuanke updated the diff for D125602: [X86][AMX][fastalloc] Allocate tile register based on its shape..

Add test case across config.

May 31 2022, 6:53 AM · Restricted Project, Restricted Project
LuoYuanke updated the diff for D125602: [X86][AMX][fastalloc] Allocate tile register based on its shape..

Add test case for reuse physical tile register.

May 31 2022, 5:58 AM · Restricted Project, Restricted Project