User Details
User Details
- User Since
- Mar 3 2014, 12:41 PM (435 w, 16 h)
Tue, Jun 28
Tue, Jun 28
Matt added inline comments to D128631: [AArch64] Initial sched model for Neoverse N2.
Jun 1 2022
Jun 1 2022
Herald added a project to D118066: [SimplifyCFG] Don't speculatively execute preductably-taken block: Restricted Project.
May 25 2022
May 25 2022
Mar 17 2022
Mar 17 2022
Herald added a project to D119427: [SVE][CodeGen] Add support for scalable vectors in AArch64TargetLowering::ReconstructShuffle: Restricted Project.
Herald added a project to D119442: [NFC][SVE] Add more tests to CodeGen/AArch64/sve-fixed-length-reshuffle.ll: Restricted Project.
Herald added a project to D119336: [AArch64][SVE] Avoid multiple PTRUE values for SETCC.: Restricted Project.
Herald added a project to D119347: [AArch64][SVE] Perform fixed-width predicate AND reduction on SVE predicate vectors.: Restricted Project.
Herald added a project to D118979: [AArch64] Set maximum VF with shouldMaximizeVectorBandwidth: Restricted Project.
Feb 9 2022
Feb 9 2022
Matt added a comment to D119285: [SVE] Bail out of constructDup(...) optimization for fixed width vectors > 128 bits.
Thank you, Cameron (not a noise at all from my perspective--it's actually helped me in a related issue I've encountered)!
Feb 9 2022, 10:41 AM · Restricted Project
Matt added a comment to D119252: [AArch64][SVE] Fix selection failure during lowering of shuffle_vector.
FWIW, I can confirm the presence of ICE using the test case from https://reviews.llvm.org/D119285, https://llvm.godbolt.org/z/f1r6he545, as well as that this patch fixes the issue; thank you!
Feb 9 2022, 10:40 AM · Restricted Project
Oct 15 2021
Oct 15 2021
Matt added inline comments to D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=<n>+ syntax to mean no maximum vscale.
Oct 15 2021, 2:45 PM · Restricted Project
Aug 30 2021
Aug 30 2021
Matt added inline comments to D108914: [X86] Copy X86SchedSkylakeServer.td to X86SchedIceLake.td.
Aug 30 2021, 6:28 AM · Restricted Project
Jul 14 2021
Jul 14 2021
Matt added inline comments to D105994: [SVE] Add folds for sign and zero extends of vscale.
Jul 14 2021, 9:20 AM · Restricted Project
Jun 22 2021
Jun 22 2021
Matt added inline comments to D103470: [zorg] Add AArch64 SVE vector-length-specific (VLS) bot.
Jun 21 2021
Jun 21 2021
Matt added inline comments to D103702: [AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries.
Jun 15 2021
Jun 15 2021
Matt added a comment to D104115: [SVE] Fix PromoteIntRes_TRUNCATE not to call getVectorNumElements.
Jun 15 2021, 6:55 AM · Restricted Project
Jun 9 2021
Jun 9 2021
Matt added inline comments to D103702: [AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries.
Jun 8 2021
Jun 8 2021
Matt added inline comments to D103180: [InstSimplify] Add constant fold for extractelement + splat for scalable vectors.
Jun 8 2021, 8:38 AM · Restricted Project
Jun 4 2021
Jun 4 2021
Matt added inline comments to D103535: [mlir][ArmSVE] Add basic load/store operations.
Jun 4 2021, 9:32 AM · Restricted Project
May 4 2021
May 4 2021
Matt added inline comments to D100912: [docs][NewPM] Add section on analyses.
May 4 2021, 6:35 AM · Restricted Project
Apr 21 2021
Apr 21 2021
Matt added a comment to D94395: [X86] AMD Zen 3 Scheduler Model.
Apr 21 2021, 12:47 PM · Restricted Project
Feb 26 2021
Feb 26 2021
Matt added inline comments to D97515: [docs] Add documentation on using the new pass manager.
Feb 26 2021, 5:12 AM · Restricted Project
Feb 25 2021
Feb 25 2021
Matt added inline comments to D94395: [X86] AMD Zen 3 Scheduler Model.
Feb 25 2021, 8:17 AM · Restricted Project
Aug 13 2020
Aug 13 2020
Matt added inline comments to D85509: [flang] Add rudimentary bbc tool infrastructure..
Aug 13 2020, 10:01 AM · Restricted Project
Jan 2 2017
Jan 2 2017
Matt added inline comments to rL290792: [c++17] Implement P0522R0 as written. This allows a template template argument.
Apr 4 2016
Apr 4 2016