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- May 5 2014, 7:26 AM (180 w, 4 d)
These latencies/throughputs still don't match the AMD docs - please match those and not the Agner tests
LGTM - worth doing the same for SelectionDAG::ComputeNumSignBits and SelectionDAG::computeKnownBits ?
Should we test for cases where the index register is a different size to the mask/result? Like _mm256_i32gather_epi64?
Wed, Oct 18
I realise this was for SSE41 instructions, but given that its just dot product ops, it might be better to rename it and add the VDPPSY cases as well?
Tue, Oct 17
Updated to reuse more of the existing BUILD_VECTOR code.
Mon, Oct 16
LGTM. I'm intending to add MMX scheduling tests shortly so if they land before this you may need to rebase + regenerate.
Sat, Oct 14
Fri, Oct 13
LGTM with one minor
LGTM - naturally D38510 needs updating the new API
Thu, Oct 12
Possibly add a test case for PR34657 as well? @zvi has already reduced much of it
A few comments but nice to see this being pursued - not sure if this will need breaking down into incremental changes at commit time.
Wed, Oct 11
Tue, Oct 10
*-fast-isel.ll tests to match the clang *-builtins tests?
Add the new test files to trunk with current codegen and then rebase to show the diff from this patch.
This patch seems to change the blending-shuffle.ll test case in the same way as D38693 - what is the relationship/dependency between them?
Where did the code change go in the diff?
LGTM with one minor
Mon, Oct 9
Please add fast-isel tests that match the builtin tests from D38683
LGTM - is it worth adding the SKX test lines as well while you're at it?
Sun, Oct 8
@delena @zvi What do you want to do with this. IMO we shouldn't be prematurely combining to variable mask shuffles, and this should be performed later as a scheduler based decision. But that will involve a lot of work that I don't think we're ready for (D26855 tried to move some other code to the MC and hit a lot of issues).
A few style comments, but its up to whether @efriedma and the PPC guys are happy with this change.
LGTM, please can you raise bugs for both custom handling of domain changes (PBLENDW <-> BLENDPS etc.) and adding isel patterns (optsize or not) for MOVSS/MOVSD with BLENDPS/BLENDPD?
Possibly regenerate fast-isel-select-pseudo-cmov.ll before the patch?