- User Since
- May 5 2014, 7:26 AM (267 w, 6 h)
fix cut+paste typo
Does it help https://bugs.llvm.org/show_bug.cgi?id=41151 ?
PR34876 and PR34874 suggests we should prefer BLEND over MOVSD/MOVQ etc.?
cleaned up nt-load if() logic - rebased with nontemporal-3.ll tests
updated to match FMUL/FDIV approach.
Merged SS41I_pmovx_avx2_patterns_base into SS41I_pmovx_avx2_patterns
Sat, Jun 15
Given that this would be completely overwritten by whatever model you commit I'm dubious of its use right now....
The logic looks fine, but somebody who knows python might know a better way to do this?
Could we use a isrematerializable test instead in the (sub x, c) -> (add x, -c) folds to avoid needing this?
LGTM but there are a couple of cases that are bordering on regression that need investigating (llvm-mca comparisons, TODO comments, bug report, whatever).
LGTM - cheers
Fri, Jun 14
is it worth committing the test file with current (trunk) output so this patch shows the diff?
Thu, Jun 13
LGTM - please pre-commit the MachineFunction.h/MachineFunction.cpp/X86InstrInfo.cpp change and then this patch's X86ISelLowering.cpp change.
Wed, Jun 12
rebase after XCore cleanup - any more comments please?
Thanks @wristow LGTM with one minor
Tue, Jun 11
Seeing a weird EXPENSIVE_CHECKS failure that I need to get to the bottom of
rebase after rL363048
Mon, Jun 10
Add TargetLoweringBase::allowsMemoryAccess helper wrapper - if people are OK with this I can add this wrapper (and the accompanying NFC refactor) as pre-commit.
Add missing flags to AMDGPUTargetLowering::performStoreCombine
LGTM - the goto is unfortunate but more maintainable and less confusing then the current state of things
Sun, Jun 9