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spatel (Sanjay Patel)
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May 22 2014, 1:24 PM (461 w, 3 d)

Recent Activity

Sat, Mar 11

spatel added a comment to D144274: [InstCombine] use loop info when running the pass after loop vectorization.

Hm, it looks like this ended up causing non-trivial codegen changes: https://llvm-compile-time-tracker.com/compare.php?from=772aa05452f8ff90a47168e6801cda2acb5a1873&to=43ae4b62b2671cf73e691c0b53324cd39405cd51&stat=size-text So we're not preserving previous behavior in some significant way(s).

Sat, Mar 11, 2:34 PM · Restricted Project, Restricted Project
spatel added a reverting change for rG43ae4b62b267: [InstCombine] use loop info when running the pass after loop vectorization: rGef6f23535d4e: Revert "[InstCombine] use loop info when running the pass after loop….
Sat, Mar 11, 2:30 PM · Restricted Project, Restricted Project
spatel committed rGef6f23535d4e: Revert "[InstCombine] use loop info when running the pass after loop… (authored by spatel).
Revert "[InstCombine] use loop info when running the pass after loop…
Sat, Mar 11, 2:30 PM · Restricted Project, Restricted Project
spatel added a reverting change for D144274: [InstCombine] use loop info when running the pass after loop vectorization: rGef6f23535d4e: Revert "[InstCombine] use loop info when running the pass after loop….
Sat, Mar 11, 2:30 PM · Restricted Project, Restricted Project
spatel committed rG43ae4b62b267: [InstCombine] use loop info when running the pass after loop vectorization (authored by spatel).
[InstCombine] use loop info when running the pass after loop vectorization
Sat, Mar 11, 11:22 AM · Restricted Project, Restricted Project
spatel closed D144274: [InstCombine] use loop info when running the pass after loop vectorization.
Sat, Mar 11, 11:22 AM · Restricted Project, Restricted Project

Mon, Mar 6

spatel accepted D144608: [InstCombine] Add transforms for `(icmp {u|s}ge/le (xor X, Y), X)`.

LGTM

Mon, Mar 6, 10:57 AM · Restricted Project, Restricted Project
spatel accepted D144607: [InstCombine] Add tests for transforming `(icmp (xor X, Y), X)`; NFC.

LGTM

Mon, Mar 6, 10:56 AM · Restricted Project, Restricted Project
spatel committed rG74a58499b7c0: [InstCombine] fold signed absolute diff patterns (authored by spatel).
[InstCombine] fold signed absolute diff patterns
Mon, Mar 6, 10:53 AM · Restricted Project, Restricted Project
spatel committed rG870e6b6e6527: [InstCombine] use dyn_cast instead of isa+cast; NFC (authored by spatel).
[InstCombine] use dyn_cast instead of isa+cast; NFC
Mon, Mar 6, 10:53 AM · Restricted Project, Restricted Project
spatel closed D145073: [InstCombine] fold signed absolute diff patterns.
Mon, Mar 6, 10:53 AM · Restricted Project, Restricted Project
spatel accepted D145327: [InstSimplify] Simplify `(shl nsw nuw X, BitWidth - 1)` -> `0`.
Mon, Mar 6, 10:37 AM · Restricted Project, Restricted Project
spatel added inline comments to D144608: [InstCombine] Add transforms for `(icmp {u|s}ge/le (xor X, Y), X)`.
Mon, Mar 6, 6:45 AM · Restricted Project, Restricted Project
spatel added inline comments to D144607: [InstCombine] Add tests for transforming `(icmp (xor X, Y), X)`; NFC.
Mon, Mar 6, 6:31 AM · Restricted Project, Restricted Project
spatel added inline comments to D145327: [InstSimplify] Simplify `(shl nsw nuw X, BitWidth - 1)` -> `0`.
Mon, Mar 6, 5:39 AM · Restricted Project, Restricted Project
spatel accepted D144451: [X86] Optimize umax(X,1).
Mon, Mar 6, 5:00 AM · Restricted Project, Restricted Project

Sun, Mar 5

spatel added a comment to D145299: [InstCombine] Generate better code for std::bit_ceil.

What is preventing is from performing this in InstCombine? I don't think this pattern will emerge in SelectionDAG

I haven't found a way to avoid a poison shift in IR without doing a cmp+select or umax yet. I think we're relying on the x86-specific behavior of masking the shift amount to make that part of the logic disappear in this patch.

Well, we could also do what is being proposed here and mask the shift amount: https://alive2.llvm.org/ce/z/FD_9Sh On x86, that happens to be free. I'm not sure this makes sense as an IR canonicalization though.

Sun, Mar 5, 11:47 AM · Restricted Project, Restricted Project
spatel added a comment to D145299: [InstCombine] Generate better code for std::bit_ceil.

What is preventing is from performing this in InstCombine? I don't think this pattern will emerge in SelectionDAG

I haven't found a way to avoid a poison shift in IR without doing a cmp+select or umax yet. I think we're relying on the x86-specific behavior of masking the shift amount to make that part of the logic disappear in this patch.

The IR is:

%2 = add i32 %0, -1
%3 = tail call i32 @llvm.ctlz.i32(i32 %2, i1 false), !range !5
%4 = sub nuw nsw i32 32, %3
%5 = shl nuw i32 1, %4
%6 = icmp ugt i32 %0, 1
%7 = select i1 %6, i32 %5, i32 1
ret i32 %7

The poison shift is if %3 is zero?

Sun, Mar 5, 11:26 AM · Restricted Project, Restricted Project
spatel accepted D145157: [InstCombine] Implement "A & (~A | B) --> A & B" like transforms for boolean based selects..

LGTM

Sun, Mar 5, 8:04 AM · Restricted Project, Restricted Project
spatel added inline comments to D144608: [InstCombine] Add transforms for `(icmp {u|s}ge/le (xor X, Y), X)`.
Sun, Mar 5, 7:51 AM · Restricted Project, Restricted Project
spatel added a comment to D145299: [InstCombine] Generate better code for std::bit_ceil.

What is preventing is from performing this in InstCombine? I don't think this pattern will emerge in SelectionDAG

Sun, Mar 5, 6:17 AM · Restricted Project, Restricted Project
spatel added a comment to D145299: [InstCombine] Generate better code for std::bit_ceil.

As noted in previous comments, it's hard to reliably pattern-match a sequence that is this long. We are missing several potential canonicalizations in IR, and I see at least one possible variant that is shorter in IR:
https://alive2.llvm.org/ce/z/CkQ433

Sun, Mar 5, 5:06 AM · Restricted Project, Restricted Project

Fri, Mar 3

spatel added a comment to D144274: [InstCombine] use loop info when running the pass after loop vectorization.

It is odd to me that instcombine has two modes: with and without loopinfo. Wouldn't completely removing loopinfo make instcombine better testable, hermetic, and predictable?

Fri, Mar 3, 12:43 PM · Restricted Project, Restricted Project
spatel updated the diff for D144274: [InstCombine] use loop info when running the pass after loop vectorization.

Patch updated:
Add a RUN line to the instcombine test to show with and without loop info test diff.

Fri, Mar 3, 11:35 AM · Restricted Project, Restricted Project
spatel added a comment to D144274: [InstCombine] use loop info when running the pass after loop vectorization.

This should probably have an instcombine test that shows the difference between instcombine<use-loop-info> and plain instcombine?

Fri, Mar 3, 11:23 AM · Restricted Project, Restricted Project
spatel added inline comments to D145073: [InstCombine] fold signed absolute diff patterns.
Fri, Mar 3, 10:25 AM · Restricted Project, Restricted Project
spatel accepted D145149: [UTC] Enable --function-signature by default.

I didn't follow the reviews of D142473 and D144963 while they were in progress, but this is the logical conclusion to the set. LGTM.

Fri, Mar 3, 6:38 AM · Restricted Project, Restricted Project, Restricted Project
spatel added a comment to D145157: [InstCombine] Implement "A & (~A | B) --> A & B" like transforms for boolean based selects..

This looks close to me, but see inline comments on the tests, and please pre-commit those with the baseline CHECK lines, so we'll just show test diffs in this patch.

Fri, Mar 3, 5:39 AM · Restricted Project, Restricted Project
spatel added a comment to D144274: [InstCombine] use loop info when running the pass after loop vectorization.

Ping.

Fri, Mar 3, 5:22 AM · Restricted Project, Restricted Project

Thu, Mar 2

spatel added inline comments to D145157: [InstCombine] Implement "A & (~A | B) --> A & B" like transforms for boolean based selects..
Thu, Mar 2, 10:48 AM · Restricted Project, Restricted Project
spatel added inline comments to D145157: [InstCombine] Implement "A & (~A | B) --> A & B" like transforms for boolean based selects..
Thu, Mar 2, 9:01 AM · Restricted Project, Restricted Project
spatel committed rG6956788cbd20: [InstCombine] add tests for absolute diff; NFC (authored by spatel).
[InstCombine] add tests for absolute diff; NFC
Thu, Mar 2, 8:25 AM · Restricted Project, Restricted Project
spatel updated the diff for D145073: [InstCombine] fold signed absolute diff patterns.

Patch updated:

  1. Match any pair of no-wrap subtracts.
  2. But only propagate "nsw" with restrictions.
Thu, Mar 2, 7:48 AM · Restricted Project, Restricted Project
spatel planned changes to D145073: [InstCombine] fold signed absolute diff patterns.
Thu, Mar 2, 7:29 AM · Restricted Project, Restricted Project
spatel added inline comments to D145073: [InstCombine] fold signed absolute diff patterns.
Thu, Mar 2, 6:29 AM · Restricted Project, Restricted Project
spatel added inline comments to D145073: [InstCombine] fold signed absolute diff patterns.
Thu, Mar 2, 6:17 AM · Restricted Project, Restricted Project

Wed, Mar 1

spatel committed rGcf53bd8ca25f: [InstCombine] add tests for signed absolute diff; NFC (authored by spatel).
[InstCombine] add tests for signed absolute diff; NFC
Wed, Mar 1, 10:07 AM · Restricted Project, Restricted Project
spatel committed rG6c7b2eef476f: [PhaseOrdering] add test for vector load and cast transforms; NFC (authored by spatel).
[PhaseOrdering] add test for vector load and cast transforms; NFC
Wed, Mar 1, 10:07 AM · Restricted Project, Restricted Project
spatel accepted D145065: [DAG] expandIntMINMAX - attempt to match existing SETCC node.

LGTM

Wed, Mar 1, 8:42 AM · Restricted Project, Restricted Project
spatel requested review of D145073: [InstCombine] fold signed absolute diff patterns.
Wed, Mar 1, 8:35 AM · Restricted Project, Restricted Project
spatel committed rG452279efe21a: [InstCombine] prevent miscompiles from select-of-div/rem transform (authored by spatel).
[InstCombine] prevent miscompiles from select-of-div/rem transform
Wed, Mar 1, 5:56 AM · Restricted Project, Restricted Project
spatel closed D144671: [InstCombine] prevent miscompiles from select-of-div/rem transform.
Wed, Mar 1, 5:56 AM · Restricted Project, Restricted Project

Tue, Feb 28

spatel committed rG542e70f96c56: [InstCombine] reassociate subtract-from-constant to add-constant (authored by spatel).
[InstCombine] reassociate subtract-from-constant to add-constant
Tue, Feb 28, 11:22 AM · Restricted Project, Restricted Project
spatel committed rGa721b6b17902: [IR] fix spelling/formatting; NFC (authored by spatel).
[IR] fix spelling/formatting; NFC
Tue, Feb 28, 11:22 AM · Restricted Project, Restricted Project
spatel committed rG2ea0e530d343: [InstCombine] simplify test for div/rem; NFC (authored by spatel).
[InstCombine] simplify test for div/rem; NFC
Tue, Feb 28, 11:22 AM · Restricted Project, Restricted Project
spatel updated the diff for D144671: [InstCombine] prevent miscompiles from select-of-div/rem transform.

Patch updated:
Add restriction to freeze creation for unsigned ops because they are easier to determine as safe.

Tue, Feb 28, 9:18 AM · Restricted Project, Restricted Project
spatel added inline comments to D144671: [InstCombine] prevent miscompiles from select-of-div/rem transform.
Tue, Feb 28, 9:11 AM · Restricted Project, Restricted Project
spatel added a comment to D144608: [InstCombine] Add transforms for `(icmp {u|s}ge/le (xor X, Y), X)`.

This is adding a lot of code to a function that's already too big. A helper function will make it easier to read.

Tue, Feb 28, 7:49 AM · Restricted Project, Restricted Project
spatel committed rG3b090ff2bdb2: [InstCombine] use demanded vector elements to eliminate partially redundant… (authored by spatel).
[InstCombine] use demanded vector elements to eliminate partially redundant…
Tue, Feb 28, 6:45 AM · Restricted Project, Restricted Project
spatel closed D144760: [InstCombine] use demanded vector elements to eliminate partially redundant instructions.
Tue, Feb 28, 6:45 AM · Restricted Project, Restricted Project

Mon, Feb 27

spatel updated the diff for D144760: [InstCombine] use demanded vector elements to eliminate partially redundant instructions.

Patch updated:
Added TODO comment to allow this for any binop (currently bails out on div/rem/shift).

Mon, Feb 27, 12:12 PM · Restricted Project, Restricted Project
spatel added inline comments to D144760: [InstCombine] use demanded vector elements to eliminate partially redundant instructions.
Mon, Feb 27, 11:56 AM · Restricted Project, Restricted Project
spatel accepted D144777: [InstCombine] Fold signbit test of a pow2 or zero.
Mon, Feb 27, 10:00 AM · Restricted Project, Restricted Project
spatel added a comment to D144777: [InstCombine] Fold signbit test of a pow2 or zero.

LGTM - thanks!
See inline comments for a small adjustment to the tests.

Mon, Feb 27, 9:59 AM · Restricted Project, Restricted Project
spatel added inline comments to D144777: [InstCombine] Fold signbit test of a pow2 or zero.
Mon, Feb 27, 7:01 AM · Restricted Project, Restricted Project
spatel updated the diff for D144671: [InstCombine] prevent miscompiles from select-of-div/rem transform.

Patch updated:
When necessary, freeze the select condition value to preserve the optimization.

Mon, Feb 27, 6:11 AM · Restricted Project, Restricted Project
spatel added a comment to D144671: [InstCombine] prevent miscompiles from select-of-div/rem transform.

Alternatively, if you freeze the condition of the select, the transform is legal in all cases.

Mon, Feb 27, 6:08 AM · Restricted Project, Restricted Project
spatel added inline comments to D144777: [InstCombine] Fold signbit test of a pow2 or zero.
Mon, Feb 27, 5:40 AM · Restricted Project, Restricted Project
spatel added a comment to D144777: [InstCombine] Fold signbit test of a pow2 or zero.

We should have 2 more tests: (1) extra use of the sub and (2) extra use of the and.
As noted earlier, this patch should not require a "m_OneUse" limitation. I realize that it looks like a regression for the existing test, but that should be ok when viewed globally: we are reducing to an equality compare, and GVN, CVP, or some other pass will reduce that to the optimal form. It's just lucky (or unlucky) that the min/max folds added with D144606 are able to reduce it all within InstCombine.

Mon, Feb 27, 5:34 AM · Restricted Project, Restricted Project

Sun, Feb 26

spatel added a comment to D144777: [InstCombine] Fold signbit test of a pow2 or zero.

Hi @spatel, thanks for your comments, I updated the tests according to your
suggestions. However, everything stop folding after I use div instructions to
each oprands of and instruction.

Can you take a look? Is this because I missed something? Or my fold pattern is wrong.

Sun, Feb 26, 5:54 PM · Restricted Project, Restricted Project
spatel committed rG02828abd0845: [InstCombine] add tests for redundant-via-demanded-elts vec binops; NFC (authored by spatel).
[InstCombine] add tests for redundant-via-demanded-elts vec binops; NFC
Sun, Feb 26, 7:32 AM · Restricted Project, Restricted Project
spatel updated the diff for D144760: [InstCombine] use demanded vector elements to eliminate partially redundant instructions.

Patch updated:

  1. Use lambda and m_c_Binop to reduce code duplication (I tried a few variations of juggling the conditions - this was the best I could find).
  2. Added a pair of negative tests with mismatched demand/shuffle mask.
Sun, Feb 26, 7:27 AM · Restricted Project, Restricted Project
spatel added inline comments to D144760: [InstCombine] use demanded vector elements to eliminate partially redundant instructions.
Sun, Feb 26, 7:22 AM · Restricted Project, Restricted Project
spatel added inline comments to D144777: [InstCombine] Fold signbit test of a pow2 or zero.
Sun, Feb 26, 6:38 AM · Restricted Project, Restricted Project

Fri, Feb 24

spatel requested review of D144760: [InstCombine] use demanded vector elements to eliminate partially redundant instructions.
Fri, Feb 24, 2:24 PM · Restricted Project, Restricted Project

Feb 24 2023

spatel added a comment to D142803: [LogicCombine 1/?] Implement a general way to simplify logical operations..

I'm concerned about the caching here. It looks like you reuse one LogicCombiner instance for a basic block. However, isn't it possible for some of the instructions that have been inserted into LogicalOpNodes to be deleted, in which case the map may contain dangling pointers. If the pointer is reused by a newly allocated instruction, the cached information will be incorrect.

The main reason for caching is saving compile time. The new patch will remove all the instructions already inserted into the caches and I think functional it works now.
@nikic @spatel if possible can we use the llvm-compile-time-track to test how much compile time increase if we enable the LogicCombiner for every single instruction?

Feb 24 2023, 7:48 AM · Restricted Project, Restricted Project
spatel added inline comments to D142803: [LogicCombine 1/?] Implement a general way to simplify logical operations..
Feb 24 2023, 6:23 AM · Restricted Project, Restricted Project

Feb 23 2023

spatel requested review of D144671: [InstCombine] prevent miscompiles from select-of-div/rem transform.
Feb 23 2023, 12:55 PM · Restricted Project, Restricted Project
spatel committed rG54e510749893: [InstCombine] add tests for select of div/rem with common operand; NFC (authored by spatel).
[InstCombine] add tests for select of div/rem with common operand; NFC
Feb 23 2023, 12:33 PM · Restricted Project, Restricted Project
spatel accepted D144605: [InstCombine] Add tests for transforming `(max/min (xor X, Pow2), X)`; NFC.
Feb 23 2023, 11:35 AM · Restricted Project, Restricted Project
spatel accepted D144606: [InstCombine] Add transforms for `(max/min (xor X, Pow2), X)` -> `(and/or X, Pow2/~Pow2)`.

LGTM

Feb 23 2023, 11:35 AM · Restricted Project, Restricted Project
spatel added inline comments to D144606: [InstCombine] Add transforms for `(max/min (xor X, Pow2), X)` -> `(and/or X, Pow2/~Pow2)`.
Feb 23 2023, 8:45 AM · Restricted Project, Restricted Project
spatel accepted D142803: [LogicCombine 1/?] Implement a general way to simplify logical operations..

LGTM

Feb 23 2023, 7:08 AM · Restricted Project, Restricted Project
spatel updated the diff for D144274: [InstCombine] use loop info when running the pass after loop vectorization.

Patch updated:
Changed instcombine pipeline invocations to not use loop info unless it is already available, so this is effectively NFC.

Feb 23 2023, 6:41 AM · Restricted Project, Restricted Project
spatel added a comment to D142803: [LogicCombine 1/?] Implement a general way to simplify logical operations..

I need LeafValues to access value by index. It looks SmallSetVector can't do that.

Feb 23 2023, 5:33 AM · Restricted Project, Restricted Project

Feb 22 2023

spatel committed rG40d772c642f7: [InstCombine] add one-use check to prevent creating an instruction in shuffle… (authored by spatel).
[InstCombine] add one-use check to prevent creating an instruction in shuffle…
Feb 22 2023, 4:25 PM · Restricted Project, Restricted Project
spatel committed rG6c2a7817f820: [InstCombine] add test for splat-of-binop; NFC (authored by spatel).
[InstCombine] add test for splat-of-binop; NFC
Feb 22 2023, 4:24 PM · Restricted Project, Restricted Project
spatel added a comment to D142803: [LogicCombine 1/?] Implement a general way to simplify logical operations..

Please rename the test file as a preliminary step, so we will again show diffs in this patch. We also need to add negative tests to show current limitations and also that the combining is not making wrong logic reductions.

Feb 22 2023, 9:25 AM · Restricted Project, Restricted Project
spatel added a comment to D144451: [X86] Optimize umax(X,1).

Incidently, I'm guessing the vector equivalent code will be pretty poor as well when a umax op isn't available (v2i64 pre-AVX512 etc).

Feb 22 2023, 7:53 AM · Restricted Project, Restricted Project

Feb 21 2023

spatel committed rGae2322a0dca9: [InstSimplify] enhance simplifyWithOpReplaced() to allow more 'select' removal (authored by spatel).
[InstSimplify] enhance simplifyWithOpReplaced() to allow more 'select' removal
Feb 21 2023, 2:04 PM · Restricted Project, Restricted Project
spatel closed D144493: [InstSimplify] enhance simplifyWithOpReplaced() to allow more 'select' removal .
Feb 21 2023, 2:03 PM · Restricted Project, Restricted Project
spatel added a comment to D142803: [LogicCombine 1/?] Implement a general way to simplify logical operations..

This seems close to ready to me. It would be great if other reviewers have a look too. :)

Feb 21 2023, 1:21 PM · Restricted Project, Restricted Project
spatel added a comment to D144451: [X86] Optimize umax(X,1).

This doesn't handle i8 and i16 the same way because truncates get in the way, right? Would it be better to match this as "umax(x, 1)" (before it becomes x86-specific instructions)? Or could we peek through a truncate and still generate the adc for i8/i16?

Feb 21 2023, 10:25 AM · Restricted Project, Restricted Project
spatel committed rGdbc00b88e961: [InstSimplify] add tests for simplifyWithOpReplaced(); NFC (authored by spatel).
[InstSimplify] add tests for simplifyWithOpReplaced(); NFC
Feb 21 2023, 9:50 AM · Restricted Project, Restricted Project
spatel updated the summary of D144493: [InstSimplify] enhance simplifyWithOpReplaced() to allow more 'select' removal .
Feb 21 2023, 9:11 AM · Restricted Project, Restricted Project
spatel updated the diff for D144493: [InstSimplify] enhance simplifyWithOpReplaced() to allow more 'select' removal .

Patch updated:
Reduced the impliesPoison() logic as suggested.

Feb 21 2023, 9:06 AM · Restricted Project, Restricted Project
spatel added a comment to D144493: [InstSimplify] enhance simplifyWithOpReplaced() to allow more 'select' removal .

I like the approach, but I'm not sure you're checking the right poison implications. My first thought would be that we need impliesPoison(V, Op). We are replacing the select with V, so what we want to establish is that if V is poison, the select would be poison anyway because Op is also implied poison.

Feb 21 2023, 8:59 AM · Restricted Project, Restricted Project
spatel accepted D143593: [InstCombine] Don't fold freeze poison when it's used in shufflevector.

What if we squash any cast of freeze(poison) into the freeze itself as an addition to getUndefReplacement():
https://alive2.llvm.org/ce/z/o7J2JS

That would give us a far-fetched improvement on something like this:
https://alive2.llvm.org/ce/z/hC_Gws
...so that could be an independent patch before the shuffle hack.

I think this would work great! The main hurdle is that getUndefReplacement's users expect a Constant.
In particular Constant::replaceUndefsWith, so I would have to change the return type of getUndefReplacement to Value and also change Constant::replaceUndefsWith to a take a Value as a Replacement.
I'm not sure which option is more desirable, the current patch or your suggestion.

Feb 21 2023, 8:07 AM · Restricted Project, Restricted Project
spatel requested review of D144493: [InstSimplify] enhance simplifyWithOpReplaced() to allow more 'select' removal .
Feb 21 2023, 7:52 AM · Restricted Project, Restricted Project
spatel edited reviewers for D142386: ExecutionEngine: support composite types handling., added: lhames, sgraenitz, MoritzS, Hahnfeld; removed: spatel.

I don't know anything about ExecutionEngine - adding potential reviewers based on the most recent git log entries for this directory.

Feb 21 2023, 5:05 AM · Restricted Project, Restricted Project

Feb 20 2023

spatel committed rG703423c26965: [InstCombine] relax constraint on udiv fold (authored by spatel).
[InstCombine] relax constraint on udiv fold
Feb 20 2023, 12:09 PM · Restricted Project, Restricted Project
spatel added inline comments to D144412: [NFC] Fix missing colon in CHECK directives.
Feb 20 2023, 11:09 AM · Restricted Project, Restricted Project
spatel committed rG36014a71ebd0: [InstCombine] auto-generate test CHECK lines; NFC (authored by spatel).
[InstCombine] auto-generate test CHECK lines; NFC
Feb 20 2023, 11:06 AM · Restricted Project, Restricted Project
spatel committed rG4966d8ebe1bb: [InstCombine] distribute div over add with matching mul-by-constant (authored by spatel).
[InstCombine] distribute div over add with matching mul-by-constant
Feb 20 2023, 11:06 AM · Restricted Project, Restricted Project
spatel committed rGf49d19d50238: [InstCombine] add tests for div with muladd operand; NFC (authored by spatel).
[InstCombine] add tests for div with muladd operand; NFC
Feb 20 2023, 11:06 AM · Restricted Project, Restricted Project
spatel committed rG595ffc56be70: [InstCombine] add tests for add with sub-from-constant operand; NFC (authored by spatel).
[InstCombine] add tests for add with sub-from-constant operand; NFC
Feb 20 2023, 11:06 AM · Restricted Project, Restricted Project
spatel added inline comments to D142803: [LogicCombine 1/?] Implement a general way to simplify logical operations..
Feb 20 2023, 7:43 AM · Restricted Project, Restricted Project
spatel added a comment to D142803: [LogicCombine 1/?] Implement a general way to simplify logical operations..

I was curious if enabling this for all logic ops would cause any compile-time regressions, but it seems like it has almost no cost:
https://llvm-compile-time-tracker.com/compare.php?from=0e90cd7551f2d0b151f7406e8f3848ec54e650bf&to=ae505cb2a674ac4c240c94a74fc04ee274321697&stat=instructions:u

Based on the result, can I just enable it for all logical operations by default and remove the option?

Feb 20 2023, 7:11 AM · Restricted Project, Restricted Project
spatel added inline comments to D144274: [InstCombine] use loop info when running the pass after loop vectorization.
Feb 20 2023, 6:41 AM · Restricted Project, Restricted Project
spatel added a comment to D144324: [AArch64][SelectionDAG] Perfer CMN for (0 - Y) == Y.

We should probably view this as a missed canonicalization in IR first:
https://alive2.llvm.org/ce/z/D2Aph4 (that should also work with eq predicates)

Feb 20 2023, 5:45 AM · Restricted Project, Restricted Project