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spatel (Sanjay Patel)
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May 22 2014, 1:24 PM (306 w, 6 d)

Recent Activity

Today

spatel added inline comments to D76956: [TTI][SLP] Add TTI interface to estimate cost of chain of vector inserts/extracts..
Wed, Apr 8, 3:13 PM · Restricted Project
spatel requested review of D77739: [InstCombine] replace undef in vector constant for safe shift transform (PR45447).
Wed, Apr 8, 1:03 PM
spatel updated the diff for D77739: [InstCombine] replace undef in vector constant for safe shift transform (PR45447).

Patch updated:
Use replaceUndefsWith() directly with 0/-1 constants, so we're not implicitly assuming the behavior of the APIs.

Wed, Apr 8, 1:03 PM
spatel planned changes to D77739: [InstCombine] replace undef in vector constant for safe shift transform (PR45447).

Thinking about this again...assuming that we know what getSafeVectorConstantForBinop() is going to return is dirty. Let's just replace undefs with the values we want.

Wed, Apr 8, 1:02 PM
spatel added inline comments to D76124: [TTI] Remove getOperationCost.
Wed, Apr 8, 9:45 AM · Restricted Project
spatel created D77739: [InstCombine] replace undef in vector constant for safe shift transform (PR45447).
Wed, Apr 8, 9:44 AM
spatel committed rG5c472420b6d6: [LangRef] update text for shufflevector (authored by spatel).
[LangRef] update text for shufflevector
Wed, Apr 8, 6:28 AM
spatel closed D77396: [LangRef] update text for shufflevector.
Wed, Apr 8, 6:28 AM · Restricted Project
spatel committed rGa1c05fe20f3d: [InstCombine] exclude bitcast of ppc_fp128 in icmp signbit fold (authored by spatel).
[InstCombine] exclude bitcast of ppc_fp128 in icmp signbit fold
Wed, Apr 8, 5:58 AM
spatel closed D77642: [InstCombine] exclude bitcast of ppc_fp128 in icmp signbit fold.
Wed, Apr 8, 5:58 AM · Restricted Project
spatel added inline comments to D76947: [SelectionDAGBuilder][CGP][X86] Move some of SDB's gather/scatter uniform base handling to CGP..
Wed, Apr 8, 5:55 AM · Restricted Project

Yesterday

spatel updated the diff for D77396: [LangRef] update text for shufflevector.

Patch updated:
Restore description of constant mask elements as integer or undef. That seemed redundant to me before, but it's better to state that explicitly, so we don't let weird stuff like constant expressions into the picture.

Tue, Apr 7, 10:50 AM · Restricted Project
spatel added inline comments to D76124: [TTI] Remove getOperationCost.
Tue, Apr 7, 10:20 AM · Restricted Project
spatel updated the diff for D77642: [InstCombine] exclude bitcast of ppc_fp128 in icmp signbit fold.

Patch updated:
Add code comment to better explain the transform and PPC limitation.

Tue, Apr 7, 10:18 AM · Restricted Project
spatel added a comment to D74484: [AggressiveInstCombine] Add support for ICmp instr that feeds a select intsr's condition operand..

@spatel: Basically the test cases with the real motivation are the first 4.

Do you mean the first 4 with diffs, or the first 4 that are being added as new tests?

The first 4 with diff.

Where most of the other cases are there to check various "edge" cases of the added code behavior.
I think, that even if some of the tests are not in a canonical form (and can be optimized by instcombine), we still have an added value having them here in order to check the behavior of this specific pass with similar cases.
Don't you agree?

Yes, I agree that we want to have tests for edge cases to make sure that the logic is correct here. But we also should have tests that show why this patch is necessary - functions that could not be solved in regular instcombine easily.

I agree with you 100%. That's why we have several test cases.

Running the same test with -instcombine instead of -aggressive-instcombine, out of the 23 test cases in the file, the following get optimized:

  • cmp_select_zext_i8_noTransformation
  • cmp_select_zext_sext_i8_noTransformation
  • cmp_select_signed_const_i16Const_noTransformation
  • cmp_select_unsigned_const_i16Const
  • cmp_select_unsigned_const_i16Const_noTransformation
  • cmp_select_unsigned_const_i16_MSB1
  • cmp_select_bigConst_cmp
  • cmp_zext_and_minus1_noTransformation

    Out of these cases, the ones with "_noTransformation" suffix are there to make sure our pass does not apply any transformations, and the others include some special immediate values.

    Actually, I feel that I might have misunderstood your comments intention. Can you explain to me what are you suggesting that we do?
Tue, Apr 7, 10:18 AM · Restricted Project
spatel created D77642: [InstCombine] exclude bitcast of ppc_fp128 in icmp signbit fold.
Tue, Apr 7, 5:23 AM · Restricted Project
spatel added a comment to D74484: [AggressiveInstCombine] Add support for ICmp instr that feeds a select intsr's condition operand..

@spatel: Basically the test cases with the real motivation are the first 4.

Tue, Apr 7, 5:23 AM · Restricted Project
spatel committed rGe268ec8e0d7e: [InstCombine] add icmp+cast tests for ppc_fp128; NFC (authored by spatel).
[InstCombine] add icmp+cast tests for ppc_fp128; NFC
Tue, Apr 7, 4:50 AM

Mon, Apr 6

spatel committed rGa2bb19ca420d: [x86] add size cost tests for casts and binops; NFC (authored by spatel).
[x86] add size cost tests for casts and binops; NFC
Mon, Apr 6, 9:46 AM
spatel added a comment to D76124: [TTI] Remove getOperationCost.

Is this NFC now? I added some sanity tests for x86 here:
rGa2bb19c
...but this patch doesn't apply to master cleanly, so I could not verify if that wiggles or not.

Mon, Apr 6, 9:45 AM · Restricted Project
spatel committed rGfbb1b43f135a: [ValueTracking] enhance matching of umin/umax with 'not' operands (authored by spatel).
[ValueTracking] enhance matching of umin/umax with 'not' operands
Mon, Apr 6, 9:12 AM
spatel committed rG463143f0d695: [ValueTracking] add/adjust tests for min/max; NFC (authored by spatel).
[ValueTracking] add/adjust tests for min/max; NFC
Mon, Apr 6, 8:39 AM

Sun, Apr 5

spatel added reviewers for D77137: [Reassociate] Preserve AAManager and BasicAA analyses: asbirlea, hfinkel.

Adding potential reviewers for alias analysis.

Sun, Apr 5, 8:31 AM · Restricted Project
spatel committed rG538a8f02271b: [InstCombine] convert bitcast-shuffle to vector trunc (authored by spatel).
[InstCombine] convert bitcast-shuffle to vector trunc
Sun, Apr 5, 6:56 AM
spatel closed D77299: [InstCombine] convert bitcast-shuffle to vector trunc.
Sun, Apr 5, 6:56 AM · Restricted Project
spatel added reviewers for D75362: [InstCombine] Process blocks in RPO: efriedma, majnemer, lattner.

This looks good to me.
@spatel?

Sun, Apr 5, 6:55 AM · Restricted Project
spatel committed rG4036a0af240e: [InstCombine] enhance freelyNegateValue() by handling 'not' (authored by spatel).
[InstCombine] enhance freelyNegateValue() by handling 'not'
Sun, Apr 5, 6:24 AM
spatel committed rG867f0c3c4d8c: [ValueTracking] enhance matching of smin/smax with 'not' operands (authored by spatel).
[ValueTracking] enhance matching of smin/smax with 'not' operands
Sun, Apr 5, 6:24 AM
spatel closed D77459: [InstCombine] enhance freelyNegateValue() by handling 'not'.
Sun, Apr 5, 6:23 AM · Restricted Project

Sat, Apr 4

spatel committed rG28202dd35ccb: [InstCombine] add more tests for min/max folding; NFC (authored by spatel).
[InstCombine] add more tests for min/max folding; NFC
Sat, Apr 4, 11:09 AM
spatel committed rG6d3437404353: [ValueTracking] add tests for smin/smax; NFC (authored by spatel).
[ValueTracking] add tests for smin/smax; NFC
Sat, Apr 4, 11:09 AM
spatel added a comment to rGf2fbdf76d8d0: [InstCombine] do not exclude min/max from icmp with casted operand fold.

Thanks, much appreciated. And thanks for adding the extra test.

Sat, Apr 4, 7:56 AM
spatel created D77459: [InstCombine] enhance freelyNegateValue() by handling 'not'.
Sat, Apr 4, 7:24 AM · Restricted Project
spatel added a comment to D77459: [InstCombine] enhance freelyNegateValue() by handling 'not'.

Note that we don't see test diffs for simpler cases because we already handle this related pattern:

// C - ~X == X + (1+C)
if (match(Op1, m_Not(m_Value(X))))
  return BinaryOperator::CreateAdd(X, AddOne(C));
Sat, Apr 4, 7:24 AM · Restricted Project
spatel updated the diff for D77396: [LangRef] update text for shufflevector.

Patch updated:
Rearranged text a bit more and removed reference to the 'UndefMaskElem' code constant.

Sat, Apr 4, 6:20 AM · Restricted Project

Fri, Apr 3

spatel committed rGb7397e81fe4d: [InstCombine] add tests for freelyNegateValue with 'not'; NFC (authored by spatel).
[InstCombine] add tests for freelyNegateValue with 'not'; NFC
Fri, Apr 3, 2:39 PM
spatel committed rGce97ce3a5d72: [VectorCombine] try to form a better extractelement (authored by spatel).
[VectorCombine] try to form a better extractelement
Fri, Apr 3, 11:20 AM
spatel closed D76623: [VectorCombine] try to form a better extractelement.
Fri, Apr 3, 11:20 AM · Restricted Project
spatel committed rG389704cc601b: [PhaseOrdering] add shuffle tests based on D40633; NFC (authored by spatel).
[PhaseOrdering] add shuffle tests based on D40633; NFC
Fri, Apr 3, 10:15 AM
spatel added a comment to D40633: [PCG] Poor shuffle lane tracking (PR35454 ).

@spatel Maybe ensure we have all the test coverage from the tests that Konstantin added here?

Fri, Apr 3, 10:14 AM
spatel added a reviewer for D76512: [YAMLParser] Scanner::setError - ensure we use the StringRef::iterator argument (PR45043): bkramer.
Fri, Apr 3, 8:35 AM · Restricted Project
spatel created D77396: [LangRef] update text for shufflevector.
Fri, Apr 3, 7:29 AM · Restricted Project
spatel added a reviewer for D77396: [LangRef] update text for shufflevector: ctetreau.
Fri, Apr 3, 7:29 AM · Restricted Project
spatel updated the diff for D77299: [InstCombine] convert bitcast-shuffle to vector trunc.

Patch updated:
Fixed types to deal with overflow (hopefully properly this time!).

Fri, Apr 3, 6:56 AM · Restricted Project
spatel added a comment to D76638: [SDAG] fix crash in getNegatedExpression() by ignoring transient fadd.

! In D76638#1959075, @steven.zhang wrote:
Yeah, it is sensitive to how we combine the nodes. I tried your patch(add FENG check for FADD), and see two extra instructions generated as you mentioned, on X86. So, we need some positive tests for this patch if it helps the codegen. What do you think ?

Fri, Apr 3, 5:52 AM
spatel abandoned D76439: [SDAG] fix crash in getNegatedExpression() from altered number of uses.

Abandoning - D77319 will solve the larger problem.

Fri, Apr 3, 5:20 AM

Thu, Apr 2

spatel added a comment to D76638: [SDAG] fix crash in getNegatedExpression() by ignoring transient fadd.

Ping. I think this change is useful regardless of whether/how we make a larger fix for getNegatibleCost+getNegatedExpression.

I have posted a patch(https://reviews.llvm.org/D77319) to remove the getNegatibleCost. It is almost ready now. I am not sure if it is the best way , and welcome for the comments in advance. Regarding to the opportunities for this patch, can you double confirm it together with my patch to see if there is any improvement ?

Thu, Apr 2, 2:38 PM
spatel added inline comments to D77299: [InstCombine] convert bitcast-shuffle to vector trunc.
Thu, Apr 2, 2:06 PM · Restricted Project
spatel updated the diff for D77299: [InstCombine] convert bitcast-shuffle to vector trunc.

Patch updated:
Widened type for scaled index and added assert.

Thu, Apr 2, 2:06 PM · Restricted Project
spatel added a comment to D76623: [VectorCombine] try to form a better extractelement.

Ping.

Thu, Apr 2, 1:33 PM · Restricted Project
spatel committed rGf4448063ccf1: [InstCombine] try to reduce shuffle with bitcasted operand (authored by spatel).
[InstCombine] try to reduce shuffle with bitcasted operand
Thu, Apr 2, 10:51 AM
spatel committed rGb6050ca18168: [VectorCombine] transform bitcasted shuffle to narrower elements (authored by spatel).
[VectorCombine] transform bitcasted shuffle to narrower elements
Thu, Apr 2, 10:51 AM
spatel closed D76844: [InstCombine] try to reduce shuffle with bitcasted operand.
Thu, Apr 2, 10:51 AM · Restricted Project
spatel closed D76727: [VectorCombine] transform bitcasted shuffle to narrower elements.
Thu, Apr 2, 10:50 AM · Restricted Project
spatel updated the diff for D76844: [InstCombine] try to reduce shuffle with bitcasted operand.

Patch updated - no logic changes, but rebased/reduced with new shuffle instruction.

Thu, Apr 2, 10:50 AM · Restricted Project
spatel updated the diff for D76727: [VectorCombine] transform bitcasted shuffle to narrower elements.

Patch updated - no logic diffs from before but:

  1. Rebased/simplified with new mask-operand-less version of shuffle (D72467, D77183).
  2. Added function comment to explain the transform/motivation.
Thu, Apr 2, 10:50 AM · Restricted Project
spatel committed rG12fcbcecffe1: [InstCombine] add tests for cmyk benchmark; NFC (authored by spatel).
[InstCombine] add tests for cmyk benchmark; NFC
Thu, Apr 2, 10:18 AM
spatel added inline comments to D76727: [VectorCombine] transform bitcasted shuffle to narrower elements.
Thu, Apr 2, 10:17 AM · Restricted Project
spatel committed rG1008435f3d47: Revert "[InstCombine] do not exclude min/max from icmp with casted operand fold" (authored by spatel).
Revert "[InstCombine] do not exclude min/max from icmp with casted operand fold"
Thu, Apr 2, 7:01 AM
spatel added a reverting change for rGf2fbdf76d8d0: [InstCombine] do not exclude min/max from icmp with casted operand fold: rG1008435f3d47: Revert "[InstCombine] do not exclude min/max from icmp with casted operand fold".
Thu, Apr 2, 7:01 AM
spatel added a comment to D76983: [InstCombine] Transform extractelement-trunc -> bitcast-extractelement.

I'll draft a patch.

thanks !

Thu, Apr 2, 7:01 AM · Restricted Project
spatel added a comment to rGf2fbdf76d8d0: [InstCombine] do not exclude min/max from icmp with casted operand fold.

Yeah, the multiple uses are a pain.

How married are you to this commit? It was a fairly chunky regression, and if you don't mind reverting until we have a better fix for that code it would help get one thing off my plate.

Thu, Apr 2, 5:56 AM
spatel created D77299: [InstCombine] convert bitcast-shuffle to vector trunc.
Thu, Apr 2, 5:56 AM · Restricted Project
spatel committed rGa19b27b90e5e: [PhaseOrdering] add test for vector trunc; NFC See discussion in D76983. (authored by spatel).
[PhaseOrdering] add test for vector trunc; NFC See discussion in D76983.
Thu, Apr 2, 5:24 AM
spatel committed rGecb048c7acaf: [InstCombine] add tests for disguised vector trunc; NFC (authored by spatel).
[InstCombine] add tests for disguised vector trunc; NFC
Thu, Apr 2, 5:24 AM
spatel added a comment to D76638: [SDAG] fix crash in getNegatedExpression() by ignoring transient fadd.

Ping. I think this change is useful regardless of whether/how we make a larger fix for getNegatibleCost+getNegatedExpression.

Thu, Apr 2, 4:51 AM

Wed, Apr 1

spatel added a comment to D76983: [InstCombine] Transform extractelement-trunc -> bitcast-extractelement.

Ie, is there consensus that forming a size-changing vector cast from a shuffle is canonical?

I would have guessed it is, yes.

Wed, Apr 1, 2:04 PM · Restricted Project
spatel committed rG3d9004879118: [InstCombine] enhance freelyNegateValue() by handling xor (authored by spatel).
[InstCombine] enhance freelyNegateValue() by handling xor
Wed, Apr 1, 12:23 PM
spatel closed D77230: [InstCombine] enhance freelyNegateValue() by handling xor.
Wed, Apr 1, 12:23 PM · Restricted Project
spatel committed rG8431dbacd495: [InstCombine] add tests for negate with xor operand; NFC (authored by spatel).
[InstCombine] add tests for negate with xor operand; NFC
Wed, Apr 1, 12:23 PM
spatel added a comment to rGf2fbdf76d8d0: [InstCombine] do not exclude min/max from icmp with casted operand fold.

@dmgreen wrote

@spatel wrote

! In rGf2fbdf76d8d07f6a0fbd97825cbc533660d64a37#913209, @dmgreen wrote:
Hello. Unfortunately we have some tests where it looks like this is needed. This code: https://godbolt.org/z/DpJuFm is no longer reaching the same minimum after this patch. Any ideas?

Whilst playing around I noticed that using "char k = (c < m) ? (c < y ? c : y) : (m < y ? m : y)", instead of the if, always ends up with worse code. Perhaps a missing fold of some sort?

I thought we had all variants of that min/max-of-nots beaten into submission, but no...
Taking a look now. Maybe we can enhance "freelyNegateValue()" to see through this...

Thanks. If I remember correctly, this example was really good at getting stuck in local minimum because of all the multiple uses going on.
Perhaps the same thing is happening again now?

Wed, Apr 1, 11:31 AM
spatel created D77230: [InstCombine] enhance freelyNegateValue() by handling xor.
Wed, Apr 1, 10:26 AM · Restricted Project
spatel added a comment to D76928: [InstCombine][X86] Simplify demanded elts in SSE intrinsics with repeated args (PR24523).
  1. Improve demanded elements analysis of x86 min/max/cmp - the x86 part of this patch, but with different tests to show the win with different operands.
Wed, Apr 1, 9:53 AM · Restricted Project
spatel added a comment to D76928: [InstCombine][X86] Simplify demanded elts in SSE intrinsics with repeated args (PR24523).

These tests show a set of missed optimizations, so I recommend taking a step back and separate this into a few patches:

  1. Fold x86 min/max intrinsics better - if operands are identical, the min/max simplifies away.
  2. Fold x86 cmp intrinsics better (thought we had a bug report for this, but I don't see it now) - if operands are identical, the compare can simplify away (see SimplifyFCmpInst()) or change predicate.
  3. Improve demanded elements analysis with isOnlyUserOf() - use generic opcode like 'mul' to show that improvement (independent of x86).
  4. Improve demanded elements analysis of x86 min/max/cmp - the x86 part of this patch, but with different tests to show the win with different operands.
Wed, Apr 1, 9:53 AM · Restricted Project
spatel added a comment to D76983: [InstCombine] Transform extractelement-trunc -> bitcast-extractelement.

This patch triggers a regression on our side:

<...>

The tests expects to see:

define dso_local <4 x i16> @truncate_v_v(<4 x i32> %lhs) local_unnamed_addr #0 {
entry:
  %0 = trunc <4 x i32> %lhs to <4 x i16>
  ret <4 x i16> %0
}

which, in machine instructions, is mapped onto a vector trunc instruction.

But now, we see:

define dso_local <4 x i16> @truncate_v_v(<4 x i32> %lhs) local_unnamed_addr #0 {
entry:
  %0 = bitcast <4 x i32> %lhs to <8 x i16>
  %vecinit9 = shufflevector <8 x i16> %0, <8 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  ret <4 x i16> %vecinit9
}

which is expanded into a large sequence of code going through the stack.

This looks like a simple missed transform to me, not a miscompile

Wed, Apr 1, 7:07 AM · Restricted Project

Tue, Mar 31

spatel added a comment to D74484: [AggressiveInstCombine] Add support for ICmp instr that feeds a select intsr's condition operand..

Just checked the patch @spatel mentioned.
Doesn't really help with the cases provided here.

Tue, Mar 31, 11:26 AM · Restricted Project
spatel accepted D76133: [ExpandMemCmp] Allow overlaping loads in the zero-relational case..

LGTM

Tue, Mar 31, 10:52 AM · Restricted Project
spatel accepted D77114: Handle exp2 with proper vectorization and lowering to SVML calls.

LGTM

Tue, Mar 31, 10:34 AM · Restricted Project
spatel added a comment to D76844: [InstCombine] try to reduce shuffle with bitcasted operand.

D72467 is not actually a parent, but adding that here because this would conflict (force another rebase of that patch).

Tue, Mar 31, 7:09 AM · Restricted Project
spatel added a comment to D76727: [VectorCombine] transform bitcasted shuffle to narrower elements.

D72467 is not actually a parent, but adding that here because this would conflict (force another rebase of that patch).

Tue, Mar 31, 7:09 AM · Restricted Project
spatel added a child revision for D72467: Remove "mask" operand from shufflevector.: D76844: [InstCombine] try to reduce shuffle with bitcasted operand.
Tue, Mar 31, 7:09 AM · Restricted Project, Restricted Project
spatel added a parent revision for D76844: [InstCombine] try to reduce shuffle with bitcasted operand: D72467: Remove "mask" operand from shufflevector..
Tue, Mar 31, 7:09 AM · Restricted Project
spatel added a child revision for D72467: Remove "mask" operand from shufflevector.: D76727: [VectorCombine] transform bitcasted shuffle to narrower elements.
Tue, Mar 31, 7:09 AM · Restricted Project, Restricted Project
spatel added a parent revision for D76727: [VectorCombine] transform bitcasted shuffle to narrower elements: D72467: Remove "mask" operand from shufflevector..
Tue, Mar 31, 7:09 AM · Restricted Project
spatel committed rGfa61b5059a36: [InstCombine] remove stray auto-generated test comment; NFC (authored by spatel).
[InstCombine] remove stray auto-generated test comment; NFC
Tue, Mar 31, 6:38 AM
spatel added inline comments to rGf2fbdf76d8d0: [InstCombine] do not exclude min/max from icmp with casted operand fold.
Tue, Mar 31, 6:37 AM
spatel accepted D77050: [TTI] Remove getCallCost.

LGTM - we're trying to reduce and fix the cost model mess, so I'm fine with this step. If we want to add non-intrinsic call cost modeling in the future, it can be done without much effort when necessary.

Tue, Mar 31, 6:37 AM · Restricted Project

Mon, Mar 30

spatel added a comment to D76983: [InstCombine] Transform extractelement-trunc -> bitcast-extractelement.
  • Updated ExtractCast.ll test.

    Should I explicitly add the data layout in ExtractCast.ll, because the added assertions are only valid on little endian platforms?
Mon, Mar 30, 4:57 PM · Restricted Project
spatel added a comment to D74484: [AggressiveInstCombine] Add support for ICmp instr that feeds a select intsr's condition operand..

I have not looked at the code changes, but I noticed the first few tests are all min/max patterns. Can you check your motivating apps/benchmarks to see if rGf2fbdf76d8d0 helps?

Mon, Mar 30, 2:11 PM · Restricted Project
spatel committed rGf2fbdf76d8d0: [InstCombine] do not exclude min/max from icmp with casted operand fold (authored by spatel).
[InstCombine] do not exclude min/max from icmp with casted operand fold
Mon, Mar 30, 1:38 PM
spatel added a comment to D76983: [InstCombine] Transform extractelement-trunc -> bitcast-extractelement.

Let me look at the failed test in a couple of hours.

Btw. I have commit permissions now, so I will be able to commit this myself now. :)

Mon, Mar 30, 10:49 AM · Restricted Project
spatel accepted D76983: [InstCombine] Transform extractelement-trunc -> bitcast-extractelement.

LGTM

Mon, Mar 30, 10:16 AM · Restricted Project
spatel added inline comments to D73480: [VectorCombine] new IR transform pass for partial vector ops.
Mon, Mar 30, 9:43 AM · Restricted Project
spatel added a reviewer for D77050: [TTI] Remove getCallCost: SjoerdMeijer.

It would be great if we can simplify this chunk, but I'm not sure of the history/plans. Adding @SjoerdMeijer based on the recent patch D59014.

Mon, Mar 30, 9:10 AM · Restricted Project
spatel committed rGbc60cdcc3f86: [InstCombine] add test for trunc-extelt; NFC (authored by spatel).
[InstCombine] add test for trunc-extelt; NFC
Mon, Mar 30, 7:01 AM
spatel added a comment to D76983: [InstCombine] Transform extractelement-trunc -> bitcast-extractelement.

I think we're pretty close now.
Added another test, so please rebase/update:
rGbc60cdcc3f8

Mon, Mar 30, 7:00 AM · Restricted Project

Sun, Mar 29

spatel committed rG24562c6588bf: [InstCombine] Add tests for trunc (extelt x); (NFC) Baseline tests for D76983… (authored by dsprenkels).
[InstCombine] Add tests for trunc (extelt x); (NFC) Baseline tests for D76983…
Sun, Mar 29, 3:00 PM
spatel closed D77024: [NFC][InstCombine] Add preliminary tests for D76983.
Sun, Mar 29, 3:00 PM · Restricted Project
spatel added a comment to D76983: [InstCombine] Transform extractelement-trunc -> bitcast-extractelement.

My git lingo might be off here. Are you saying you don't have commit permissions for LLVM yet?

Yup. Should I ask for it? (I don't know what the etiquette is; i.e. how many patches before one should request commit access.)

Sun, Mar 29, 3:00 PM · Restricted Project
spatel accepted D77024: [NFC][InstCombine] Add preliminary tests for D76983.

LGTM - I'll push this.

Sun, Mar 29, 2:28 PM · Restricted Project