[X86] Add CMPCCXADD instructions.

[FreddyYe]

Summary

For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

[RKSimon]

clang/test/CodeGen/X86/cmpccxadd-builtins-error.c

3

Add 32-bit test coverage to ensure the intrinsics aren't visible?

[RKSimon]

llvm/CMakeLists.txt

887 ↗

(On Diff #467668)

What is this for?

[FreddyYe]

Address comments.

[craig.topper]

clang/include/clang/Basic/BuiltinsX86_64.def

143

There was a blank line here. Put it back.

clang/lib/Basic/Targets/X86.cpp

787

What is CMPCCXADD_SUPPORTED for?

llvm/lib/Target/X86/X86.td

262

Why AVX2?

llvm/lib/Target/X86/X86InstrSSE.td

8118 ↗

(On Diff #468395)

This feels like it belongs somewhere other than X86InstrSSE.td since it's not vector related.

8131 ↗

(On Diff #468395)

Any possibility of doing this like how JCC_1, SETCCr, and CMOV32rr using an immediate for the lower 4 bits of the opcode?

8145–8146 ↗

(On Diff #468395)

Should there be aliases for consistency with Jcc, Setcc, and cmovcc. To support A, AE, GT, GE etc.?

[craig.topper]

llvm/lib/Target/X86/X86InstrSSE.td

8118 ↗

(On Diff #468395)

Missing Defs = [EFLAGS] I think

[RKSimon]

llvm/test/MC/X86/x86-64-cmpccxadd-att.s

1 ↗

(On Diff #468395)

Drop the -att.s and add intel test coverage?

[FreddyYe]

Address comments. THX for review!

llvm/lib/Target/X86/X86.td

262

Removed.

llvm/lib/Target/X86/X86InstrSSE.td

8118 ↗

(On Diff #468395)

Yes. Moved to llvm/lib/Target/X86/X86InstrCompiler.td

8131 ↗

(On Diff #468395)

Yes. Changed so.

8145–8146 ↗

(On Diff #468395)

Yes, changed so.

[craig.topper]

clang/lib/Basic/Targets/X86.cpp

981

This list is alphabetized or was supposed to be

1011

This list is alphabetized

llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h

1071

This comment is out of date.

llvm/lib/Target/X86/X86ISelLowering.cpp

5652

Probably need MOVolatile too

llvm/lib/Target/X86/X86InstrCompiler.td

1026 ↗

(On Diff #469456)

X86InstrCompiler.td is for pseudos and isCodeGenOnly=1 instructions. Basically things only needed by CodeGen and not the assembler/disassembler.

llvm/utils/TableGen/X86RecognizableInstr.cpp

875

Extra space after MRMDestMem4VOp3CC

[FreddyYe]

llvm/lib/Target/X86/X86InstrCompiler.td

1026 ↗

(On Diff #469456)

I was to make it near "cmpxchg". What about llvm/lib/Target/X86/X86InstrInfo.td?

[FreddyYe]

Address comments.

[craig.topper]

llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h

1071

I'd prefer if you fixed the comment rather than deleting it.

llvm/lib/Target/X86/X86InstrInfo.td

3028

Can we put $dstsrc2 before $dstsrc1 in the ins list? That would remove the need for the change in getOperandBias I think. But maybe it complicates the encoder and disassembler?

llvm/lib/Target/X86/X86InstrSSE.td

8125 ↗

(On Diff #469470)

Looks like there's a blank line being deleted here?

[pengfei]

llvm/lib/Target/X86/X86ISelLowering.cpp

5645–5655

This can be merged with above.

[skan]

llvm/lib/Target/X86/X86ISelLowering.cpp

28242

Unused?

llvm/lib/Target/X86/X86InstrInfo.td

3025

Should we set isCodeGenOnly =1 here?

llvm/utils/TableGen/X86RecognizableInstr.h

109

Should we use 20 here?

[skan]

llvm/lib/Target/X86/X86InstrInfo.td

3029

+1 for craig. Usually if the input is tied to ouput, it should be the 1st input. These two instructions use a new Format MRMDestMem4VOp3CC rather than an existing one, I belive it won't increase the complexity.

[FreddyYe]

Address comments. THX for review!

[pengfei]

clang/test/Driver/x86-target-features.c

320

Use -target=xxx -march=xxx to match with others. xxx can be x86_64 I think.

321

ditto.

llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h

1073

Unrelated change.

1127

Maybe move it to line 1133? MRMDestMem4VOp3CC is used for VEX encoding only.

llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp

816

Also this is not needed.

820

ditto.

llvm/lib/Target/X86/X86ISelLowering.cpp

34174

ditto.

llvm/lib/Target/X86/X86ISelLowering.h

872

Add comments for them?

873

This node seems not used.

llvm/lib/Target/X86/X86InstrInfo.td

348

Change to CMPCCXADD since it's shared.

[FreddyYe]

Address comments. THX for review!

[skan]

llvm/lib/Target/X86/X86InstrInfo.td

3036

set GR64:$dst, EFLAGS ...?

[skan]

clang/lib/Headers/cmpccxaddintrin.h

20–35

Could you use the same suffix for the condition code as ./llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h? e.g

NB->AE
Z->E
NZ->NE
NBE->A

and so on.

[craig.topper]

clang/lib/Headers/cmpccxaddintrin.h

20–35

Probably should have both versions as aliases.

llvm/lib/Target/X86/X86InstrInfo.td

3036

That doesn't work unless X86cmpccxadd is declare as having two results.

[FreddyYe]

Address comments. THX for review!

[FreddyYe]

clang/lib/Headers/cmpccxaddintrin.h

20–35

Yes, agree to add both,

llvm/lib/Target/X86/X86InstrInfo.td

3036

I did a test. It won't affect this intrinsic's lowering. Since it's not be useful and only for intrinsic lowering, I preferred to not add.

[FreddyYe]

Support different default condition code for CMPCCXADD.

[skan]

llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp

32

Capitalize 1st char

llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp

1453–1455

Minor suggestion

emitMemModRMByte(MI, ++CurOp, getX86RegNum(MI.getOperand(0)), TSFlags,
                 HasREX, StartByte, OS, Fixups, STI, false);
CurOp = SrcRegNum + 2; // skip VEX_V4 and CC

would be more clear b/c you use "skip VEX_V4 and CC" in the comments.

[pengfei]

LGTM.

llvm/lib/Target/X86/X86InstrInfo.td

3025

Should also set mayLoad and mayStore?

[skan]

llvm/lib/Target/X86/X86InstrInfo.td

3025

Yeah, I think so.

3028

Could you use "GR32:$dstsrc1, i32mem:$dstsrc2" instead?

[FreddyYe]

Address comments. THX for review!

[FreddyYe]

llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp

1453–1455

We cannot do ++ before emitMemModRMByte, so there is a implicit +1 for that, like other cases.

llvm/lib/Target/X86/X86InstrInfo.td

3028

OK, I'm ok to either. Then line below should do an reversion.

[FreddyYe]

Rebase.

[FreddyYe]

Corrected comments.

[skan]

LGTM

clang/docs/ReleaseNotes.rst

 
 X86 Support in Clang
 --------------------
 - Support ``-mindirect-branch-cs-prefix`` for call and jmp to indirect thunk.
 - Fix 32-bit ``__fastcall`` and ``__vectorcall`` ABI mismatch with MSVC.
 - Add ISA of ``AMX-FP16`` which support ``_tile_dpfp16ps``.
 - Switch ``AVX512-BF16`` intrinsics types from ``short`` to ``__bf16``.
 - Add support for ``PREFETCHI`` instructions.
+- Support ISA of ``CMPCCXADD``.
+  * Support intrinsic of ``__cmpccxadd_epi32``.
+  * Support intrinsic of ``__cmpccxadd_epi64``.
 
 DWARF Support in Clang
 ----------------------
 
 Arm and AArch64 Support in Clang
 --------------------------------
 
 - The target(..) function attributes for AArch64 now accept:

clang/include/clang/Basic/BuiltinsX86_64.def

 TARGET_BUILTIN(__builtin_ia32_tdpbssd, "vIUcIUcIUc", "n", "amx-int8")
 TARGET_BUILTIN(__builtin_ia32_tdpbsud, "vIUcIUcIUc", "n", "amx-int8")
 TARGET_BUILTIN(__builtin_ia32_tdpbusd, "vIUcIUcIUc", "n", "amx-int8")
 TARGET_BUILTIN(__builtin_ia32_tdpbuud, "vIUcIUcIUc", "n", "amx-int8")
 TARGET_BUILTIN(__builtin_ia32_tdpbf16ps, "vIUcIUcIUc", "n", "amx-bf16")
 TARGET_BUILTIN(__builtin_ia32_ptwrite64, "vUOi", "n", "ptwrite")
 
 TARGET_BUILTIN(__builtin_ia32_prefetchi, "vvC*Ui", "nc", "prefetchi")
+TARGET_BUILTIN(__builtin_ia32_cmpccxadd32, "Siv*SiSiIi", "n", "cmpccxadd")
+TARGET_BUILTIN(__builtin_ia32_cmpccxadd64, "SLLiv*SLLiSLLiIi", "n", "cmpccxadd")
 
 // AMX_FP16 FP16
 TARGET_BUILTIN(__builtin_ia32_tdpfp16ps, "vIUcIUcIUc", "n", "amx-fp16")
 
 #undef BUILTIN
 #undef TARGET_BUILTIN
 #undef TARGET_HEADER_BUILTIN

clang/include/clang/Driver/Options.td

 def mamx_bf16 : Flag<["-"], "mamx-bf16">, Group<m_x86_Features_Group>;
 def mno_amx_bf16 : Flag<["-"], "mno-amx-bf16">, Group<m_x86_Features_Group>;
 def mamx_fp16 : Flag<["-"], "mamx-fp16">, Group<m_x86_Features_Group>;
 def mno_amx_fp16 : Flag<["-"], "mno-amx-fp16">, Group<m_x86_Features_Group>;
 def mamx_int8 : Flag<["-"], "mamx-int8">, Group<m_x86_Features_Group>;
 def mno_amx_int8 : Flag<["-"], "mno-amx-int8">, Group<m_x86_Features_Group>;
 def mamx_tile : Flag<["-"], "mamx-tile">, Group<m_x86_Features_Group>;
 def mno_amx_tile : Flag<["-"], "mno-amx-tile">, Group<m_x86_Features_Group>;
+def mcmpccxadd : Flag<["-"], "mcmpccxadd">, Group<m_x86_Features_Group>;
+def mno_cmpccxadd : Flag<["-"], "mno-cmpccxadd">, Group<m_x86_Features_Group>;
 def msse : Flag<["-"], "msse">, Group<m_x86_Features_Group>;
 def mno_sse : Flag<["-"], "mno-sse">, Group<m_x86_Features_Group>;
 def msse2 : Flag<["-"], "msse2">, Group<m_x86_Features_Group>;
 def mno_sse2 : Flag<["-"], "mno-sse2">, Group<m_x86_Features_Group>;
 def msse3 : Flag<["-"], "msse3">, Group<m_x86_Features_Group>;
 def mno_sse3 : Flag<["-"], "mno-sse3">, Group<m_x86_Features_Group>;
 def mssse3 : Flag<["-"], "mssse3">, Group<m_x86_Features_Group>;
 def mno_ssse3 : Flag<["-"], "mno-ssse3">, Group<m_x86_Features_Group>;

clang/lib/Basic/Targets/X86.h

class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
   bool HasWBNOINVD = false;
   bool HasWAITPKG = false;
   bool HasMOVDIRI = false;
   bool HasMOVDIR64B = false;
   bool HasPTWRITE = false;
   bool HasINVPCID = false;
   bool HasENQCMD = false;
   bool HasAMXFP16 = false;
+  bool HasCMPCCXADD = false;
   bool HasKL = false;      // For key locker
   bool HasWIDEKL = false; // For wide key locker
   bool HasHRESET = false;
   bool HasAVXVNNI = false;
   bool HasAMXTILE = false;
   bool HasAMXINT8 = false;
   bool HasAMXBF16 = false;
   bool HasSERIALIZE = false;

clang/lib/Basic/Targets/X86.cpp

for (const auto &Feature : Features) {
     } else if (Feature == "+amx-bf16") {
       HasAMXBF16 = true;
     } else if (Feature == "+amx-fp16") {
       HasAMXFP16 = true;
     } else if (Feature == "+amx-int8") {
       HasAMXINT8 = true;
     } else if (Feature == "+amx-tile") {
       HasAMXTILE = true;
+    } else if (Feature == "+cmpccxadd") {
+      HasCMPCCXADD = true;
     } else if (Feature == "+avxvnni") {
       HasAVXVNNI = true;
     } else if (Feature == "+serialize") {
       HasSERIALIZE = true;
     } else if (Feature == "+tsxldtrk") {
       HasTSXLDTRK = true;
     } else if (Feature == "+uintr") {
       HasUINTR = true;
void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
   if (HasAMXTILE)
     Builder.defineMacro("__AMXTILE__");
   if (HasAMXINT8)
     Builder.defineMacro("__AMXINT8__");
   if (HasAMXBF16)
     Builder.defineMacro("__AMXBF16__");
   if (HasAMXFP16)
     Builder.defineMacro("__AMXFP16__");
+  if (HasCMPCCXADD)
+    Builder.defineMacro("__CMPCCXADD__");
   if (HasAVXVNNI)
     Builder.defineMacro("__AVXVNNI__");
   if (HasSERIALIZE)
     Builder.defineMacro("__SERIALIZE__");
   if (HasTSXLDTRK)
     Builder.defineMacro("__TSXLDTRK__");
   if (HasUINTR)
     Builder.defineMacro("__UINTR__");
return llvm::StringSwitch<bool>(Name)
       .Case("avx512vp2intersect", true)
       .Case("avxvnni", true)
       .Case("bmi", true)
       .Case("bmi2", true)
       .Case("cldemote", true)
       .Case("clflushopt", true)
       .Case("clwb", true)
       .Case("clzero", true)
+      .Case("cmpccxadd", true)
       .Case("crc32", true)
       .Case("cx16", true)
       .Case("enqcmd", true)
       .Case("f16c", true)
       .Case("fma", true)
       .Case("fma4", true)
       .Case("fsgsbase", true)
       .Case("fxsr", true)
return llvm::StringSwitch<bool>(Name)
       .Case("wbnoinvd", true)
       .Case("waitpkg", true)
       .Case("x87", true)
       .Case("xop", true)
       .Case("xsave", true)
       .Case("xsavec", true)
       .Case("xsaves", true)
       .Case("xsaveopt", true)
       .Default(false);
 }
 
 bool X86TargetInfo::hasFeature(StringRef Feature) const {
   return llvm::StringSwitch<bool>(Feature)
       .Case("adx", HasADX)
       .Case("aes", HasAES)
       .Case("amx-bf16", HasAMXBF16)
       .Case("amx-fp16", HasAMXFP16)
return llvm::StringSwitch<bool>(Feature)
       .Case("avx512dq", HasAVX512DQ)
       .Case("avx512bitalg", HasAVX512BITALG)
       .Case("avx512bw", HasAVX512BW)
       .Case("avx512vl", HasAVX512VL)
       .Case("avx512vbmi", HasAVX512VBMI)
       .Case("avx512vbmi2", HasAVX512VBMI2)
       .Case("avx512ifma", HasAVX512IFMA)
       .Case("avx512vp2intersect", HasAVX512VP2INTERSECT)
       .Case("bmi", HasBMI)
       .Case("bmi2", HasBMI2)
       .Case("cldemote", HasCLDEMOTE)
       .Case("clflushopt", HasCLFLUSHOPT)
       .Case("clwb", HasCLWB)
       .Case("clzero", HasCLZERO)
+      .Case("cmpccxadd", HasCMPCCXADD)
       .Case("crc32", HasCRC32)
       .Case("cx8", HasCX8)
       .Case("cx16", HasCX16)
       .Case("enqcmd", HasENQCMD)
       .Case("f16c", HasF16C)
       .Case("fma", HasFMA)
       .Case("fma4", XOPLevel >= FMA4)
       .Case("fsgsbase", HasFSGSBASE)

clang/lib/Headers/CMakeLists.txt

# Intrinsics
   avxvnniintrin.h
   bmi2intrin.h
   bmiintrin.h
   cetintrin.h
   cldemoteintrin.h
   clflushoptintrin.h
   clwbintrin.h
   clzerointrin.h
+  cmpccxaddintrin.h
   crc32intrin.h
   emmintrin.h
   enqcmdintrin.h
   f16cintrin.h
   fma4intrin.h
   fmaintrin.h
   fxsrintrin.h
   gfniintrin.h

clang/lib/Headers/cmpccxaddintrin.h

+/*===--------------- cmpccxaddintrin.h - CMPCCXADD intrinsics--------------===
+ *
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===-----------------------------------------------------------------------===
+ */
+#ifndef __IMMINTRIN_H
+#error "Never use <cmpccxaddintrin.h> directly; include <immintrin.h> instead."
+#endif // __IMMINTRIN_H
+
+#ifndef __CMPCCXADDINTRIN_H
+#define __CMPCCXADDINTRIN_H
+#ifdef __x86_64__
+
+typedef enum {
+  _CMPCCX_O,   /* Overflow.  */
+  _CMPCCX_NO,  /* No overflow.  */
+  _CMPCCX_B,   /* Below.  */
+  _CMPCCX_NB,  /* Not below.  */
+  _CMPCCX_Z,   /* Zero.  */
+  _CMPCCX_NZ,  /* Not zero.  */
+  _CMPCCX_BE,  /* Below or equal.  */
+  _CMPCCX_NBE, /* Neither below nor equal.  */
+  _CMPCCX_S,   /* Sign.  */
+  _CMPCCX_NS,  /* No sign.  */
+  _CMPCCX_P,   /* Parity.  */
+  _CMPCCX_NP,  /* No parity.  */
+  _CMPCCX_L,   /* Less.  */
+  _CMPCCX_NL,  /* Not less.  */
+  _CMPCCX_LE,  /* Less or equal.  */
+  _CMPCCX_NLE, /* Neither less nor equal.  */
+} _CMPCCX_ENUM;
+
+/// Compares the value from the memory __A with the value of __B. If the
+/// specified condition __D is met, then add the third operand __C to the
+/// __A and write it into __A, else the value of __A is unchanged. The return
+/// value is the original value of __A.
+///
+/// \headerfile <immintrin.h>
+///
+/// This intrinsic corresponds to the \c CMPCCXADD instructions.
+///
+/// \param __A
+///    __A pointer specifying the memory address.
+///
+/// \param __B
+///   A integer operand.
+///
+/// \param __C
+///   A integer operand.
+///
+/// \param __D
+///   The specified condition.
+///
+/// \returns a integer which is the original value of first operand.
+
+#define __cmpccxadd_epi32(__A, __B, __C, __D)                                  \
+  ((int)(__builtin_ia32_cmpccxadd32((void *)(__A), (int)(__B), (int)(__C),     \
+                                    (int)(__D))))
+
+#define __cmpccxadd_epi64(__A, __B, __C, __D)                                  \
+  ((long long)(__builtin_ia32_cmpccxadd64((void *)(__A), (long long)(__B),     \
+                                          (long long)(__C), (int)(__D))))
+
+#endif // __x86_64__
+#endif // __CMPCCXADDINTRIN_H

clang/lib/Headers/cpuid.h

 #define bit_AMXBF16       0x00400000
 #define bit_AVX512FP16    0x00800000
 #define bit_AMXTILE       0x01000000
 #define bit_AMXINT8       0x02000000
 
 /* Features in %eax for leaf 7 sub-leaf 1 */
 #define bit_AVXVNNI       0x00000010
 #define bit_AVX512BF16    0x00000020
+#define bit_CMPCCXADD     0x00000080
 #define bit_AMXFP16       0x00200000
 #define bit_HRESET        0x00400000
 
 /* Features in %edx for leaf 7 sub-leaf 1 */
 #define bit_PREFETCHI     0x00004000
 
 /* Features in %eax for leaf 13 sub-leaf 1 */
 #define bit_XSAVEOPT    0x00000001

clang/lib/Headers/immintrin.h

 #include <invpcidintrin.h>
 #endif
 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) ||      \
     defined(__AMXFP16__)
 #include <amxfp16intrin.h>
 #endif
 
 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) ||      \
+    defined(__CMPCCXADD__)
+#include <cmpccxaddintrin.h>
+#endif
+
+#if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) ||      \
     defined(__KL__) || defined(__WIDEKL__)
 #include <keylockerintrin.h>
 #endif
 
 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) ||      \
     defined(__AMXTILE__) || defined(__AMXINT8__) || defined(__AMXBF16__)
 #include <amxintrin.h>
 #endif

clang/lib/Sema/SemaChecking.cpp

bool Sema::CheckX86BuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
   case X86::BI__builtin_ia32_reducesd_mask:
   case X86::BI__builtin_ia32_reducess_mask:
   case X86::BI__builtin_ia32_rndscalesd_round_mask:
   case X86::BI__builtin_ia32_rndscaless_round_mask:
   case X86::BI__builtin_ia32_rndscalesh_round_mask:
   case X86::BI__builtin_ia32_reducesh_mask:
     i = 4; l = 0; u = 255;
     break;
+  case X86::BI__builtin_ia32_cmpccxadd32:
+  case X86::BI__builtin_ia32_cmpccxadd64:
+    i = 3; l = 0; u = 15;
+    break;
   }
 
   // Note that we don't force a hard error on the range check here, allowing
   // template-generated or macro-generated dead code to potentially have out-of-
   // range values. These need to code generate, but don't need to necessarily
   // make any sense. We use a warning that defaults to an error.
   return SemaBuiltinConstantArgRange(TheCall, i, l, u, /*RangeIsError*/ false);
 }

clang/test/CodeGen/X86/cmpccxadd-builtins-error-32.c

+// RUN: %clang_cc1 %s -ffreestanding -triple=i386-unknown-unknown \
+// RUN: -target-feature +cmpccxadd  -emit-llvm -fsyntax-only -verify
+
+#include <immintrin.h>
+
+int test_cmpccxadd32(void *__A, int __B, int __C) {
+  return __cmpccxadd_epi32(__A, __B, __C, 0); // expected-error {{call to undeclared function '__cmpccxadd_epi32'}}
+}

clang/test/CodeGen/X86/cmpccxadd-builtins-error.c

+// RUN: %clang_cc1 %s -ffreestanding -triple=x86_64-unknown-unknown \
+// RUN: -target-feature +cmpccxadd  -emit-llvm -fsyntax-only -verify
+
+#include <immintrin.h>
+
+int test_cmpccxadd32(void *__A, int __B, int __C) {
+  return __cmpccxadd_epi32(__A, __B, __C, 16); // expected-error {{argument value 16 is outside the valid range [0, 15]}}
+}
+
+long long test_cmpccxadd64(void *__A, long long __B, long long __C) {
+  return __cmpccxadd_epi64(__A, __B, __C, 16); // expected-error {{argument value 16 is outside the valid range [0, 15]}}
+}

clang/test/CodeGen/X86/cmpccxadd-builtins.c

+// RUN: %clang_cc1 %s -ffreestanding -triple=x86_64-unknown-unknown -target-feature +cmpccxadd \
+// RUN: -emit-llvm -o - -Wall -Werror -pedantic -Wno-gnu-statement-expression | FileCheck %s
+
+#include <immintrin.h>
+#include <stddef.h>
+
+int test_cmpbexadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmpbexadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 0)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_O);
+}
+
+long long test_cmpbexadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmpbexadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 0)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_O);
+}
+
+int test_cmpbxadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmpbxadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 1)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_NO);
+}
+
+long long test_cmpbxadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmpbxadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 1)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_NO);
+}
+
+int test_cmplexadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmplexadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 2)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_B);
+}
+
+long long test_cmplexadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmplexadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 2)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_B);
+}
+
+int test_cmplxadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmplxadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 3)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_NB);
+}
+
+long long test_cmplxadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmplxadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 3)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_NB);
+}
+
+int test_cmpnbexadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmpnbexadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 4)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_Z);
+}
+
+long long test_cmpnbexadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmpnbexadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 4)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_Z);
+}
+
+int test_cmpnbxadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmpnbxadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 5)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_NZ);
+}
+
+long long test_cmpnbxadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmpnbxadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 5)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_NZ);
+}
+
+int test_cmpnlexadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmpnlexadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 6)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_BE);
+}
+
+long long test_cmpnlexadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmpnlexadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 6)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_BE);
+}
+
+int test_cmpnlxadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmpnlxadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 7)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_NBE);
+}
+
+long long test_cmpnlxadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmpnlxadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 7)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_NBE);
+}
+
+int test_cmpnoxadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmpnoxadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 8)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_S);
+}
+
+long long test_cmpnoxadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmpnoxadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 8)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_S);
+}
+
+int test_cmpnpxadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmpnpxadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 9)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_NS);
+}
+
+long long test_cmpnpxadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmpnpxadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 9)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_NS);
+}
+
+int test_cmpnsxadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmpnsxadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 10)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_P);
+}
+
+long long test_cmpnsxadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmpnsxadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 10)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_P);
+}
+
+int test_cmpnzxadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmpnzxadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 11)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_NP);
+}
+
+long long test_cmpnzxadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmpnzxadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 11)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_NP);
+}
+
+int test_cmpoxadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmpoxadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 12)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_L);
+}
+
+long long test_cmpoxadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmpoxadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 12)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_L);
+}
+
+int test_cmppxadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmppxadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 13)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_NL);
+}
+
+long long test_cmppxadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmppxadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 13)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_NL);
+}
+
+int test_cmpsxadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmpsxadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 14)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_LE);
+}
+
+long long test_cmpsxadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmpsxadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 14)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_LE);
+}
+
+int test_cmpzxadd32(void *__A, int __B, int __C) {
+  // CHECK-LABEL: @test_cmpzxadd32(
+  // CHECK: call i32 @llvm.x86.cmpccxadd32(ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 15)
+  return __cmpccxadd_epi32(__A, __B, __C, _CMPCCX_NLE);
+}
+
+long long test_cmpzxadd64(void *__A, long long __B, long long __C) {
+  // CHECK-LABEL: @test_cmpzxadd64(
+  // CHECK: call i64 @llvm.x86.cmpccxadd64(ptr %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i32 15)
+  return __cmpccxadd_epi64(__A, __B, __C, _CMPCCX_NLE);
+}

clang/test/Driver/x86-target-features.c

 // AVX-VNNI: "-target-feature" "+avxvnni"
 // NO-AVX-VNNI: "-target-feature" "-avxvnni"
 
 // RUN: %clang --target=i386 -march=i386 -mavx512fp16 %s -### 2>&1 | FileCheck -check-prefix=AVX512FP16 %s
 // RUN: %clang --target=i386 -march=i386 -mno-avx512fp16 %s -### 2>&1 | FileCheck -check-prefix=NO-AVX512FP16 %s
 // AVX512FP16: "-target-feature" "+avx512fp16"
 // NO-AVX512FP16: "-target-feature" "-avx512fp16"
 
+// RUN: %clang --target=x86_64 -mcmpccxadd %s -### -o %t.o 2>&1 | FileCheck -check-prefix=CMPCCXADD %s
+// RUN: %clang --target=x86_64 -mno-cmpccxadd %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-CMPCCXADD %s
+// CMPCCXADD: "-target-feature" "+cmpccxadd"
+// NO-CMPCCXADD: "-target-feature" "-cmpccxadd"
+
 // RUN: %clang --target=i386 -march=i386 -mcrc32 %s -### 2>&1 | FileCheck -check-prefix=CRC32 %s
 // RUN: %clang --target=i386 -march=i386 -mno-crc32 %s -### 2>&1 | FileCheck -check-prefix=NO-CRC32 %s
 // CRC32: "-target-feature" "+crc32"
 // NO-CRC32: "-target-feature" "-crc32"
 
 // RUN: %clang --target=i386 -march=i386 -mharden-sls=return %s -### -o %t.o 2>&1 | FileCheck -check-prefixes=SLS-RET,NO-SLS %s
 // RUN: %clang --target=i386 -march=i386 -mharden-sls=indirect-jmp %s -### -o %t.o 2>&1 | FileCheck -check-prefixes=SLS-IJMP,NO-SLS %s
 // RUN: %clang --target=i386 -march=i386 -mharden-sls=none -mharden-sls=all %s -### -o %t.o 2>&1 | FileCheck -check-prefixes=SLS-IJMP,SLS-RET %s
 // RUN: %clang --target=i386 -march=i386 -mharden-sls=all -mharden-sls=none %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-SLS %s
 // RUN: %clang --target=i386 -march=i386 -mharden-sls=return,indirect-jmp %s -### -o %t.o 2>&1 | FileCheck -check-prefix=BAD-SLS %s
 // NO-SLS-NOT: "+harden-sls-
 // SLS-RET-DAG: "-target-feature" "+harden-sls-ret"
 // SLS-IJMP-DAG: "-target-feature" "+harden-sls-ijmp"
 // NO-SLS-NOT: "+harden-sls-
 // BAD-SLS: unsupported argument '{{[^']+}}' to option '-mharden-sls='

clang/test/Preprocessor/x86_target_features.c

 // AVX512FP16NOAVX512BW-NOT: #define __AVX512BW__ 1
 // AVX512FP16NOAVX512BW-NOT: #define __AVX512FP16__ 1
 
 // RUN: %clang -target i386-unknown-unknown -march=atom -mavx512fp16 -mno-avx512dq -x c -E -dM -o - %s | FileCheck -match-full-lines --check-prefix=AVX512FP16NOAVX512DQ %s
 
 // AVX512FP16NOAVX512DQ-NOT: #define __AVX512DQ__ 1
 // AVX512FP16NOAVX512DQ-NOT: #define __AVX512FP16__ 1
 
+// RUN: %clang -target x86_64-unknown-linux-gnu -march=atom -mcmpccxadd -x c -E -dM -o - %s | FileCheck  -check-prefix=CMPCCXADD %s
+
+// CMPCCXADD: #define __CMPCCXADD__ 1
+
+// RUN: %clang -target x86_64-unknown-linux-gnu -march=atom -mno-cmpccxadd -x c -E -dM -o - %s | FileCheck  -check-prefix=NO-CMPCCXADD %s
+
+// NO-CMPCCXADD-NOT: #define __CMPCCXADD__ 1
+
 // RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mcrc32 -x c -E -dM -o - %s | FileCheck -check-prefix=CRC32 %s
 
 // CRC32: #define __CRC32__ 1
 
 // RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-crc32 -x c -E -dM -o - %s | FileCheck -check-prefix=NOCRC32 %s
 
 // NOCRC32-NOT: #define __CRC32__ 1
 
 // RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mrdpru -x c -E -dM -o - %s | FileCheck -check-prefix=RDPRU %s
 
 // RDPRU: #define __RDPRU__ 1
 
 // RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-rdpru -x c -E -dM -o - %s | FileCheck -check-prefix=NORDPRU %s
 
 // NORDPRU-NOT: #define __RDPRU__ 1

llvm/docs/ReleaseNotes.rst

* For MinGW, generate embedded ``-exclude-symbols:`` directives for symbols
   file formats.
 
 Changes to the X86 Backend
 --------------------------
 
 * Add support for the ``RDMSRLIST and WRMSRLIST`` instructions.
 * Add support for the ``WRMSRNS`` instruction.
 * Support ISA of ``AMX-FP16`` which contains ``tdpfp16ps`` instruction.
+* Support ISA of ``CMPCCXADD``.
 
 Changes to the OCaml bindings
 -----------------------------
 
 
 Changes to the C API
 --------------------
 

llvm/include/llvm/IR/IntrinsicsX86.td

def int_x86_tdpbf16ps_internal :
                          llvm_x86amx_ty, llvm_x86amx_ty,
                          llvm_x86amx_ty], []>;
   def int_x86_cast_vector_to_tile:
               Intrinsic<[llvm_x86amx_ty], [llvm_anyvector_ty], [IntrNoMem]>;
   def int_x86_cast_tile_to_vector:
               Intrinsic<[llvm_anyvector_ty], [llvm_x86amx_ty], [IntrNoMem]>;
 }
 
+let TargetPrefix = "x86" in {
+def int_x86_cmpccxadd32
+    : ClangBuiltin<"__builtin_ia32_cmpccxadd32">,
+      Intrinsic<[llvm_i32_ty],
+                [llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
+                [IntrArgMemOnly, ImmArg<ArgIndex<3>>]>;
+
+def int_x86_cmpccxadd64
+    : ClangBuiltin<"__builtin_ia32_cmpccxadd64">,
+      Intrinsic<[llvm_i64_ty],
+                [llvm_ptr_ty, llvm_i64_ty, llvm_i64_ty, llvm_i32_ty],
+                [IntrArgMemOnly, ImmArg<ArgIndex<3>>]>;
+}
 //===----------------------------------------------------------------------===//
 let TargetPrefix = "x86" in {
 // AMX_FP16 - Intel FP16 AMX extensions
   def int_x86_tdpfp16ps : ClangBuiltin<"__builtin_ia32_tdpfp16ps">,
                           Intrinsic<[], [llvm_i8_ty, llvm_i8_ty, llvm_i8_ty],
                                     [ImmArg<ArgIndex<0>>,
                                     ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
 }

llvm/include/llvm/Support/X86TargetParser.def

 X86_FEATURE       (X87,             "x87")
 X86_FEATURE       (XSAVE,           "xsave")
 X86_FEATURE       (XSAVEC,          "xsavec")
 X86_FEATURE       (XSAVEOPT,        "xsaveopt")
 X86_FEATURE       (XSAVES,          "xsaves")
 X86_FEATURE       (HRESET,          "hreset")
 X86_FEATURE       (AVX512FP16,      "avx512fp16")
 X86_FEATURE       (AMX_FP16,        "amx-fp16")
+X86_FEATURE       (CMPCCXADD,       "cmpccxadd")
 X86_FEATURE       (AVXVNNI,         "avxvnni")
 // These features aren't really CPU features, but the frontend can set them.
 X86_FEATURE       (RETPOLINE_EXTERNAL_THUNK,    "retpoline-external-thunk")
 X86_FEATURE       (RETPOLINE_INDIRECT_BRANCHES, "retpoline-indirect-branches")
 X86_FEATURE       (RETPOLINE_INDIRECT_CALLS,    "retpoline-indirect-calls")
 X86_FEATURE       (LVI_CFI,                     "lvi-cfi")
 X86_FEATURE       (LVI_LOAD_HARDENING,          "lvi-load-hardening")
 #undef X86_FEATURE_COMPAT

llvm/lib/Support/Host.cpp

#endif
   Features["avx512fp16"] = HasLeaf7 && ((EDX >> 23) & 1) && HasAVX512Save;
   Features["amx-tile"]   = HasLeaf7 && ((EDX >> 24) & 1) && HasAMXSave;
   Features["amx-int8"]   = HasLeaf7 && ((EDX >> 25) & 1) && HasAMXSave;
   bool HasLeaf7Subleaf1 =
       MaxLevel >= 7 && !getX86CpuIDAndInfoEx(0x7, 0x1, &EAX, &EBX, &ECX, &EDX);
   Features["avxvnni"]    = HasLeaf7Subleaf1 && ((EAX >> 4) & 1) && HasAVXSave;
   Features["avx512bf16"] = HasLeaf7Subleaf1 && ((EAX >> 5) & 1) && HasAVX512Save;
   Features["amx-fp16"]   = HasLeaf7Subleaf1 && ((EAX >> 21) & 1) && HasAMXSave;
+  Features["cmpccxadd"]  = HasLeaf7Subleaf1 && ((EAX >> 7) & 1);
   Features["hreset"]     = HasLeaf7Subleaf1 && ((EAX >> 22) & 1);
   Features["prefetchi"]  = HasLeaf7Subleaf1 && ((EDX >> 14) & 1);
 
   bool HasLeafD = MaxLevel >= 0xd &&
                   !getX86CpuIDAndInfoEx(0xd, 0x1, &EAX, &EBX, &ECX, &EDX);
 
   // Only enable XSAVE if OS has enabled support for saving YMM state.
   Features["xsaveopt"] = HasLeafD && ((EAX >> 0) & 1) && HasAVXSave;

llvm/lib/Support/X86TargetParser.cpp

 // AMX Features
 constexpr FeatureBitset ImpliedFeaturesAMX_TILE = {};
 constexpr FeatureBitset ImpliedFeaturesAMX_BF16 = FeatureAMX_TILE;
 constexpr FeatureBitset ImpliedFeaturesAMX_FP16 = FeatureAMX_TILE;
 constexpr FeatureBitset ImpliedFeaturesAMX_INT8 = FeatureAMX_TILE;
 constexpr FeatureBitset ImpliedFeaturesHRESET = {};
 
 constexpr FeatureBitset ImpliedFeaturesPREFETCHI = {};
+constexpr FeatureBitset ImpliedFeaturesCMPCCXADD = {};
 constexpr FeatureBitset ImpliedFeaturesAVX512FP16 =
     FeatureAVX512BW | FeatureAVX512DQ | FeatureAVX512VL;
 // Key Locker Features
 constexpr FeatureBitset ImpliedFeaturesKL = FeatureSSE2;
 constexpr FeatureBitset ImpliedFeaturesWIDEKL = FeatureKL;
 
 // AVXVNNI Features
 constexpr FeatureBitset ImpliedFeaturesAVXVNNI = FeatureAVX2;

llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h

enum : uint64_t {
     /// AddCCFrm - This form is used for Jcc that encode the condition code
     /// in the lower 4 bits of the opcode.
     AddCCFrm = 9,
 
     /// PrefixByte - This form is used for instructions that represent a prefix
     /// byte like data16 or rep.
     PrefixByte = 10,
 
+    /// MRMDestMem4VOp3CC - This form is used for instructions that use the Mod/RM
+    /// byte to specify a destination which in this case is memory and operand 3
+    /// with VEX.VVVV, and also encodes a condition code.
+    MRMDestMem4VOp3CC = 20,
+
     /// MRM[0-7][rm] - These forms are used to represent instructions that use
     /// a Mod/RM byte, and use the middle field to hold extended opcode
     /// information.  In the intel manual these are represented as /0, /1, ...
     ///
 
     // Instructions operate on a register Reg/Opcode operand not the r/m field.
     MRMr0 = 21,
 
inline unsigned getOperandBias(const MCInstrDesc& Desc) {
     switch (NumDefs) {
     default: llvm_unreachable("Unexpected number of defs");
     case 0:
       return 0;
     case 1:
       // Common two addr case.
       if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0)
         return 1;
       // Check for AVX-512 scatter which has a TIED_TO in the second to last
       // operand.
       if (NumOps == 8 &&
           Desc.getOperandConstraint(6, MCOI::TIED_TO) == 0)
         return 1;
       return 0;
     case 2:
       // XCHG/XADD have two destinations and two sources.
       if (NumOps >= 4 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
           Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1)
         return 2;
inline int getMemoryOperandNo(uint64_t TSFlags) {
     case X86II::MRMDestMemFSIB:
       return 0;
     case X86II::MRMSrcMem:
     case X86II::MRMSrcMemFSIB:
       // Start from 1, skip any registers encoded in VEX_VVVV or I8IMM, or a
       // mask register.
       return 1 + HasVEX_4V + HasEVEX_K;
     case X86II::MRMSrcMem4VOp3:
       // Skip registers encoded in reg.
       return 1 + HasEVEX_K;
     case X86II::MRMSrcMemOp4:
       // Skip registers encoded in reg, VEX_VVVV, and I8IMM.
       return 3;
     case X86II::MRMSrcMemCC:
+    case X86II::MRMDestMem4VOp3CC:
       // Start from 1, skip any registers encoded in VEX_VVVV or I8IMM, or a
       // mask register.
       return 1;
     case X86II::MRMDestReg:
     case X86II::MRMSrcReg:
     case X86II::MRMSrcReg4VOp3:
     case X86II::MRMSrcRegOp4:
     case X86II::MRMSrcRegCC:

llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp

 #include <cassert>
 #include <cstdint>
 
 using namespace llvm;
 
 void X86InstPrinterCommon::printCondCode(const MCInst *MI, unsigned Op,
                                          raw_ostream &O) {
   int64_t Imm = MI->getOperand(Op).getImm();
+  bool Flavor = MI->getOpcode() == X86::CMPCCXADDmr32 ||
+                MI->getOpcode() == X86::CMPCCXADDmr64;
   switch (Imm) {
   default: llvm_unreachable("Invalid condcode argument!");
   case    0: O << "o";  break;
   case    1: O << "no"; break;
   case    2: O << "b";  break;
-  case    3: O << "ae"; break;
-  case    4: O << "e";  break;
-  case    5: O << "ne"; break;
+  case    3: O << (Flavor ? "nb" : "ae"); break;
+  case    4: O << (Flavor ?  "z" :  "e"); break;
+  case    5: O << (Flavor ? "nz" : "ne"); break;
   case    6: O << "be"; break;
-  case    7: O << "a";  break;
+  case    7: O << (Flavor ? "nbe" : "a"); break;
   case    8: O << "s";  break;
   case    9: O << "ns"; break;
   case  0xa: O << "p";  break;
   case  0xb: O << "np"; break;
   case  0xc: O << "l";  break;
-  case  0xd: O << "ge"; break;
+  case  0xd: O << (Flavor ? "nl" : "ge"); break;
   case  0xe: O << "le"; break;
-  case  0xf: O << "g";  break;
+  case  0xf: O << (Flavor ? "nle" : "g"); break;
   }
 }
 
 void X86InstPrinterCommon::printSSEAVXCC(const MCInst *MI, unsigned Op,
                                          raw_ostream &O) {
   int64_t Imm = MI->getOperand(Op).getImm();
   switch (Imm) {
   default: llvm_unreachable("Invalid ssecc/avxcc argument!");

llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp

void X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
 
   // Classify VEX_B, VEX_4V, VEX_R, VEX_X
   unsigned NumOps = Desc.getNumOperands();
   unsigned CurOp = X86II::getOperandBias(Desc);
 
   switch (TSFlags & X86II::FormMask) {
   default:
     llvm_unreachable("Unexpected form in emitVEXOpcodePrefix!");
+  case X86II::MRMDestMem4VOp3CC: {
+    //  MemAddr, src1(ModR/M), src2(VEX_4V)
+    unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg);
+    VEX_B = ~(BaseRegEnc >> 3) & 1;
+    unsigned IndexRegEnc =
+        getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg);
+    VEX_X = ~(IndexRegEnc >> 3) & 1;
+
+    CurOp += X86::AddrNumOperands;
+
+    unsigned RegEnc = getX86RegEncoding(MI, ++CurOp);
+    VEX_R = ~(RegEnc >> 3) & 1;
+
+    unsigned VRegEnc = getX86RegEncoding(MI, CurOp++);
+    VEX_4V = ~VRegEnc & 0xf;
+    break;
+  }
   case X86II::MRM_C0:
   case X86II::RawFrm:
   case X86II::PrefixByte:
     break;
   case X86II::MRMDestMemFSIB:
   case X86II::MRMDestMem: {
     // MRMDestMem instructions forms:
     //  MemAddr, src1(ModR/M)
case X86II::MRMDestReg: {
     if (HasVEX_4V) // Skip 1st src (which is encoded in VEX_VVVV)
       ++SrcRegNum;
 
     emitRegModRMByte(MI.getOperand(CurOp),
                      getX86RegNum(MI.getOperand(SrcRegNum)), OS);
     CurOp = SrcRegNum + 1;
     break;
   }
+  case X86II::MRMDestMem4VOp3CC: {
+    unsigned CC = MI.getOperand(8).getImm();
+    emitByte(BaseOpcode + CC, OS);
+    unsigned SrcRegNum = CurOp + X86::AddrNumOperands;
+    emitMemModRMByte(MI, CurOp + 1, getX86RegNum(MI.getOperand(0)), TSFlags,
+                    HasREX, StartByte, OS, Fixups, STI, false);
+    CurOp = SrcRegNum + 3; // skip reg, VEX_V4 and CC
+    break;
+  }
   case X86II::MRMDestMemFSIB:
   case X86II::MRMDestMem: {
     emitByte(BaseOpcode, OS);
     unsigned SrcRegNum = CurOp + X86::AddrNumOperands;
 
     if (HasEVEX_K) // Skip writemask
       ++SrcRegNum;
 

llvm/lib/Target/X86/X86.td

 def FeatureAMXINT8     : SubtargetFeature<"amx-int8", "HasAMXINT8", "true",
                                       "Support AMX-INT8 instructions",
                                       [FeatureAMXTILE]>;
 def FeatureAMXBF16     : SubtargetFeature<"amx-bf16", "HasAMXBF16", "true",
                                       "Support AMX-BF16 instructions",
                                       [FeatureAMXTILE]>;
 def FeatureAMXFP16     : SubtargetFeature<"amx-fp16", "HasAMXFP16", "true",
                                       "Support AMX amx-fp16 instructions",
                                       [FeatureAMXTILE]>;
-
+def FeatureCMPCCXADD : SubtargetFeature<"cmpccxadd", "HasCMPCCXADD", "true",
+                                        "Support CMPCCXADD instructions">;
 def FeatureINVPCID : SubtargetFeature<"invpcid", "HasINVPCID", "true",
                                       "Invalidate Process-Context Identifier">;
 def FeatureSGX     : SubtargetFeature<"sgx", "HasSGX", "true",
                                       "Enable Software Guard Extensions">;
 def FeatureCLFLUSHOPT : SubtargetFeature<"clflushopt", "HasCLFLUSHOPT", "true",
                                       "Flush A Cache Line Optimized">;
 def FeatureCLWB    : SubtargetFeature<"clwb", "HasCLWB", "true",
                                       "Cache Line Write Back">;

llvm/lib/Target/X86/X86ISelLowering.h

enum NodeType : unsigned {
     AESDEC128KL,
     AESENC256KL,
     AESDEC256KL,
     AESENCWIDE128KL,
     AESDECWIDE128KL,
     AESENCWIDE256KL,
     AESDECWIDE256KL,
 
+    /// Compare and Add if Condition is Met. Compare value in operand 2 with
+    /// value in memory of operand 1. If condition of operand 4 is met, add value
+    /// operand 3 to m32 and write new value in operand 1. Operand 2 is
+    /// always updated with the original value from operand 1.
+    CMPCCXADD,
+
     // Save xmm argument registers to the stack, according to %al. An operator
     // is needed so that this can be expanded with control flow.
     VASTART_SAVE_XMM_REGS,
 
     // WARNING: Do not add anything in the end unless you want the node to
     // have memop! In fact, starting from FIRST_TARGET_MEMORY_OPCODE all
     // opcodes will be thought as target memory ops!
   };

llvm/lib/Target/X86/X86ISelLowering.cpp

if (!IntrData) {
     case Intrinsic::x86_aesencwide256kl:
     case Intrinsic::x86_aesdecwide256kl:
       Info.opc = ISD::INTRINSIC_W_CHAIN;
       Info.ptrVal = I.getArgOperand(0);
       Info.memVT = EVT::getIntegerVT(I.getType()->getContext(), 64);
       Info.align = Align(1);
       Info.flags |= MachineMemOperand::MOLoad;
       return true;
+    case Intrinsic::x86_cmpccxadd32:
+    case Intrinsic::x86_cmpccxadd64:
     case Intrinsic::x86_atomic_bts:
     case Intrinsic::x86_atomic_btc:
     case Intrinsic::x86_atomic_btr: {
       Info.opc = ISD::INTRINSIC_W_CHAIN;
       Info.ptrVal = I.getArgOperand(0);
       unsigned Size = I.getType()->getScalarSizeInBits();
       Info.memVT = EVT::getIntegerVT(I.getType()->getContext(), Size);
       Info.align = Align(Size);
       Info.flags |= MachineMemOperand::MOLoad | MachineMemOperand::MOStore |
                     MachineMemOperand::MOVolatile;
       return true;
     }
     }
     return false;
   }
 
   switch (IntrData->Type) {
   case TRUNCATE_TO_MEM_VI8:
   case TRUNCATE_TO_MEM_VI16:
   case TRUNCATE_TO_MEM_VI32: {
     Info.opc = ISD::INTRINSIC_VOID;
     Info.ptrVal = I.getArgOperand(0);
     MVT VT  = MVT::getVT(I.getArgOperand(1)->getType());
     MVT ScalarVT = MVT::INVALID_SIMPLE_VALUE_TYPE;
     if (IntrData->Type == TRUNCATE_TO_MEM_VI8)
       ScalarVT = MVT::i8;
     else if (IntrData->Type == TRUNCATE_TO_MEM_VI16)
       ScalarVT = MVT::i16;
     else if (IntrData->Type == TRUNCATE_TO_MEM_VI32)
       ScalarVT = MVT::i32;
 
case Intrinsic::x86_atomic_btr: {
       Chain = Res.getValue(1);
       Res = DAG.getZExtOrTrunc(getSETCC(X86::COND_B, Res, DL, DAG), DL, VT);
       unsigned Imm = cast<ConstantSDNode>(Op2)->getZExtValue();
       if (Imm)
         Res = DAG.getNode(ISD::SHL, DL, VT, Res,
                           DAG.getShiftAmountConstant(Imm, VT, DL));
       return DAG.getNode(ISD::MERGE_VALUES, DL, Op->getVTList(), Res, Chain);
     }
+    case Intrinsic::x86_cmpccxadd32:
+    case Intrinsic::x86_cmpccxadd64: {
+      SDLoc DL(Op);
+      SDValue Chain = Op.getOperand(0);
+      SDValue Addr = Op.getOperand(2);
+      SDValue Src1 = Op.getOperand(3);
+      SDValue Src2 = Op.getOperand(4);
+      SDValue CC = Op.getOperand(5);
+      MachineMemOperand *MMO = cast<MemIntrinsicSDNode>(Op)->getMemOperand();
+      SDValue Operation = DAG.getMemIntrinsicNode(
+          X86ISD::CMPCCXADD, DL, Op->getVTList(), {Chain, Addr, Src1, Src2, CC},
+          MVT::i32, MMO);
+      return Operation;
+    }
     }
     return SDValue();
   }
 
   SDLoc dl(Op);
   switch(IntrData->Type) {
   default: llvm_unreachable("Unknown Intrinsic Type");
   case RDSEED:
#define NODE_NAME_CASE(NODE) case X86ISD::NODE: return "X86ISD::" #NODE;
   NODE_NAME_CASE(AESENC128KL)
   NODE_NAME_CASE(AESDEC128KL)
   NODE_NAME_CASE(AESENC256KL)
   NODE_NAME_CASE(AESDEC256KL)
   NODE_NAME_CASE(AESENCWIDE128KL)
   NODE_NAME_CASE(AESDECWIDE128KL)
   NODE_NAME_CASE(AESENCWIDE256KL)
   NODE_NAME_CASE(AESDECWIDE256KL)
+  NODE_NAME_CASE(CMPCCXADD)
   NODE_NAME_CASE(TESTUI)
   }
   return nullptr;
 #undef NODE_NAME_CASE
 }
 
 /// Return true if the addressing mode represented by AM is legal for this
 /// target, for a load/store of the specified type.
 bool X86TargetLowering::isLegalAddressingMode(const DataLayout &DL,

llvm/lib/Target/X86/X86InstrFormats.td

 def RawFrmMemOffs : Format<3>;
 def RawFrmSrc     : Format<4>;
 def RawFrmDst     : Format<5>;
 def RawFrmDstSrc  : Format<6>;
 def RawFrmImm8    : Format<7>;
 def RawFrmImm16   : Format<8>;
 def AddCCFrm      : Format<9>;
 def PrefixByte    : Format<10>;
+def MRMDestMem4VOp3CC : Format<20>;
 def MRMr0          : Format<21>;
 def MRMSrcMemFSIB  : Format<22>;
 def MRMDestMemFSIB : Format<23>;
 def MRMDestMem     : Format<24>;
 def MRMSrcMem      : Format<25>;
 def MRMSrcMem4VOp3 : Format<26>;
 def MRMSrcMemOp4   : Format<27>;
 def MRMSrcMemCC    : Format<28>;

llvm/lib/Target/X86/X86InstrInfo.td

 def SDT_X86ENQCMD : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
                                          SDTCisPtrTy<1>, SDTCisSameAs<1, 2>]>;
 
 def SDT_X86AESENCDECKL : SDTypeProfile<2, 2, [SDTCisVT<0, v2i64>,
                                               SDTCisVT<1, i32>,
                                               SDTCisVT<2, v2i64>,
                                               SDTCisPtrTy<3>]>;
 
+def SDTX86Cmpccxadd : SDTypeProfile<1, 4, [SDTCisSameAs<0, 2>,
+                                           SDTCisPtrTy<1>, SDTCisSameAs<2, 3>,
+                                           SDTCisVT<4, i8>]>;
+
 def X86MemBarrier : SDNode<"X86ISD::MEMBARRIER", SDT_X86MEMBARRIER,
                             [SDNPHasChain,SDNPSideEffect]>;
 def X86MFence : SDNode<"X86ISD::MFENCE", SDT_X86MEMBARRIER,
                         [SDNPHasChain]>;
 
 
 def X86bsf     : SDNode<"X86ISD::BSF",      SDTUnaryArithWithFlags>;
 def X86bsr     : SDNode<"X86ISD::BSR",      SDTUnaryArithWithFlags>;
def X86aesdec128kl : SDNode<"X86ISD::AESDEC128KL", SDT_X86AESENCDECKL,
                              SDNPMemOperand]>;
 def X86aesenc256kl : SDNode<"X86ISD::AESENC256KL", SDT_X86AESENCDECKL,
                             [SDNPHasChain, SDNPMayLoad, SDNPSideEffect,
                              SDNPMemOperand]>;
 def X86aesdec256kl : SDNode<"X86ISD::AESDEC256KL", SDT_X86AESENCDECKL,
                             [SDNPHasChain, SDNPMayLoad, SDNPSideEffect,
                              SDNPMemOperand]>;
 
+def X86cmpccxadd : SDNode<"X86ISD::CMPCCXADD", SDTX86Cmpccxadd,
+                          [SDNPHasChain, SDNPMayLoad, SDNPMayStore,
+                           SDNPMemOperand]>;
+
 //===----------------------------------------------------------------------===//
 // X86 Operand Definitions.
 //
 
 // A version of ptr_rc which excludes SP, ESP, and RSP. This is used for
 // the index operand of an address, to conform to x86 encoding restrictions.
 def ptr_rc_nosp : PointerLikeRegClass<1>;
 

 def HasRDPRU     : Predicate<"Subtarget->hasRDPRU()">;
 def HasWAITPKG   : Predicate<"Subtarget->hasWAITPKG()">;
 def HasINVPCID   : Predicate<"Subtarget->hasINVPCID()">;
 def HasCX8       : Predicate<"Subtarget->hasCX8()">;
 def HasCX16      : Predicate<"Subtarget->hasCX16()">;
 def HasPCONFIG   : Predicate<"Subtarget->hasPCONFIG()">;
 def HasENQCMD    : Predicate<"Subtarget->hasENQCMD()">;
 def HasAMXFP16   : Predicate<"Subtarget->hasAMXFP16()">;
+def HasCMPCCXADD : Predicate<"Subtarget->hasCMPCCXADD()">;
 def HasKL        : Predicate<"Subtarget->hasKL()">;
 def HasWIDEKL    : Predicate<"Subtarget->hasWIDEKL()">;
 def HasHRESET    : Predicate<"Subtarget->hasHRESET()">;
 def HasSERIALIZE : Predicate<"Subtarget->hasSERIALIZE()">;
 def HasTSXLDTRK  : Predicate<"Subtarget->hasTSXLDTRK()">;
 def HasAMXTILE   : Predicate<"Subtarget->hasAMXTILE()">;
 def HasAMXBF16   : Predicate<"Subtarget->hasAMXBF16()">;
 def HasAMXINT8   : Predicate<"Subtarget->hasAMXINT8()">;

 let Predicates = [HasPREFETCHI, In64BitMode], SchedRW = [WriteLoad] in {
   def PREFETCHIT0 : I<0x18, MRM7m, (outs), (ins i8mem:$src),
     "prefetchit0\t$src", [(prefetch addr:$src, (i32 0), (i32 3), (i32 0))]>, TB;
   def PREFETCHIT1 : I<0x18, MRM6m, (outs), (ins i8mem:$src),
     "prefetchit1\t$src", [(prefetch addr:$src, (i32 0), (i32 2), (i32 0))]>, TB;
 }
 
 //===----------------------------------------------------------------------===//
+// CMPCCXADD Instructions
+//
+let isCodeGenOnly = 1, ForceDisassemble = 1, mayLoad = 1, mayStore = 1,
+    Predicates = [HasCMPCCXADD, In64BitMode], Defs = [EFLAGS],
+    Constraints = "$dstsrc1 = $dst" in {
+def CMPCCXADDmr32 : I<0xe0, MRMDestMem4VOp3CC, (outs GR32:$dst),
+          (ins GR32:$dstsrc1, i32mem:$dstsrc2, GR32:$src3, ccode:$cond),
+          "cmp${cond}xadd\t{$src3, $dst, $dstsrc2|$dstsrc2, $dst, $src3}",
+          [(set GR32:$dst, (X86cmpccxadd addr:$dstsrc2,
+            GR32:$dstsrc1, GR32:$src3, timm:$cond))]>,
+          VEX_4V, T8PD, Sched<[WriteXCHG]>;
+
+def CMPCCXADDmr64 : I<0xe0, MRMDestMem4VOp3CC, (outs GR64:$dst),
+          (ins GR64:$dstsrc1, i64mem:$dstsrc2, GR64:$src3, ccode:$cond),
+          "cmp${cond}xadd\t{$src3, $dst, $dstsrc2|$dstsrc2, $dst, $src3}",
+          [(set GR64:$dst, (X86cmpccxadd addr:$dstsrc2,
+            GR64:$dstsrc1, GR64:$src3, timm:$cond))]>,
+          VEX_4V, VEX_W, T8PD, Sched<[WriteXCHG]>;
+}
+
+multiclass CMPCCXADD_Aliases<string Cond, int CC> {
+  def : InstAlias<"cmp"#Cond#"xadd"#"\t{$src3, $dst, $dstsrc2|$dstsrc2, $dst, $src3}",
+                  (CMPCCXADDmr32 GR32:$dst, i32mem:$dstsrc2, GR32:$src3, CC), 0>;
+  def : InstAlias<"cmp"#Cond#"xadd"#"\t{$src3, $dst, $dstsrc2|$dstsrc2, $dst, $src3}",
+                  (CMPCCXADDmr64 GR64:$dst, i64mem:$dstsrc2, GR64:$src3, CC), 0>;
+}
+
+defm : CMPCCXADD_Aliases<"o" ,  0>;
+defm : CMPCCXADD_Aliases<"no",  1>;
+defm : CMPCCXADD_Aliases<"b" ,  2>;
+defm : CMPCCXADD_Aliases<"ae",  3>;
+defm : CMPCCXADD_Aliases<"nb",  3>;
+defm : CMPCCXADD_Aliases<"e" ,  4>;
+defm : CMPCCXADD_Aliases<"z" ,  4>;
+defm : CMPCCXADD_Aliases<"ne",  5>;
+defm : CMPCCXADD_Aliases<"nz",  5>;
+defm : CMPCCXADD_Aliases<"be",  6>;
+defm : CMPCCXADD_Aliases<"nbe", 7>;
+defm : CMPCCXADD_Aliases<"a",   7>;
+defm : CMPCCXADD_Aliases<"s" ,  8>;
+defm : CMPCCXADD_Aliases<"ns",  9>;
+defm : CMPCCXADD_Aliases<"p" , 10>;
+defm : CMPCCXADD_Aliases<"np", 11>;
+defm : CMPCCXADD_Aliases<"l" , 12>;
+defm : CMPCCXADD_Aliases<"ge", 13>;
+defm : CMPCCXADD_Aliases<"nl", 13>;
+defm : CMPCCXADD_Aliases<"le", 14>;
+defm : CMPCCXADD_Aliases<"g",  15>;
+defm : CMPCCXADD_Aliases<"nle",15>;
+
+//===----------------------------------------------------------------------===//
 // Pattern fragments to auto generate TBM instructions.
 //===----------------------------------------------------------------------===//
 
 let Predicates = [HasTBM] in {
   // FIXME: patterns for the load versions are not implemented
   def : Pat<(and GR32:$src, (add GR32:$src, 1)),
             (BLCFILL32rr GR32:$src)>;
   def : Pat<(and GR64:$src, (add GR64:$src, 1)),

llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+cmpccxadd | FileCheck %s
+
+define dso_local i32 @test_cmpbexadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmpbexadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmpoxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe0,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 0)
+  ret i32 %0
+}
+
+declare i32 @llvm.x86.cmpccxadd32(i8*, i32, i32, i32 immarg)
+
+define dso_local i64 @test_cmpbexadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmpbexadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmpoxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe0,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 0)
+  ret i64 %0
+}
+
+declare i64 @llvm.x86.cmpccxadd64(i8*, i64, i64, i32 immarg)
+
+define dso_local i32 @test_cmpbxadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmpbxadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmpnoxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe1,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 1)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmpbxadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmpbxadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmpnoxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe1,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 1)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmplexadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmplexadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmpbxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe2,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 2)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmplexadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmplexadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmpbxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe2,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 2)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmplxadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmplxadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmpnbxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe3,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 3)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmplxadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmplxadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmpnbxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe3,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 3)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmpnbexadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmpnbexadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmpzxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe4,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 4)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmpnbexadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmpnbexadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmpzxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe4,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 4)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmpnbxadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmpnbxadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmpnzxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe5,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 5)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmpnbxadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmpnbxadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmpnzxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe5,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 5)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmpnlexadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmpnlexadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmpbexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe6,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 6)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmpnlexadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmpnlexadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmpbexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe6,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 6)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmpnlxadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmpnlxadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmpnbexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe7,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 7)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmpnlxadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmpnlxadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmpnbexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe7,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 7)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmpnoxadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmpnoxadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmpsxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe8,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 8)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmpnoxadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmpnoxadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmpsxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe8,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 8)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmpnpxadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmpnpxadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmpnsxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe9,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 9)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmpnpxadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmpnpxadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmpnsxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe9,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 9)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmpnsxadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmpnsxadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmppxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xea,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 10)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmpnsxadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmpnsxadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmppxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xea,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 10)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmpnzxadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmpnzxadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmpnpxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xeb,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 11)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmpnzxadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmpnzxadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmpnpxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xeb,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 11)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmpoxadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmpoxadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmplxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xec,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 12)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmpoxadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmpoxadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmplxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xec,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 12)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmppxadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmppxadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmpnlxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xed,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 13)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmppxadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmppxadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmpnlxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xed,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 13)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmpsxadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmpsxadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmplexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xee,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 14)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmpsxadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmpsxadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmplexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xee,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 14)
+  ret i64 %0
+}
+
+define dso_local i32 @test_cmpzxadd32(i8* %__A, i32 %__B, i32 %__C) nounwind {
+; CHECK-LABEL: test_cmpzxadd32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
+; CHECK-NEXT:    cmpnlexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xef,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i32 @llvm.x86.cmpccxadd32(i8* %__A, i32 %__B, i32 %__C, i32 15)
+  ret i32 %0
+}
+
+define dso_local i64 @test_cmpzxadd64(i8* %__A, i64 %__B, i64 %__C) nounwind {
+; CHECK-LABEL: test_cmpzxadd64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; CHECK-NEXT:    cmpnlexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xef,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
+entry:
+  %0 = tail call i64 @llvm.x86.cmpccxadd64(i8* %__A, i64 %__B, i64 %__C, i32 15)
+  ret i64 %0
+}

llvm/test/MC/Disassembler/X86/cmpccxadd-64.txt

+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT:   cmpbexadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmpbexadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xe6,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpbexadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmpbexadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xe6,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpbexadd  %eax, %ecx, (%rip)
+# INTEL: cmpbexadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xe6,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpbexadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmpbexadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xe6,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmpbexadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmpbexadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xe6,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmpbexadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmpbexadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xe6,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmpbexadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmpbexadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xe6,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpbexadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmpbexadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xe6,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpbexadd  %r10, %r9, (%rip)
+# INTEL: cmpbexadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xe6,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpbexadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmpbexadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xe6,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmpbexadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmpbexadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xe6,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmpbexadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmpbexadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xe6,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmpbxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmpbxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xe2,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpbxadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmpbxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xe2,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpbxadd  %eax, %ecx, (%rip)
+# INTEL: cmpbxadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xe2,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpbxadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmpbxadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xe2,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmpbxadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmpbxadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xe2,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmpbxadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmpbxadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xe2,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmpbxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmpbxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xe2,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpbxadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmpbxadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xe2,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpbxadd  %r10, %r9, (%rip)
+# INTEL: cmpbxadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xe2,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpbxadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmpbxadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xe2,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmpbxadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmpbxadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xe2,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmpbxadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmpbxadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xe2,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmplexadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmplexadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xee,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmplexadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmplexadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xee,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmplexadd  %eax, %ecx, (%rip)
+# INTEL: cmplexadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xee,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmplexadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmplexadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xee,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmplexadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmplexadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xee,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmplexadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmplexadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xee,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmplexadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmplexadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xee,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmplexadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmplexadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xee,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmplexadd  %r10, %r9, (%rip)
+# INTEL: cmplexadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xee,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmplexadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmplexadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xee,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmplexadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmplexadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xee,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmplexadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmplexadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xee,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmplxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmplxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xec,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmplxadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmplxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xec,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmplxadd  %eax, %ecx, (%rip)
+# INTEL: cmplxadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xec,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmplxadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmplxadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xec,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmplxadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmplxadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xec,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmplxadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmplxadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xec,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmplxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmplxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xec,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmplxadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmplxadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xec,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmplxadd  %r10, %r9, (%rip)
+# INTEL: cmplxadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xec,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmplxadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmplxadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xec,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmplxadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmplxadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xec,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmplxadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmplxadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xec,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmpnbexadd %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmpnbexadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xe7,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnbexadd %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmpnbexadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xe7,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnbexadd %eax, %ecx, (%rip)
+# INTEL: cmpnbexadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xe7,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnbexadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmpnbexadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xe7,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmpnbexadd %eax, %ecx, 508(%rcx)
+# INTEL: cmpnbexadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xe7,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmpnbexadd %eax, %ecx, -512(%rdx)
+# INTEL: cmpnbexadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xe7,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmpnbexadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmpnbexadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xe7,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnbexadd %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmpnbexadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xe7,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnbexadd %r10, %r9, (%rip)
+# INTEL: cmpnbexadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xe7,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnbexadd %r10, %r9, -256(,%rbp,2)
+# INTEL: cmpnbexadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xe7,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmpnbexadd %r10, %r9, 1016(%rcx)
+# INTEL: cmpnbexadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xe7,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmpnbexadd %r10, %r9, -1024(%rdx)
+# INTEL: cmpnbexadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xe7,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmpnbxadd %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmpnbxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xe3,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnbxadd %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmpnbxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xe3,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnbxadd %eax, %ecx, (%rip)
+# INTEL: cmpnbxadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xe3,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnbxadd %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmpnbxadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xe3,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmpnbxadd %eax, %ecx, 508(%rcx)
+# INTEL: cmpnbxadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xe3,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmpnbxadd %eax, %ecx, -512(%rdx)
+# INTEL: cmpnbxadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xe3,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmpnbxadd %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmpnbxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xe3,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnbxadd %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmpnbxadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xe3,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnbxadd %r10, %r9, (%rip)
+# INTEL: cmpnbxadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xe3,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnbxadd %r10, %r9, -256(,%rbp,2)
+# INTEL: cmpnbxadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xe3,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmpnbxadd %r10, %r9, 1016(%rcx)
+# INTEL: cmpnbxadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xe3,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmpnbxadd %r10, %r9, -1024(%rdx)
+# INTEL: cmpnbxadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xe3,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmpnlexadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmpnlexadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xef,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnlexadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmpnlexadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xef,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnlexadd  %eax, %ecx, (%rip)
+# INTEL: cmpnlexadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xef,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnlexadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmpnlexadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xef,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmpnlexadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmpnlexadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xef,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmpnlexadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmpnlexadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xef,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmpnlexadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmpnlexadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xef,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnlexadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmpnlexadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xef,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnlexadd  %r10, %r9, (%rip)
+# INTEL: cmpnlexadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xef,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnlexadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmpnlexadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xef,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmpnlexadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmpnlexadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xef,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmpnlexadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmpnlexadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xef,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmpnlxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmpnlxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xed,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnlxadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmpnlxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xed,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnlxadd  %eax, %ecx, (%rip)
+# INTEL: cmpnlxadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xed,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnlxadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmpnlxadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xed,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmpnlxadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmpnlxadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xed,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmpnlxadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmpnlxadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xed,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmpnlxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmpnlxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xed,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnlxadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmpnlxadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xed,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnlxadd  %r10, %r9, (%rip)
+# INTEL: cmpnlxadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xed,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnlxadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmpnlxadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xed,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmpnlxadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmpnlxadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xed,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmpnlxadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmpnlxadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xed,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmpnoxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmpnoxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xe1,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnoxadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmpnoxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xe1,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnoxadd  %eax, %ecx, (%rip)
+# INTEL: cmpnoxadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xe1,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnoxadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmpnoxadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xe1,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmpnoxadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmpnoxadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xe1,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmpnoxadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmpnoxadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xe1,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmpnoxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmpnoxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xe1,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnoxadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmpnoxadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xe1,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnoxadd  %r10, %r9, (%rip)
+# INTEL: cmpnoxadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xe1,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnoxadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmpnoxadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xe1,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmpnoxadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmpnoxadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xe1,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmpnoxadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmpnoxadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xe1,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmpnpxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmpnpxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xeb,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnpxadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmpnpxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xeb,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnpxadd  %eax, %ecx, (%rip)
+# INTEL: cmpnpxadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xeb,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnpxadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmpnpxadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xeb,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmpnpxadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmpnpxadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xeb,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmpnpxadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmpnpxadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xeb,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmpnpxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmpnpxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xeb,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnpxadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmpnpxadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xeb,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnpxadd  %r10, %r9, (%rip)
+# INTEL: cmpnpxadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xeb,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnpxadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmpnpxadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xeb,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmpnpxadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmpnpxadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xeb,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmpnpxadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmpnpxadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xeb,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmpnsxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmpnsxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xe9,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnsxadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmpnsxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xe9,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnsxadd  %eax, %ecx, (%rip)
+# INTEL: cmpnsxadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xe9,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnsxadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmpnsxadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xe9,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmpnsxadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmpnsxadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xe9,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmpnsxadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmpnsxadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xe9,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmpnsxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmpnsxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xe9,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnsxadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmpnsxadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xe9,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnsxadd  %r10, %r9, (%rip)
+# INTEL: cmpnsxadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xe9,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnsxadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmpnsxadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xe9,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmpnsxadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmpnsxadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xe9,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmpnsxadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmpnsxadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xe9,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmpnzxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmpnzxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xe5,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnzxadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmpnzxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xe5,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnzxadd  %eax, %ecx, (%rip)
+# INTEL: cmpnzxadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xe5,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnzxadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmpnzxadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xe5,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmpnzxadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmpnzxadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xe5,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmpnzxadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmpnzxadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xe5,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmpnzxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmpnzxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xe5,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpnzxadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmpnzxadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xe5,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpnzxadd  %r10, %r9, (%rip)
+# INTEL: cmpnzxadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xe5,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpnzxadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmpnzxadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xe5,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmpnzxadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmpnzxadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xe5,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmpnzxadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmpnzxadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xe5,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmpoxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmpoxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xe0,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpoxadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmpoxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xe0,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpoxadd  %eax, %ecx, (%rip)
+# INTEL: cmpoxadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xe0,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpoxadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmpoxadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xe0,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmpoxadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmpoxadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xe0,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmpoxadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmpoxadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xe0,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmpoxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmpoxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xe0,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpoxadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmpoxadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xe0,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpoxadd  %r10, %r9, (%rip)
+# INTEL: cmpoxadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xe0,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpoxadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmpoxadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xe0,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmpoxadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmpoxadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xe0,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmpoxadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmpoxadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xe0,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmppxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmppxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xea,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmppxadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmppxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xea,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmppxadd  %eax, %ecx, (%rip)
+# INTEL: cmppxadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xea,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmppxadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmppxadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xea,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmppxadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmppxadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xea,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmppxadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmppxadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xea,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmppxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmppxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xea,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmppxadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmppxadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xea,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmppxadd  %r10, %r9, (%rip)
+# INTEL: cmppxadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xea,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmppxadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmppxadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xea,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmppxadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmppxadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xea,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmppxadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmppxadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xea,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmpsxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmpsxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xe8,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpsxadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmpsxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xe8,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpsxadd  %eax, %ecx, (%rip)
+# INTEL: cmpsxadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xe8,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpsxadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmpsxadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xe8,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmpsxadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmpsxadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xe8,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmpsxadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmpsxadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xe8,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmpsxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmpsxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xe8,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpsxadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmpsxadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xe8,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpsxadd  %r10, %r9, (%rip)
+# INTEL: cmpsxadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xe8,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpsxadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmpsxadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xe8,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmpsxadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmpsxadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xe8,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmpsxadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmpsxadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xe8,0x8a,0x00,0xfc,0xff,0xff
+
+# ATT:   cmpzxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+# INTEL: cmpzxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+0xc4,0xa2,0x79,0xe4,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpzxadd  %eax, %ecx, 291(%r8,%rax,4)
+# INTEL: cmpzxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+0xc4,0xc2,0x79,0xe4,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpzxadd  %eax, %ecx, (%rip)
+# INTEL: cmpzxadd dword ptr [rip], ecx, eax
+0xc4,0xe2,0x79,0xe4,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpzxadd  %eax, %ecx, -128(,%rbp,2)
+# INTEL: cmpzxadd dword ptr [2*rbp - 128], ecx, eax
+0xc4,0xe2,0x79,0xe4,0x0c,0x6d,0x80,0xff,0xff,0xff
+
+# ATT:   cmpzxadd  %eax, %ecx, 508(%rcx)
+# INTEL: cmpzxadd dword ptr [rcx + 508], ecx, eax
+0xc4,0xe2,0x79,0xe4,0x89,0xfc,0x01,0x00,0x00
+
+# ATT:   cmpzxadd  %eax, %ecx, -512(%rdx)
+# INTEL: cmpzxadd dword ptr [rdx - 512], ecx, eax
+0xc4,0xe2,0x79,0xe4,0x8a,0x00,0xfe,0xff,0xff
+
+# ATT:   cmpzxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+# INTEL: cmpzxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+0xc4,0x22,0xa9,0xe4,0x8c,0xf5,0x00,0x00,0x00,0x10
+
+# ATT:   cmpzxadd  %r10, %r9, 291(%r8,%rax,4)
+# INTEL: cmpzxadd qword ptr [r8 + 4*rax + 291], r9, r10
+0xc4,0x42,0xa9,0xe4,0x8c,0x80,0x23,0x01,0x00,0x00
+
+# ATT:   cmpzxadd  %r10, %r9, (%rip)
+# INTEL: cmpzxadd qword ptr [rip], r9, r10
+0xc4,0x62,0xa9,0xe4,0x0d,0x00,0x00,0x00,0x00
+
+# ATT:   cmpzxadd  %r10, %r9, -256(,%rbp,2)
+# INTEL: cmpzxadd qword ptr [2*rbp - 256], r9, r10
+0xc4,0x62,0xa9,0xe4,0x0c,0x6d,0x00,0xff,0xff,0xff
+
+# ATT:   cmpzxadd  %r10, %r9, 1016(%rcx)
+# INTEL: cmpzxadd qword ptr [rcx + 1016], r9, r10
+0xc4,0x62,0xa9,0xe4,0x89,0xf8,0x03,0x00,0x00
+
+# ATT:   cmpzxadd  %r10, %r9, -1024(%rdx)
+# INTEL: cmpzxadd qword ptr [rdx - 1024], r9, r10
+0xc4,0x62,0xa9,0xe4,0x8a,0x00,0xfc,0xff,0xff
+

llvm/test/MC/X86/cmpccxadd-att-64-alias.s

+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+
+// CHECK: cmpnbxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe3,0x0d,0x00,0x00,0x00,0x00]
+          cmpaexadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpzxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe4,0x0d,0x00,0x00,0x00,0x00]
+          cmpexadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpnzxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe5,0x0d,0x00,0x00,0x00,0x00]
+          cmpnexadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpnbexadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe7,0x0d,0x00,0x00,0x00,0x00]
+          cmpaxadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpnlxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xed,0x0d,0x00,0x00,0x00,0x00]
+          cmpgexadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpnlexadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xef,0x0d,0x00,0x00,0x00,0x00]
+          cmpgxadd  %eax, %ecx, (%rip)
+

llvm/test/MC/X86/cmpccxadd-att-64.s

+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+
+// CHECK: cmpbexadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe6,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpbexadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpbexadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe6,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpbexadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmpbexadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe6,0x0d,0x00,0x00,0x00,0x00]
+          cmpbexadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpbexadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe6,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpbexadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmpbexadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe6,0x89,0xfc,0x01,0x00,0x00]
+          cmpbexadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmpbexadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe6,0x8a,0x00,0xfe,0xff,0xff]
+          cmpbexadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmpbexadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe6,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpbexadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpbexadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe6,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpbexadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmpbexadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe6,0x0d,0x00,0x00,0x00,0x00]
+          cmpbexadd  %r10, %r9, (%rip)
+
+// CHECK: cmpbexadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe6,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpbexadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmpbexadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe6,0x89,0xf8,0x03,0x00,0x00]
+          cmpbexadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmpbexadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe6,0x8a,0x00,0xfc,0xff,0xff]
+          cmpbexadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmpbxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe2,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpbxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpbxadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe2,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpbxadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmpbxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe2,0x0d,0x00,0x00,0x00,0x00]
+          cmpbxadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpbxadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe2,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpbxadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmpbxadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe2,0x89,0xfc,0x01,0x00,0x00]
+          cmpbxadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmpbxadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe2,0x8a,0x00,0xfe,0xff,0xff]
+          cmpbxadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmpbxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe2,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpbxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpbxadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe2,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpbxadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmpbxadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe2,0x0d,0x00,0x00,0x00,0x00]
+          cmpbxadd  %r10, %r9, (%rip)
+
+// CHECK: cmpbxadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe2,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpbxadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmpbxadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe2,0x89,0xf8,0x03,0x00,0x00]
+          cmpbxadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmpbxadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe2,0x8a,0x00,0xfc,0xff,0xff]
+          cmpbxadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmplexadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xee,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmplexadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmplexadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xee,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmplexadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmplexadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xee,0x0d,0x00,0x00,0x00,0x00]
+          cmplexadd  %eax, %ecx, (%rip)
+
+// CHECK: cmplexadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xee,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmplexadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmplexadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xee,0x89,0xfc,0x01,0x00,0x00]
+          cmplexadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmplexadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xee,0x8a,0x00,0xfe,0xff,0xff]
+          cmplexadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmplexadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xee,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmplexadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmplexadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xee,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmplexadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmplexadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xee,0x0d,0x00,0x00,0x00,0x00]
+          cmplexadd  %r10, %r9, (%rip)
+
+// CHECK: cmplexadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xee,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmplexadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmplexadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xee,0x89,0xf8,0x03,0x00,0x00]
+          cmplexadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmplexadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xee,0x8a,0x00,0xfc,0xff,0xff]
+          cmplexadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmplxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xec,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmplxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmplxadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xec,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmplxadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmplxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xec,0x0d,0x00,0x00,0x00,0x00]
+          cmplxadd  %eax, %ecx, (%rip)
+
+// CHECK: cmplxadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xec,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmplxadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmplxadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xec,0x89,0xfc,0x01,0x00,0x00]
+          cmplxadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmplxadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xec,0x8a,0x00,0xfe,0xff,0xff]
+          cmplxadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmplxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xec,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmplxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmplxadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xec,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmplxadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmplxadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xec,0x0d,0x00,0x00,0x00,0x00]
+          cmplxadd  %r10, %r9, (%rip)
+
+// CHECK: cmplxadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xec,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmplxadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmplxadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xec,0x89,0xf8,0x03,0x00,0x00]
+          cmplxadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmplxadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xec,0x8a,0x00,0xfc,0xff,0xff]
+          cmplxadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmpnbexadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe7,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnbexadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnbexadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe7,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnbexadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmpnbexadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe7,0x0d,0x00,0x00,0x00,0x00]
+          cmpnbexadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpnbexadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe7,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnbexadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmpnbexadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe7,0x89,0xfc,0x01,0x00,0x00]
+          cmpnbexadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmpnbexadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe7,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnbexadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmpnbexadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe7,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnbexadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnbexadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe7,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnbexadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmpnbexadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe7,0x0d,0x00,0x00,0x00,0x00]
+          cmpnbexadd  %r10, %r9, (%rip)
+
+// CHECK: cmpnbexadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe7,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnbexadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmpnbexadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe7,0x89,0xf8,0x03,0x00,0x00]
+          cmpnbexadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmpnbexadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe7,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnbexadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmpnbxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe3,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnbxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnbxadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe3,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnbxadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmpnbxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe3,0x0d,0x00,0x00,0x00,0x00]
+          cmpnbxadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpnbxadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe3,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnbxadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmpnbxadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe3,0x89,0xfc,0x01,0x00,0x00]
+          cmpnbxadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmpnbxadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe3,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnbxadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmpnbxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe3,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnbxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnbxadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe3,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnbxadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmpnbxadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe3,0x0d,0x00,0x00,0x00,0x00]
+          cmpnbxadd  %r10, %r9, (%rip)
+
+// CHECK: cmpnbxadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe3,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnbxadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmpnbxadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe3,0x89,0xf8,0x03,0x00,0x00]
+          cmpnbxadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmpnbxadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe3,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnbxadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmpnlexadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xef,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnlexadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnlexadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xef,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnlexadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmpnlexadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xef,0x0d,0x00,0x00,0x00,0x00]
+          cmpnlexadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpnlexadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xef,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnlexadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmpnlexadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xef,0x89,0xfc,0x01,0x00,0x00]
+          cmpnlexadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmpnlexadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xef,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnlexadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmpnlexadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xef,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnlexadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnlexadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xef,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnlexadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmpnlexadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xef,0x0d,0x00,0x00,0x00,0x00]
+          cmpnlexadd  %r10, %r9, (%rip)
+
+// CHECK: cmpnlexadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xef,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnlexadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmpnlexadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xef,0x89,0xf8,0x03,0x00,0x00]
+          cmpnlexadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmpnlexadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xef,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnlexadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmpnlxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xed,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnlxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnlxadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xed,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnlxadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmpnlxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xed,0x0d,0x00,0x00,0x00,0x00]
+          cmpnlxadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpnlxadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xed,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnlxadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmpnlxadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xed,0x89,0xfc,0x01,0x00,0x00]
+          cmpnlxadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmpnlxadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xed,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnlxadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmpnlxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xed,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnlxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnlxadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xed,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnlxadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmpnlxadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xed,0x0d,0x00,0x00,0x00,0x00]
+          cmpnlxadd  %r10, %r9, (%rip)
+
+// CHECK: cmpnlxadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xed,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnlxadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmpnlxadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xed,0x89,0xf8,0x03,0x00,0x00]
+          cmpnlxadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmpnlxadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xed,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnlxadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmpnoxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe1,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnoxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnoxadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe1,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnoxadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmpnoxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe1,0x0d,0x00,0x00,0x00,0x00]
+          cmpnoxadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpnoxadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe1,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnoxadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmpnoxadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe1,0x89,0xfc,0x01,0x00,0x00]
+          cmpnoxadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmpnoxadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe1,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnoxadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmpnoxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe1,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnoxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnoxadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe1,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnoxadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmpnoxadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe1,0x0d,0x00,0x00,0x00,0x00]
+          cmpnoxadd  %r10, %r9, (%rip)
+
+// CHECK: cmpnoxadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe1,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnoxadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmpnoxadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe1,0x89,0xf8,0x03,0x00,0x00]
+          cmpnoxadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmpnoxadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe1,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnoxadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmpnpxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xeb,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnpxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnpxadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xeb,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnpxadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmpnpxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xeb,0x0d,0x00,0x00,0x00,0x00]
+          cmpnpxadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpnpxadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xeb,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnpxadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmpnpxadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xeb,0x89,0xfc,0x01,0x00,0x00]
+          cmpnpxadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmpnpxadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xeb,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnpxadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmpnpxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xeb,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnpxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnpxadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xeb,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnpxadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmpnpxadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xeb,0x0d,0x00,0x00,0x00,0x00]
+          cmpnpxadd  %r10, %r9, (%rip)
+
+// CHECK: cmpnpxadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xeb,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnpxadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmpnpxadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xeb,0x89,0xf8,0x03,0x00,0x00]
+          cmpnpxadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmpnpxadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xeb,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnpxadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmpnsxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe9,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnsxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnsxadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe9,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnsxadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmpnsxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe9,0x0d,0x00,0x00,0x00,0x00]
+          cmpnsxadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpnsxadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe9,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnsxadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmpnsxadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe9,0x89,0xfc,0x01,0x00,0x00]
+          cmpnsxadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmpnsxadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe9,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnsxadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmpnsxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe9,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnsxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnsxadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe9,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnsxadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmpnsxadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe9,0x0d,0x00,0x00,0x00,0x00]
+          cmpnsxadd  %r10, %r9, (%rip)
+
+// CHECK: cmpnsxadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe9,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnsxadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmpnsxadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe9,0x89,0xf8,0x03,0x00,0x00]
+          cmpnsxadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmpnsxadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe9,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnsxadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmpnzxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe5,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnzxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnzxadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe5,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnzxadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmpnzxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe5,0x0d,0x00,0x00,0x00,0x00]
+          cmpnzxadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpnzxadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe5,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnzxadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmpnzxadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe5,0x89,0xfc,0x01,0x00,0x00]
+          cmpnzxadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmpnzxadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe5,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnzxadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmpnzxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe5,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnzxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpnzxadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe5,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnzxadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmpnzxadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe5,0x0d,0x00,0x00,0x00,0x00]
+          cmpnzxadd  %r10, %r9, (%rip)
+
+// CHECK: cmpnzxadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe5,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnzxadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmpnzxadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe5,0x89,0xf8,0x03,0x00,0x00]
+          cmpnzxadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmpnzxadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe5,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnzxadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmpoxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe0,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpoxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpoxadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe0,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpoxadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmpoxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe0,0x0d,0x00,0x00,0x00,0x00]
+          cmpoxadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpoxadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe0,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpoxadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmpoxadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe0,0x89,0xfc,0x01,0x00,0x00]
+          cmpoxadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmpoxadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe0,0x8a,0x00,0xfe,0xff,0xff]
+          cmpoxadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmpoxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe0,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpoxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpoxadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe0,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpoxadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmpoxadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe0,0x0d,0x00,0x00,0x00,0x00]
+          cmpoxadd  %r10, %r9, (%rip)
+
+// CHECK: cmpoxadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe0,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpoxadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmpoxadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe0,0x89,0xf8,0x03,0x00,0x00]
+          cmpoxadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmpoxadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe0,0x8a,0x00,0xfc,0xff,0xff]
+          cmpoxadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmppxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xea,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmppxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmppxadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xea,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmppxadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmppxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xea,0x0d,0x00,0x00,0x00,0x00]
+          cmppxadd  %eax, %ecx, (%rip)
+
+// CHECK: cmppxadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xea,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmppxadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmppxadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xea,0x89,0xfc,0x01,0x00,0x00]
+          cmppxadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmppxadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xea,0x8a,0x00,0xfe,0xff,0xff]
+          cmppxadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmppxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xea,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmppxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmppxadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xea,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmppxadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmppxadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xea,0x0d,0x00,0x00,0x00,0x00]
+          cmppxadd  %r10, %r9, (%rip)
+
+// CHECK: cmppxadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xea,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmppxadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmppxadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xea,0x89,0xf8,0x03,0x00,0x00]
+          cmppxadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmppxadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xea,0x8a,0x00,0xfc,0xff,0xff]
+          cmppxadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmpsxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe8,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpsxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpsxadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe8,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpsxadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmpsxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe8,0x0d,0x00,0x00,0x00,0x00]
+          cmpsxadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpsxadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe8,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpsxadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmpsxadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe8,0x89,0xfc,0x01,0x00,0x00]
+          cmpsxadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmpsxadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe8,0x8a,0x00,0xfe,0xff,0xff]
+          cmpsxadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmpsxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe8,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpsxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpsxadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe8,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpsxadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmpsxadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe8,0x0d,0x00,0x00,0x00,0x00]
+          cmpsxadd  %r10, %r9, (%rip)
+
+// CHECK: cmpsxadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe8,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpsxadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmpsxadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe8,0x89,0xf8,0x03,0x00,0x00]
+          cmpsxadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmpsxadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe8,0x8a,0x00,0xfc,0xff,0xff]
+          cmpsxadd  %r10, %r9, -1024(%rdx)
+
+// CHECK: cmpzxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe4,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpzxadd  %eax, %ecx, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpzxadd  %eax, %ecx, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe4,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpzxadd  %eax, %ecx, 291(%r8,%rax,4)
+
+// CHECK: cmpzxadd  %eax, %ecx, (%rip)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe4,0x0d,0x00,0x00,0x00,0x00]
+          cmpzxadd  %eax, %ecx, (%rip)
+
+// CHECK: cmpzxadd  %eax, %ecx, -128(,%rbp,2)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe4,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpzxadd  %eax, %ecx, -128(,%rbp,2)
+
+// CHECK: cmpzxadd  %eax, %ecx, 508(%rcx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe4,0x89,0xfc,0x01,0x00,0x00]
+          cmpzxadd  %eax, %ecx, 508(%rcx)
+
+// CHECK: cmpzxadd  %eax, %ecx, -512(%rdx)
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe4,0x8a,0x00,0xfe,0xff,0xff]
+          cmpzxadd  %eax, %ecx, -512(%rdx)
+
+// CHECK: cmpzxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe4,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpzxadd  %r10, %r9, 268435456(%rbp,%r14,8)
+
+// CHECK: cmpzxadd  %r10, %r9, 291(%r8,%rax,4)
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe4,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpzxadd  %r10, %r9, 291(%r8,%rax,4)
+
+// CHECK: cmpzxadd  %r10, %r9, (%rip)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe4,0x0d,0x00,0x00,0x00,0x00]
+          cmpzxadd  %r10, %r9, (%rip)
+
+// CHECK: cmpzxadd  %r10, %r9, -256(,%rbp,2)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe4,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpzxadd  %r10, %r9, -256(,%rbp,2)
+
+// CHECK: cmpzxadd  %r10, %r9, 1016(%rcx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe4,0x89,0xf8,0x03,0x00,0x00]
+          cmpzxadd  %r10, %r9, 1016(%rcx)
+
+// CHECK: cmpzxadd  %r10, %r9, -1024(%rdx)
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe4,0x8a,0x00,0xfc,0xff,0xff]
+          cmpzxadd  %r10, %r9, -1024(%rdx)
+

llvm/test/MC/X86/cmpccxadd-intel-64-alias.s

+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: cmpnbxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe3,0x0d,0x00,0x00,0x00,0x00]
+          cmpaexadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpzxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe4,0x0d,0x00,0x00,0x00,0x00]
+          cmpexadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpnzxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe5,0x0d,0x00,0x00,0x00,0x00]
+          cmpnexadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpnbexadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe7,0x0d,0x00,0x00,0x00,0x00]
+          cmpaxadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpnlxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xed,0x0d,0x00,0x00,0x00,0x00]
+          cmpgexadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpnlexadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xef,0x0d,0x00,0x00,0x00,0x00]
+          cmpgxadd dword ptr [rip], ecx, eax

llvm/test/MC/X86/cmpccxadd-intel-64.s

+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: cmpbexadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe6,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpbexadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmpbexadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe6,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpbexadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmpbexadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe6,0x0d,0x00,0x00,0x00,0x00]
+          cmpbexadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpbexadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe6,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpbexadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmpbexadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe6,0x89,0xfc,0x01,0x00,0x00]
+          cmpbexadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmpbexadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe6,0x8a,0x00,0xfe,0xff,0xff]
+          cmpbexadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmpbexadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe6,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpbexadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmpbexadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe6,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpbexadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmpbexadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe6,0x0d,0x00,0x00,0x00,0x00]
+          cmpbexadd qword ptr [rip], r9, r10
+
+// CHECK: cmpbexadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe6,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpbexadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmpbexadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe6,0x89,0xf8,0x03,0x00,0x00]
+          cmpbexadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmpbexadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe6,0x8a,0x00,0xfc,0xff,0xff]
+          cmpbexadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmpbxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe2,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpbxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmpbxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe2,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpbxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmpbxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe2,0x0d,0x00,0x00,0x00,0x00]
+          cmpbxadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpbxadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe2,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpbxadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmpbxadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe2,0x89,0xfc,0x01,0x00,0x00]
+          cmpbxadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmpbxadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe2,0x8a,0x00,0xfe,0xff,0xff]
+          cmpbxadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmpbxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe2,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpbxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmpbxadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe2,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpbxadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmpbxadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe2,0x0d,0x00,0x00,0x00,0x00]
+          cmpbxadd qword ptr [rip], r9, r10
+
+// CHECK: cmpbxadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe2,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpbxadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmpbxadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe2,0x89,0xf8,0x03,0x00,0x00]
+          cmpbxadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmpbxadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe2,0x8a,0x00,0xfc,0xff,0xff]
+          cmpbxadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmplexadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xee,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmplexadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmplexadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xee,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmplexadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmplexadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xee,0x0d,0x00,0x00,0x00,0x00]
+          cmplexadd dword ptr [rip], ecx, eax
+
+// CHECK: cmplexadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xee,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmplexadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmplexadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xee,0x89,0xfc,0x01,0x00,0x00]
+          cmplexadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmplexadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xee,0x8a,0x00,0xfe,0xff,0xff]
+          cmplexadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmplexadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xee,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmplexadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmplexadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xee,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmplexadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmplexadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xee,0x0d,0x00,0x00,0x00,0x00]
+          cmplexadd qword ptr [rip], r9, r10
+
+// CHECK: cmplexadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xee,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmplexadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmplexadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xee,0x89,0xf8,0x03,0x00,0x00]
+          cmplexadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmplexadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xee,0x8a,0x00,0xfc,0xff,0xff]
+          cmplexadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmplxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xec,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmplxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmplxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xec,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmplxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmplxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xec,0x0d,0x00,0x00,0x00,0x00]
+          cmplxadd dword ptr [rip], ecx, eax
+
+// CHECK: cmplxadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xec,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmplxadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmplxadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xec,0x89,0xfc,0x01,0x00,0x00]
+          cmplxadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmplxadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xec,0x8a,0x00,0xfe,0xff,0xff]
+          cmplxadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmplxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xec,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmplxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmplxadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xec,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmplxadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmplxadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xec,0x0d,0x00,0x00,0x00,0x00]
+          cmplxadd qword ptr [rip], r9, r10
+
+// CHECK: cmplxadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xec,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmplxadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmplxadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xec,0x89,0xf8,0x03,0x00,0x00]
+          cmplxadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmplxadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xec,0x8a,0x00,0xfc,0xff,0xff]
+          cmplxadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmpnbexadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe7,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnbexadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmpnbexadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe7,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnbexadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmpnbexadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe7,0x0d,0x00,0x00,0x00,0x00]
+          cmpnbexadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpnbexadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe7,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnbexadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmpnbexadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe7,0x89,0xfc,0x01,0x00,0x00]
+          cmpnbexadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmpnbexadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe7,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnbexadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmpnbexadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe7,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnbexadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmpnbexadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe7,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnbexadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmpnbexadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe7,0x0d,0x00,0x00,0x00,0x00]
+          cmpnbexadd qword ptr [rip], r9, r10
+
+// CHECK: cmpnbexadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe7,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnbexadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmpnbexadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe7,0x89,0xf8,0x03,0x00,0x00]
+          cmpnbexadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmpnbexadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe7,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnbexadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmpnbxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe3,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnbxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmpnbxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe3,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnbxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmpnbxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe3,0x0d,0x00,0x00,0x00,0x00]
+          cmpnbxadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpnbxadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe3,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnbxadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmpnbxadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe3,0x89,0xfc,0x01,0x00,0x00]
+          cmpnbxadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmpnbxadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe3,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnbxadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmpnbxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe3,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnbxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmpnbxadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe3,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnbxadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmpnbxadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe3,0x0d,0x00,0x00,0x00,0x00]
+          cmpnbxadd qword ptr [rip], r9, r10
+
+// CHECK: cmpnbxadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe3,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnbxadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmpnbxadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe3,0x89,0xf8,0x03,0x00,0x00]
+          cmpnbxadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmpnbxadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe3,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnbxadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmpnlexadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xef,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnlexadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmpnlexadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xef,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnlexadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmpnlexadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xef,0x0d,0x00,0x00,0x00,0x00]
+          cmpnlexadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpnlexadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xef,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnlexadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmpnlexadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xef,0x89,0xfc,0x01,0x00,0x00]
+          cmpnlexadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmpnlexadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xef,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnlexadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmpnlexadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xef,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnlexadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmpnlexadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xef,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnlexadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmpnlexadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xef,0x0d,0x00,0x00,0x00,0x00]
+          cmpnlexadd qword ptr [rip], r9, r10
+
+// CHECK: cmpnlexadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xef,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnlexadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmpnlexadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xef,0x89,0xf8,0x03,0x00,0x00]
+          cmpnlexadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmpnlexadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xef,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnlexadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmpnlxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xed,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnlxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmpnlxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xed,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnlxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmpnlxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xed,0x0d,0x00,0x00,0x00,0x00]
+          cmpnlxadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpnlxadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xed,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnlxadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmpnlxadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xed,0x89,0xfc,0x01,0x00,0x00]
+          cmpnlxadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmpnlxadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xed,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnlxadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmpnlxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xed,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnlxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmpnlxadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xed,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnlxadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmpnlxadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xed,0x0d,0x00,0x00,0x00,0x00]
+          cmpnlxadd qword ptr [rip], r9, r10
+
+// CHECK: cmpnlxadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xed,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnlxadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmpnlxadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xed,0x89,0xf8,0x03,0x00,0x00]
+          cmpnlxadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmpnlxadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xed,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnlxadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmpnoxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe1,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnoxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmpnoxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe1,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnoxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmpnoxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe1,0x0d,0x00,0x00,0x00,0x00]
+          cmpnoxadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpnoxadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe1,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnoxadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmpnoxadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe1,0x89,0xfc,0x01,0x00,0x00]
+          cmpnoxadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmpnoxadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe1,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnoxadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmpnoxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe1,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnoxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmpnoxadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe1,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnoxadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmpnoxadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe1,0x0d,0x00,0x00,0x00,0x00]
+          cmpnoxadd qword ptr [rip], r9, r10
+
+// CHECK: cmpnoxadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe1,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnoxadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmpnoxadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe1,0x89,0xf8,0x03,0x00,0x00]
+          cmpnoxadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmpnoxadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe1,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnoxadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmpnpxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xeb,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnpxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmpnpxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xeb,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnpxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmpnpxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xeb,0x0d,0x00,0x00,0x00,0x00]
+          cmpnpxadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpnpxadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xeb,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnpxadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmpnpxadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xeb,0x89,0xfc,0x01,0x00,0x00]
+          cmpnpxadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmpnpxadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xeb,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnpxadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmpnpxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xeb,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnpxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmpnpxadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xeb,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnpxadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmpnpxadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xeb,0x0d,0x00,0x00,0x00,0x00]
+          cmpnpxadd qword ptr [rip], r9, r10
+
+// CHECK: cmpnpxadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xeb,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnpxadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmpnpxadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xeb,0x89,0xf8,0x03,0x00,0x00]
+          cmpnpxadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmpnpxadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xeb,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnpxadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmpnsxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe9,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnsxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmpnsxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe9,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnsxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmpnsxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe9,0x0d,0x00,0x00,0x00,0x00]
+          cmpnsxadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpnsxadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe9,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnsxadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmpnsxadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe9,0x89,0xfc,0x01,0x00,0x00]
+          cmpnsxadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmpnsxadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe9,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnsxadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmpnsxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe9,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnsxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmpnsxadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe9,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnsxadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmpnsxadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe9,0x0d,0x00,0x00,0x00,0x00]
+          cmpnsxadd qword ptr [rip], r9, r10
+
+// CHECK: cmpnsxadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe9,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnsxadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmpnsxadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe9,0x89,0xf8,0x03,0x00,0x00]
+          cmpnsxadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmpnsxadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe9,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnsxadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmpnzxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe5,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnzxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmpnzxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe5,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnzxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmpnzxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe5,0x0d,0x00,0x00,0x00,0x00]
+          cmpnzxadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpnzxadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe5,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpnzxadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmpnzxadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe5,0x89,0xfc,0x01,0x00,0x00]
+          cmpnzxadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmpnzxadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe5,0x8a,0x00,0xfe,0xff,0xff]
+          cmpnzxadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmpnzxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe5,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpnzxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmpnzxadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe5,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpnzxadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmpnzxadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe5,0x0d,0x00,0x00,0x00,0x00]
+          cmpnzxadd qword ptr [rip], r9, r10
+
+// CHECK: cmpnzxadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe5,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpnzxadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmpnzxadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe5,0x89,0xf8,0x03,0x00,0x00]
+          cmpnzxadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmpnzxadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe5,0x8a,0x00,0xfc,0xff,0xff]
+          cmpnzxadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmpoxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe0,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpoxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmpoxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe0,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpoxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmpoxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe0,0x0d,0x00,0x00,0x00,0x00]
+          cmpoxadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpoxadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe0,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpoxadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmpoxadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe0,0x89,0xfc,0x01,0x00,0x00]
+          cmpoxadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmpoxadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe0,0x8a,0x00,0xfe,0xff,0xff]
+          cmpoxadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmpoxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe0,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpoxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmpoxadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe0,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpoxadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmpoxadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe0,0x0d,0x00,0x00,0x00,0x00]
+          cmpoxadd qword ptr [rip], r9, r10
+
+// CHECK: cmpoxadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe0,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpoxadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmpoxadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe0,0x89,0xf8,0x03,0x00,0x00]
+          cmpoxadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmpoxadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe0,0x8a,0x00,0xfc,0xff,0xff]
+          cmpoxadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmppxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xea,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmppxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmppxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xea,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmppxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmppxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xea,0x0d,0x00,0x00,0x00,0x00]
+          cmppxadd dword ptr [rip], ecx, eax
+
+// CHECK: cmppxadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xea,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmppxadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmppxadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xea,0x89,0xfc,0x01,0x00,0x00]
+          cmppxadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmppxadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xea,0x8a,0x00,0xfe,0xff,0xff]
+          cmppxadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmppxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xea,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmppxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmppxadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xea,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmppxadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmppxadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xea,0x0d,0x00,0x00,0x00,0x00]
+          cmppxadd qword ptr [rip], r9, r10
+
+// CHECK: cmppxadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xea,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmppxadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmppxadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xea,0x89,0xf8,0x03,0x00,0x00]
+          cmppxadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmppxadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xea,0x8a,0x00,0xfc,0xff,0xff]
+          cmppxadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmpsxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe8,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpsxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmpsxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe8,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpsxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmpsxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe8,0x0d,0x00,0x00,0x00,0x00]
+          cmpsxadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpsxadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe8,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpsxadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmpsxadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe8,0x89,0xfc,0x01,0x00,0x00]
+          cmpsxadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmpsxadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe8,0x8a,0x00,0xfe,0xff,0xff]
+          cmpsxadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmpsxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe8,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpsxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmpsxadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe8,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpsxadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmpsxadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe8,0x0d,0x00,0x00,0x00,0x00]
+          cmpsxadd qword ptr [rip], r9, r10
+
+// CHECK: cmpsxadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe8,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpsxadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmpsxadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe8,0x89,0xf8,0x03,0x00,0x00]
+          cmpsxadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmpsxadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe8,0x8a,0x00,0xfc,0xff,0xff]
+          cmpsxadd qword ptr [rdx - 1024], r9, r10
+
+// CHECK: cmpzxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+// CHECK: encoding: [0xc4,0xa2,0x79,0xe4,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpzxadd dword ptr [rbp + 8*r14 + 268435456], ecx, eax
+
+// CHECK: cmpzxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+// CHECK: encoding: [0xc4,0xc2,0x79,0xe4,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpzxadd dword ptr [r8 + 4*rax + 291], ecx, eax
+
+// CHECK: cmpzxadd dword ptr [rip], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe4,0x0d,0x00,0x00,0x00,0x00]
+          cmpzxadd dword ptr [rip], ecx, eax
+
+// CHECK: cmpzxadd dword ptr [2*rbp - 128], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe4,0x0c,0x6d,0x80,0xff,0xff,0xff]
+          cmpzxadd dword ptr [2*rbp - 128], ecx, eax
+
+// CHECK: cmpzxadd dword ptr [rcx + 508], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe4,0x89,0xfc,0x01,0x00,0x00]
+          cmpzxadd dword ptr [rcx + 508], ecx, eax
+
+// CHECK: cmpzxadd dword ptr [rdx - 512], ecx, eax
+// CHECK: encoding: [0xc4,0xe2,0x79,0xe4,0x8a,0x00,0xfe,0xff,0xff]
+          cmpzxadd dword ptr [rdx - 512], ecx, eax
+
+// CHECK: cmpzxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+// CHECK: encoding: [0xc4,0x22,0xa9,0xe4,0x8c,0xf5,0x00,0x00,0x00,0x10]
+          cmpzxadd qword ptr [rbp + 8*r14 + 268435456], r9, r10
+
+// CHECK: cmpzxadd qword ptr [r8 + 4*rax + 291], r9, r10
+// CHECK: encoding: [0xc4,0x42,0xa9,0xe4,0x8c,0x80,0x23,0x01,0x00,0x00]
+          cmpzxadd qword ptr [r8 + 4*rax + 291], r9, r10
+
+// CHECK: cmpzxadd qword ptr [rip], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe4,0x0d,0x00,0x00,0x00,0x00]
+          cmpzxadd qword ptr [rip], r9, r10
+
+// CHECK: cmpzxadd qword ptr [2*rbp - 256], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe4,0x0c,0x6d,0x00,0xff,0xff,0xff]
+          cmpzxadd qword ptr [2*rbp - 256], r9, r10
+
+// CHECK: cmpzxadd qword ptr [rcx + 1016], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe4,0x89,0xf8,0x03,0x00,0x00]
+          cmpzxadd qword ptr [rcx + 1016], r9, r10
+
+// CHECK: cmpzxadd qword ptr [rdx - 1024], r9, r10
+// CHECK: encoding: [0xc4,0x62,0xa9,0xe4,0x8a,0x00,0xfc,0xff,0xff]
+          cmpzxadd qword ptr [rdx - 1024], r9, r10
+

llvm/utils/TableGen/X86RecognizableInstr.h

enum {
     RawFrmMemOffs = 3,
     RawFrmSrc     = 4,
     RawFrmDst     = 5,
     RawFrmDstSrc  = 6,
     RawFrmImm8    = 7,
     RawFrmImm16   = 8,
     AddCCFrm      = 9,
     PrefixByte    = 10,
+    MRMDestMem4VOp3CC = 20,
     MRMr0          = 21,
     MRMSrcMemFSIB  = 22,
     MRMDestMemFSIB = 23,
     MRMDestMem     = 24,
     MRMSrcMem      = 25,
     MRMSrcMem4VOp3 = 26,
     MRMSrcMemOp4   = 27,
     MRMSrcMemCC    = 28,

llvm/utils/TableGen/X86RecognizableInstr.cpp

case X86Local::MRMDestReg:
     if (HasVEX_4V)
       // FIXME: In AVX, the register below becomes the one encoded
       // in ModRMVEX and the one above the one in the VEX.VVVV field
       HANDLE_OPERAND(vvvvRegister)
 
     HANDLE_OPERAND(roRegister)
     HANDLE_OPTIONAL(immediate)
     break;
+  case X86Local::MRMDestMem4VOp3CC:
+    // Operand 1 is a register operand in the Reg/Opcode field.
+    // Operand 2 is a register operand in the R/M field.
+    // Operand 3 is VEX.vvvv
+    // Operand 4 is condition code.
+    assert(numPhysicalOperands == 4 &&
+           "Unexpected number of operands for MRMDestMem4VOp3CC");
+    HANDLE_OPERAND(roRegister)
+    HANDLE_OPERAND(memory)
+    HANDLE_OPERAND(vvvvRegister)
+    HANDLE_OPERAND(opcodeModifier)
+    break;
   case X86Local::MRMDestMem:
   case X86Local::MRMDestMemFSIB:
     // Operand 1 is a memory operand (possibly SIB-extended)
     // Operand 2 is a register operand in the Reg/Opcode field.
     // - In AVX, there is a register operand in the VEX.vvvv field here -
     // Operand 3 (optional) is an immediate.
     assert(numPhysicalOperands >= 2 + additionalOperands &&
            numPhysicalOperands <= 3 + additionalOperands &&
#define MAP(from, to)                     \
   case X86Local::MRMSrcReg4VOp3:
   case X86Local::MRMSrcRegOp4:
   case X86Local::MRMSrcRegCC:
   case X86Local::MRMXrCC:
   case X86Local::MRMXr:
     filter = std::make_unique<ModFilter>(true);
     break;
   case X86Local::MRMDestMem:
+  case X86Local::MRMDestMem4VOp3CC:
   case X86Local::MRMDestMemFSIB:
   case X86Local::MRMSrcMem:
   case X86Local::MRMSrcMemFSIB:
   case X86Local::MRMSrcMem4VOp3:
   case X86Local::MRMSrcMemOp4:
   case X86Local::MRMSrcMemCC:
   case X86Local::MRMXmCC:
   case X86Local::MRMXm:
#define MAP(from, to)                     \
   case X86Local::AdSize64: AddressSize = 64; break;
   }
 
   assert(opcodeType && "Opcode type not set");
   assert(filter && "Filter not set");
 
   if (Form == X86Local::AddRegFrm || Form == X86Local::MRMSrcRegCC ||
       Form == X86Local::MRMSrcMemCC || Form == X86Local::MRMXrCC ||
-      Form == X86Local::MRMXmCC || Form == X86Local::AddCCFrm) {
+      Form == X86Local::MRMXmCC || Form == X86Local::AddCCFrm ||
+      Form == X86Local::MRMDestMem4VOp3CC) {
     uint8_t Count = Form == X86Local::AddRegFrm ? 8 : 16;
     assert(((opcodeToSet % Count) == 0) && "ADDREG_FRM opcode not aligned");
 
     uint8_t currentOpcode;
 
     for (currentOpcode = opcodeToSet;
          currentOpcode < (uint8_t)(opcodeToSet + Count); ++currentOpcode)
       tables.setTableFields(*opcodeType, insnContext(), currentOpcode, *filter,