[VP][RISCV] Add vp.fshl/fshr and RISC-V support.
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Authored by fakepaper56 on Nov 20 2022, 8:02 AM.

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craig.topper
reames
frasercrmck
rogfer01

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rG70de0e014013: [VP][RISCV] Add vp.fshl/fshr and RISC-V support.

Summary

The patch made VectorLegalizer expand ISD::VP_FSHL and ISD::VP_FSHR to
achieve the codegen.

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Repository: rG LLVM Github Monorepo

Event Timeline

fakepaper56 created this revision.Nov 20 2022, 8:02 AM

Herald added a project: Restricted Project. · View Herald TranscriptNov 20 2022, 8:02 AM

Herald added subscribers: sunshaoce, VincentWu, StephenFan and 28 others. · View Herald Transcript

fakepaper56 requested review of this revision.Nov 20 2022, 8:02 AM

Herald added a project: Restricted Project. · View Herald TranscriptNov 20 2022, 8:02 AM

Herald added subscribers: llvm-commits, pcwang-thead, eopXD, MaskRay. · View Herald Transcript

Harbormaster completed remote builds in B198677: Diff 476748.Nov 20 2022, 9:58 AM

craig.topper added inline comments.Nov 30 2022, 7:06 PM

llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
741	Why 9? I only counted 7 instructions.
743	VP_FRINT?

fakepaper56 added inline comments.Dec 1 2022, 3:53 AM

llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
741	I am sorry it is my counting error.

Fix wrong cost model implement and add missing test cases for cost model.

fakepaper56 marked 2 inline comments as done.Dec 1 2022, 4:39 AM

Harbormaster completed remote builds in B200487: Diff 479244.Dec 1 2022, 6:38 AM

craig.topper added inline comments.Dec 6 2022, 4:10 PM

llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
533	i8 vector types are missing

Add missing cost model.

LGTM

This revision is now accepted and ready to land.Dec 6 2022, 7:09 PM

This revision was landed with ongoing or failed builds.Dec 6 2022, 8:16 PM

Closed by commit rG70de0e014013: [VP][RISCV] Add vp.fshl/fshr and RISC-V support. (authored by fakepaper56). · Explain Why

This revision was automatically updated to reflect the committed changes.

fakepaper56 added a commit: rG70de0e014013: [VP][RISCV] Add vp.fshl/fshr and RISC-V support..

kazu added a reverting change: rG7883e5b061bd: Revert "[VP][RISCV] Add vp.fshl/fshr and RISC-V support.".Dec 6 2022, 10:28 PM

Harbormaster completed remote builds in B201580: Diff 480733.Dec 7 2022, 4:48 AM

Revision Contents
Changeset List

Path

Size

llvm/

docs/

LangRef.rst

98 lines

include/

llvm/

IR/

Intrinsics.td

12 lines

VPIntrinsics.def

8 lines

lib/

CodeGen/

SelectionDAG/

LegalizeVectorOps.cpp

2 lines

LegalizeVectorTypes.cpp

4 lines

TargetLowering.cpp

60 lines

Target/

RISCV/

RISCVISelLowering.cpp

1 line

RISCVTargetTransformInfo.cpp

76 lines

test/

Analysis/

CostModel/

RISCV/

rvv-intrinsics.ll

244 lines

CodeGen/

RISCV/

rvv/

fixed-vectors-fshr-fshl-vp.ll

925 lines

fshr-fshl-vp.ll

1326 lines

unittests/

IR/

VPIntrinsicTest.cpp

4 lines

Diff 480759

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llvm/docs/LangRef.rst

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llvm/include/llvm/IR/Intrinsics.td

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llvm/include/llvm/IR/VPIntrinsics.def

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llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

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llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

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llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

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llvm/lib/Target/RISCV/RISCVISelLowering.cpp

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llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

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llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll

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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll

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llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll

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llvm/unittests/IR/VPIntrinsicTest.cpp

[VP][RISCV] Add vp.fshl/fshr and RISC-V support.ClosedPublicActions

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Diff Detail

Event Timeline

Revision ContentsChangeset List

Diff 480759

llvm/docs/LangRef.rst

llvm/include/llvm/IR/Intrinsics.td

llvm/include/llvm/IR/VPIntrinsics.def

llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll

llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll

llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll

llvm/unittests/IR/VPIntrinsicTest.cpp

[VP][RISCV] Add vp.fshl/fshr and RISC-V support.
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Revision Contents
Changeset List