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fhahn (Florian Hahn)
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Aug 18 2016, 4:39 AM (214 w, 19 h)

Recent Activity

Yesterday

fhahn added a comment to D88217: [GVN] Make propagateEquality look into the operand of freeze.

About pointer equality propagation - @fhahn added canReplacePointersIfEqual at https://reviews.llvm.org/D85524. Would it be good if I update GVN to use this function?

Thu, Sep 24, 1:30 PM · Restricted Project
fhahn committed rGd4ddf63fc40c: [SCEV] Use loop guard info when computing the max BE taken count in… (authored by fhahn).
[SCEV] Use loop guard info when computing the max BE taken count in…
Thu, Sep 24, 3:14 AM
fhahn closed D67178: [SCEV] Use loop guard info when computing the max BE taken count in howFarToZero..
Thu, Sep 24, 3:14 AM · Restricted Project
fhahn updated the diff for D67178: [SCEV] Use loop guard info when computing the max BE taken count in howFarToZero..

Another rebase just before committing.

Thu, Sep 24, 3:01 AM · Restricted Project
fhahn added inline comments to D88097: [llvm-readelf/obj] - Cleanup the code. NFCI..
Thu, Sep 24, 2:55 AM · Restricted Project
fhahn added a comment to D87691: [EarlyCSE] Small refactoring changes, NFC.
Thu, Sep 24, 1:21 AM · Restricted Project

Wed, Sep 23

fhahn requested review of D88167: [LoopDeletion] Forget loop before setting values to undef.
Wed, Sep 23, 10:13 AM · Restricted Project
fhahn requested review of D88166: [SCEV] Verify that all mapped SCEV AddRecs refer to valid loops..
Wed, Sep 23, 10:08 AM · Restricted Project
fhahn added a comment to D84679: [VPlan] Disconnect VPValue and VPUser..

Hmm. OK. I do strong believe that we should be moving towards def-use chains, so in general I'm glad to see that happening.

I'm less convinced about the multiple inheritance. That seems like an antipattern. We can likely make it work either way, but can you try and explain why you think that way is better? As opposed to making all VPRecipe's inherit from VPValue from VPRecipeBase? Perhaps I'm too stuck in the "llvm-ir" way of thinking, with VPValue being Value, VPUser being User, VPRecipeBase being Instruction and the individual recipes being the different instructions.

Wed, Sep 23, 8:36 AM · Restricted Project
fhahn committed rG31923f6b3603: [VPlan] Disconnect VPValue and VPUser. (authored by fhahn).
[VPlan] Disconnect VPValue and VPUser.
Wed, Sep 23, 6:55 AM
fhahn closed D84679: [VPlan] Disconnect VPValue and VPUser..
Wed, Sep 23, 6:55 AM · Restricted Project
fhahn added a comment to D87691: [EarlyCSE] Small refactoring changes, NFC.

I think it looks like this patch is causing EarlyCSE to crash with expensive checks enabled: http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-expensive/17662/consoleFull#-261651283a1ca8a51-895e-46c6-af87-ce24fa4cd561. This commit is the only CSE/MemorySSA related change in the build that started crashing.

Wed, Sep 23, 2:23 AM · Restricted Project

Tue, Sep 22

fhahn added a comment to rG8fdac7cb7abb: Revert D71539 "Recommit "[SCEV] Look through single value PHIs."".

The issue is with the new pass manager.

Ah that was probably why I didn't manage to reproduce it. Thank you very much for the reproducer below!

Tue, Sep 22, 12:40 PM
fhahn updated the diff for D84951: [LV] Try to sink users recursively for first-order recurrences..

Rebased, updated comment, added additional tests.

Tue, Sep 22, 12:33 PM · Restricted Project
fhahn added a comment to D84679: [VPlan] Disconnect VPValue and VPUser..

It would be great to have some concrete simple transforms using it as soon as its ready to make sure everything works well together, so if we could collaborate on that, that would be great!

Yeah, that sounds good. vmulh worked well I though, but I ended up making some fairly major modifications. And it did need to handle costing through vplan to really get anywhere. I will see if I can come up with anything for that too. I think just having a conversation about some of these design details is helpful in itself.

Tue, Sep 22, 12:16 PM · Restricted Project
fhahn updated the diff for D84679: [VPlan] Disconnect VPValue and VPUser..

Address Ayal's comments, thanks!

Tue, Sep 22, 8:37 AM · Restricted Project
fhahn committed rGc671e34bf2ae: [VPlan] Add dump() helper to VPValue & VPRecipeBase. (authored by fhahn).
[VPlan] Add dump() helper to VPValue & VPRecipeBase.
Tue, Sep 22, 7:55 AM
fhahn added a comment to D87867: [NFC][ScheduleDAG] Remove unused EntrySU SUnit.

I am totally fine with keeping this in-tree, even unused, if it helps several out-of-tree backends. Thanks for speaking up.

Maybe someone using it can provide an explanation of potential uses of this node as a comment in ScheduleDAG.h?

Tue, Sep 22, 6:55 AM · Restricted Project
fhahn added a comment to rG8fdac7cb7abb: Revert D71539 "Recommit "[SCEV] Look through single value PHIs."".

It would be great if you could share more details about how to reproduce the failure. I tried to reproduce with a stage-2 build with -DLLVM_ENABLE_MODULES=On, but check-clang passed. Could you share the file/IR causing the crash?

Tue, Sep 22, 6:23 AM
fhahn added inline comments to D70533: [AArch64] Fix a bug with jump table generation.
Tue, Sep 22, 6:06 AM · Restricted Project
fhahn added a reviewer for D88085: AArch64: avoid error when truncating MCExprs: ostannard.
Tue, Sep 22, 6:05 AM · Restricted Project
fhahn accepted D88085: AArch64: avoid error when truncating MCExprs.

It looks like it is indeed possible to generate fixup values that wrap around in valid LLVM IR and truncating the computed value to the fixup width should match the computation in LLVM IR.

Tue, Sep 22, 6:04 AM · Restricted Project
fhahn accepted D87890: [SCEV] Handle `less` predicates for FoundPred = NE.
Tue, Sep 22, 2:28 AM · Restricted Project
fhahn added a comment to D87890: [SCEV] Handle `less` predicates for FoundPred = NE.

It seems that there is no way that SCEV can now both make this query and return true for it. I'm currently building a chain of patch that will fix the query responds. Hopefully with them we will be able to construct a test for it.

Or can we just merge it basing on obviousness of this logic?

Tue, Sep 22, 2:28 AM · Restricted Project

Mon, Sep 21

fhahn added a comment to D87972: [OldPM] Pass manager: run SROA after (simple) loop unrolling.

I have tested this patch internally and seen gains and losses. On one document search related benchmark 3~5% improvement. One zippy (snappy) there is 3~5% regression. Perhaps we do need a conditional extra SROA run.

Mon, Sep 21, 1:21 PM · Restricted Project, Restricted Project
fhahn added a comment to D87163: [DSE] Switch to MemorySSA-backed DSE by default..

I threw as many tests as I could find at 9d172c8e9c84, and I don't see any regressions compared to its parent revision.

Mon, Sep 21, 1:19 PM · Restricted Project, Restricted Project
fhahn added a comment to D84679: [VPlan] Disconnect VPValue and VPUser..

With this patch, VPRecipeBase is also a VPUser and a VPValue, it just inherits from both directly, rather than indirectly through VPValue. Note that 'replacing all uses with & co' are provided by VPValue, so all instances that could previously be RAUW'd can still be RAUW'd. The only major difference should be that in the future we may need some extra code to get the uses of a VPUser.

Do you mean VPInstruction is a VPUser and a VPValue? I really meant that _all_ recipes were VPValues and VPUsers, moving it to VPRecipeBase.

Sorry, I did not mean that everything will be changed in this patch. But the linked patches gradually turn all the recipes into VPValues and update VPInterleaveRecipe to produce multiple values (and moves VPlan codegen to use that). So with the current patch alone, it is not yet possible to traverse def-use chains in recipes, but once the transition is done, it should be possible to traverse in both directions. (I think most recipes should already be ready to be turned into VPUser, let me check which ones are still missing)

Mon, Sep 21, 1:17 PM · Restricted Project
fhahn updated the diff for D67178: [SCEV] Use loop guard info when computing the max BE taken count in howFarToZero..

LGTM. This makes a nice starting point - as you note, we can definitely extend this.

Mon, Sep 21, 10:14 AM · Restricted Project
fhahn added a comment to D84679: [VPlan] Disconnect VPValue and VPUser..

This looks good to me, as part of the effort to support VPlan def-use modeling and traversals.
Note that top-down traversal from VPValue to its VPUsers, will now need to check if each VPUser isa single-def recipe/VPInstruction in order to continue downwards to its VPUsers, etc., facilitating multi-def recipes.

Mon, Sep 21, 10:09 AM · Restricted Project
fhahn committed rG3cbdfe424fec: [SCEV] Add additional max BTC tests with loop guards. (authored by fhahn).
[SCEV] Add additional max BTC tests with loop guards.
Mon, Sep 21, 9:42 AM
fhahn added a reverting change for rG0581c0b0eeba: Revert "[SCEV] Look through single value PHIs.": rG11dccf8d3aa5: Recommit "[SCEV] Look through single value PHIs.".
Mon, Sep 21, 4:01 AM
fhahn committed rG11dccf8d3aa5: Recommit "[SCEV] Look through single value PHIs." (authored by fhahn).
Recommit "[SCEV] Look through single value PHIs."
Mon, Sep 21, 4:01 AM
fhahn abandoned D87992: [MemorySSA] Fix removing dead accesses from MemoryPhis..

Turns out that things actually go slightly wrong earlier during LSR. LSR did not pass MSSU to SplitCriticalEdge, which caused the MemoryPhi to have slightly wrong incoming blocks. I pushed a fix for that, as it is straight-forward to fix (57ae9bb9323548b2ad4ba8274c3910bf9c764983). With that, this patch is no longer needed for the test case.

Mon, Sep 21, 1:56 AM · Restricted Project
fhahn committed rG57ae9bb93235: [LSR] Preserve MSSA when using SplitCriticalEdge. (authored by fhahn).
[LSR] Preserve MSSA when using SplitCriticalEdge.
Mon, Sep 21, 1:53 AM

Sun, Sep 20

fhahn accepted D82895: [LoopInfo] empty() -> isInnermost(), add isOutermost().

@baziotis Are you going to update this diff?

Thanks, I had forgotten about this.

@fhahn OK with renaming empty() to isInnermost()?

I'd say that now we see all the places empty() was used, for most of them the name isInnermost() makes more sense.

Sun, Sep 20, 3:48 PM · Restricted Project
fhahn requested review of D87992: [MemorySSA] Fix removing dead accesses from MemoryPhis..
Sun, Sep 20, 2:40 PM · Restricted Project
fhahn accepted D87971: [MemLoc] Support lllvm.memcpy.inline in MemoryLocation::getForArgument.

LGTM, thanks for also improving the test case!

Sun, Sep 20, 4:56 AM · Restricted Project
fhahn added inline comments to D87971: [MemLoc] Support lllvm.memcpy.inline in MemoryLocation::getForArgument.
Sun, Sep 20, 3:51 AM · Restricted Project
fhahn added a comment to D87972: [OldPM] Pass manager: run SROA after (simple) loop unrolling.

Surprising this causes only such a small perf regression. I guess it should be OK given that, but here probably are some pathological cases out there where this may cause some noticeable compile-time regressions.

Sun, Sep 20, 3:50 AM · Restricted Project, Restricted Project
fhahn added inline comments to D87971: [MemLoc] Support lllvm.memcpy.inline in MemoryLocation::getForArgument.
Sun, Sep 20, 3:38 AM · Restricted Project

Sat, Sep 19

fhahn committed rG1d8f2e52925b: [SCEVExpander] Support expanding nonintegral pointers with constant base. (authored by fhahn).
[SCEVExpander] Support expanding nonintegral pointers with constant base.
Sat, Sep 19, 9:22 AM
fhahn closed D87827: [SCEVExpander] Support expanding nonintegral pointers with constant base..
Sat, Sep 19, 9:22 AM · Restricted Project
fhahn accepted D87964: [MemLoc] Support bcmp in MemoryLocation::getForArgument.

LGTM, thanks!

Sat, Sep 19, 8:07 AM · Restricted Project
fhahn added a comment to D87964: [MemLoc] Support bcmp in MemoryLocation::getForArgument.

Could you also add a test for BasicAA, in llvm/test/Analysis/BasicAA/libfuncs.ll?

Sat, Sep 19, 7:33 AM · Restricted Project

Fri, Sep 18

fhahn added inline comments to D87827: [SCEVExpander] Support expanding nonintegral pointers with constant base..
Fri, Sep 18, 3:54 PM · Restricted Project
fhahn updated the diff for D87827: [SCEVExpander] Support expanding nonintegral pointers with constant base..

expand comment stating why it should be safe to use GEP of null instead of inttoptr as Eli suggested, thanks!

Fri, Sep 18, 3:50 PM · Restricted Project
fhahn added a comment to D86906: [AArch64] Avoid pairing loads with same result reg.

Great. Please let us know if you need someone to commit the change on your behalf.

Fri, Sep 18, 12:30 PM · Restricted Project, Restricted Project, Restricted Project
fhahn accepted D87564: [VPlan] Add vplan native path vectorization test case for inner loop reduction.

LGTM thanks.

Fri, Sep 18, 12:29 PM · Restricted Project
fhahn accepted D87867: [NFC][ScheduleDAG] Remove unused EntrySU SUnit.

This looks indeed unused, thanks for cleaning this up! There may be downstream targets that make use of EntrySU, but if that's the case it is easy to revert.

Fri, Sep 18, 7:23 AM · Restricted Project
fhahn added a comment to D87754: [Lsan] Use fp registers to search for pointers.

Output of failed test:

Fri, Sep 18, 6:42 AM · Restricted Project
fhahn added a comment to D87754: [Lsan] Use fp registers to search for pointers.

It appears that after this change, use_registers.cpp is failing on green dragon: http://green.lab.llvm.org/green/job/clang-stage1-RA/14618/consoleFull#-1417328700a1ca8a51-895e-46c6-af87-ce24fa4cd561

Fri, Sep 18, 6:38 AM · Restricted Project
fhahn requested changes to D53876: Preserve loop metadata when splitting exit blocks.

Looks like this still hasn't landed and probably requires at least a rebase.

Fri, Sep 18, 6:11 AM · Restricted Project
fhahn requested changes to D72033: [AArch64] Enable post-RA sched for more cores.

(marking as changes requested to indicate that there's an outstanding comment)

Fri, Sep 18, 6:01 AM · Restricted Project
fhahn requested changes to D57953: [Jump Threading] Convert conditional branches into unconditional branches using GVN results.

(marking as changes requested to indicate that there's an outstanding comment)

Fri, Sep 18, 5:59 AM
fhahn requested changes to D81811: [ValueLattice] Allocate value lattice elements on a pool (WIP).

(marking as changes requested to indicate that there's an outstanding comment to clear up review queue)

Fri, Sep 18, 5:58 AM · Restricted Project
fhahn added a comment to D72148: [DSE] Support traversing MemoryPhis..

I won't have time to look into this in the near future unfortunately, as I am mainly focused on getting things in good shape to enable DSE & MemorySSA by default. It might be good to file a bug report so this opportunity does not drop off our radar. If anyone is interested in giving implementing it a try, even better :)

Florian, thank you for quick feedback. I prototyped phi translation approach and it does work on the posted test case. Unfortunately, it fails on a bit more complicated case which I will take a look tomorrow. If I have something working reasonably well in the end I will share it.

That's great! There are some changes to how we find MemoryDefs that may be killed by a killing def, rGe717fdb0f155 and D86487. This might actually make things a bit easier, as we now fully control the traversal of the defining accesses.

Fri, Sep 18, 5:53 AM · Restricted Project
fhahn abandoned D73075: [utils] Add initial llvm-patch helper to manage patches..
Fri, Sep 18, 4:18 AM · Restricted Project
fhahn updated the diff for D73075: [utils] Add initial llvm-patch helper to manage patches..

I finally had some time to address the outstanding comments. But given that there seems to be no consensus on llvm-dev that people actually want this, I won't try to push this any further for now.

Fri, Sep 18, 4:18 AM · Restricted Project
fhahn added inline comments to D87564: [VPlan] Add vplan native path vectorization test case for inner loop reduction.
Fri, Sep 18, 4:01 AM · Restricted Project
fhahn added inline comments to D87828: [SCEV][NFC] Introduce isBasicBlockEntryGuardedByCond.
Fri, Sep 18, 3:56 AM · Restricted Project
fhahn requested changes to D87879: [LoopInterchange] Add dominance check to guarantee output dependency order.

Thanks for the patch! Could you also add a test case where src dominates dest?

Fri, Sep 18, 3:51 AM · Restricted Project
fhahn committed rG762fbbe53699: [Polly] Update map passed to SCEVParameterReweriter. (authored by fhahn).
[Polly] Update map passed to SCEVParameterReweriter.
Fri, Sep 18, 3:43 AM
fhahn added a comment to D87163: [DSE] Switch to MemorySSA-backed DSE by default..

All reported problems should be fixed now and we also made the fix for the issue @dmajor reported more conservative to catch more problematic cases. I just enabled DSE + MemorySSA again in 9d172c8e9c84. Please let me know if there are any further issues.

Fri, Sep 18, 3:15 AM · Restricted Project, Restricted Project
fhahn added a reverting change for rG3a59628f3cc2: Revert "[DSE] Switch to MemorySSA-backed DSE by default.": rG9d172c8e9c84: Recommit "[DSE] Switch to MemorySSA-backed DSE by default.".
Fri, Sep 18, 3:10 AM
fhahn committed rG9d172c8e9c84: Recommit "[DSE] Switch to MemorySSA-backed DSE by default." (authored by fhahn).
Recommit "[DSE] Switch to MemorySSA-backed DSE by default."
Fri, Sep 18, 3:10 AM
fhahn added a comment to D87827: [SCEVExpander] Support expanding nonintegral pointers with constant base..

I have a proposal in https://bugs.llvm.org/show_bug.cgi?id=46786#c20 which would solve this, among other issues. Not sure when I'll get around to actually implementing it.

Fri, Sep 18, 2:50 AM · Restricted Project
fhahn updated the diff for D87827: [SCEVExpander] Support expanding nonintegral pointers with constant base..

Change generated code to use bitcast (GEP i8* null, %v) to Ty. Also adds an assertion that i8 has an alloc size of 1 byte.

Fri, Sep 18, 2:46 AM · Restricted Project
fhahn committed rG4635f6050b10: [SCEV] Generalize SCEVParameterRewriter to accept SCEV expression as target. (authored by fhahn).
[SCEV] Generalize SCEVParameterRewriter to accept SCEV expression as target.
Fri, Sep 18, 2:05 AM
fhahn closed D67176: [SCEV] Generalize SCEVParameterRewriter to accept SCEV expression as target..
Fri, Sep 18, 2:05 AM · Restricted Project
fhahn added a comment to D87890: [SCEV] Handle `less` predicates for FoundPred = NE.

Would it be worth adding a C++ unit test for those cases that just passes in suitable predicates + SCEV expression?

Fri, Sep 18, 1:52 AM · Restricted Project

Thu, Sep 17

fhahn committed rGa0017c2bc258: [MemorySSA] Be more conservative when traversing MemoryPhis. (authored by fhahn).
[MemorySSA] Be more conservative when traversing MemoryPhis.
Thu, Sep 17, 2:22 PM
fhahn closed D87778: [MemorySSA] Be more conservative when traversing MemoryPhis..
Thu, Sep 17, 2:21 PM · Restricted Project
fhahn added inline comments to D87778: [MemorySSA] Be more conservative when traversing MemoryPhis..
Thu, Sep 17, 1:18 PM · Restricted Project
fhahn updated the diff for D87778: [MemorySSA] Be more conservative when traversing MemoryPhis..

Apply suggested change, set size to unknown if result of phi translation is not invariant.

Thu, Sep 17, 1:17 PM · Restricted Project
fhahn requested review of D87854: [SCEV] Use information from assume for BE taken count..
Thu, Sep 17, 12:56 PM · Restricted Project
fhahn updated the diff for D67178: [SCEV] Use loop guard info when computing the max BE taken count in howFarToZero..

Finally had some time to get back to this one. Rebased and also added SCEV test for PR40961. I will also post a follow-up that extends this to also support assumes to catch PR47247.

Thu, Sep 17, 12:54 PM · Restricted Project
fhahn updated the diff for D67176: [SCEV] Generalize SCEVParameterRewriter to accept SCEV expression as target..

rebase & resurrect.

Thu, Sep 17, 12:35 PM · Restricted Project
fhahn committed rG51973a607dfa: [SCEV] Add test cases for max BTC with loop guard info. (authored by fhahn).
[SCEV] Add test cases for max BTC with loop guard info.
Thu, Sep 17, 12:33 PM
fhahn added a comment to D86906: [AArch64] Avoid pairing loads with same result reg.

oh, it might be good to slightly adjust the commit message to be a bit more compact and also mention what actual bug is fixed, e.g. something like [AArch64] Avoid paring loads with same result reg.

Thu, Sep 17, 10:48 AM · Restricted Project, Restricted Project, Restricted Project
fhahn added inline comments to D86956: [AArch64] Avoid pairing loads when the base reg is modified.
Thu, Sep 17, 10:44 AM · Restricted Project, Restricted Project, Restricted Project
fhahn added inline comments to D86906: [AArch64] Avoid pairing loads with same result reg.
Thu, Sep 17, 10:20 AM · Restricted Project, Restricted Project, Restricted Project
fhahn added inline comments to D87778: [MemorySSA] Be more conservative when traversing MemoryPhis..
Thu, Sep 17, 8:02 AM · Restricted Project
fhahn updated the diff for D87778: [MemorySSA] Be more conservative when traversing MemoryPhis..

use precise size for translated addr.

Thu, Sep 17, 7:57 AM · Restricted Project
fhahn added inline comments to D87827: [SCEVExpander] Support expanding nonintegral pointers with constant base..
Thu, Sep 17, 7:56 AM · Restricted Project
fhahn committed rG9dc1e53787ab: [MemorySSA] Add another loop clobber test case. (authored by fhahn).
[MemorySSA] Add another loop clobber test case.
Thu, Sep 17, 6:19 AM
fhahn requested review of D87827: [SCEVExpander] Support expanding nonintegral pointers with constant base..
Thu, Sep 17, 5:39 AM · Restricted Project
fhahn accepted D86906: [AArch64] Avoid pairing loads with same result reg.

LGTM, thanks!

Thu, Sep 17, 1:55 AM · Restricted Project, Restricted Project, Restricted Project

Wed, Sep 16

fhahn added inline comments to D87778: [MemorySSA] Be more conservative when traversing MemoryPhis..
Wed, Sep 16, 3:03 PM · Restricted Project
fhahn updated the diff for D87778: [MemorySSA] Be more conservative when traversing MemoryPhis..

Add accidentially dropped include of User.h

Wed, Sep 16, 2:14 PM · Restricted Project
fhahn added a comment to D87163: [DSE] Switch to MemorySSA-backed DSE by default..

I checked in a fix in https://reviews.llvm.org/rGfc8200633122, but I haven't yet verified it addresses all the failures reported.

Thanks, I've confirmed that this fixes our tests in their original form (not reduced).

Our day-to-day testing of LLVM trunk is limited though, maybe one-tenth of our full suite. Since this code has some risks, I could start a full run to throw more testing at it. But that takes more machine capacity and human effort to remove flaky failures, so I'd prefer to wait until the odds are good that there won't be further changes. Let me know when you think it's ready.

Wed, Sep 16, 11:02 AM · Restricted Project, Restricted Project
fhahn requested review of D87778: [MemorySSA] Be more conservative when traversing MemoryPhis..
Wed, Sep 16, 11:00 AM · Restricted Project
fhahn added a comment to D86879: [XCOFF][AIX] Handle TOC entries that could not be reached by positive range in small code model.

We believe that the test is necessarily large. Has the associated bot encountered similar issues before? What was the recommended fix to retain the test in more appropriate environments?

Perhaps the test case should be restricted to some key platforms where cross-compilation to AIX is relevant? Perhaps Linux (PPC is already required).

I could add
# REQUIRES: aix || linux
to the test if that helps.

Wed, Sep 16, 7:30 AM · Restricted Project
fhahn committed rG01e2b394ee16: [Partial Inliner] Compute intrinsic cost through TTI (authored by tdangeti).
[Partial Inliner] Compute intrinsic cost through TTI
Wed, Sep 16, 7:17 AM
fhahn closed D87132: [Partial Inliner] Compute intrinsic cost through TTI.
Wed, Sep 16, 7:17 AM · Restricted Project, Restricted Project
fhahn committed rGcb9528a0420e: [DSE] Add another test cases with loop carried dependence. (authored by fhahn).
[DSE] Add another test cases with loop carried dependence.
Wed, Sep 16, 6:51 AM
fhahn added inline comments to D86906: [AArch64] Avoid pairing loads with same result reg.
Wed, Sep 16, 6:24 AM · Restricted Project, Restricted Project, Restricted Project
fhahn updated the diff for D84411: [LoopVersion] Pass RuntimePointerChecking directly..

rebase & ping

Wed, Sep 16, 4:19 AM · Restricted Project
fhahn updated the diff for D84410: [LAA] Dynamically allocate RuntimeCheckingPtrGroup (NFC)..

rebase & ping

Wed, Sep 16, 4:17 AM · Restricted Project
fhahn updated the diff for D84406: [LoopVersion] Unify SCEVChecks and alias check handling (NFC)..

Rebase & ping

Wed, Sep 16, 4:17 AM · Restricted Project
fhahn added a comment to D87132: [Partial Inliner] Compute intrinsic cost through TTI.

LGTM, thanks for fixing this issue!

Thanks for reviewing.
I don't have commit rights. Could you please commit on my behalf?

Wed, Sep 16, 2:58 AM · Restricted Project, Restricted Project