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fhahn (Florian Hahn)
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Aug 18 2016, 4:39 AM (252 w, 12 h)

Recent Activity

Today

fhahn added inline comments to D103514: [LV] Support sinking recipe in replicate region after another region..
Thu, Jun 17, 7:55 AM · Restricted Project
fhahn updated the diff for D103514: [LV] Support sinking recipe in replicate region after another region..

Restructure checks as suggested and moved the assertion to lambda, thanks!

Thu, Jun 17, 7:52 AM · Restricted Project
fhahn committed rGaa6e8e9572d5: [X86] Check using default in test added in 0bd5bbb31e0345ae. (authored by fhahn).
[X86] Check using default in test added in 0bd5bbb31e0345ae.
Thu, Jun 17, 5:20 AM
fhahn added inline comments to D103597: [AArch64LoadStoreOptimizer] Generate more STPs by renaming registers earlier.
Thu, Jun 17, 5:18 AM · Restricted Project
fhahn added a comment to D94542: [X86] Default to -x86-pad-for-align=false to drop assembler difference with or w/o -g.

We also had user reports hitting the issue fixed by the change in the default. I added a relatively small test case that shows the binary differences caused by a single .loc: 0bd5bbb31e03 Perhaps this is helpful for anyone wanting to take a closer look at the underlying issue.

Thu, Jun 17, 4:39 AM · Restricted Project
fhahn committed rG0bd5bbb31e03: [X86] Add test showing binary differences with -x86-pad-for-align. (authored by fhahn).
[X86] Add test showing binary differences with -x86-pad-for-align.
Thu, Jun 17, 4:38 AM
fhahn added inline comments to D104198: [Matrix] Add documentation for compound assignment and type conversion of matrix types.
Thu, Jun 17, 1:48 AM · Restricted Project
fhahn committed rG80a403348b0f: [VPlan] Support PHIs as LastInst when inserting scalars in ::get(). (authored by fhahn).
[VPlan] Support PHIs as LastInst when inserting scalars in ::get().
Thu, Jun 17, 1:37 AM
fhahn closed D104188: [VPlan] Support PHIs as LastInst when inserting scalars in ::get()..
Thu, Jun 17, 1:37 AM · Restricted Project
fhahn added a comment to D104188: [VPlan] Support PHIs as LastInst when inserting scalars in ::get()..

Good catch! Please remember to add a testcase along with D100260.

Thu, Jun 17, 1:19 AM · Restricted Project

Yesterday

fhahn accepted D104332: [llvm] Fix lto tests that requires ld64.

LGTM thanks for the fix Steven!

Wed, Jun 16, 10:09 AM · Restricted Project
fhahn added inline comments to D104102: [FuncSpec] Statistics.
Wed, Jun 16, 1:41 AM · Restricted Project

Tue, Jun 15

fhahn requested review of D104319: [SCEV] Retain AddExpr flags when subtracting a foldable constant..
Tue, Jun 15, 1:28 PM · Restricted Project
fhahn updated the diff for D102478: [Matrix] Emit assumption that matrix indices are valid..

Just a couple of nits here, basically see how much we can put in the 'cheap to check' branch.

Tue, Jun 15, 5:52 AM · Restricted Project, Restricted Project
fhahn committed rG304b9c25d58d: [Matrix] Add tests for fast-math flags & matrix codegen. (authored by fhahn).
[Matrix] Add tests for fast-math flags & matrix codegen.
Tue, Jun 15, 5:23 AM
fhahn committed rGf7fc8927c088: [LoopDeletion] Check for irreducible cycles when deleting loops. (authored by fhahn).
[LoopDeletion] Check for irreducible cycles when deleting loops.
Tue, Jun 15, 4:56 AM
fhahn closed D104238: [LoopDeletion] Check for irreducible cycles when deleting loops..
Tue, Jun 15, 4:56 AM · Restricted Project
fhahn added inline comments to D104102: [FuncSpec] Statistics.
Tue, Jun 15, 1:14 AM · Restricted Project

Mon, Jun 14

fhahn added a comment to D102478: [Matrix] Emit assumption that matrix indices are valid..

ping :)

Mon, Jun 14, 12:26 PM · Restricted Project, Restricted Project
fhahn requested review of D104254: [VPlan] Support sinking recipes with uniform users outside sink target..
Mon, Jun 14, 12:02 PM · Restricted Project
fhahn requested review of D104238: [LoopDeletion] Check for irreducible cycles when deleting loops..
Mon, Jun 14, 9:49 AM · Restricted Project
fhahn committed rGee9bb258bb76: [LoopDeletion] Add test with irreducible control flow in loop. (authored by fhahn).
[LoopDeletion] Add test with irreducible control flow in loop.
Mon, Jun 14, 9:47 AM
fhahn added inline comments to D103378: [VectorCombine] Freeze index unless it is known to be non-poison..
Mon, Jun 14, 8:48 AM · Restricted Project
fhahn committed rG96ca03493ae5: [VectorCombine] Limit scalarization to non-poison indices for now. (authored by fhahn).
[VectorCombine] Limit scalarization to non-poison indices for now.
Mon, Jun 14, 8:41 AM
fhahn committed rGd767d1dd2c78: [ADT] Use unnamed argument for unused arg in StringMapEntryStorage. (authored by fhahn).
[ADT] Use unnamed argument for unused arg in StringMapEntryStorage.
Mon, Jun 14, 7:55 AM
fhahn added a comment to D104102: [FuncSpec] Statistics.

Thanks for the update! Could you update the description/title, as they seem a bit out-of-sync after the recent changes.

Mon, Jun 14, 7:38 AM · Restricted Project
fhahn added a comment to D104198: [Matrix] Add documentation for compound assignment and type conversion of matrix types.

Thanks for the patch! some comments inline.

Mon, Jun 14, 7:36 AM · Restricted Project
fhahn added a comment to D104148: [LoopUtils] Fix incorrect runtime checks.

Thanks for the patch. Some comments inline

Mon, Jun 14, 7:33 AM · Restricted Project
fhahn added a comment to D102861: Suppress FP_CONTRACT due to planned command line changes.

After this change, building the LLVM test-suite for X86_64h seems to fail http://green.lab.llvm.org/green/job/test-suite-verify-machineinstrs-x86_64h-O3/9586/ :

Mon, Jun 14, 7:11 AM
fhahn added inline comments to D104126: [MicroBenchmarks] Add initial SLP vectorization benchmarks..
Mon, Jun 14, 4:08 AM
fhahn updated the diff for D104126: [MicroBenchmarks] Add initial SLP vectorization benchmarks..

Does this expect on loop unrolling to happened? Did you consider adding #pragma clang loop unroll(full) to make sure of it?

Mon, Jun 14, 4:08 AM
fhahn added a comment to D103816: [SimpleLoopUnswich] Fix a bug on ComputeUnswitchedCost with partial unswitch.

@fhahn @jonpa I am sorry for ping.

Mon, Jun 14, 3:33 AM · Restricted Project
fhahn committed rG9e77526d4673: [VPlan] Add additional tests for region merging. (authored by fhahn).
[VPlan] Add additional tests for region merging.
Mon, Jun 14, 3:29 AM

Sun, Jun 13

fhahn added inline comments to D100260: [VPlan] Merge predicated-triangle regions, after sinking..
Sun, Jun 13, 8:39 AM · Restricted Project
fhahn updated the diff for D100260: [VPlan] Merge predicated-triangle regions, after sinking..

Address remaining comments, added additional tests, clarify comment on why we need to skip recipes used by first-order recurrences.

Sun, Jun 13, 8:28 AM · Restricted Project
fhahn requested review of D104197: [VPlan] Track both incoming values for first-order recurrence phis..
Sun, Jun 13, 8:27 AM · Restricted Project

Sat, Jun 12

fhahn added inline comments to D100260: [VPlan] Merge predicated-triangle regions, after sinking..
Sat, Jun 12, 2:32 PM · Restricted Project
fhahn updated the diff for D100260: [VPlan] Merge predicated-triangle regions, after sinking..

Thanks for the initial comments! Sorry for the delay with following up.

Sat, Jun 12, 2:32 PM · Restricted Project
fhahn requested review of D104188: [VPlan] Support PHIs as LastInst when inserting scalars in ::get()..
Sat, Jun 12, 2:22 PM · Restricted Project
fhahn added a comment to D104180: [NFC] [LICM] Create LoopNest Invariant Code Motion (LNICM) pass.

Following patches will utilize the LoopNest structure for more efficient optimization.

Sat, Jun 12, 7:53 AM · Restricted Project
fhahn added a comment to D104179: [NFC] [LoopIdiom] [LoopNest] Create LoopIdiomRecognize as a LoopNestPass.

Following patches will utilize the LoopNest structure for more efficient optimization.

Would it be possible to provide some data on the efficiency improvements?

Hi @fhahn ,
For example, given a perfectly nested loop-pair and we have matched a store operation that we can hoist to the inner-loop's header as strided store operations,
we can further check on the outer-loop, see if the outer-loop SCEV maintains the continuous memory access and hoist the operation one more loop outwards.

Sat, Jun 12, 7:48 AM · Restricted Project
fhahn committed rG0d9e8f5f4b68: [VPlan] Add more sinking/merging tests with predicated loads/stores. (authored by fhahn).
[VPlan] Add more sinking/merging tests with predicated loads/stores.
Sat, Jun 12, 7:37 AM
fhahn added inline comments to D103514: [LV] Support sinking recipe in replicate region after another region..
Sat, Jun 12, 6:13 AM · Restricted Project
fhahn updated the diff for D103514: [LV] Support sinking recipe in replicate region after another region..

Thanks for all the comments Ayal! I updated the code and removed some redundancies as suggested.

Sat, Jun 12, 6:12 AM · Restricted Project
fhahn added a comment to D104179: [NFC] [LoopIdiom] [LoopNest] Create LoopIdiomRecognize as a LoopNestPass.

Following patches will utilize the LoopNest structure for more efficient optimization.

Sat, Jun 12, 6:05 AM · Restricted Project
fhahn added a comment to D103575: Allow signposts to take advantage of deferred string substitution.

It looks like this is causing build failures on certain macOS / SDK combinations, e.g. http://green.lab.llvm.org/green/job/lldb-cmake-standalone/3288/consoleFull#-195476041949ba4694-19c4-4d7e-bec5-911270d8a58c

Sat, Jun 12, 4:10 AM · Restricted Project, Restricted Project
fhahn added a reverting change for rG4fc93a3a1f95: Allow signposts to take advantage of deferred string substitution: rGb4583a5ad73b: Revert "Allow signposts to take advantage of deferred string substitution".
Sat, Jun 12, 4:09 AM
fhahn committed rGb4583a5ad73b: Revert "Allow signposts to take advantage of deferred string substitution" (authored by fhahn).
Revert "Allow signposts to take advantage of deferred string substitution"
Sat, Jun 12, 4:09 AM
fhahn added a reverting change for D103575: Allow signposts to take advantage of deferred string substitution: rGb4583a5ad73b: Revert "Allow signposts to take advantage of deferred string substitution".
Sat, Jun 12, 4:09 AM · Restricted Project, Restricted Project
fhahn added a comment to D101970: [X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB.

The fix has been committed as f35bcea1d4748889b8240defdf00cb7a71cbe070.

Sat, Jun 12, 3:45 AM · Restricted Project
fhahn added a reverting change for rG1b748faf2bae: [X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB: rG5cd66420ccb1: Revert "[X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB".
Sat, Jun 12, 3:44 AM
fhahn committed rG5cd66420ccb1: Revert "[X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB" (authored by fhahn).
Revert "[X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB"
Sat, Jun 12, 3:44 AM
fhahn added a reverting change for rGf35bcea1d474: [X86FixupLEAs] Sub register usage of LEA dest should block LEA/SUB optimization: rGe087b4f14986: Revert "[X86FixupLEAs] Sub register usage of LEA dest should block LEA/SUB….
Sat, Jun 12, 3:44 AM
fhahn added a reverting change for D101970: [X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB: rG5cd66420ccb1: Revert "[X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB".
Sat, Jun 12, 3:44 AM · Restricted Project
fhahn committed rGe087b4f14986: Revert "[X86FixupLEAs] Sub register usage of LEA dest should block LEA/SUB… (authored by fhahn).
Revert "[X86FixupLEAs] Sub register usage of LEA dest should block LEA/SUB…
Sat, Jun 12, 3:44 AM
fhahn added a reverting change for D103922: [X86FixupLEAs] Sub register usage of LEA dest should block LEA/SUB optimization: rGe087b4f14986: Revert "[X86FixupLEAs] Sub register usage of LEA dest should block LEA/SUB….
Sat, Jun 12, 3:44 AM · Restricted Project

Fri, Jun 11

fhahn updated the diff for D102834: [SLPVectorizer] WIP Implement initial memory versioning (WIP!).

Finished off the main functionality, update includes

  • computing & comparing the cost of the versioned block to the original block,
  • more tests,
  • preserving LI & DT if changes to the CFG are made.
Fri, Jun 11, 11:02 AM · Restricted Project
fhahn accepted D104127: [Matrix] In transpose opts, handle a^t * a^t.

Without the fix the testcase crashes.

Fri, Jun 11, 9:22 AM · Restricted Project
fhahn requested review of D104126: [MicroBenchmarks] Add initial SLP vectorization benchmarks..
Fri, Jun 11, 9:03 AM
fhahn added a comment to D101970: [X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB.

I also suspect this patch is causing the following failure (with -mllvm -verify-machineinstrs ) on GreenDragon (http://green.lab.llvm.org/green/job/test-suite-verify-machineinstrs-x86_64-O3/9579/)

Fri, Jun 11, 6:50 AM · Restricted Project
fhahn added inline comments to D93838: [SCCP] Add Function Specialization pass.
Fri, Jun 11, 2:47 AM · Restricted Project
fhahn added inline comments to D93838: [SCCP] Add Function Specialization pass.
Fri, Jun 11, 1:49 AM · Restricted Project
fhahn added a comment to D93838: [SCCP] Add Function Specialization pass.

I'm not quite sure why the implementation is in llvm/lib/Transforms/Scalar/FunctionSpecialization.cpp, rather than llvm/lib/Transforms/IPO/FunctionSpecialization.cpp? It's interprocedural only, right? The implementation in SCCP.cpp works on both a single function and a module, that's probably with its in the Scalar sub-directory. It's also a separate pass from IPSCCP, so I am not sure if the pass definition should be in llvm/lib/Transforms/IPO/SCCP.cpp.

Fri, Jun 11, 1:40 AM · Restricted Project
fhahn added inline comments to D93838: [SCCP] Add Function Specialization pass.
Fri, Jun 11, 1:34 AM · Restricted Project

Thu, Jun 10

fhahn updated the diff for D99424: [BasicAA] Be more careful with modulo ops on VariableGEPIndex..

Okay, I've finally gotten around to looking into this in more detail. Because thinking about this really fries my brain, I ended up modelling this in alive2 (hopefully correctly...)

https://alive2.llvm.org/ce/z/HYBxGs This is the general case and shows that we only need nsw flags on the arithmetic, rather than both nuw and nsw. This makes sense, as all the arithmetic involved is signed.

https://alive2.llvm.org/ce/z/qXicaB This shows that it is indeed safe to always take the power-of-2 portion of the scale, even if the arithmetic is not nsw.

Thu, Jun 10, 3:56 AM · Restricted Project
fhahn added a comment to D103597: [AArch64LoadStoreOptimizer] Generate more STPs by renaming registers earlier.

@fhahn in response to your inline comment about performing the renaming registers check twice, if we don't have it we won't try to rename the registers at all, since the check on line 1764 is not reached in our case as we never enter the if statement that contains it. So we brought it earlier to make sure that it tries to rename the registers, if it can. I'll follow-up the rest of the comments in a new diff.

Thu, Jun 10, 12:57 AM · Restricted Project

Wed, Jun 9

fhahn committed rGb76f1f120285: [SCEV] Keep common NUW flags when inlining Add operands. (authored by fhahn).
[SCEV] Keep common NUW flags when inlining Add operands.
Wed, Jun 9, 9:22 AM
fhahn closed D103877: [SCEV] Keep common NUW flags when inlining Add operands..
Wed, Jun 9, 9:21 AM · Restricted Project
fhahn added inline comments to D103877: [SCEV] Keep common NUW flags when inlining Add operands..
Wed, Jun 9, 6:26 AM · Restricted Project
fhahn added inline comments to D103597: [AArch64LoadStoreOptimizer] Generate more STPs by renaming registers earlier.
Wed, Jun 9, 5:24 AM · Restricted Project
fhahn added a comment to D93838: [SCCP] Add Function Specialization pass.

Addressed @fhahn 's comments: don't run the solver for specialised functions removed the recursive specialization test for now.

I'm not sure if removing the recursive specialization test is the best thing to do, without known what it is supposed to test? If it is a legitimate test, I thin it would be good to keep it.

Thanks for the comments. Since they are minor, I will fix it before committing. I.e., will remove that update to solver and add the test back.

Wed, Jun 9, 4:29 AM · Restricted Project
fhahn updated the diff for D103514: [LV] Support sinking recipe in replicate region after another region..

Rebase & ping :)

Wed, Jun 9, 3:05 AM · Restricted Project
fhahn added a comment to D93838: [SCCP] Add Function Specialization pass.

Addressed @fhahn 's comments: don't run the solver for specialised functions removed the recursive specialization test for now.

Wed, Jun 9, 2:56 AM · Restricted Project
fhahn added a comment to D103944: Set local_unnamed_addr for new library function declarations in InjectTLIMappings..

Please update the description of the patch with a motivation for the fix and why it is the right thing to do. This will make the change easier to review.

Wed, Jun 9, 2:46 AM · Restricted Project
fhahn committed rGe978f6bc9706: [LTO] Support new PM in ThinLTOCodeGenerator. (authored by fhahn).
[LTO] Support new PM in ThinLTOCodeGenerator.
Wed, Jun 9, 2:08 AM
fhahn closed D102627: [LTO] Support new PM in ThinLTOCodeGenerator..
Wed, Jun 9, 2:08 AM · Restricted Project
fhahn committed rG5c5ae6a661ce: [ScalarEvolution] Add test for preserving add overflow flags. (authored by fhahn).
[ScalarEvolution] Add test for preserving add overflow flags.
Wed, Jun 9, 1:20 AM

Tue, Jun 8

fhahn updated the diff for D102834: [SLPVectorizer] WIP Implement initial memory versioning (WIP!).

Update to remove deleted instructions early, so we do not pick up instructions to be deleted during SCEV expansion, flip branch targets.

Tue, Jun 8, 11:46 AM · Restricted Project
fhahn retitled D103877: [SCEV] Keep common NUW flags when inlining Add operands. from [SCEV] Keep common flags when inlining SCEVAddExpr operands. to [SCEV] Keep common NUW flags when inlining Add operands..
Tue, Jun 8, 11:25 AM · Restricted Project
fhahn updated the diff for D103877: [SCEV] Keep common NUW flags when inlining Add operands..

As far as I understand what is a nsw for multi-argument add, it means that there should be no wrap in between if we add the operands one by one in any order. Imagine the case when a = c = SINT_MIN and b = d = SINT_MAX. We can say that a+b has <nsw>, c+d has <nsw>, and (a+b) + (c+d) also has nsw. But if we say that getAddExpr(getAddExpr(a, b, nsw), getAddExpr(c, d, nsw), nsw) = getAddExpr(a, b, c, d, nsw), it's not true if we compute the latter as a + c + b + d. It will overflow on a + c already. Is my understanding wrong here?

Tue, Jun 8, 11:24 AM · Restricted Project
fhahn added inline comments to D102627: [LTO] Support new PM in ThinLTOCodeGenerator..
Tue, Jun 8, 9:06 AM · Restricted Project
fhahn updated the diff for D102627: [LTO] Support new PM in ThinLTOCodeGenerator..

Updated to also add the -debug-pass-manager option, so it is easier to check that -use-new-pm works as expected. I also pinned the remarks tests to use the legacy PM and updated llvm/test/ThinLTO/X86/newpm-basic.ll to check that the new PM is run via the debug output.

Tue, Jun 8, 9:04 AM · Restricted Project
fhahn requested review of D103877: [SCEV] Keep common NUW flags when inlining Add operands..
Tue, Jun 8, 2:34 AM · Restricted Project

Mon, Jun 7

fhahn added a comment to D103255: [LV] Mark increment of main vector loop induction variable as NUW..

LGTM as well. I'm not super familiar with this code, but I skimmed the callers and the necessary conditions seemed to be locally implied.

As an aside, do you have a test case where SCEV can't figure this out? I've got D103118 out for review now, and am interested in other such cases.

Mon, Jun 7, 2:58 PM · Restricted Project
fhahn committed rG1465e7770bca: [VPlan] Print successors of VPRegionBlocks. (authored by fhahn).
[VPlan] Print successors of VPRegionBlocks.
Mon, Jun 7, 9:59 AM
fhahn closed D103515: [VPlan] Print successors of VPRegionBlocks..
Mon, Jun 7, 9:59 AM · Restricted Project
fhahn added a comment to D103597: [AArch64LoadStoreOptimizer] Generate more STPs by renaming registers earlier.

This does not seem memcpy specific. If that's the case, could you please update the title/description of the patch? Also the test cases in llvm/test/CodeGen/AArch64/memcpy.mir seem to specifically test additional renaming cases, so it might be good to put them into the existing llvm/test/CodeGen/AArch64/stp-opt-with-renaming.mir or into a file named along those lines. it would also be good to include a brief comment with the tests what is different to the existing re-naming tests.

Mon, Jun 7, 9:56 AM · Restricted Project
fhahn updated the diff for D103515: [VPlan] Print successors of VPRegionBlocks..

Rebase on top of main, so it can be landed without requiring the parent patch

Mon, Jun 7, 9:44 AM · Restricted Project
fhahn updated the diff for D102834: [SLPVectorizer] WIP Implement initial memory versioning (WIP!).

Fix crash caused by not updating the DT's DFSNumbering and case where we checking for aliasing between pointers of the same underlying object.

Mon, Jun 7, 9:00 AM · Restricted Project
fhahn added a comment to D102834: [SLPVectorizer] WIP Implement initial memory versioning (WIP!).

Hi Florian, thanks for putting this up for review and starting the discussion. If you don't mind me asking, how high is this on your todo-list? The reason I am asking is that this well help x264 where we are behind a lot (and it more in general it solves this long outstanding issue that we have). Fixing x264 is high on our list, which is why I put up D102748 to start this discussion. If, for example, you don't see time to work on this, we could consider looking at it.

It's fairly high on my todo list, as we have quite a number of of such cases reported by our internal users. But I'm not planning to rush and I think we should also start collecting micro-benchmarks for the missed opportunities, so we can thoroughly evaluate the impact and do not introduce regressions in the future.

Nice one, excellent. What are your ideas on the micro-benchmarks? Is that something you'll be using internally, or were you e.g. thinking about adding things to the test suite. Just asking because I would be happy to contribute to that.

Mon, Jun 7, 8:43 AM · Restricted Project
fhahn added a comment to D99354: [SimpleLoopUnswitch] Port partially invariant unswitch from LoopUnswitch to SimpleLoopUnswitch.
Mon, Jun 7, 6:03 AM · Restricted Project
fhahn updated the diff for D102834: [SLPVectorizer] WIP Implement initial memory versioning (WIP!).

You can easily get the first instruction - VectorizableTree.front(). Stores can be only in the front of the vectorizable tree. As to the last instruction, I think we need to scan all tree entries and find all gather nodes with memaccess which may alias with stores. The main problem that the versioning better to perform before we try to build the tree, otherwise we may decide to gather some instructions instead of trying vectorizing them because of possible aliasing. And it may not be profitable.

Mon, Jun 7, 5:36 AM · Restricted Project
fhahn committed rG8344e215ec6c: [LV] Update more target-specific tests after 23c2f2e6b24d. (authored by fhahn).
[LV] Update more target-specific tests after 23c2f2e6b24d.
Mon, Jun 7, 4:14 AM
fhahn committed rG87c99d2b970b: [Matrix] Add -matrix-allow-contract=false to tests. (authored by fhahn).
[Matrix] Add -matrix-allow-contract=false to tests.
Mon, Jun 7, 4:14 AM
fhahn added a comment to D102234: [SimpleLoopBoundSplit] Split Bound of Loop which has conditional branch with IV.

I'm seeing crashes when trying to build 471.omnetpp with -O3 -flto on X86 when running the pass just before the vectorizer (as below). Please take a look.

Mon, Jun 7, 3:25 AM · Restricted Project
fhahn committed rG131343d35bf2: [PhaseOrdering] Update tests after 23c2f2e6b24d. (authored by fhahn).
[PhaseOrdering] Update tests after 23c2f2e6b24d.
Mon, Jun 7, 3:02 AM
fhahn committed rG23c2f2e6b24d: [LV] Mark increment of main vector loop induction variable as NUW. (authored by fhahn).
[LV] Mark increment of main vector loop induction variable as NUW.
Mon, Jun 7, 2:50 AM
fhahn closed D103255: [LV] Mark increment of main vector loop induction variable as NUW..
Mon, Jun 7, 2:50 AM · Restricted Project

Fri, Jun 4

fhahn accepted D103627: [Matrix] Fix transpose-multiply folding if transpose has multiple uses.

LGTM, thanks!

Fri, Jun 4, 10:12 AM · Restricted Project

Thu, Jun 3

fhahn added a comment to D103062: [ObjC][ARC] Ignore operand bundle "clang.arc.attachedcall" on a call if the call's return type is void.

Makes sense to me! Do we need to update LangRef?

Thu, Jun 3, 8:49 AM · Restricted Project