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dmgreen (Dave Green)
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User Since
May 24 2016, 8:35 AM (147 w, 2 d)

Recent Activity

Today

dmgreen committed rGf0f01051a16d: Fixup opt-remarks.ll gold plugin test. NFC (authored by dmgreen).
Fixup opt-remarks.ll gold plugin test. NFC
Thu, Mar 21, 7:35 AM
dmgreen committed rL356669: Fixup opt-remarks.ll gold plugin test. NFC.
Fixup opt-remarks.ll gold plugin test. NFC
Thu, Mar 21, 7:35 AM

Sun, Mar 17

dmgreen committed rGbaa94ef03bcc: [ARM] Check that CPSR does not have other uses (authored by dmgreen).
[ARM] Check that CPSR does not have other uses
Sun, Mar 17, 2:36 PM
dmgreen committed rL356349: [ARM] Check that CPSR does not have other uses.
[ARM] Check that CPSR does not have other uses
Sun, Mar 17, 2:35 PM
dmgreen committed rGe0b48a80150d: [ARM] Search backwards for CMP when combining into CBZ (authored by dmgreen).
[ARM] Search backwards for CMP when combining into CBZ
Sun, Mar 17, 9:11 AM
dmgreen committed rL356336: [ARM] Search backwards for CMP when combining into CBZ.
[ARM] Search backwards for CMP when combining into CBZ
Sun, Mar 17, 9:11 AM
dmgreen closed D59317: [ARM] Search backwards for CMP when combining into CBZ.
Sun, Mar 17, 9:11 AM · Restricted Project
dmgreen committed rG30673299d45e: [ARM] Add some CBZ constant island tests. NFC (authored by dmgreen).
[ARM] Add some CBZ constant island tests. NFC
Sun, Mar 17, 9:00 AM
dmgreen committed rL356335: [ARM] Add some CBZ constant island tests. NFC.
[ARM] Add some CBZ constant island tests. NFC
Sun, Mar 17, 8:59 AM

Thu, Mar 14

dmgreen updated the diff for D59317: [ARM] Search backwards for CMP when combining into CBZ.

Removed isARMLowRegister check, reversed the condition of DestOffset - BrOffset, and added some Kill flag handling and tests.

Thu, Mar 14, 5:47 AM · Restricted Project
dmgreen added inline comments to D59317: [ARM] Search backwards for CMP when combining into CBZ.
Thu, Mar 14, 5:43 AM · Restricted Project
dmgreen updated the diff for D59317: [ARM] Search backwards for CMP when combining into CBZ.

Now with some mir tests.

Thu, Mar 14, 3:38 AM · Restricted Project

Wed, Mar 13

dmgreen created D59317: [ARM] Search backwards for CMP when combining into CBZ.
Wed, Mar 13, 12:46 PM · Restricted Project

Tue, Mar 12

dmgreen added a comment to D59256: [ARM] Disable LDM with offset for thumb2 cortex-m cpus.

It may be possibly to create ldrd's, but I don't think that they will be any quicker. An ldrd will take the same time as an ldm (1+N). It could be smaller, depending on whether T1 ldr's are used.

Tue, Mar 12, 4:17 PM · Restricted Project
dmgreen updated the diff for D59256: [ARM] Disable LDM with offset for thumb2 cortex-m cpus.

Now minsize

Tue, Mar 12, 9:36 AM · Restricted Project
dmgreen added inline comments to D59256: [ARM] Disable LDM with offset for thumb2 cortex-m cpus.
Tue, Mar 12, 9:36 AM · Restricted Project
dmgreen added inline comments to D58981: CodeGenPrepare: preserve inbounds attribute when sinking GEPs.
Tue, Mar 12, 8:00 AM · Restricted Project
dmgreen created D59256: [ARM] Disable LDM with offset for thumb2 cortex-m cpus.
Tue, Mar 12, 7:57 AM · Restricted Project
dmgreen accepted D58981: CodeGenPrepare: preserve inbounds attribute when sinking GEPs.

Looks good to me then.

Tue, Mar 12, 5:57 AM · Restricted Project

Mon, Mar 11

dmgreen accepted D59024: [CGP] Limit distance between overflow math and cmp.

Looks OK to me.

Mon, Mar 11, 5:14 AM · Restricted Project
dmgreen added inline comments to D59024: [CGP] Limit distance between overflow math and cmp.
Mon, Mar 11, 3:16 AM · Restricted Project

Fri, Mar 8

dmgreen added a comment to D58981: CodeGenPrepare: preserve inbounds attribute when sinking GEPs.

This looks generally useful. Please add context

Fri, Mar 8, 6:57 AM · Restricted Project
dmgreen added a comment to D59024: [CGP] Limit distance between overflow math and cmp.

Hello. I think the idea of this sounds sensible, to limit things if the instruction are too far apart, I'm just not sure of using domtree's to do that.

Fri, Mar 8, 1:33 AM · Restricted Project
dmgreen added inline comments to D59014: [TTI] Enable analysis of clib functions in getIntrinsicCosts. NFCI..
Fri, Mar 8, 1:14 AM · Restricted Project

Thu, Mar 7

dmgreen added a comment to D54142: [ARM] Cortex-M4 schedule.

Hello. This was increasing codesize by more that I'd like, which was why I never committed it. The performance results would probably make it worthwhile, but at -Oz, it's not something people should be paying for.

Thu, Mar 7, 2:19 PM
dmgreen committed rGffc922ec35f8: [LSR] Attempt to increase the accuracy of LSR's setup cost (authored by dmgreen).
[LSR] Attempt to increase the accuracy of LSR's setup cost
Thu, Mar 7, 5:46 AM
dmgreen committed rL355597: [LSR] Attempt to increase the accuracy of LSR's setup cost.
[LSR] Attempt to increase the accuracy of LSR's setup cost
Thu, Mar 7, 5:46 AM
dmgreen closed D58770: [LSR] Attempt to increase the accuracy of LSR's setup cost.
Thu, Mar 7, 5:46 AM · Restricted Project
dmgreen added a comment to D58770: [LSR] Attempt to increase the accuracy of LSR's setup cost.

Thanks Sam. And thanks Brendon!

Thu, Mar 7, 5:42 AM · Restricted Project
dmgreen added inline comments to D58770: [LSR] Attempt to increase the accuracy of LSR's setup cost.
Thu, Mar 7, 4:01 AM · Restricted Project

Tue, Mar 5

dmgreen added a comment to D58435: [SCEV] Ensure that isHighCostExpansion takes into account what is being divided.

Thanks

Tue, Mar 5, 4:13 AM · Restricted Project
dmgreen committed rG4511f3fa86de: [SCEV] Ensure that isHighCostExpansion takes into account what is being divided (authored by dmgreen).
[SCEV] Ensure that isHighCostExpansion takes into account what is being divided
Tue, Mar 5, 4:12 AM
dmgreen committed rL355393: [SCEV] Ensure that isHighCostExpansion takes into account what is being divided.
[SCEV] Ensure that isHighCostExpansion takes into account what is being divided
Tue, Mar 5, 4:12 AM
dmgreen closed D58435: [SCEV] Ensure that isHighCostExpansion takes into account what is being divided.
Tue, Mar 5, 4:12 AM · Restricted Project
dmgreen committed rG3bcb0aa7f9bc: [SCEV] Add some extra tests for IndVarSimplifys loop exit values. NFC. (authored by dmgreen).
[SCEV] Add some extra tests for IndVarSimplifys loop exit values. NFC.
Tue, Mar 5, 3:18 AM
dmgreen committed rL355389: [SCEV] Add some extra tests for IndVarSimplifys loop exit values. NFC..
[SCEV] Add some extra tests for IndVarSimplifys loop exit values. NFC.
Tue, Mar 5, 3:18 AM

Mon, Mar 4

dmgreen updated the diff for D58770: [LSR] Attempt to increase the accuracy of LSR's setup cost.

Switchup the position of EnableRecursiveSetupCost.

Mon, Mar 4, 7:03 AM · Restricted Project
dmgreen added a comment to D58770: [LSR] Attempt to increase the accuracy of LSR's setup cost.

The Hexagon related test changes look good to me. Neither of these test changes indicate that your patch causes any problems. In swp-carried-1.ll, the hardware loop is no longer generated. In this case, I should just change the test to use a real value for the initial loop induction variable, %v4, instead of undef, say 0 (I can do that later). In swp-epilog-phi5.ll, the compiler is now generating an extra, innermost, hardware loop, so that's why the test changes from loop0 to loop1. The loop1/endloop1 instructions represent an outer hardware loop. This is another test that I should fix since subtle changes in the generated code cause the compiler to create/not create a hardware loop.

Mon, Mar 4, 7:03 AM · Restricted Project
dmgreen added a comment to D58872: [InstCombine] Start canonicalizing to uadd.sat and usub.sat.

Hello. This one looks OK from the tests I just ran. A few things moved, but only by a small amount, and usually in the right direction.

Mon, Mar 4, 4:16 AM · Restricted Project

Sun, Mar 3

dmgreen updated the diff for D58435: [SCEV] Ensure that isHighCostExpansion takes into account what is being divided.

Altered comment, and just use indvars for the tests (not instcombine/loop-delete).

Sun, Mar 3, 7:11 AM · Restricted Project
dmgreen added a comment to D58435: [SCEV] Ensure that isHighCostExpansion takes into account what is being divided.

Is it possible that the tests were checking the correctness for certain expressions that we no longer check because these happen to be expensive?

Sun, Mar 3, 7:04 AM · Restricted Project
dmgreen added inline comments to D55851: Implement basic loop fusion pass.
Sun, Mar 3, 6:14 AM · Restricted Project

Thu, Feb 28

dmgreen added a comment to D58633: [InstCombine] remove one-use restriction for icmp+add constant fold.

This is another one from cmsis dsp (https://github.com/ARM-software/CMSIS_5/blob/develop/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c). Apparently the original was 20% slower on a thumb1 target, but something daft is likely going on there, as it can sometimes make bad decisions.
https://reviews.llvm.org/P8130
There does look like there's some extra uxth's in there, I've not looked into why. I was compiling with something like "-target arm-arm-none-eabi -mcpu=cortex-m33 -O3" (or maybe m23 for the thumb1 case).

Thu, Feb 28, 11:46 AM · Restricted Project
dmgreen added a comment to D58633: [InstCombine] remove one-use restriction for icmp+add constant fold.

Yep. I think that makes sense to me. Would be good to remove the hack. And LSR should handle most of these cases. I think there's times when it doesn't do what it should, though.

Thu, Feb 28, 11:46 AM · Restricted Project
dmgreen added a comment to D58633: [InstCombine] remove one-use restriction for icmp+add constant fold.

Oh, and I presume most loop transforms will use SCEV's, which won't have changed? So we don't need to update the tests for them all, to make sure they are still doing what they should?

Thu, Feb 28, 4:15 AM · Restricted Project
dmgreen added a comment to D58633: [InstCombine] remove one-use restriction for icmp+add constant fold.

It looks like this was added on purpose way back in https://reviews.llvm.org/rL16473. That was so long ago that everything will have changed since then, but have you run any benchmarks for this?

Thu, Feb 28, 4:14 AM · Restricted Project
dmgreen created D58770: [LSR] Attempt to increase the accuracy of LSR's setup cost.
Thu, Feb 28, 3:11 AM · Restricted Project
dmgreen added a comment to D52138: [Thumb] Add some integer abs testcases for different typesizes..

From what I can tell, t.p.northover was added as a blocking reviewer, he didn't block this patch.

Thu, Feb 28, 1:27 AM · Restricted Project

Wed, Feb 27

dmgreen added reviewers for D58435: [SCEV] Ensure that isHighCostExpansion takes into account what is being divided: spatel, RKSimon.

This is targeted at codesize, but I ran the standard set of benchmarks and didn't see any changes that didn't look like noise.

Wed, Feb 27, 10:59 AM · Restricted Project
dmgreen added a comment to D52508: [InstCombine] Clean up after IndVarSimplify.

I have recently taken another looks at this, and came to the conclusion that, especially for some of the signed loops, we probably shouldn't be expanding these out in IndVars. They won't simplify even if we try to clear them up in instcombine. There is a check in there to bail if they are high cost SCEVs, but the logic seems a bit wrong and is treating them as low cost just because they are divided by a power of 2. (Which is SCEV's way of doing the mod).

Wed, Feb 27, 10:59 AM

Tue, Feb 26

dmgreen accepted D57763: [ARM] Add Cortex-M35P.

LGTM, cheers

Tue, Feb 26, 3:50 AM · Restricted Project
dmgreen accepted D57763: [ARM] Add Cortex-M35P.

Other than adding the two optimisation features, this LGTM.

Tue, Feb 26, 12:57 AM · Restricted Project

Mon, Feb 25

dmgreen committed rGb504f104b2d9: [ARM] Add some more missing T1 opcodes for the peephole optimisier (authored by dmgreen).
[ARM] Add some more missing T1 opcodes for the peephole optimisier
Mon, Feb 25, 7:53 AM
dmgreen committed rL354791: [ARM] Add some more missing T1 opcodes for the peephole optimisier.
[ARM] Add some more missing T1 opcodes for the peephole optimisier
Mon, Feb 25, 7:53 AM
dmgreen closed D58281: [ARM] Add some more missing T1 opcodes for the peephole optimisier.
Mon, Feb 25, 7:52 AM · Restricted Project

Fri, Feb 22

dmgreen committed rGacb628b2afb4: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs (authored by dmgreen).
[ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs
Fri, Feb 22, 4:23 AM
dmgreen committed rL354667: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs.
[ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs
Fri, Feb 22, 4:23 AM

Thu, Feb 21

dmgreen committed rG7a183a86beb4: Revert 354564: [ARM] Add some missing thumb1 opcodes to enable peephole… (authored by dmgreen).
Revert 354564: [ARM] Add some missing thumb1 opcodes to enable peephole…
Thu, Feb 21, 3:04 AM
dmgreen committed rL354569: Revert 354564: [ARM] Add some missing thumb1 opcodes to enable peephole….
Revert 354564: [ARM] Add some missing thumb1 opcodes to enable peephole…
Thu, Feb 21, 3:04 AM
dmgreen added a reverting change for rL354564: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs: rL354569: Revert 354564: [ARM] Add some missing thumb1 opcodes to enable peephole….
Thu, Feb 21, 3:04 AM
dmgreen committed rG89efe24eba0b: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs (authored by dmgreen).
[ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs
Thu, Feb 21, 2:30 AM
dmgreen committed rL354564: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs.
[ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs
Thu, Feb 21, 2:30 AM
dmgreen closed D57833: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs.
Thu, Feb 21, 2:30 AM · Restricted Project

Wed, Feb 20

dmgreen created D58435: [SCEV] Ensure that isHighCostExpansion takes into account what is being divided.
Wed, Feb 20, 3:31 AM · Restricted Project
dmgreen committed rGcb5a48b060fa: [Codegen] Remove dead flags on Physical Defs in machine cse (authored by dmgreen).
[Codegen] Remove dead flags on Physical Defs in machine cse
Wed, Feb 20, 2:23 AM
dmgreen committed rL354443: [Codegen] Remove dead flags on Physical Defs in machine cse.
[Codegen] Remove dead flags on Physical Defs in machine cse
Wed, Feb 20, 2:23 AM
dmgreen closed D58115: [Codegen] Remove dead flags on Physical Defs in machine cse.
Wed, Feb 20, 2:23 AM · Restricted Project

Feb 18 2019

dmgreen added a comment to D58115: [Codegen] Remove dead flags on Physical Defs in machine cse.

ping :)

Feb 18 2019, 3:01 PM · Restricted Project

Feb 16 2019

dmgreen committed rG87992de48736: Move multiline raw string literal out of macro. NFC (authored by dmgreen).
Move multiline raw string literal out of macro. NFC
Feb 16 2019, 3:19 AM
dmgreen committed rC354201: Move multiline raw string literal out of macro. NFC.
Move multiline raw string literal out of macro. NFC
Feb 16 2019, 3:19 AM
dmgreen committed rL354201: Move multiline raw string literal out of macro. NFC.
Move multiline raw string literal out of macro. NFC
Feb 16 2019, 3:18 AM

Feb 15 2019

dmgreen created D58281: [ARM] Add some more missing T1 opcodes for the peephole optimisier.
Feb 15 2019, 6:38 AM · Restricted Project

Feb 14 2019

dmgreen committed rG743abf2bd920: [ARM] Ensure we update the correct flags in the peephole optimiser (authored by dmgreen).
[ARM] Ensure we update the correct flags in the peephole optimiser
Feb 14 2019, 3:11 AM
dmgreen committed rL354018: [ARM] Ensure we update the correct flags in the peephole optimiser.
[ARM] Ensure we update the correct flags in the peephole optimiser
Feb 14 2019, 3:10 AM
dmgreen closed D58176: [ARM] Ensure we update the correct flags in the peephole optimiser.
Feb 14 2019, 3:10 AM · Restricted Project

Feb 13 2019

dmgreen added inline comments to D55851: Implement basic loop fusion pass.
Feb 13 2019, 9:41 AM · Restricted Project
dmgreen updated the diff for D58176: [ARM] Ensure we update the correct flags in the peephole optimiser.

Update comment

Feb 13 2019, 8:38 AM · Restricted Project
dmgreen updated the diff for D57833: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs.

Updates for IsThumb1

Feb 13 2019, 6:47 AM · Restricted Project
dmgreen updated the diff for D58176: [ARM] Ensure we update the correct flags in the peephole optimiser.
Feb 13 2019, 6:29 AM · Restricted Project
dmgreen created D58176: [ARM] Ensure we update the correct flags in the peephole optimiser.
Feb 13 2019, 6:19 AM · Restricted Project

Feb 12 2019

dmgreen committed rGc93c6f32744a: [Codegen] Make sure kill flags are not incorrect from removed machine phi's (authored by dmgreen).
[Codegen] Make sure kill flags are not incorrect from removed machine phi's
Feb 12 2019, 7:03 AM
dmgreen committed rL353847: [Codegen] Make sure kill flags are not incorrect from removed machine phi's.
[Codegen] Make sure kill flags are not incorrect from removed machine phi's
Feb 12 2019, 7:02 AM
dmgreen closed D58114: [Codegen] Make sure kill flags are not incorrect from removed machine phi's.
Feb 12 2019, 7:02 AM · Restricted Project
dmgreen added a comment to D58114: [Codegen] Make sure kill flags are not incorrect from removed machine phi's.

Oh, nice. We must have found the same thing at the same time. Thanks!

Feb 12 2019, 6:13 AM · Restricted Project
dmgreen created D58115: [Codegen] Remove dead flags on Physical Defs in machine cse.
Feb 12 2019, 5:11 AM · Restricted Project
dmgreen created D58114: [Codegen] Make sure kill flags are not incorrect from removed machine phi's.
Feb 12 2019, 4:31 AM · Restricted Project
dmgreen added inline comments to D57833: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs.
Feb 12 2019, 4:27 AM · Restricted Project
dmgreen added a comment to D57789: [CGP] form usub with overflow from sub+icmp.

Thanks. We will try and figure out some of the changes, see if we can get this enabled.

Feb 12 2019, 4:17 AM · Restricted Project

Feb 11 2019

dmgreen accepted D57942: [ARM] Add v8m.base pattern for add negative imm.

LGTM

Feb 11 2019, 3:20 AM · Restricted Project
dmgreen added a comment to D57789: [CGP] form usub with overflow from sub+icmp.

Hello. I ran some benchmarks and they were kind of all over the place, but on average a little down. The Arm backend seems to be quite opinionated about the uaddo's, using it's own nodes for a lot of things, so there might be some missing parts. There were enough ups in there to make us think that this can be good (and can show areas of improvement like in D57833), but we may need a few fixes first. Putting it behind a target hook in the meantime whilst we take a look does sound sensible.

Feb 11 2019, 3:12 AM · Restricted Project

Feb 9 2019

dmgreen added a comment to D57942: [ARM] Add v8m.base pattern for add negative imm.

It looks like there are already a couple of patterns in ARMInstrThumb2.td for thumb1 instructions. I think with a comment it would be fine to put it in there. HasV8MBaseline tends to cross Thumb1/Thumb2 already.

Feb 9 2019, 11:12 AM · Restricted Project

Feb 8 2019

dmgreen added a comment to D57942: [ARM] Add v8m.base pattern for add negative imm.

As far as understand, ARMInstrThumb.td is just #included in the other tablegen file. I guess the ordering might be important for them. Would it work better if it's defined in ARMInstrThumb2.td?

Feb 8 2019, 6:05 AM · Restricted Project
dmgreen added inline comments to D57942: [ARM] Add v8m.base pattern for add negative imm.
Feb 8 2019, 5:14 AM · Restricted Project

Feb 7 2019

dmgreen updated the diff for D57833: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs.

Fixed that bit I missed, plus better formatting and cleanup

Feb 7 2019, 3:21 AM · Restricted Project
dmgreen committed rG7e6da8163325: [ARM] Reformat isRedundantFlagInstr for D57833. NFC (authored by dmgreen).
[ARM] Reformat isRedundantFlagInstr for D57833. NFC
Feb 7 2019, 2:52 AM
dmgreen committed rL353386: [ARM] Reformat isRedundantFlagInstr for D57833. NFC.
[ARM] Reformat isRedundantFlagInstr for D57833. NFC
Feb 7 2019, 2:51 AM

Feb 6 2019

dmgreen added inline comments to D57763: [ARM] Add Cortex-M35P.
Feb 6 2019, 2:05 PM · Restricted Project
dmgreen planned changes to D57833: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs.
Feb 6 2019, 11:38 AM · Restricted Project
dmgreen created D57833: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs.
Feb 6 2019, 11:29 AM · Restricted Project

Feb 4 2019

dmgreen committed rGb4f36a2196eb: [ARM] Mark 255 and 65535 as cheap for Thumb1 "And" (authored by dmgreen).
[ARM] Mark 255 and 65535 as cheap for Thumb1 "And"
Feb 4 2019, 3:59 AM