Page MenuHomePhabricator

dmgreen (Dave Green)
User

Projects

User does not belong to any projects.

User Details

User Since
May 24 2016, 8:35 AM (173 w, 5 d)

Recent Activity

Today

dmgreen added inline comments to D67158: [ARM] Add IR intrinsics for a sample of MVE instructions..
Mon, Sep 23, 12:12 AM · Restricted Project
dmgreen added a comment to D67438: [InstCombine] Range metadata for ARM MVE VMIN/VMAX..

This is because the Rda parameter of a vminv is treated as being the same size as the elements? Not as a 32bit integer.

Mon, Sep 23, 12:04 AM · Restricted Project

Sat, Sep 21

dmgreen accepted D67801: [ARM][LowOverheadLoops] Use subs during revert..

Nice. LGTM then.

Sat, Sep 21, 4:03 AM · Restricted Project

Fri, Sep 20

dmgreen added a comment to D67801: [ARM][LowOverheadLoops] Use subs during revert..

Is it possible for the CPSR to already be live? Live across the loop or something like it?

Fri, Sep 20, 5:33 AM · Restricted Project
dmgreen accepted D67796: [ARM][LowOverheadLoops] Use tBcc when reverting.

LGTM

Fri, Sep 20, 5:33 AM · Restricted Project
dmgreen created D67828: [ARM] Split large truncating MVE stores.
Fri, Sep 20, 4:38 AM · Restricted Project

Thu, Sep 19

dmgreen accepted D67769: [ARM] Fix CTTZ for MVE.

Righteo, LGTM.

Thu, Sep 19, 1:56 PM · Restricted Project
dmgreen committed rG0cfb78e52af2: [ARM] MVE i1 splat (authored by dmgreen).
[ARM] MVE i1 splat
Thu, Sep 19, 5:23 AM
dmgreen committed rL372313: [ARM] MVE i1 splat.
[ARM] MVE i1 splat
Thu, Sep 19, 5:22 AM
dmgreen closed D67653: [ARM] MVE i1 splat.
Thu, Sep 19, 5:22 AM · Restricted Project

Tue, Sep 17

dmgreen updated subscribers of D62394: [ARM][CMSE] Add CMSE header & builtins.

I'm afraid the upstreaming of CMSE has stalled, and this is not all that would be needed to get it working. This adds some header files and clang builtins, the selection of them in the backend isn't yet present, hence the error you are seeing. There are more patches to follow around lowering intrinsics and clearing registers correctly.

Tue, Sep 17, 10:52 AM
dmgreen added a comment to D67539: [ARM][LowOverheadLoops] Add LR def safety check.

Hello. Yes, that should all be fixed now. Let us know if anything else is looking off.

Tue, Sep 17, 10:33 AM · Restricted Project
dmgreen updated the diff for D67664: [ARM] Ensure we do not attempt to create lsll #0.

Now using long_shift as an ImmLeaf.

Tue, Sep 17, 10:02 AM · Restricted Project
dmgreen created D67664: [ARM] Ensure we do not attempt to create lsll #0.
Tue, Sep 17, 9:20 AM · Restricted Project
dmgreen committed rG91724b853076: [ARM] Add a SelectTAddrModeImm7 for MVE narrow loads and stores (authored by dmgreen).
[ARM] Add a SelectTAddrModeImm7 for MVE narrow loads and stores
Tue, Sep 17, 8:33 AM
dmgreen committed rL372134: [ARM] Add a SelectTAddrModeImm7 for MVE narrow loads and stores.
[ARM] Add a SelectTAddrModeImm7 for MVE narrow loads and stores
Tue, Sep 17, 8:33 AM
dmgreen closed D67489: [ARM] Add a SelectTAddrModeImm7 for MVE narrow loads and stores.
Tue, Sep 17, 8:33 AM · Restricted Project
dmgreen committed rGc42ca16cfa07: [ARM] Fixup pipeline test. NFC (authored by dmgreen).
[ARM] Fixup pipeline test. NFC
Tue, Sep 17, 8:26 AM
dmgreen committed rL372133: [ARM] Fixup pipeline test. NFC.
[ARM] Fixup pipeline test. NFC
Tue, Sep 17, 8:26 AM
dmgreen committed rG22a2209433a4: [ARM] Reserve an emergency spill slot for fp16 addressing modes that need it (authored by dmgreen).
[ARM] Reserve an emergency spill slot for fp16 addressing modes that need it
Tue, Sep 17, 8:26 AM
dmgreen committed rL372132: [ARM] Reserve an emergency spill slot for fp16 addressing modes that need it.
[ARM] Reserve an emergency spill slot for fp16 addressing modes that need it
Tue, Sep 17, 8:21 AM
dmgreen closed D67483: [ARM] Reserve an emergency spill slot for fp16 addressing modes that need it.
Tue, Sep 17, 8:21 AM · Restricted Project
dmgreen committed rG1ff955305768: [ARM] Fix for MVE load/store stack accesses (authored by dmgreen).
[ARM] Fix for MVE load/store stack accesses
Tue, Sep 17, 6:01 AM
dmgreen committed rL372114: [ARM] Fix for MVE load/store stack accesses.
[ARM] Fix for MVE load/store stack accesses
Tue, Sep 17, 6:01 AM
dmgreen closed D67327: [ARM] Fix for MVE narrow load/store stack accesses.
Tue, Sep 17, 6:01 AM · Restricted Project
dmgreen created D67653: [ARM] MVE i1 splat.
Tue, Sep 17, 4:37 AM · Restricted Project
dmgreen accepted D67539: [ARM][LowOverheadLoops] Add LR def safety check.

LGTM. Thanks.

Tue, Sep 17, 3:55 AM · Restricted Project
dmgreen updated the diff for D67327: [ARM] Fix for MVE narrow load/store stack accesses.

The widening/narrowing MVE loads and stores, like MVE_VLDRBU32 (the B with the 32, in this example) can only take "thumb" registers as they only have 3 bits for the Rn operand. Which is what I meant by "can't take SP". This is not something that any other stack load/store has had to deal with in the past, and hence RegClass->contains(ARM::SP) is added here to check for such cases. Similar to https://reviews.llvm.org/D66285.

Tue, Sep 17, 3:36 AM · Restricted Project
dmgreen added a comment to D67327: [ARM] Fix for MVE narrow load/store stack accesses.

The AddrModeT2_i7, etc can still be generated from the non-widening forms of the MVE loads/stores (as they accept a GPR not a tGPR they can take SP too). I don't think the narrowing loads (the ones that cannot accept a stack pointer) will be generated any more, but I'd prefer to fix these cases nonetheless. They may change in the future and these failures are silent until the function gets complex enough to trigger them, so can be difficult to test for.

Tue, Sep 17, 2:38 AM · Restricted Project
dmgreen added inline comments to D67489: [ARM] Add a SelectTAddrModeImm7 for MVE narrow loads and stores.
Tue, Sep 17, 2:29 AM · Restricted Project
dmgreen accepted D67404: [ARM] LE support in ConstantIslands.

I'd say that it's sub-optimal... I don't know how often the issue will arise and whether that justifies using LoopInfo here. I'm also unsure how that extra logic would fit in with the current optimisation as we'd want to visit inner loops first, instead of walking backwards.

Tue, Sep 17, 1:56 AM · Restricted Project

Mon, Sep 16

dmgreen committed rG8d21460dc50e: [ARM] A predicate cast of a predicate cast is a predicate cast (authored by dmgreen).
[ARM] A predicate cast of a predicate cast is a predicate cast
Mon, Sep 16, 10:31 AM
dmgreen committed rL372012: [ARM] A predicate cast of a predicate cast is a predicate cast.
[ARM] A predicate cast of a predicate cast is a predicate cast
Mon, Sep 16, 10:31 AM
dmgreen closed D67591: [ARM] A predicate cast of a predicate cast is a predicate cast.
Mon, Sep 16, 10:31 AM · Restricted Project
dmgreen added a comment to D67404: [ARM] LE support in ConstantIslands.

Thanks. You mentioned something about nested loops. Is that still an issue?

Mon, Sep 16, 8:53 AM · Restricted Project
dmgreen added a comment to D67539: [ARM][LowOverheadLoops] Add LR def safety check.

Will tracking liveness this late be OK? I have a memory of it not being reliable, but that might have been fixed up recently?

Mon, Sep 16, 8:36 AM · Restricted Project
dmgreen added a comment to D67591: [ARM] A predicate cast of a predicate cast is a predicate cast.

Yeah, it's a shame about the masked ld-st tests. They appear to be in a different order, causing the extra register usage. Seems like more of a scheduling problem. The tests in mve-pred-bitcast.ll and mve-pred-loadstore.ll are both smaller (and the masked load-store tests will eventually generate narrow/widen masked loads/stores.)

Mon, Sep 16, 6:20 AM · Restricted Project
dmgreen committed rGce7328cb61d0: [ARM] Fold VCMP into VPT (authored by dmgreen).
[ARM] Fold VCMP into VPT
Mon, Sep 16, 6:02 AM
dmgreen committed rL371982: [ARM] Fold VCMP into VPT.
[ARM] Fold VCMP into VPT
Mon, Sep 16, 6:01 AM
dmgreen closed D66577: [ARM] Fold VCMP into VPT.
Mon, Sep 16, 6:01 AM · Restricted Project
dmgreen accepted D67594: [LoopUnroll] Use LoopSize+1 as threshold, to allow unrolling loops matching LoopSize..

LGTM

Mon, Sep 16, 6:01 AM · Restricted Project
dmgreen created D67614: [ARM] SBFX from rsb patterns.
Mon, Sep 16, 6:01 AM · Restricted Project

Sun, Sep 15

dmgreen added a comment to D67594: [LoopUnroll] Use LoopSize+1 as threshold, to allow unrolling loops matching LoopSize..

So we unroll the loop if the sizes are equal too? Sounds sensible to me.

Sun, Sep 15, 1:29 PM · Restricted Project
dmgreen updated the diff for D67483: [ARM] Reserve an emergency spill slot for fp16 addressing modes that need it.

Thanks. Good to know I'm not barking up the wrong tree.

Sun, Sep 15, 12:42 PM · Restricted Project
dmgreen committed rGb325c057322c: [ARM] Masked loads and stores (authored by dmgreen).
[ARM] Masked loads and stores
Sun, Sep 15, 7:15 AM
dmgreen committed rL371932: [ARM] Masked loads and stores.
[ARM] Masked loads and stores
Sun, Sep 15, 7:13 AM
dmgreen closed D67186: [ARM] Masked loads and stores.
Sun, Sep 15, 7:13 AM · Restricted Project
dmgreen created D67591: [ARM] A predicate cast of a predicate cast is a predicate cast.
Sun, Sep 15, 6:36 AM · Restricted Project
dmgreen added a comment to D67186: [ARM] Masked loads and stores.

Thanks. Sorry, I was on a bit of a bug hunt, and this is the opposite of that ;) It's behind an option though, so should be fine.

Sun, Sep 15, 6:25 AM · Restricted Project
dmgreen committed rG06b309d52749: [ARM] Simplify and update vmla test. NFC (authored by dmgreen).
[ARM] Simplify and update vmla test. NFC
Sun, Sep 15, 4:52 AM
dmgreen committed rL371930: [ARM] Simplify and update vmla test. NFC.
[ARM] Simplify and update vmla test. NFC
Sun, Sep 15, 4:52 AM

Fri, Sep 13

dmgreen committed rGb7b7f26220c6: [ARM] Add earlyclobber for cross beat MVE instructions (authored by dmgreen).
[ARM] Add earlyclobber for cross beat MVE instructions
Fri, Sep 13, 4:20 AM
dmgreen committed rL371838: [ARM] Add earlyclobber for cross beat MVE instructions.
[ARM] Add earlyclobber for cross beat MVE instructions
Fri, Sep 13, 4:19 AM
dmgreen closed D67462: [ARM] earlyclobber cross beat MVE instructions.
Fri, Sep 13, 4:18 AM · Restricted Project
dmgreen accepted D67107: [ARM] Add patterns for bitreverse intrinsic on MVE.

LGTM. Thanks

Fri, Sep 13, 2:22 AM · Restricted Project
dmgreen accepted D67106: [ARM] Add patterns for BSWAP intrinsic on MVE.

LGTM

Fri, Sep 13, 2:03 AM · Restricted Project
dmgreen accepted D67108: [ARM] Lower CTTZ on MVE.

Like it. LGTM.

Fri, Sep 13, 1:59 AM · Restricted Project
dmgreen added a comment to D67160: [clang,ARM] Default to -fno-lax-vector-conversions in ARM v8.1-M..

FYI: rL371817, in case it changes what is done here.

Fri, Sep 13, 1:14 AM · Restricted Project

Thu, Sep 12

dmgreen added a comment to D67404: [ARM] LE support in ConstantIslands.

Nice. I was expecting this to happen earlier, maybe in the other branch optimisations. This seems like a good place for it, though.

Thu, Sep 12, 10:10 PM · Restricted Project
dmgreen committed rGa6e944b17311: [CGP] Ensure sinking multiple instructions does not invalidate dominance checks (authored by dmgreen).
[CGP] Ensure sinking multiple instructions does not invalidate dominance checks
Thu, Sep 12, 9:06 AM
dmgreen committed rL371743: [CGP] Ensure sinking multiple instructions does not invalidate dominance checks.
[CGP] Ensure sinking multiple instructions does not invalidate dominance checks
Thu, Sep 12, 8:59 AM
dmgreen closed D67366: [CGP] Ensure sinking multiple instructions does not invalidate dominance checks.
Thu, Sep 12, 8:58 AM · Restricted Project
dmgreen accepted D66413: [ARM} Add support for MVE vmaxv and vminv.

Thanks! Looks good to me.

Thu, Sep 12, 8:33 AM · Restricted Project
dmgreen created D67489: [ARM] Add a SelectTAddrModeImm7 for MVE narrow loads and stores.
Thu, Sep 12, 3:53 AM · Restricted Project
dmgreen created D67483: [ARM] Reserve an emergency spill slot for fp16 addressing modes that need it.
Thu, Sep 12, 2:18 AM · Restricted Project

Wed, Sep 11

dmgreen created D67462: [ARM] earlyclobber cross beat MVE instructions.
Wed, Sep 11, 12:52 PM · Restricted Project

Tue, Sep 10

dmgreen updated the diff for D67366: [CGP] Ensure sinking multiple instructions does not invalidate dominance checks.
Tue, Sep 10, 2:56 PM · Restricted Project
dmgreen added inline comments to D67366: [CGP] Ensure sinking multiple instructions does not invalidate dominance checks.
Tue, Sep 10, 2:56 PM · Restricted Project

Mon, Sep 9

dmgreen created D67366: [CGP] Ensure sinking multiple instructions does not invalidate dominance checks.
Mon, Sep 9, 1:15 PM · Restricted Project
dmgreen committed rG2b7089949eda: [ARM] Fix loads and stores for predicate vectors (authored by dmgreen).
[ARM] Fix loads and stores for predicate vectors
Mon, Sep 9, 9:36 AM
dmgreen committed rL371419: [ARM] Fix loads and stores for predicate vectors.
[ARM] Fix loads and stores for predicate vectors
Mon, Sep 9, 9:34 AM
dmgreen closed D67085: [ARM] Fix loads and stores for predicate vectors.
Mon, Sep 9, 9:34 AM · Restricted Project
dmgreen accepted D67214: [ARM] Remove some spurious MVE reduction instructions..

Nice one. LGTM.

Mon, Sep 9, 8:13 AM · Restricted Project
dmgreen accepted D67306: [IfConversion] Correctly handle cases where analyzeBranch fails..

Sorry, yes, I think this makes sense over the alternative of analyzeBranch not setting TrueBB/FalseBB. LGTM

Mon, Sep 9, 8:03 AM · Restricted Project
dmgreen updated the diff for D67085: [ARM] Fix loads and stores for predicate vectors.

Now with v16i1, which doesn't need the extracts/buildvector, just going through the vmrs into a vstrh store.

Mon, Sep 9, 7:09 AM · Restricted Project
dmgreen added a comment to D67085: [ARM] Fix loads and stores for predicate vectors.

One question though. Loading and story and story data.....do we need to worry about LE and BE here?

Mon, Sep 9, 5:40 AM · Restricted Project
dmgreen accepted D67344: [ARM][MVE] VCTP instruction selection.

LGTM

Mon, Sep 9, 4:42 AM · Restricted Project
dmgreen added inline comments to D66413: [ARM} Add support for MVE vmaxv and vminv.
Mon, Sep 9, 4:13 AM · Restricted Project
dmgreen committed rGd936a6301bd3: [ARM] Prevent generating NEON stack accesses under MVE. (authored by dmgreen).
[ARM] Prevent generating NEON stack accesses under MVE.
Mon, Sep 9, 3:47 AM
dmgreen committed rL371386: [ARM] Prevent generating NEON stack accesses under MVE..
[ARM] Prevent generating NEON stack accesses under MVE.
Mon, Sep 9, 3:45 AM
dmgreen closed D67169: [ARM] Prevent generating NEON stack accesses under MVE..
Mon, Sep 9, 3:45 AM · Restricted Project
dmgreen added a comment to D67344: [ARM][MVE] VCTP instruction selection.

I'm also wondering how this fits in with D67085...

Mon, Sep 9, 3:18 AM · Restricted Project
dmgreen added inline comments to D67158: [ARM] Add IR intrinsics for a sample of MVE instructions..
Mon, Sep 9, 2:51 AM · Restricted Project

Sun, Sep 8

dmgreen added a comment to D67214: [ARM] Remove some spurious MVE reduction instructions..

Change looks sensible to me, but how difficult would this be to do without the, umm, creative use of foreach?

Sun, Sep 8, 12:23 PM · Restricted Project
dmgreen committed rGdf2501adcac7: [ARM] Remove declaration of unimplemented function. NFC. (authored by dmgreen).
[ARM] Remove declaration of unimplemented function. NFC.
Sun, Sep 8, 6:13 AM
dmgreen committed rL371331: [ARM] Remove declaration of unimplemented function. NFC..
[ARM] Remove declaration of unimplemented function. NFC.
Sun, Sep 8, 6:11 AM
dmgreen created D67327: [ARM] Fix for MVE narrow load/store stack accesses.
Sun, Sep 8, 6:08 AM · Restricted Project

Fri, Sep 6

dmgreen accepted D67269: [ARM] Add patterns for VSUB with q and r registers.

LGTM. Nice one.

Fri, Sep 6, 8:20 AM · Restricted Project
dmgreen accepted D67270: [ARM] Add patterns for VADD with q and r registers.

LGTM

Fri, Sep 6, 8:16 AM · Restricted Project
dmgreen added a comment to D66295: [ARM] Sink add/mul(shufflevector(insertelement(...), ...), ...) for MVE instruction selection.

Very nice. Oliver went and put together a few patches for mul, add and sub, in https://reviews.llvm.org/D67268 and related. So we now (or soon will) produce the other instruction this can effect. This is good to go I think.

Fri, Sep 6, 8:16 AM · Restricted Project
dmgreen accepted D67268: [ARM] Add patterns for VMUL with q and r registers.

Thanks. LGTM

Fri, Sep 6, 8:10 AM · Restricted Project
dmgreen added a comment to D67268: [ARM] Add patterns for VMUL with q and r registers.

Nice. Can you add tests for the %src and %sp being the other way around in the mul too? I think the same patterns should catch them, but it's worth having the tests.

Fri, Sep 6, 6:17 AM · Restricted Project

Thu, Sep 5

dmgreen added a comment to D67162: [InstCombine] Known-bits optimization for ARM MVE VADC..

Sounds good.

Thu, Sep 5, 7:39 AM · Restricted Project
dmgreen committed rG83a33412465a: [ARM] Fixup the creation of VPT blocks (authored by dmgreen).
[ARM] Fixup the creation of VPT blocks
Thu, Sep 5, 6:38 AM
dmgreen committed rL371064: [ARM] Fixup the creation of VPT blocks.
[ARM] Fixup the creation of VPT blocks
Thu, Sep 5, 6:36 AM
dmgreen closed D67219: [ARM] Fixup the creation of VPT blocks.
Thu, Sep 5, 6:36 AM · Restricted Project
dmgreen added a comment to D67219: [ARM] Fixup the creation of VPT blocks.

Thanks

Thu, Sep 5, 6:36 AM · Restricted Project
dmgreen added a comment to D66580: [ARM] Fold VPNOT into vpt blocks.

It turns out that I do really need this to stop the old version from crashing. But I think this patch is trying to do too much, both fixing the bugs and adding VPNOT's at the same time. I've re-done the fixes as D67219, and will get back to this later.

Thu, Sep 5, 4:09 AM · Restricted Project
dmgreen created D67219: [ARM] Fixup the creation of VPT blocks.
Thu, Sep 5, 4:05 AM · Restricted Project
dmgreen accepted D67203: [IfConversion] Fix diamond conversion with unanalyzable branches..

LGTM

Thu, Sep 5, 2:49 AM · Restricted Project