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dmgreen (Dave Green)
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User Since
May 24 2016, 8:35 AM (225 w, 2 d)

Recent Activity

Yesterday

dmgreen added inline comments to D87753: [ARM] Add more validForTailPredication.
Thu, Sep 17, 10:47 AM · Restricted Project
dmgreen accepted D87786: [LoopUnrollAndJam] Allow unroll and jam loops forced by user..

Nice. I was worried this would be a bit convoluted, but it's clean like this just setting UP.UnrollAndJam.

Thu, Sep 17, 10:13 AM · Restricted Project
dmgreen added a comment to D87826: [ARM] Enable multiple icmp when tail folding.

I have the feeling that this was protecting us from more than just things that would become vpt blocks. I think we have a check that the original was only a single loop? That would keep things simpler at least, to mostly icmp + select (and maybe zext(icmp), but as far as I understand that should be fine). Things like min/max/abs should all work OK, and select on their own. But what about the saturating intrinsics we have? vqmovn for example.

Thu, Sep 17, 10:10 AM · Restricted Project
dmgreen added inline comments to D87836: [ARM]Fold select_cc(vecreduce_[u|s][min|max], x) into VMINV or VMAXV.
Thu, Sep 17, 9:45 AM · Restricted Project
dmgreen committed rG7f7993e0daf4: [ARM] Expand distributing increments to also handle existing pre/post inc… (authored by dmgreen).
[ARM] Expand distributing increments to also handle existing pre/post inc…
Thu, Sep 17, 8:59 AM
dmgreen closed D83377: [ARM] Expand distributing increments to also handle existing pre/post inc instructions..
Thu, Sep 17, 8:59 AM · Restricted Project
dmgreen committed rG72a4a478fe12: [ARM] Add more MVE postinc distribution tests. NFC (authored by dmgreen).
[ARM] Add more MVE postinc distribution tests. NFC
Thu, Sep 17, 8:33 AM
dmgreen committed rG34b27b9441d2: [ARM] Sink splats to MVE intrinsics (authored by dmgreen).
[ARM] Sink splats to MVE intrinsics
Thu, Sep 17, 8:01 AM
dmgreen closed D87693: [ARM] Sink splats to MVE intrinsics.
Thu, Sep 17, 8:01 AM · Restricted Project
dmgreen committed rGfece1489d10b: [ARM] Additional tests for qr intrinsics in loops. NFC (authored by dmgreen).
[ARM] Additional tests for qr intrinsics in loops. NFC
Thu, Sep 17, 4:39 AM
dmgreen committed rGa615226743d0: [ARM] Extra fp16 bitcast tests. NFC (authored by dmgreen).
[ARM] Extra fp16 bitcast tests. NFC
Thu, Sep 17, 4:10 AM
dmgreen added a comment to D87786: [LoopUnrollAndJam] Allow unroll and jam loops forced by user..

I guess in my mind unroll and jam was a lot like runtime loop unrolling, which has to be enabled per target.

Thu, Sep 17, 1:14 AM · Restricted Project

Wed, Sep 16

dmgreen requested review of D87790: [ARM] Select f32 constants with vmov.f16.
Wed, Sep 16, 1:22 PM · Restricted Project
dmgreen requested review of D87789: [ARM] Constant fold VMOVrh.
Wed, Sep 16, 1:14 PM · Restricted Project
dmgreen added inline comments to D87616: [ARM][LowOverheadLoops] Combine a VCMP and VPST into a VPT.
Wed, Sep 16, 10:13 AM · Restricted Project
dmgreen added inline comments to D87753: [ARM] Add more validForTailPredication.
Wed, Sep 16, 10:09 AM · Restricted Project
dmgreen accepted D87231: [AArch64] Match pairwise add/fadd pattern.

Thanks for making the extra fp16 patterns too. LGTM

Wed, Sep 16, 9:56 AM · Restricted Project
dmgreen accepted D87769: [ARM][MVE] tail-predication: predicate new checks on force-enabled option.

Sounds like a good idea in the short term. Thanks

Wed, Sep 16, 8:46 AM · Restricted Project
dmgreen added inline comments to D87231: [AArch64] Match pairwise add/fadd pattern.
Wed, Sep 16, 3:06 AM · Restricted Project

Tue, Sep 15

dmgreen requested review of D87693: [ARM] Sink splats to MVE intrinsics.
Tue, Sep 15, 7:37 AM · Restricted Project
dmgreen added inline comments to D83377: [ARM] Expand distributing increments to also handle existing pre/post inc instructions..
Tue, Sep 15, 5:53 AM · Restricted Project
dmgreen updated the diff for D83377: [ARM] Expand distributing increments to also handle existing pre/post inc instructions..

Rebase and rename backwards function.

Tue, Sep 15, 5:51 AM · Restricted Project
dmgreen added inline comments to D87679: [LV] Unroll factor is expected to be > 0.
Tue, Sep 15, 3:38 AM · Restricted Project
dmgreen updated the diff for D82678: [CGP] Set debug locations when optimizing phi types.

Rebase. I don't claim to be a big debug expert, I'm not sure if the debug value on bitcasts/phis is super important.

Tue, Sep 15, 3:33 AM · debug-info, Restricted Project

Mon, Sep 14

dmgreen accepted D87569: [Legalize][ARM][X86] Add float legalization for VECREDUCE.

This looks good to me. It may be worth adding some fmin/fmax tests with the fadds, just because they can end up being a little different.

Mon, Sep 14, 9:34 AM · Restricted Project
dmgreen committed rG08baa979235a: [ARM] Enable tail predication for reduction tests. NFC (authored by dmgreen).
[ARM] Enable tail predication for reduction tests. NFC
Mon, Sep 14, 6:26 AM
dmgreen committed rG06fb4e90649f: [CGP] Limit converting phi types to simple loads and stores (authored by dmgreen).
[CGP] Limit converting phi types to simple loads and stores
Mon, Sep 14, 4:09 AM
dmgreen closed D83770: [CGP] Limit converting phi types to simple loads and stores.
Mon, Sep 14, 4:08 AM · Restricted Project
dmgreen added a comment to D86452: [LV] Fix scalar cost for tail predicated loops.

Yep, that's the plan. It will need a number of other patches though. I think one for adding a cost to predicated blocks is important, along with the one for costing masked loads more correctly under MVE.

Mon, Sep 14, 3:49 AM · Restricted Project

Sun, Sep 13

dmgreen committed rG9237fde48139: [CGP] Prevent optimizePhiType from iterating forever (authored by dmgreen).
[CGP] Prevent optimizePhiType from iterating forever
Sun, Sep 13, 8:11 AM
dmgreen closed D82676: [CGP] Prevent optimizePhiType from iterating forever.
Sun, Sep 13, 8:11 AM · Restricted Project

Sat, Sep 12

dmgreen committed rG74760bb00fb9: [LV][ARM] Add preferInloopReduction target hook. (authored by dmgreen).
[LV][ARM] Add preferInloopReduction target hook.
Sat, Sep 12, 9:48 AM
dmgreen closed D75512: [LoopVectorizer][ARM] Add preferInloopReduction target hook..
Sat, Sep 12, 9:48 AM · Restricted Project
dmgreen closed D87287: [ARM] Fixup single source mla reductions..
Sat, Sep 12, 6:49 AM · Restricted Project
dmgreen committed rG6cfd38d03d5f: [ARM] Fixup single source mla reductions. (authored by dmgreen).
[ARM] Fixup single source mla reductions.
Sat, Sep 12, 6:31 AM
dmgreen accepted D87557: [AArch64][MachineScheduler] Fix operand scheduling for pre/post-increment loads.

Thanks. LGTM

Sat, Sep 12, 6:16 AM · Restricted Project
dmgreen committed rGc437446d90be: [ARM] Recognize "double extend" reduction patterns (authored by dmgreen).
[ARM] Recognize "double extend" reduction patterns
Sat, Sep 12, 5:52 AM
dmgreen closed D87276: [ARM] Recognize "double extend" reduction patterns.
Sat, Sep 12, 5:52 AM · Restricted Project
dmgreen added a comment to D87557: [AArch64][MachineScheduler] Fix operand scheduling for pre/post-increment loads.

STRWpost should be $x0 = STRWpost $xzr, $x0. The concept of scheduling a store can be a little strange, but the address update should come as the first operand.

Sat, Sep 12, 5:44 AM · Restricted Project

Fri, Sep 11

dmgreen committed rGab2ed8bce9e9: [SVE] Regenerate sve vector bits tests. NFC (authored by dmgreen).
[SVE] Regenerate sve vector bits tests. NFC
Fri, Sep 11, 10:52 AM
dmgreen added a comment to D84451: [LV] Tail folded inloop reductions..

Ping

Fri, Sep 11, 10:47 AM · Restricted Project
dmgreen committed rG40b72c9c7920: [ARM] Extra MLA reductions tests. NFC (authored by dmgreen).
[ARM] Extra MLA reductions tests. NFC
Fri, Sep 11, 9:51 AM
dmgreen updated the diff for D82676: [CGP] Prevent optimizePhiType from iterating forever.

I've tried to rewrite this to something less convoluted. Hopefully it's a little more straightforward than the nested code from before.

Fri, Sep 11, 9:40 AM · Restricted Project
dmgreen committed rG9fda213ac0e2: [ARM] Update arm-storebytesmerge.ll test. NFC (authored by dmgreen).
[ARM] Update arm-storebytesmerge.ll test. NFC
Fri, Sep 11, 5:57 AM

Thu, Sep 10

dmgreen accepted D87379: [ARM] Selects SSAT/USAT from LLVM IR of min/max patterns.

Nice one. LGTM

Thu, Sep 10, 1:08 PM · Restricted Project
dmgreen added a comment to D87457: [ARM][TTI] Prevents constants in a min/max pattern from being hoisted when in a loop.

The TTI changes here look OK to me. I think it is probably worth trying to make the ARM check a bit more specific though. We are trying to match a SSAT, not any min/max. It's worth making sure that the subtarget will have an SSAT instruction, and that the size of the type we will be saturating to will fit into an i32.

Thu, Sep 10, 1:08 PM · Restricted Project
dmgreen added a reviewer for D87430: [ARM] Add heuristic to avoid lowering calls to blx for Thumb1 in ARMTargetLowering::LowerCall: efriedma.
Thu, Sep 10, 12:20 PM · Restricted Project
dmgreen added inline comments to D87430: [ARM] Add heuristic to avoid lowering calls to blx for Thumb1 in ARMTargetLowering::LowerCall.
Thu, Sep 10, 12:20 PM · Restricted Project
dmgreen added inline comments to D87391: [Intrinsics] define semantics for experimental fmax/fmin vector reductions.
Thu, Sep 10, 6:43 AM · Restricted Project
dmgreen added a comment to D86684: [Refactor] Add the SchedHeuristic for Scheduler to allow platform customizing the heuristics.

This seems OK to me, if you can get some others to agree.

Thu, Sep 10, 12:21 AM · Restricted Project
dmgreen added a comment to D87287: [ARM] Fixup single source mla reductions..

It could probably be done either way, but this seemed simpler when I wrote it. I was trying to keep the functions cleaner. Otherwise they will have to start looking backwards from the mul (which has two operands the same) up to the extend to check it's type.

Thu, Sep 10, 12:07 AM · Restricted Project
dmgreen accepted D87348: [ARM] Tail predicate VQDMULH and VQRDMULH.

Sounds good. Thanks.

Thu, Sep 10, 12:03 AM · Restricted Project
dmgreen added inline comments to D87391: [Intrinsics] define semantics for experimental fmax/fmin vector reductions.
Thu, Sep 10, 12:02 AM · Restricted Project

Wed, Sep 9

dmgreen added a comment to D87379: [ARM] Selects SSAT/USAT from LLVM IR of min/max patterns.

It's probably worth adding something to the commit message about how llvm will canonicalize to different patterns than the old code would select from, and that this is updating it to the new expected form.

Wed, Sep 9, 11:46 AM · Restricted Project
dmgreen added inline comments to D87391: [Intrinsics] define semantics for experimental fmax/fmin vector reductions.
Wed, Sep 9, 10:52 AM · Restricted Project
dmgreen added inline comments to D87391: [Intrinsics] define semantics for experimental fmax/fmin vector reductions.
Wed, Sep 9, 10:40 AM · Restricted Project

Tue, Sep 8

dmgreen added inline comments to D87280: [ARM] Try to rematerialize VCTP instructions.
Tue, Sep 8, 8:08 AM · Restricted Project
dmgreen added inline comments to D87280: [ARM] Try to rematerialize VCTP instructions.
Tue, Sep 8, 6:59 AM · Restricted Project
dmgreen requested review of D87287: [ARM] Fixup single source mla reductions..
Tue, Sep 8, 6:58 AM · Restricted Project
dmgreen requested review of D87276: [ARM] Recognize "double extend" reduction patterns.
Tue, Sep 8, 3:20 AM · Restricted Project

Mon, Sep 7

dmgreen added a comment to D75512: [LoopVectorizer][ARM] Add preferInloopReduction target hook..

There are some tests for 64bit reductions. We will probably want to enable inloop reductions for them in the future too, as we have the instructions. That will require a lot of costmodel improvements though.

Mon, Sep 7, 3:17 AM · Restricted Project

Sun, Sep 6

dmgreen added a comment to D75512: [LoopVectorizer][ARM] Add preferInloopReduction target hook..

Ping

Sun, Sep 6, 11:54 PM · Restricted Project
dmgreen retitled D75512: [LoopVectorizer][ARM] Add preferInloopReduction target hook. from [LoopVectorizer][ARM] Add preferInloopReduction reduction. to [LoopVectorizer][ARM] Add preferInloopReduction target hook..
Sun, Sep 6, 11:54 PM · Restricted Project
dmgreen added a comment to D86684: [Refactor] Add the SchedHeuristic for Scheduler to allow platform customizing the heuristics.

Our downstream schedulers override pickNode/pickNext and have a certain amount of lookahead. We probably wouldn't be able to make use of this. I have in the past wanted to write a heuristic that this would fit this really nicely - it needed the last scheduled instruction and would bias based on whether they could "overlap". Unfortunately I never managed to get it to actually make performance reliably better.

Sun, Sep 6, 9:04 AM · Restricted Project
dmgreen committed rG667e800bb3a8: [ARM] Remove -O3 from mve intrinsic tests. NFC (authored by dmgreen).
[ARM] Remove -O3 from mve intrinsic tests. NFC
Sun, Sep 6, 5:20 AM
dmgreen added a comment to D87188: [InstCombine] Canonicalize SPF to abs intrinc.

I would expect the tests in llvm to only be subset of the possible second order effects that can come up from changing this. Perhaps abs is simple enough, but you might want to run the llvm test suite to see if there are any other interesting binary differences.

Sun, Sep 6, 5:04 AM · Restricted Project, Restricted Project
dmgreen committed rGd866dc374986: [ARM] Regenerate tests. NFC (authored by dmgreen).
[ARM] Regenerate tests. NFC
Sun, Sep 6, 4:52 AM

Fri, Sep 4

dmgreen committed rG294c0cc3ebad: [ARM] Fold predicate_cast(load) into vldr p0 (authored by dmgreen).
[ARM] Fold predicate_cast(load) into vldr p0
Fri, Sep 4, 3:30 AM
dmgreen closed D86702: [ARM] Fold predicate_cast(load) into vldr p0.
Fri, Sep 4, 3:30 AM · Restricted Project

Thu, Sep 3

dmgreen committed rGdc8d7d23d8d2: [ARM] Extra predicate load tests. NFC (authored by dmgreen).
[ARM] Extra predicate load tests. NFC
Thu, Sep 3, 9:53 AM
dmgreen committed rG245f846c4eaf: [MemCpyOptimizer] Change required analysis order for BasicAA/PhiValuesAnalysis (authored by dmgreen).
[MemCpyOptimizer] Change required analysis order for BasicAA/PhiValuesAnalysis
Thu, Sep 3, 4:02 AM
dmgreen closed D87027: [MemCpyOptimizer] Change required analysis order for BasicAA/PhiValuesAnalysis.
Thu, Sep 3, 4:02 AM · Restricted Project
dmgreen added a comment to D87027: [MemCpyOptimizer] Change required analysis order for BasicAA/PhiValuesAnalysis.

Is it feasible to add a phase ordering test case for this?

Thu, Sep 3, 3:52 AM · Restricted Project
dmgreen added a comment to D86702: [ARM] Fold predicate_cast(load) into vldr p0.

Ping

Thu, Sep 3, 1:24 AM · Restricted Project
dmgreen added a comment to D86684: [Refactor] Add the SchedHeuristic for Scheduler to allow platform customizing the heuristics.

Hello. This looks interesting. I've run into places before where we just wanted to add an extra heuristics. I think some of our downstream schedules go a bit beyond this and would still need to override tryCandidate (the merge is going to be a pain!), but I've run into situations where it would definitely be useful.

Thu, Sep 3, 1:21 AM · Restricted Project

Wed, Sep 2

dmgreen requested review of D87027: [MemCpyOptimizer] Change required analysis order for BasicAA/PhiValuesAnalysis.
Wed, Sep 2, 6:58 AM · Restricted Project
dmgreen added a comment to D79785: [ARM] Register pressure with -mthumb forces register reload before each call.

It seems the issue comes from TargetInstrInfo::foldMemoryOperand, which adds the memory operands of LoadMI to newly created MI.
...
If we return immediately after calling foldMemoryOperandImpl, then the test-case compiles succeesfully.
I guess for this specific folding we don't need to attach memory operands of LoadMI, but that might not be true in general case ?
Should there be some way for foldMemoryOperandImpl to signal to foldMemoryOperand not to add memory operands of LoadMI ?

Wed, Sep 2, 6:35 AM · Restricted Project

Tue, Sep 1

dmgreen added a comment to D79785: [ARM] Register pressure with -mthumb forces register reload before each call.

rGffd0b31c7cba is the revert.

Tue, Sep 1, 12:21 AM · Restricted Project

Mon, Aug 31

dmgreen committed rGffd0b31c7cba: Revert "[ARM] Register pressure with -mthumb forces register reload before each… (authored by dmgreen).
Revert "[ARM] Register pressure with -mthumb forces register reload before each…
Mon, Aug 31, 11:40 PM
dmgreen added a comment to D79785: [ARM] Register pressure with -mthumb forces register reload before each call.

Hello. Sorry I wasn't sent any buildbot failure emails, perhaps because I was not the author. Thanks for letting us know.

Mon, Aug 31, 11:36 PM · Restricted Project
dmgreen committed rG85b4d286d7b1: [ARM] Register pressure with -mthumb forces register reload before each call (authored by prathamesh).
[ARM] Register pressure with -mthumb forces register reload before each call
Mon, Aug 31, 12:01 PM
dmgreen closed D79785: [ARM] Register pressure with -mthumb forces register reload before each call.
Mon, Aug 31, 12:01 PM · Restricted Project
dmgreen added a comment to D79785: [ARM] Register pressure with -mthumb forces register reload before each call.

Sure can. Will do..

Mon, Aug 31, 11:53 AM · Restricted Project

Sun, Aug 30

dmgreen committed rG543c5425f1d3: [LV] Add some const to RecurrenceDescriptor. NFC (authored by dmgreen).
[LV] Add some const to RecurrenceDescriptor. NFC
Sun, Aug 30, 4:28 AM
dmgreen updated the diff for D84451: [LV] Tail folded inloop reductions..

Rebase and ping.

Sun, Aug 30, 3:44 AM · Restricted Project
dmgreen updated the diff for D83646: [LV][LoopUtils] Add UseReductionIntrinsic to createTargetReduction.

Rebase

Sun, Aug 30, 3:24 AM · Restricted Project
dmgreen updated the diff for D75512: [LoopVectorizer][ARM] Add preferInloopReduction target hook..

Rebase

Sun, Aug 30, 3:22 AM · Restricted Project

Sat, Aug 29

dmgreen accepted D79785: [ARM] Register pressure with -mthumb forces register reload before each call.

Yeah. I'm happy with this. Looking forward to seeing any follow ups.

Sat, Aug 29, 11:34 AM · Restricted Project
dmgreen added reviewers for D86789: [DAGCombiner] Fold an AND of a masked load into a zext_masked_load: craig.topper, spatel, RKSimon.
Sat, Aug 29, 6:07 AM · Restricted Project

Fri, Aug 28

dmgreen committed rG4ca60915bcc8: [ARM] Correct predicate operand for offset gather/scatter (authored by dmgreen).
[ARM] Correct predicate operand for offset gather/scatter
Fri, Aug 28, 9:48 AM
dmgreen committed rG848a7e784134: [ARM] Extra gather scatter tailpred test. NFC (authored by dmgreen).
[ARM] Extra gather scatter tailpred test. NFC
Fri, Aug 28, 9:48 AM
dmgreen closed D86791: [ARM] Correct predicate offset for offset gather/scatter.
Fri, Aug 28, 9:48 AM · Restricted Project
dmgreen requested review of D86791: [ARM] Correct predicate offset for offset gather/scatter.
Fri, Aug 28, 9:08 AM · Restricted Project
dmgreen accepted D86776: [ARM]{MVE] Enable MVE gathers and scatters by default.

I asked Anna to put this patch together so that we had it when we needed it. I've been testing things out and I don't see any real reason not to go for it now though. Performance looks OK, if a bit conservative now that we have the higher costs. And I've not found any correctness issues. I've been trying any code I can find with a forced vector user cost and not run into any problems.

Fri, Aug 28, 8:13 AM · Restricted Project
dmgreen accepted D86784: [ARM] Skip combining base updates for vld1x NEON intrinsics.

LGTM.

Fri, Aug 28, 7:12 AM · Restricted Project

Thu, Aug 27

dmgreen accepted D85101: [AArch64][CodeGen] Restrict bfloat vector operations to what's actually supported.

Thanks. Sounds good to me.

Thu, Aug 27, 8:59 AM · Restricted Project
dmgreen updated the diff for D86702: [ARM] Fold predicate_cast(load) into vldr p0.

align2 test now actually has an alignment of 2.

Thu, Aug 27, 6:47 AM · Restricted Project
dmgreen added a comment to D86702: [ARM] Fold predicate_cast(load) into vldr p0.

Oh yeah :(

Thu, Aug 27, 6:46 AM · Restricted Project
dmgreen requested review of D86702: [ARM] Fold predicate_cast(load) into vldr p0.
Thu, Aug 27, 5:11 AM · Restricted Project
dmgreen added inline comments to D79785: [ARM] Register pressure with -mthumb forces register reload before each call.
Thu, Aug 27, 1:27 AM · Restricted Project