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sdesmalen (Sander de Smalen)
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Oct 21 2016, 1:19 AM (151 w, 5 d)

Recent Activity

Today

sdesmalen committed rGdc2a7f5b3921: [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (authored by sdesmalen).
[AArch64][DebugInfo] Do not recompute CalleeSavedStackSize
Wed, Sep 18, 2:04 AM
sdesmalen accepted D66024: [SVFS] Vector Function ABI name demangler..

Thanks @fpetrogalli, LGTM!

Wed, Sep 18, 12:29 AM · Restricted Project

Yesterday

sdesmalen added inline comments to D66024: [SVFS] Vector Function ABI name demangler..
Tue, Sep 17, 8:53 AM · Restricted Project
sdesmalen added inline comments to D66024: [SVFS] Vector Function ABI name demangler..
Tue, Sep 17, 12:49 AM · Restricted Project

Mon, Sep 16

sdesmalen added inline comments to D66024: [SVFS] Vector Function ABI name demangler..
Mon, Sep 16, 8:16 AM · Restricted Project

Fri, Sep 13

sdesmalen added a comment to D66024: [SVFS] Vector Function ABI name demangler..

I have updated the patch according to your feedback. In particular, I have modified all the parsing method to use the ParseRet enum instead of booleans. It looks better now, thanks.

Agreed, this looks good now, thanks!

Fri, Sep 13, 1:45 AM · Restricted Project

Thu, Sep 12

sdesmalen added a comment to D66024: [SVFS] Vector Function ABI name demangler..

Thanks for all the changes @fpetrogalli, this patch is really taking shape! Just added a few more drive-by comments.

Thu, Sep 12, 1:07 PM · Restricted Project

Mon, Sep 9

sdesmalen updated the diff for D66935: [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize.

Just before committing this patch, I realised that I had not yet tested it for all targets (I did this on a different machine than I normally use, hence the change in config).

Mon, Sep 9, 5:24 AM · Restricted Project

Tue, Sep 3

sdesmalen added a comment to D66935: [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize.

This seems much better.

Thanks!

Did you intentionally skip updating ShrinkWrap? Should be straightforward. (There's a bunch of places in that file that reference a RegScavenger, but nothing actually uses it.)

Yes, ShrinkWrap still needs to use the determineCalleeSaves interface because it is run before PEI when CalleeSavedInfo in MachineFrameInfo has not yet been populated (and thus MFI.isCalleeSavedInfoValid() will return false).

Tue, Sep 3, 3:32 PM · Restricted Project
sdesmalen accepted D67095: [SVE][Inline-Asm] Fix -Wimplicit-fallthrough in AArch64ISelLowering.cpp.

LGTM

Tue, Sep 3, 6:53 AM · Restricted Project

Mon, Sep 2

sdesmalen updated the diff for D66935: [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize.
  • Introduced a new method getCalleeSaves that fills in a BitVector with the callee-saves if isCalleeSavedInfoValid() is true.
  • Replaced uses of determineCalleeSaves with getCalleeSaves in LiveDebugValues, RegUsageInfoCollector and RegisterScavenging.
Mon, Sep 2, 8:34 AM · Restricted Project

Fri, Aug 30

sdesmalen added a comment to D66935: [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize.

Why are we calling determineCalleeSaves in LiveDebugValues, anyway? Can't it just call getCalleeSavedInfo()?
Making the determineCalleeSaves computation lazy, like this patch does, is really confusing.

This method seems to be called by several passes:

  • LiveDebugValues
  • PrologEpilogInserter
  • RegUsageInfoCollector
  • RegisterScavenging
  • ShrinkWrap
Fri, Aug 30, 7:09 AM · Restricted Project

Thu, Aug 29

sdesmalen added a comment to D65653: [AArch64] Change location of frame-record within callee-save area..

This rev breaks LLDB for AArch64. functionalities/thread/concurrent_events/* tests are failing after r368987.

Thanks for bringing this to my attention @omjavaid and sorry about breaking these tests! Tbh, I was not aware anything was broken, because I normally get spammed by buildbot when something breaks. Is that functionality not working at the moment?

Thu, Aug 29, 5:15 AM · Restricted Project
sdesmalen created D66935: [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize.
Thu, Aug 29, 3:34 AM · Restricted Project

Fri, Aug 23

sdesmalen accepted D65930: [IntrinsicEmitter] Support scalable vectors in intrinsics.

LGTM.

Fri, Aug 23, 4:07 AM · Restricted Project

Thu, Aug 22

sdesmalen accepted D66302: [SVE][Inline-Asm] Support for SVE asm operands.

Thanks for making these changes @kmclaughlin, LGTM!

Thu, Aug 22, 1:32 PM · Restricted Project

Wed, Aug 21

sdesmalen added inline comments to D65930: [IntrinsicEmitter] Support scalable vectors in intrinsics.
Wed, Aug 21, 7:19 AM · Restricted Project
sdesmalen added inline comments to D66524: [SVE][Inline-Asm] Add constraints for SVE predicate registers.
Wed, Aug 21, 5:55 AM · Restricted Project
sdesmalen added inline comments to D66302: [SVE][Inline-Asm] Support for SVE asm operands.
Wed, Aug 21, 5:43 AM · Restricted Project

Tue, Aug 20

sdesmalen added a comment to D65653: [AArch64] Change location of frame-record within callee-save area..

Could you look into this again? Thanks.

Happy to look into this, but the stacktrace you pasted doesn't give enough information for me to reproduce. Can you give some more details?

Tue, Aug 20, 3:46 AM · Restricted Project

Mon, Aug 19

sdesmalen added a comment to D61437: [AArch64] Static (de)allocation of SVE stack objects..

Gentle ping. Now D65653 has been committed, I think this patch is ready for review again.

Mon, Aug 19, 9:54 AM

Aug 19 2019

sdesmalen added a comment to D66339: [SVE] Fixed-length vector MVT ranges.

I like your suggestion of using concat_iterator(_range), but I think grouping all fixed-width types together is sufficient for now. If there is ever a good reason to iterate through (all combined scalable and fixed-width fp vector types)or (all combined scalable and fixed-width integer vector types), we can always introduce the extra concat_iterators then.

I'm not sure what you're suggesting here. Are you asking Graham to keep all the fixed-width types contiguous (i.e. int and fp)? This patch does not do that. I don't have a strong preference either way. Given that the existing state is non-contiguous I see no compelling reason to change it.

Aug 19 2019, 2:29 AM · Restricted Project

Aug 16 2019

sdesmalen added a comment to D65653: [AArch64] Change location of frame-record within callee-save area..

I have a suspicion that this might be causing the assertion error we see in https://bugs.llvm.org/show_bug.cgi?id=43015. Checking this now. Just wanted to raise awareness in the meantime.

Aug 16 2019, 8:50 AM · Restricted Project
sdesmalen committed rGf28e1128d9ef: Relanding r368987 [AArch64] Change location of frame-record within callee-save… (authored by sdesmalen).
Relanding r368987 [AArch64] Change location of frame-record within callee-save…
Aug 16 2019, 8:44 AM
sdesmalen added a comment to D66339: [SVE] Fixed-length vector MVT ranges.

Split out from D53137.

Thanks!

Aug 16 2019, 5:59 AM · Restricted Project
sdesmalen added a comment to D66302: [SVE][Inline-Asm] Support for SVE asm operands.

Thanks for this change @kmclaughlin.

Aug 16 2019, 2:29 AM · Restricted Project

Aug 15 2019

sdesmalen committed rG643adb55769e: [AArch64] Change location of frame-record within callee-save area. (authored by sdesmalen).
[AArch64] Change location of frame-record within callee-save area.
Aug 15 2019, 3:36 AM

Aug 14 2019

sdesmalen added inline comments to D65653: [AArch64] Change location of frame-record within callee-save area..
Aug 14 2019, 9:11 AM · Restricted Project
sdesmalen updated the diff for D65653: [AArch64] Change location of frame-record within callee-save area..

Added comment to clarify that the order of the callee-saves as specified in AArch64CallingConvention.td actually affects the layout of the callee-saves in the generated stackframe.

Aug 14 2019, 9:07 AM · Restricted Project

Aug 12 2019

sdesmalen added a comment to D65653: [AArch64] Change location of frame-record within callee-save area..

Thanks for all the feedback so far. I think I've addressed all comments and suggestions, are we happy to move forward with this patch?

Aug 12 2019, 3:58 PM · Restricted Project
sdesmalen added a comment to D66024: [SVFS] Vector Function ABI name demangler..

Thanks for splitting this functionality off into a separate patch!
I added some comments inline, but my main points are:

  • that it would be better to parse the mangled string incrementally, rather than extracting each feature from the string individually.
  • if you change this patch to parse incrementally, interfaces such as getIsMasked or getISA should probably be private methods to VectorFunctionShape, and be renamed to parseIsMasked and parseISA.
Aug 12 2019, 11:29 AM · Restricted Project

Aug 9 2019

sdesmalen added a comment to D53137: Scalable vector core instruction support + size queries.

See some of the inline comments -- there are a few places where we'd just end up duplicating code if used that way. The names can certainly be improved for clarity, though, and we could state that the (scalable|fixed)-only interfaces should be used in preference to a joint one.

Yes, adding some words to state that in the description of the method would be good. There are indeed cases where MinSize is needed directly (like in DAGCombiner.cpp where it uses MaximumLegalStoreInBits = MinSize), but such a case is very explicit (it needs to specifically query the known part of the size), which I think is not very common. We should strive to reduce those uses as much as possible. For Alignment for example, I think we can use a separate method (see comment).

Aug 9 2019, 6:17 AM · Restricted Project

Aug 8 2019

sdesmalen added a comment to D53137: Scalable vector core instruction support + size queries.

Thanks @huntergr for working on this!

Aug 8 2019, 9:54 AM · Restricted Project
sdesmalen added a comment to D65930: [IntrinsicEmitter] Support scalable vectors in intrinsics.

Thanks for this patch @c-rhodes!

Aug 8 2019, 2:49 AM · Restricted Project
sdesmalen added inline comments to D65653: [AArch64] Change location of frame-record within callee-save area..
Aug 8 2019, 1:31 AM · Restricted Project
sdesmalen updated the diff for D65653: [AArch64] Change location of frame-record within callee-save area..

Clarified comment.

Aug 8 2019, 1:28 AM · Restricted Project

Aug 7 2019

sdesmalen added inline comments to D65653: [AArch64] Change location of frame-record within callee-save area..
Aug 7 2019, 1:20 PM · Restricted Project
sdesmalen updated the diff for D65653: [AArch64] Change location of frame-record within callee-save area..

Added an extra comment describing the swapped order of the frame-record location on Darwin.

Aug 7 2019, 1:15 PM · Restricted Project
sdesmalen updated the diff for D65653: [AArch64] Change location of frame-record within callee-save area..
  • Updated the patch to retain the current location of the frame-record in the callee-save area for Darwin.
  • Removed the code that tried to emit the CFI information for FP and LR before the other callee-saves, as this was only needed on Darwin for the compact unwind encoding.
Aug 7 2019, 8:32 AM · Restricted Project
sdesmalen added a comment to D65653: [AArch64] Change location of frame-record within callee-save area..

Unfortunately I don't think this is viable for Darwin platforms, at least not yet. Our compact unwind encoding just has a bitmask for which registers are saved rather than saying where relative to fp.

Longer term there's room for a new encoding to handle this, but that's not something we can do quickly. It looks like there are at least 5 projects that would need to be updated.

Thanks for pointing out. I have updated the patch to retain the current callee-save area layout for Darwin (regardless of whether compact unwind encoding is required).
The changes aren't that significant, but it would be nice to use the same layout at some point.

Aug 7 2019, 8:32 AM · Restricted Project
sdesmalen committed rG1d2bfa4a868b: [AArch64][WinCFI] Do not pair callee-save instructions in LoadStoreOptimizer (authored by sdesmalen).
[AArch64][WinCFI] Do not pair callee-save instructions in LoadStoreOptimizer
Aug 7 2019, 5:44 AM

Aug 6 2019

sdesmalen added a child revision for D65817: [AArch64][WinCFI] Do not pair callee-save instructions in LoadStoreOptimizer: D65653: [AArch64] Change location of frame-record within callee-save area..
Aug 6 2019, 10:23 AM · Restricted Project
sdesmalen added a parent revision for D65653: [AArch64] Change location of frame-record within callee-save area.: D65817: [AArch64][WinCFI] Do not pair callee-save instructions in LoadStoreOptimizer.
Aug 6 2019, 10:23 AM · Restricted Project
sdesmalen added inline comments to D65653: [AArch64] Change location of frame-record within callee-save area..
Aug 6 2019, 10:23 AM · Restricted Project
sdesmalen updated the diff for D65653: [AArch64] Change location of frame-record within callee-save area..
  • Added comments describing rationale of the callee-save layout.
  • Added comments to invalidateRegisterPairing
  • Rebased patch onto D65817 which addresses the invalid pairing of callee save/restore instructions in the LoadStoreOptimizer.
Aug 6 2019, 10:21 AM · Restricted Project
sdesmalen created D65817: [AArch64][WinCFI] Do not pair callee-save instructions in LoadStoreOptimizer.
Aug 6 2019, 10:18 AM · Restricted Project
sdesmalen committed rGad7e95df5ac3: [AArch64] NFC: Generalize emitFrameOffset to support more than byte offsets. (authored by sdesmalen).
[AArch64] NFC: Generalize emitFrameOffset to support more than byte offsets.
Aug 6 2019, 8:08 AM
sdesmalen updated the diff for D61436: [AArch64] NFC: Generalize emitFrameOffset to support more than byte offsets..
  • Rebased patch.
Aug 6 2019, 6:18 AM · Restricted Project
sdesmalen committed rG612b03896610: [AArch64] NFC: Add generic StackOffset to describe scalable offsets. (authored by sdesmalen).
[AArch64] NFC: Add generic StackOffset to describe scalable offsets.
Aug 6 2019, 6:07 AM
sdesmalen updated the diff for D61435: [AArch64] NFC: Add generic StackOffset to describe scalable offsets..
  • Rebased patch.
Aug 6 2019, 5:01 AM · Restricted Project

Aug 5 2019

sdesmalen added a reviewer for D64095: SVFS implementation according to RFC: Interface user provided vector functions with the vectorizer.: sdesmalen.
Aug 5 2019, 6:28 AM · Restricted Project
sdesmalen added a comment to D64095: SVFS implementation according to RFC: Interface user provided vector functions with the vectorizer..

Thanks @aranisumedh for working on this!

Aug 5 2019, 6:28 AM · Restricted Project

Aug 4 2019

sdesmalen added inline comments to D65653: [AArch64] Change location of frame-record within callee-save area..
Aug 4 2019, 3:14 AM · Restricted Project

Aug 2 2019

sdesmalen added a comment to D61435: [AArch64] NFC: Add generic StackOffset to describe scalable offsets..

This was accepted. Did it land?

Not yet, I initially thought about landing it together with D61437 because there was no need for it otherwise. But if everyone is happy, I guess this one can just land.

I like this as a NFC patch, so I say go ahead and land it.

Thanks! I'll wait one more day to see if anyone has any objections and otherwise I'll land the patch!

Aug 2 2019, 9:21 AM · Restricted Project
sdesmalen updated the diff for D61435: [AArch64] NFC: Add generic StackOffset to describe scalable offsets..

My previous patch didn't have any context, so added it now (git format-patch -U999999)

Aug 2 2019, 9:19 AM · Restricted Project
sdesmalen updated the diff for D61436: [AArch64] NFC: Generalize emitFrameOffset to support more than byte offsets..

My previous patch didn't have any context, so added it now (git format-patch -U999999)

Aug 2 2019, 9:18 AM · Restricted Project
sdesmalen updated the diff for D61437: [AArch64] Static (de)allocation of SVE stack objects..

My previous patch didn't have any context, so added it now (git format-patch -U999999)

Aug 2 2019, 9:18 AM
sdesmalen added a comment to D61437: [AArch64] Static (de)allocation of SVE stack objects..

I wonder if this should have a test that ensures we generate VL-scaled addressing modes for SVE object addressing. If there's not enough codegen yet to emit the asm, then we should probably add such a test when we can. After all, it's the stated goal of this patch. :)

You're right. I have a separate patch for that, that I could share next week. This patch only adds the support to allocate the SVE area using ADDVL.
(The compiler currently guards against accessing any stack objects in the presence of an SVE area using an assert).

Aug 2 2019, 9:04 AM
sdesmalen updated subscribers of D61437: [AArch64] Static (de)allocation of SVE stack objects..
Aug 2 2019, 7:11 AM
sdesmalen added a comment to D61437: [AArch64] Static (de)allocation of SVE stack objects..

@efriedma, sorry for taking a while to update this patch with the new layout. Other than being distracted by many other things, I tried it on our downstream repo first to see if this might lead to any negative performance impact. This all seems fine, and I now realise this approach makes the code in AArch64FrameLowering a bit simpler (which was the opposite of what I initially thought). I separated out the patch to reorder the frame-record within the callee-save area into D65653.

Aug 2 2019, 7:04 AM
sdesmalen added a comment to D61435: [AArch64] NFC: Add generic StackOffset to describe scalable offsets..

This was accepted. Did it land?

Not yet, I initially thought about landing it together with D61437 because there was no need for it otherwise. But if everyone is happy, I guess this one can just land.

Aug 2 2019, 6:28 AM · Restricted Project
sdesmalen added a parent revision for D61437: [AArch64] Static (de)allocation of SVE stack objects.: D65653: [AArch64] Change location of frame-record within callee-save area..
Aug 2 2019, 6:26 AM
sdesmalen added a child revision for D65653: [AArch64] Change location of frame-record within callee-save area.: D61437: [AArch64] Static (de)allocation of SVE stack objects..
Aug 2 2019, 6:26 AM · Restricted Project
sdesmalen created D65653: [AArch64] Change location of frame-record within callee-save area..
Aug 2 2019, 6:26 AM · Restricted Project
sdesmalen added inline comments to D61437: [AArch64] Static (de)allocation of SVE stack objects..
Aug 2 2019, 6:26 AM
sdesmalen updated the diff for D61437: [AArch64] Static (de)allocation of SVE stack objects..
  • Changed the location of the SVE area within the frame-layout as suggested by @efriedma
  • Updated the summary.
Aug 2 2019, 6:26 AM
sdesmalen updated the diff for D61436: [AArch64] NFC: Generalize emitFrameOffset to support more than byte offsets..
  • Rebased patch.
Aug 2 2019, 6:23 AM · Restricted Project
sdesmalen updated the diff for D61435: [AArch64] NFC: Add generic StackOffset to describe scalable offsets..
  • Rebased the patch.
  • Removed StackOffset::isZero() in favour of using StackOffset::operator bool().
Aug 2 2019, 6:23 AM · Restricted Project

Aug 1 2019

sdesmalen committed rG7ebccfefb8ff: [AArch64] Do not allocate unnecessary emergency slot. (authored by sdesmalen).
[AArch64] Do not allocate unnecessary emergency slot.
Aug 1 2019, 3:55 AM

Jul 31 2019

sdesmalen created D65504: [AArch64] Do not allocate unnecessary emergency slot..
Jul 31 2019, 2:37 AM · Restricted Project

Jul 30 2019

sdesmalen accepted D65389: [AArch64][SVE2] Use destination register as source register.

The changes are non-functional for the assembler/disassembler, but are genuine fixes to the instructions that are needed when the instructions will be used for codegen.

Jul 30 2019, 9:09 AM · Restricted Project
sdesmalen accepted D65390: [AArch64][SVE2] Minor refactoring and cleanup.

LGTM. This patch is NFC and makes some clarifications/fixes to the comments and names.

Jul 30 2019, 8:29 AM · Restricted Project
sdesmalen committed rG405c999d9705: [AArch64] Disable __ARM_FEATURE_SVE without ACLE. (authored by sdesmalen).
[AArch64] Disable __ARM_FEATURE_SVE without ACLE.
Jul 30 2019, 3:17 AM
sdesmalen added a comment to D65404: [AArch64] Disable __ARM_FEATURE_SVE without ACLE..

Thanks, I see your argument for having the feature enabled even when the ACLE is still partially supported. At the moment however, LLVM still only support the assembler/disassembler and inline asm.
We'll be working to add support for the ACLE soon, but for now having the flag enabled sets the wrong expectations.

Jul 30 2019, 1:06 AM · Restricted Project
sdesmalen accepted D65392: [AArch64][SVE2] Load/store instruction fixes.

LGTM, these seem like straightforward fixes.
I doubt there is any way to test the scatter-fix with only the assembler at the moment.

Jul 30 2019, 12:57 AM · Restricted Project

Jul 29 2019

sdesmalen created D65404: [AArch64] Disable __ARM_FEATURE_SVE without ACLE..
Jul 29 2019, 10:01 AM · Restricted Project

Jul 25 2019

sdesmalen accepted D64759: [CodeGen] Don't resolve the stack protector frame accesses until PEI.

Patch LGTM!

Jul 25 2019, 4:58 AM · Restricted Project
sdesmalen added a comment to D64759: [CodeGen] Don't resolve the stack protector frame accesses until PEI.

If there isn't any free register, the scavenger will spill a register to the emergency spill slot. That doesn't have to be any particular register; it can be basically any allocatable register. So if one or two registers are particularly sensitive, we could specifically forbid the scavenger from spilling them.

I agree, we could do that. It would require parts of the code to keep track of the register used for the guard and avoid it at all cost. Do you think this is blocking for this fix to get in?

Is it worth, as a first step, to always enable the FP when using stack guards?

Jul 25 2019, 4:58 AM · Restricted Project
sdesmalen accepted D65145: [AArch64][SVE] Allow explicit size specifier for predicate operand.

Thanks for this change @chill. LGTM.

Jul 25 2019, 3:44 AM · Restricted Project
sdesmalen added a comment to D65197: [LV] Tail-loop Folding.

For SVE we found that there are sometimes benefits to using an unpredicated vector body plus a predicated tail. When the main vectorized loop-body is unpredicated, we know all lanes in the vector are executed and can produce more efficient set of instructions. The scalar tail can then still be vectorized using predication to mask off the inactive lanes, or depending on the cost of vectorizing the tail loop the compiler may want to choose not vectorizing the tail loop at all. It would be nice if your design allows for this use-case.
So maybe instead of having a boolean 'llvm.loop.vectorize.predicate.enable' you can make it into an enum, or perhaps rename the attribute to emphasises the difference so we can add this logic later?

Jul 25 2019, 3:19 AM · Restricted Project

Jul 24 2019

sdesmalen committed rG2b290885d947: [SVE][Inline-Asm] Add support to specify SVE registers in the clobber list (authored by sdesmalen).
[SVE][Inline-Asm] Add support to specify SVE registers in the clobber list
Jul 24 2019, 1:43 AM

Jul 23 2019

sdesmalen accepted D64739: [SVE][Inline-Asm] Add support to specify SVE registers in the clobber list.

LGTM

Jul 23 2019, 2:21 AM · Restricted Project, Restricted Project

Jul 22 2019

sdesmalen added inline comments to D64739: [SVE][Inline-Asm] Add support to specify SVE registers in the clobber list.
Jul 22 2019, 12:58 AM · Restricted Project, Restricted Project

Jul 17 2019

sdesmalen added a comment to D64739: [SVE][Inline-Asm] Add support to specify SVE registers in the clobber list.

Functionally the patch looks good, but the title suggests this adds full inline-asm support for SVE (which would require the ACLE types proposed in D62960, as well as other changes), where this patch only adds support to specify SVE registers in the clobber list.

Jul 17 2019, 9:24 AM · Restricted Project, Restricted Project

Jul 2 2019

sdesmalen accepted D64079: Scalable Vector IR Type (Try 3).

LGTM.

Jul 2 2019, 11:56 PM · Restricted Project

Jun 27 2019

sdesmalen added a comment to D63507: Teach TableGen Intrin Emitter to handle LLVMPointerType<llvm_any_ty>.

The patch already landed, but also adding my LGTM. It seems like a case that I missed in my previous patch, thanks for fixing!

Jun 27 2019, 8:40 AM · Restricted Project

Jun 20 2019

sdesmalen added a comment to D63507: Teach TableGen Intrin Emitter to handle LLVMPointerType<llvm_any_ty>.

Can someone take a look at this?
@sdesmalen in particular, I'd love it if you could take a look since you're the author of this code.

Thanks, I definitely want to take a look but I’m currently traveling without access to my laptop, so I won’t be able to properly review it until Wednesday.

Jun 20 2019, 3:22 PM · Restricted Project

Jun 17 2019

sdesmalen updated the diff for D59259: [AArch64] Use faddp to implement fadd reductions..
  • Rebased patch.
  • Following D60261, the scalar accumulator is either folded away or added separately as a scalar value, and so this patch only needs to focus on optimising the vector reduction itself.
Jun 17 2019, 5:12 AM
sdesmalen added a comment to D63189: Test forward references in IntrinsicEmitter on Neon LD(2|3|4).

Agreed - lets keep it in a single commit - thanks for checking. LGTM

Thanks @RKSimon!

Jun 17 2019, 4:59 AM · Restricted Project
sdesmalen committed rG74ac20158a06: Test forward references in IntrinsicEmitter on Neon LD(2|3|4) (authored by sdesmalen).
Test forward references in IntrinsicEmitter on Neon LD(2|3|4)
Jun 17 2019, 4:59 AM
sdesmalen accepted D63321: [SVE][IR] Scalable Vector IR Type with pr42210 fix.

Removing the recursion solves the compile-time issue and still catches all invalid cases.
LGTM.

Jun 17 2019, 4:07 AM · Restricted Project
sdesmalen committed rG5d6ee76c1634: Describe stack-id as an enum (authored by sdesmalen).
Describe stack-id as an enum
Jun 17 2019, 2:12 AM

Jun 14 2019

sdesmalen added a comment to D63189: Test forward references in IntrinsicEmitter on Neon LD(2|3|4).

is it worth committing the test file with current (trunk) output so this patch shows the diff?

The output is expected not to change from this patch. I ran this test with current trunk and it passes, which confirms the behaviour doesn't change with this patch applied.
Not sure if there is still any benefit in committing this test separately then?

Jun 14 2019, 2:48 AM · Restricted Project

Jun 13 2019

sdesmalen committed rG51c2fa0e2ac1: Improve reduction intrinsics by overloading result value. (authored by sdesmalen).
Improve reduction intrinsics by overloading result value.
Jun 13 2019, 2:37 AM
sdesmalen added a comment to D62995: [IntrinsicEmitter] Extend argument overloading with forward references..

LGTM with nit

Thanks for the review!

Jun 13 2019, 1:18 AM · Restricted Project
sdesmalen committed rG7957fc6547e1: [IntrinsicEmitter] Extend argument overloading with forward references. (authored by sdesmalen).
[IntrinsicEmitter] Extend argument overloading with forward references.
Jun 13 2019, 1:18 AM

Jun 12 2019

sdesmalen added a parent revision for D63189: Test forward references in IntrinsicEmitter on Neon LD(2|3|4): D62995: [IntrinsicEmitter] Extend argument overloading with forward references..
Jun 12 2019, 2:28 AM · Restricted Project
sdesmalen added a child revision for D62995: [IntrinsicEmitter] Extend argument overloading with forward references.: D63189: Test forward references in IntrinsicEmitter on Neon LD(2|3|4).
Jun 12 2019, 2:28 AM · Restricted Project
sdesmalen created D63189: Test forward references in IntrinsicEmitter on Neon LD(2|3|4).
Jun 12 2019, 2:28 AM · Restricted Project
sdesmalen updated the diff for D62995: [IntrinsicEmitter] Extend argument overloading with forward references..
  • Changed: return IsDeferredCheck ? true : DeferCheck(Ty); => return IsDeferredCheck || DeferCheck(Ty);
  • Use DeferredChecks.size() to determine what MatchIntrinsicTypesResult to return, instead of incorrectly relying on DeferredChecks.end() iterator.
  • Removed 'dummy' intrinsics. I will post a separate patch that tests the behaviour tested with llvm.experimental.dummy.forward.struct.ret on existing intrinsics.
Jun 12 2019, 2:20 AM · Restricted Project