sdesmalen (Sander de Smalen)
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User Since
Oct 21 2016, 1:19 AM (90 w, 2 d)

Recent Activity

Wed, Jul 4

sdesmalen created D48937: [TableGen] Increase the number of supported decoder fix-ups..
Wed, Jul 4, 6:42 AM

Tue, Jul 3

sdesmalen created D48870: [AArch64][SVE] Asm: Support for ADR instruction..
Tue, Jul 3, 2:42 AM
sdesmalen added inline comments to D48869: [AArch64][SVE] Asm: Support for SVE condition code aliases.
Tue, Jul 3, 2:38 AM
sdesmalen created D48869: [AArch64][SVE] Asm: Support for SVE condition code aliases.
Tue, Jul 3, 2:36 AM

Mon, Jul 2

sdesmalen added a dependent revision for D48823: [AArch64][SVE] Asm: Support for FMUL (indexed): D48824: [AArch64][SVE] Asm: Support for FP Complex ADD/MLA..
Mon, Jul 2, 3:26 AM
sdesmalen added a dependency for D48824: [AArch64][SVE] Asm: Support for FP Complex ADD/MLA.: D48823: [AArch64][SVE] Asm: Support for FMUL (indexed).
Mon, Jul 2, 3:26 AM
sdesmalen updated the summary of D48824: [AArch64][SVE] Asm: Support for FP Complex ADD/MLA..
Mon, Jul 2, 3:26 AM
sdesmalen created D48824: [AArch64][SVE] Asm: Support for FP Complex ADD/MLA..
Mon, Jul 2, 3:25 AM
sdesmalen created D48823: [AArch64][SVE] Asm: Support for FMUL (indexed).
Mon, Jul 2, 2:51 AM

Mon, Jun 18

sdesmalen added a comment to D47714: [TableGen][AsmMatcherEmitter] Allow tied operands of different classes in aliases..

Thanks @fhahn I've added a comment to regsEqual describing what it can be used for.

Mon, Jun 18, 6:46 AM

Jun 15 2018

sdesmalen added dependencies for D48220: [AArch64][SVE] Asm: Fix predicate pattern diagnostics.: D47715: [AArch64][SVE] Asm: Support for saturating INC/DEC (64bit scalar) instructions., D47716: [AArch64][SVE] Asm: Support for saturating INC/DEC (32bit scalar) instructions..
Jun 15 2018, 8:04 AM
sdesmalen added a dependent revision for D47715: [AArch64][SVE] Asm: Support for saturating INC/DEC (64bit scalar) instructions.: D48220: [AArch64][SVE] Asm: Fix predicate pattern diagnostics..
Jun 15 2018, 8:04 AM
sdesmalen added a dependent revision for D47716: [AArch64][SVE] Asm: Support for saturating INC/DEC (32bit scalar) instructions.: D48220: [AArch64][SVE] Asm: Fix predicate pattern diagnostics..
Jun 15 2018, 8:04 AM
sdesmalen created D48220: [AArch64][SVE] Asm: Fix predicate pattern diagnostics..
Jun 15 2018, 8:03 AM
sdesmalen added inline comments to D47713: [AArch64][SVE] Asm: Support for INC/DEC (scalar) instructions..
Jun 15 2018, 7:14 AM

Jun 14 2018

sdesmalen added a comment to D47714: [TableGen][AsmMatcherEmitter] Allow tied operands of different classes in aliases..

Friendly ping..

Jun 14 2018, 2:17 PM
sdesmalen added inline comments to D47716: [AArch64][SVE] Asm: Support for saturating INC/DEC (32bit scalar) instructions..
Jun 14 2018, 4:48 AM

Jun 6 2018

sdesmalen updated the diff for D47711: [AArch64][SVE] Asm: Add parsing/printing support for exact FP immediates..

Merged k_ExactFPImm with k_FPImm.

Jun 6 2018, 8:05 AM

Jun 5 2018

sdesmalen added a comment to D47711: [AArch64][SVE] Asm: Add parsing/printing support for exact FP immediates..

Hi @olista01 , I just tried merging this change with k_FPImm and one of the problems I'm running into is with the '#0.0' and InstAliases.
For example in SVEInstrFormats.td, class sve_int_dup_imm:

InstAlias<"fmov $Zd, #0.0", (!cast<Instruction>(NAME # _S) ZPR32:$Zd, 0, 0), 1>;
Jun 5 2018, 7:47 AM
sdesmalen added a comment to D47711: [AArch64][SVE] Asm: Add parsing/printing support for exact FP immediates..

The k_FPImm case works a little different.. Instead of it storing the APFloat value, it stores the (AArch64_AM) encoded FP imm value. If the value cannot be encoded, the parser throws an error. Also not all values can be encoded, such as '0.0', for which the parser (for k_FPImm) puts in a "#0.0" string literal into the parsed operands list. The two cases can be merged, but I think it may be better to do that in a separate patch as this will require some refactoring and changes to match e.g. the #0.0 case in existing FP instructions.

Jun 5 2018, 4:21 AM

Jun 4 2018

sdesmalen added dependencies for D47716: [AArch64][SVE] Asm: Support for saturating INC/DEC (32bit scalar) instructions.: D47714: [TableGen][AsmMatcherEmitter] Allow tied operands of different classes in aliases., D47715: [AArch64][SVE] Asm: Support for saturating INC/DEC (64bit scalar) instructions..
Jun 4 2018, 6:50 AM
sdesmalen added a dependent revision for D47715: [AArch64][SVE] Asm: Support for saturating INC/DEC (64bit scalar) instructions.: D47716: [AArch64][SVE] Asm: Support for saturating INC/DEC (32bit scalar) instructions..
Jun 4 2018, 6:50 AM
sdesmalen added a dependent revision for D47714: [TableGen][AsmMatcherEmitter] Allow tied operands of different classes in aliases.: D47716: [AArch64][SVE] Asm: Support for saturating INC/DEC (32bit scalar) instructions..
Jun 4 2018, 6:50 AM
sdesmalen created D47716: [AArch64][SVE] Asm: Support for saturating INC/DEC (32bit scalar) instructions..
Jun 4 2018, 6:49 AM
sdesmalen created D47715: [AArch64][SVE] Asm: Support for saturating INC/DEC (64bit scalar) instructions..
Jun 4 2018, 6:49 AM
sdesmalen created D47714: [TableGen][AsmMatcherEmitter] Allow tied operands of different classes in aliases..
Jun 4 2018, 6:49 AM
sdesmalen created D47713: [AArch64][SVE] Asm: Support for INC/DEC (scalar) instructions..
Jun 4 2018, 6:36 AM
sdesmalen added a dependency for D47712: [AArch64][SVE] Asm: Support for FADD, FMUL and FMAX immediate instructions.: D47711: [AArch64][SVE] Asm: Add parsing/printing support for exact FP immediates..
Jun 4 2018, 6:21 AM
sdesmalen added a dependent revision for D47711: [AArch64][SVE] Asm: Add parsing/printing support for exact FP immediates.: D47712: [AArch64][SVE] Asm: Support for FADD, FMUL and FMAX immediate instructions..
Jun 4 2018, 6:21 AM
sdesmalen created D47712: [AArch64][SVE] Asm: Support for FADD, FMUL and FMAX immediate instructions..
Jun 4 2018, 6:21 AM
sdesmalen created D47711: [AArch64][SVE] Asm: Add parsing/printing support for exact FP immediates..
Jun 4 2018, 6:21 AM

Jun 3 2018

sdesmalen added inline comments to D47570: [AArch64][SVE] Asm: Support for indexed DUP instructions..
Jun 3 2018, 11:44 PM

Jun 1 2018

sdesmalen updated the diff for D47482: [AArch64][SVE] Asm: Support for FDUP_ZI (copy fp immediate) instruction..

Removed some redundant test-cases for fmov alias that are already tested by test/MC/AArch64/SVE/fdup.s

Jun 1 2018, 5:42 AM
sdesmalen added a comment to D47482: [AArch64][SVE] Asm: Support for FDUP_ZI (copy fp immediate) instruction..

I think the difference with other immediates that have a limited set, is that these immediates have a non-trivial parsing/decoding/printing. Rather than just allowing a given range of integer values the string is first parsed as FP value and then encoded as integer value between 0-255. And the opposite for the decode. I think it makes sense to test these cases individually, although I can see how doing this for the FMOV alias as well could be a bit excessive, so I'll reduce those.

Jun 1 2018, 2:35 AM
sdesmalen added a comment to D47482: [AArch64][SVE] Asm: Support for FDUP_ZI (copy fp immediate) instruction..

Looks good, but do the tests have to be that big? That makes it really hard to spot if the edge cases & aliases are handled properly. Can you reduce the size a bit?

Since the immediate encoding only allows for a limited set of 256 different floating-point immediates, I thought it would make sense to test each of them separately to make sure they are all correctly parsed, assembled and printed, since basically these are all the edge-cases. The negative tests are much smaller and test a few floating point values that cannot be encoded. I can easily reduce the tests, but I think these tests are valuable. What do you think?

Jun 1 2018, 1:56 AM
sdesmalen created D47619: [AArch64][SVE] Fix range for DUP immediates (16bit elts).
Jun 1 2018, 12:33 AM

May 31 2018

sdesmalen added inline comments to D47328: [AArch64][SVE] Asm: Support for DUPM (masked immediate) instruction..
May 31 2018, 7:30 AM
sdesmalen added inline comments to D47328: [AArch64][SVE] Asm: Support for DUPM (masked immediate) instruction..
May 31 2018, 2:35 AM

May 30 2018

sdesmalen added a dependent revision for D47570: [AArch64][SVE] Asm: Support for indexed DUP instructions.: D47571: [AArch64][SVE] Asm: Print indexed element 0 as FPR..
May 30 2018, 11:47 PM
sdesmalen added a dependency for D47571: [AArch64][SVE] Asm: Print indexed element 0 as FPR.: D47570: [AArch64][SVE] Asm: Support for indexed DUP instructions..
May 30 2018, 11:47 PM
sdesmalen created D47571: [AArch64][SVE] Asm: Print indexed element 0 as FPR..
May 30 2018, 11:47 PM
sdesmalen created D47570: [AArch64][SVE] Asm: Support for indexed DUP instructions..
May 30 2018, 11:46 PM
sdesmalen added a comment to D47518: [AArch64][SVE] Asm: Support for FCPY immediate instructions..

Should the commit message be " Splat floating-point immediate value to SVE vector". Or may be i am wrong on this?

That sounds similar, but there is some distinction in that it uses predication. It is a predicated splat of an immediate value into the result vector with merging predication.
I used the word 'copy' instead of 'splat' since that is the name of the instruction. Splat would be more appropriate for D47482 .

May 30 2018, 7:00 AM
sdesmalen created D47518: [AArch64][SVE] Asm: Support for FCPY immediate instructions..
May 30 2018, 1:40 AM
sdesmalen created D47517: [AArch64][SVE] Asm: Support for CPY immediate instructions.
May 30 2018, 1:40 AM

May 29 2018

sdesmalen created D47483: [AArch64][AsmParser] Fix segfault on illegal fpimm..
May 29 2018, 9:00 AM
sdesmalen created D47482: [AArch64][SVE] Asm: Support for FDUP_ZI (copy fp immediate) instruction..
May 29 2018, 9:00 AM

May 25 2018

sdesmalen created D47365: [AArch64][SVE] Asm: Support for predicated LSL/LSR (vectors).
May 25 2018, 3:08 AM
sdesmalen updated the diff for D47310: [AArch64][SVE] Asm: Support for ADD (immediate) instructions..

Addressed nits and cleanup isSVEAddSubImm.

May 25 2018, 3:05 AM
sdesmalen created D47363: [AArch64][SVE] Asm: Support for AND, ORR, EOR and BIC instructions..
May 25 2018, 2:33 AM

May 24 2018

sdesmalen created D47328: [AArch64][SVE] Asm: Support for DUPM (masked immediate) instruction..
May 24 2018, 7:33 AM
sdesmalen updated the diff for D47310: [AArch64][SVE] Asm: Support for ADD (immediate) instructions..
  • Removed some brackets and updated the patch to reflect change in D47309.
May 24 2018, 3:59 AM
sdesmalen updated the diff for D47309: [AArch64][SVE] Asm: Support for DUP (immediate) instructions..
  • Some simplifications (such as getShiftedVal())
  • Moved a change from patch D47310 (in isAddSubImm()) into this patch to resolve a failing test that would otherwise be solved by D47310, related to checking whether a value is a shifted value.
May 24 2018, 3:56 AM
sdesmalen added a dependent revision for D47309: [AArch64][SVE] Asm: Support for DUP (immediate) instructions.: D47310: [AArch64][SVE] Asm: Support for ADD (immediate) instructions..
May 24 2018, 12:15 AM
sdesmalen added a dependency for D47310: [AArch64][SVE] Asm: Support for ADD (immediate) instructions.: D47309: [AArch64][SVE] Asm: Support for DUP (immediate) instructions..
May 24 2018, 12:15 AM
sdesmalen created D47310: [AArch64][SVE] Asm: Support for ADD (immediate) instructions..
May 24 2018, 12:14 AM
sdesmalen created D47309: [AArch64][SVE] Asm: Support for DUP (immediate) instructions..
May 24 2018, 12:14 AM

May 23 2018

sdesmalen accepted D47239: [InstCombine] Combine XOR and AES insructions on ARM/ARM64.

LGTM! Thanks for adding the negative tests and rationale.

May 23 2018, 11:14 PM
sdesmalen added inline comments to D47239: [InstCombine] Combine XOR and AES insructions on ARM/ARM64.
May 23 2018, 1:09 PM

May 15 2018

sdesmalen abandoned D41697: [DebugInfo][Metadata] Add support for a DIExpression as 'count' field of DISubrange..
May 15 2018, 12:45 PM

May 10 2018

sdesmalen added inline comments to D46688: [AArch64][SVE] Improve diagnostics for vectors with incorrect element-size..
May 10 2018, 4:59 AM
sdesmalen added a comment to D46682: [AArch64][SVE] Asm: Support for contiguous PRF prefetch instructions..

I might be good to put commit-message/description.

May 10 2018, 4:07 AM
sdesmalen added a dependent revision for D46686: [AArch64][SVE] Asm: Support for gather PRF prefetch instructions: D46688: [AArch64][SVE] Improve diagnostics for vectors with incorrect element-size..
May 10 2018, 3:57 AM
sdesmalen added a dependency for D46688: [AArch64][SVE] Improve diagnostics for vectors with incorrect element-size.: D46686: [AArch64][SVE] Asm: Support for gather PRF prefetch instructions.
May 10 2018, 3:57 AM
sdesmalen created D46688: [AArch64][SVE] Improve diagnostics for vectors with incorrect element-size..
May 10 2018, 3:57 AM
sdesmalen added a dependency for D46686: [AArch64][SVE] Asm: Support for gather PRF prefetch instructions: D46681: [AArch64][SVE] Extend parsing of Prefetch operation for SVE..
May 10 2018, 3:52 AM
sdesmalen added a dependent revision for D46681: [AArch64][SVE] Extend parsing of Prefetch operation for SVE.: D46686: [AArch64][SVE] Asm: Support for gather PRF prefetch instructions.
May 10 2018, 3:52 AM
sdesmalen created D46686: [AArch64][SVE] Asm: Support for gather PRF prefetch instructions.
May 10 2018, 3:52 AM
sdesmalen created D46682: [AArch64][SVE] Asm: Support for contiguous PRF prefetch instructions..
May 10 2018, 2:16 AM
sdesmalen added a dependency for D46682: [AArch64][SVE] Asm: Support for contiguous PRF prefetch instructions.: D46681: [AArch64][SVE] Extend parsing of Prefetch operation for SVE..
May 10 2018, 2:16 AM
sdesmalen created D46681: [AArch64][SVE] Extend parsing of Prefetch operation for SVE..
May 10 2018, 2:16 AM
sdesmalen added a dependent revision for D46681: [AArch64][SVE] Extend parsing of Prefetch operation for SVE.: D46682: [AArch64][SVE] Asm: Support for contiguous PRF prefetch instructions..
May 10 2018, 2:16 AM
sdesmalen created D46680: [AArch64][SVE] Asm: Support for structured ST2, ST3 and ST4 (scalar+scalar) store instructions..
May 10 2018, 2:10 AM
sdesmalen created D46679: [AArch64][SVE] Asm: Support for structured LD2, LD3 and LD4 (scalar+scalar) load instructions..
May 10 2018, 2:09 AM

May 2 2018

sdesmalen retitled D46251: [AArch64][SVE] Asm: Support for LD1R load-and-replicate scalar instructions. from [AArch64][SVE] Asm: Support for LD1RQ load-and-replicate scalar instructions. to [AArch64][SVE] Asm: Support for LD1R load-and-replicate scalar instructions..
May 2 2018, 6:37 AM
sdesmalen added inline comments to D46269: [AArch64][SVE] Asm: Support for non-temporal, contiguous LDNT1/STNT1 load/store instructions..
May 2 2018, 3:18 AM

May 1 2018

sdesmalen added a comment to D46270: [AArch64][SVE] Asm: Support for LDR/STR fill and spill instructions..

The new instruction classes have a lot of overlap, I think it would be nicer to refactor them and pass more than asm string as an argument.

Hi Sam, there are two reasons I didn't merge these into the same instruction classes for this patch...
One is that we chose to structure the file by the encoding groups from the SVE specification and merge instruction classes only when they are in the same group (e.g. {z_fill, p_fill} are in a different group from {z_spill, p_spill}). This is a bit of a trade-off where we choose to keep the instruction classes simpler and easier to look up from the spec, as opposed to minimising the lines of code. The other reason is that merging e.g. z_fill and p_fill - both in the same encoding group - is not very convenient because they have different encodings for their operands (e.g. 5-bits Zt vs 4-bits Pt) and also different operands (ZPRAny vs PPRAny). I think it doesn't make it easier to read if we are to template these cases.
Does that make sense?

May 1 2018, 5:52 AM
sdesmalen added inline comments to D46250: [AArch64][SVE] Asm: Support for LD1RQ load-and-replicate quad-word vector instructions..
May 1 2018, 5:35 AM
sdesmalen created D46310: [AArch64] Disallow vector operand if FPR128 Q register is required..
May 1 2018, 5:25 AM
sdesmalen added inline comments to D46250: [AArch64][SVE] Asm: Support for LD1RQ load-and-replicate quad-word vector instructions..
May 1 2018, 5:12 AM

Apr 30 2018

sdesmalen created D46270: [AArch64][SVE] Asm: Support for LDR/STR fill and spill instructions..
Apr 30 2018, 9:27 AM
sdesmalen created D46269: [AArch64][SVE] Asm: Support for non-temporal, contiguous LDNT1/STNT1 load/store instructions..
Apr 30 2018, 9:27 AM
sdesmalen added a comment to D46121: [AArch64][SVE] Asm: Support for contiguous ST1 (scalar+scalar) store instructions..

Are you referring to the 'assembler syntax' table? I think this table needs to be read in conjunction with the following paragraph (section 5.2.2, page 42):

Apr 30 2018, 3:18 AM
sdesmalen added a comment to D46121: [AArch64][SVE] Asm: Support for contiguous ST1 (scalar+scalar) store instructions..

Sorry to be pain, but could you point to the document that describes this please? From the supplement, I can't see why a shifted operand is invalid.

Hi Sam, if you download the spec from:

https://developer.arm.com/docs/ddi0584/latest/arm-architecture-reference-manual-supplement-the-scalable-vector-extension-sve-for-armv8-a

the SVE Supplement links to the SVE Instruction Index in section 5.2.1. This should open the xhtml/index.html page with a list of all the instructions and all their details. For some reason the PDF link doesn't work for me, so opening the index.html directly is probably easiest. (I think the specific file you're looking for is: st1b_z_p_br.html)

Apr 30 2018, 2:19 AM
sdesmalen created D46251: [AArch64][SVE] Asm: Support for LD1R load-and-replicate scalar instructions..
Apr 30 2018, 1:59 AM
sdesmalen created D46250: [AArch64][SVE] Asm: Support for LD1RQ load-and-replicate quad-word vector instructions..
Apr 30 2018, 1:59 AM
sdesmalen created D46248: [AArch64][SVE] Asm: Support for scatter ST1 store instructions..
Apr 30 2018, 1:50 AM

Apr 29 2018

sdesmalen added inline comments to D46120: [AArch64][SVE] Asm: Support for gather LD1/LDFF1 (vector + imm) load instructions..
Apr 29 2018, 10:37 AM

Apr 26 2018

sdesmalen created D46124: [AArch64][SVE] Asm: Improve diagnostics for gather loads..
Apr 26 2018, 7:56 AM
sdesmalen created D46122: [AArch64][AsmParser] NFC: Cleanup of addOperands functions.
Apr 26 2018, 7:43 AM
sdesmalen created D46121: [AArch64][SVE] Asm: Support for contiguous ST1 (scalar+scalar) store instructions..
Apr 26 2018, 7:43 AM
sdesmalen created D46120: [AArch64][SVE] Asm: Support for gather LD1/LDFF1 (vector + imm) load instructions..
Apr 26 2018, 7:42 AM
sdesmalen added a comment to D45958: [AArch64][SVE] Asm: Negative tests for all LD1 gather (scalar+vector) load instructions..

LGTM. Some of the diagnostics can be improved after D45879 lands, I suppose?

Correct!

Apr 26 2018, 1:47 AM

Apr 25 2018

sdesmalen added inline comments to D46023: [AArch64][SVE] Asm: Support for gather LD1/LDFF1 (scalar + vector) load instructions..
Apr 25 2018, 2:10 AM
sdesmalen updated the diff for D46023: [AArch64][SVE] Asm: Support for gather LD1/LDFF1 (scalar + vector) load instructions..
  • Merged sve_mem_64b_gld_sv and sve_mem_64b_gld_sv2 instruction classes.
Apr 25 2018, 2:10 AM

Apr 24 2018

sdesmalen added inline comments to D45953: [AArch64][SVE] Asm: Support for gather LD1/LDFF1 (scalar + vector (32bit elts, scaled)) load instructions..
Apr 24 2018, 10:51 AM
sdesmalen removed a dependent revision for D45952: [AArch64][SVE] Asm: Support for gather LD1/LDFF1 (scalar + vector (32bit elts, unscaled)) load instructions.: D45958: [AArch64][SVE] Asm: Negative tests for all LD1 gather (scalar+vector) load instructions..
Apr 24 2018, 10:51 AM
sdesmalen removed a dependent revision for D45953: [AArch64][SVE] Asm: Support for gather LD1/LDFF1 (scalar + vector (32bit elts, scaled)) load instructions.: D45958: [AArch64][SVE] Asm: Negative tests for all LD1 gather (scalar+vector) load instructions..
Apr 24 2018, 10:51 AM
sdesmalen removed a dependent revision for D45954: [AArch64][SVE] Asm: Support for gather LD1/LDFF1 (scalar + vector (64bit elts, unscaled)) load instructions.: D45958: [AArch64][SVE] Asm: Negative tests for all LD1 gather (scalar+vector) load instructions..
Apr 24 2018, 10:51 AM
sdesmalen edited dependencies for D45958: [AArch64][SVE] Asm: Negative tests for all LD1 gather (scalar+vector) load instructions., added: 1; removed: 6.
Apr 24 2018, 10:51 AM