[IR] make -stack-alignment= into a module attr

[nickdesaulniers]

Summary

Similar to D102742, specifying the stack alignment via CodegenOpts means
that this flag gets dropped during LTO, unless the command line is
re-specified as a plugin opt. Instead, encode this information as a
module level attribute so that we don't have to expose this llvm
internal flag when linking the Linux kernel with LTO.

Looks like external dependencies might need a fix:

• https://github.com/llvm-hs/llvm-hs/issues/345
• https://github.com/halide/Halide/issues/6079

Link: https://github.com/ClangBuiltLinux/linux/issues/1377

[nickdesaulniers]

bumping for review (or suggestions of additional reviewers)

[tejohnson]

Curiously, using ModFlagBehavior::Error doesn't error if one of two modules being linked together doesn't have such a module level attribute.

Yeah, there's a Require behavior, but that only allows you to specify what the value should be after linking modules. Barring changing the behavior of Error, which I'm guessing is relied upon too many places, the main thing I can think of is to add a new module flag behavior with tbd name that is essentially like Error but treats a module without the module flag as having a conflicting value and issues an error for that as well.

llvm/test/Linker/stack-alignment.ll

12

Will you get this error currently? I thought per comment and behavior of Error that it shouldn't give an error.

[nickdesaulniers]

In D103048#2795456, @tejohnson wrote:

Curiously, using ModFlagBehavior::Error doesn't error if one of two modules being linked together doesn't have such a module level attribute.

Yeah, there's a Require behavior, but that only allows you to specify what the value should be after linking modules. Barring changing the behavior of Error, which I'm guessing is relied upon too many places, the main thing I can think of is to add a new module flag behavior with tbd name that is essentially like Error but treats a module without the module flag as having a conflicting value and issues an error for that as well.

I agree, that's what I was thinking we'd need to do, so I'm glad you came to a similar conclusion. I'll work on implementing a new ModFlagBehavior in this patch implementing such semantics that then this module level IR node can use.

[nickdesaulniers]

llvm/test/Linker/stack-alignment.ll

12

the RUN line for that check is missing the :, so it's not actually run. I think I'll create the new ModFlagBehavior as a child revision to this commit, in which I add the new behavior and upgrade this attribute to use it, adding in this unit test.

---

Now that I've had time to play with implementing such a ModFlagBehavior; it looks like it's not possible to create a module with such semantics then test it properly with llvm-link. The reason is that llvm-link is structured to start with an empty module ("Composite"), then link in the first module specified on the command line, then link in the rest of the modules specified. So we can't disambiguate between the initial empty module being linked against the initial source file with the MDNode vs 2 full modules where 1 is missing the MD node. (ie. for two input source files, the main module linking logic is run twice, not once).

See: https://reviews.llvm.org/D103851

---

In that case, I just plan to remove this test case then, since it wasn't being RUN anyways.

[nickdesaulniers]

• remove test for module without module attr

[tejohnson]

lgtm

llvm/test/Linker/stack-alignment.ll

12

Ah ok, that makes sense. For regular LTO via the linker we also start with an empty module and link into it, so it would have the same issue.

Presumably we could detect and handle the case of linking into a completely empty module? But that can be revisited later.

[nickdesaulniers]

Thanks for the review!

Notified downstream dependents:

• https://github.com/llvm-hs/llvm-hs/issues/345
• https://github.com/halide/Halide/issues/6079

[nickdesaulniers]

• fixes for MIPS

[nickdesaulniers]

I've retested with all backends enabled; all green now. Changes added to:

• llvm/lib/Target/Mips/MipsCallLowering.cpp
• llvm/lib/Target/Mips/MipsTargetMachine.cpp
• llvm/test/CodeGen/Mips/stack-alignment.ll

Planning to recommit now.

[ro]

One test FAILs on Solaris/sparcv9:

LLVM :: CodeGen/Generic/ForceStackAlign.ll

with

LLVM ERROR: Function "g" required stack re-alignment, but LLVM couldn't handle it (probably because it has a dynamic alloca).

[bgamari]

@nickdesaulniers, this appears to be missing the corresponding documentation in the LLVM language reference. As someone who maintains GHC's LLVM backend, this documentation is invaluable.

clang/lib/CodeGen/BackendUtil.cpp

if (LangOpts.hasDWARFExceptions())
     Options.ExceptionModel = llvm::ExceptionHandling::DwarfCFI;
   if (LangOpts.hasWasmExceptions())
     Options.ExceptionModel = llvm::ExceptionHandling::Wasm;
 
   Options.NoInfsFPMath = LangOpts.NoHonorInfs;
   Options.NoNaNsFPMath = LangOpts.NoHonorNaNs;
   Options.NoZerosInBSS = CodeGenOpts.NoZeroInitializedInBSS;
   Options.UnsafeFPMath = LangOpts.UnsafeFPMath;
-  Options.StackAlignmentOverride = CodeGenOpts.StackAlignment;
 
   Options.BBSections =
       llvm::StringSwitch<llvm::BasicBlockSection>(CodeGenOpts.BBSections)
           .Case("all", llvm::BasicBlockSection::All)
           .Case("labels", llvm::BasicBlockSection::Labels)
           .StartsWith("list=", llvm::BasicBlockSection::List)
           .Case("none", llvm::BasicBlockSection::None)
           .Default(llvm::BasicBlockSection::None);

clang/lib/CodeGen/CodeGenModule.cpp

void CodeGenModule::Release() {
   if (!getCodeGenOpts().StackProtectorGuard.empty())
     getModule().setStackProtectorGuard(getCodeGenOpts().StackProtectorGuard);
   if (!getCodeGenOpts().StackProtectorGuardReg.empty())
     getModule().setStackProtectorGuardReg(
         getCodeGenOpts().StackProtectorGuardReg);
   if (getCodeGenOpts().StackProtectorGuardOffset != INT_MAX)
     getModule().setStackProtectorGuardOffset(
         getCodeGenOpts().StackProtectorGuardOffset);
+  if (getCodeGenOpts().StackAlignment)
+    getModule().setOverrideStackAlignment(getCodeGenOpts().StackAlignment);
 
   getTargetCodeGenInfo().emitTargetMetadata(*this, MangledDeclNames);
 
   EmitBackendOptionsMetadata(getCodeGenOpts());
 
   // Set visibility from DLL storage class
   // We do this at the end of LLVM IR generation; after any operation
   // that might affect the DLL storage class or the visibility, and

clang/test/CodeGen/stackrealign-main.c

 // RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -o - -mstack-alignment=64 %s | FileCheck %s
+// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -o - %s | FileCheck %s --check-prefix=DEFAULT
 
 // CHECK-LABEL: define{{.*}} void @other()
 // CHECK: [[OTHER:#[0-9]+]]
 // CHECK: {
 void other(void) {}
 
 // CHECK-LABEL: define{{.*}} i32 @main(
 // CHECK: [[MAIN:#[0-9]+]]
 // CHECK: {
 int main(int argc, char **argv) {
   other();
   return 0;
 }
 
 // CHECK: attributes [[OTHER]] = { noinline nounwind optnone
 // CHECK-NOT: "stackrealign"
 // CHECK: }
 // CHECK: attributes [[MAIN]] = { noinline nounwind optnone {{.*}}"stackrealign"{{.*}} }
+// CHECK: !{i32 1, !"override-stack-alignment", i32 64}
+// DEFAULT-NOT: "override-stack-alignment"

llvm/include/llvm/IR/Module.h

/// @}
   /// "sysreg".
   StringRef getStackProtectorGuardReg() const;
   void setStackProtectorGuardReg(StringRef Reg);
 
   /// Get/set what offset from the stack protector to use.
   int getStackProtectorGuardOffset() const;
   void setStackProtectorGuardOffset(int Offset);
 
+  /// Get/set the stack alignment overridden from the default.
+  unsigned getOverrideStackAlignment() const;
+  void setOverrideStackAlignment(unsigned Align);
+
   /// @name Utility functions for querying and setting the build SDK version
   /// @{
 
   /// Attach a build SDK version metadata to this module.
   void setSDKVersion(const VersionTuple &V);
 
   /// Get the build SDK version metadata.
   ///

llvm/include/llvm/Target/TargetOptions.h

public:
     /// GuaranteedTailCallOpt - This flag is enabled when -tailcallopt is
     /// specified on the commandline. When the flag is on, participating targets
     /// will perform tail call optimization on all calls which use the fastcc
     /// calling convention and which satisfy certain target-independent
     /// criteria (being at the end of a function, having the same return type
     /// as their parent function, etc.), using an alternate ABI if necessary.
     unsigned GuaranteedTailCallOpt : 1;
 
-    /// StackAlignmentOverride - Override default stack alignment for target.
-    unsigned StackAlignmentOverride = 0;
-
     /// StackSymbolOrdering - When true, this will allow CodeGen to order
     /// the local stack symbols (for code size, code locality, or any other
     /// heuristics). When false, the local symbols are left in whatever order
     /// they were generated. Default is true.
     unsigned StackSymbolOrdering : 1;
 
     /// EnableFastISel - This flag enables fast-path instruction selection
     /// which trades away generated code quality in favor of reducing

llvm/lib/CodeGen/CommandFlags.cpp

 CGOPT(DenormalMode::DenormalModeKind, DenormalFP32Math)
 CGOPT(bool, EnableHonorSignDependentRoundingFPMath)
 CGOPT(FloatABI::ABIType, FloatABIForCalls)
 CGOPT(FPOpFusion::FPOpFusionMode, FuseFPOps)
 CGOPT(bool, DontPlaceZerosInBSS)
 CGOPT(bool, EnableGuaranteedTailCallOpt)
 CGOPT(bool, DisableTailCalls)
 CGOPT(bool, StackSymbolOrdering)
-CGOPT(unsigned, OverrideStackAlignment)
 CGOPT(bool, StackRealign)
 CGOPT(std::string, TrapFuncName)
 CGOPT(bool, UseCtors)
 CGOPT(bool, RelaxELFRelocations)
 CGOPT_EXP(bool, DataSections)
 CGOPT_EXP(bool, FunctionSections)
 CGOPT(bool, IgnoreXCOFFVisibility)
 CGOPT(bool, XCOFFTracebackTable)
static cl::opt<bool> DisableTailCalls(
       "disable-tail-calls", cl::desc("Never emit tail calls"), cl::init(false));
   CGBINDOPT(DisableTailCalls);
 
   static cl::opt<bool> StackSymbolOrdering(
       "stack-symbol-ordering", cl::desc("Order local stack symbols."),
       cl::init(true));
   CGBINDOPT(StackSymbolOrdering);
 
-  static cl::opt<unsigned> OverrideStackAlignment(
-      "stack-alignment", cl::desc("Override default stack alignment"),
-      cl::init(0));
-  CGBINDOPT(OverrideStackAlignment);
-
   static cl::opt<bool> StackRealign(
       "stackrealign",
       cl::desc("Force align the stack to the minimum alignment"),
       cl::init(false));
   CGBINDOPT(StackRealign);
 
   static cl::opt<std::string> TrapFuncName(
       "trap-func", cl::Hidden,
codegen::InitTargetOptionsFromCodeGenFlags(const Triple &TheTriple) {
 
   Options.HonorSignDependentRoundingFPMathOption =
       getEnableHonorSignDependentRoundingFPMath();
   if (getFloatABIForCalls() != FloatABI::Default)
     Options.FloatABIType = getFloatABIForCalls();
   Options.EnableAIXExtendedAltivecABI = getEnableAIXExtendedAltivecABI();
   Options.NoZerosInBSS = getDontPlaceZerosInBSS();
   Options.GuaranteedTailCallOpt = getEnableGuaranteedTailCallOpt();
-  Options.StackAlignmentOverride = getOverrideStackAlignment();
   Options.StackSymbolOrdering = getStackSymbolOrdering();
   Options.UseInitArray = !getUseCtors();
   Options.RelaxELFRelocations = getRelaxELFRelocations();
   Options.DataSections =
       getExplicitDataSections().getValueOr(TheTriple.hasDefaultDataSections());
   Options.FunctionSections = getFunctionSections();
   Options.IgnoreXCOFFVisibility = getIgnoreXCOFFVisibility();
   Options.XCOFFTracebackTable = getXCOFFTracebackTable();

llvm/lib/IR/Module.cpp

if (auto *CI = mdconst::dyn_extract_or_null<ConstantInt>(MD))
     return CI->getSExtValue();
   return INT_MAX;
 }
 
 void Module::setStackProtectorGuardOffset(int Offset) {
   addModuleFlag(ModFlagBehavior::Error, "stack-protector-guard-offset", Offset);
 }
 
+unsigned Module::getOverrideStackAlignment() const {
+  Metadata *MD = getModuleFlag("override-stack-alignment");
+  if (auto *CI = mdconst::dyn_extract_or_null<ConstantInt>(MD))
+    return CI->getZExtValue();
+  return 0;
+}
+
+void Module::setOverrideStackAlignment(unsigned Align) {
+  addModuleFlag(ModFlagBehavior::Error, "override-stack-alignment", Align);
+}
+
 void Module::setSDKVersion(const VersionTuple &V) {
   SmallVector<unsigned, 3> Entries;
   Entries.push_back(V.getMajor());
   if (auto Minor = V.getMinor()) {
     Entries.push_back(*Minor);
     if (auto Subminor = V.getSubminor())
       Entries.push_back(*Subminor);
     // Ignore the 'build' component as it can't be represented in the object

llvm/lib/Target/Mips/MipsCallLowering.cpp

bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
   setLocInfo(ArgLocs, Outs);
 
   MipsOutgoingValueHandler RetHandler(MIRBuilder, MF.getRegInfo(), MIB);
   if (!RetHandler.handle(ArgLocs, ArgInfos)) {
     return false;
   }
 
   unsigned NextStackOffset = CCInfo.getNextStackOffset();
+  unsigned StackAlignment = F.getParent()->getOverrideStackAlignment();
+  if (!StackAlignment) {
     const TargetFrameLowering *TFL = MF.getSubtarget().getFrameLowering();
-  unsigned StackAlignment = TFL->getStackAlignment();
+    StackAlignment = TFL->getStackAlignment();
+  }
   NextStackOffset = alignTo(NextStackOffset, StackAlignment);
   CallSeqStart.addImm(NextStackOffset).addImm(0);
 
   if (IsCalleeGlobalPIC) {
     MIRBuilder.buildCopy(
       Register(Mips::GP),
       MF.getInfo<MipsFunctionInfo>()->getGlobalBaseRegForGlobalISel(MF));
     MIB.addDef(Mips::GP, RegState::Implicit);

llvm/lib/Target/Mips/MipsTargetMachine.cpp

MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT,
                                      Optional<CodeModel::Model> CM,
                                      CodeGenOpt::Level OL, bool JIT,
                                      bool isLittle)
     : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
                         CPU, FS, Options, getEffectiveRelocModel(JIT, RM),
                         getEffectiveCodeModel(CM, CodeModel::Small), OL),
       isLittle(isLittle), TLOF(std::make_unique<MipsTargetObjectFile>()),
       ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)),
-      Subtarget(nullptr),
-      DefaultSubtarget(TT, CPU, FS, isLittle, *this,
-                       MaybeAlign(Options.StackAlignmentOverride)),
+      Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this, None),
       NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16",
-                        isLittle, *this,
-                        MaybeAlign(Options.StackAlignmentOverride)),
+                        isLittle, *this, None),
       Mips16Subtarget(TT, CPU, FS.empty() ? "+mips16" : FS.str() + ",+mips16",
-                      isLittle, *this,
-                      MaybeAlign(Options.StackAlignmentOverride)) {
+                      isLittle, *this, None) {
   Subtarget = &DefaultSubtarget;
   initAsmInfo();
 
   // Mips supports the debug entry values.
   setSupportsDebugEntryValues(true);
 }
 
 MipsTargetMachine::~MipsTargetMachine() = default;
MipsTargetMachine::getSubtargetImpl(const Function &F) const {
   auto &I = SubtargetMap[CPU + FS];
   if (!I) {
     // This needs to be done before we create a new subtarget since any
     // creation will depend on the TM and the code generation flags on the
     // function that reside in TargetOptions.
     resetTargetOptions(F);
     I = std::make_unique<MipsSubtarget>(
         TargetTriple, CPU, FS, isLittle, *this,
-        MaybeAlign(Options.StackAlignmentOverride));
+        MaybeAlign(F.getParent()->getOverrideStackAlignment()));
   }
   return I.get();
 }
 
 void MipsTargetMachine::resetSubtarget(MachineFunction *MF) {
   LLVM_DEBUG(dbgs() << "resetSubtarget\n");
 
   Subtarget = &MF->getSubtarget<MipsSubtarget>();

llvm/lib/Target/X86/X86TargetMachine.cpp

X86TargetMachine::getSubtargetImpl(const Function &F) const {
   auto &I = SubtargetMap[Key];
   if (!I) {
     // This needs to be done before we create a new subtarget since any
     // creation will depend on the TM and the code generation flags on the
     // function that reside in TargetOptions.
     resetTargetOptions(F);
     I = std::make_unique<X86Subtarget>(
         TargetTriple, CPU, TuneCPU, FS, *this,
-        MaybeAlign(Options.StackAlignmentOverride), PreferVectorWidthOverride,
-        RequiredVectorWidth);
+        MaybeAlign(F.getParent()->getOverrideStackAlignment()),
+        PreferVectorWidthOverride, RequiredVectorWidth);
   }
   return I.get();
 }
 
 bool X86TargetMachine::isNoopAddrSpaceCast(unsigned SrcAS,
                                            unsigned DestAS) const {
   assert(SrcAS != DestAS && "Expected different address spaces!");
   if (getPointerSize(SrcAS) != getPointerSize(DestAS))

llvm/test/CodeGen/Generic/ForceStackAlign.ll

 ; Check that stack alignment can be forced. Individual targets should test their
 ; specific implementation details.
 
-; RUN: llc < %s -stackrealign -stack-alignment=32 | FileCheck %s
+; RUN: llc < %s -stackrealign | FileCheck %s
 ; CHECK-LABEL: @f
 ; CHECK-LABEL: @g
 
 define i32 @f(i8* %p) nounwind {
 entry:
   %0 = load i8, i8* %p
   %conv = sext i8 %0 to i32
   ret i32 %conv
 }
 
 define i64 @g(i32 %i) nounwind {
 entry:
   br label %if.then
 
 if.then:
   %0 = alloca i8, i32 %i
   call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 %i, i1 false)
   %call = call i32 @f(i8* %0)
   %conv = sext i32 %call to i64
   ret i64 %conv
 }
 
 declare void @llvm.memset.p0i8.i32(i8*, i8, i32, i1) nounwind
+
+!llvm.module.flags = !{!0}
+!0 = !{i32 2, !"override-stack-alignment", i32 32}

llvm/test/CodeGen/Mips/stack-alignment.ll

-; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=32
-; RUN: llc -march=mipsel -stack-alignment=32 < %s | FileCheck %s -check-prefix=A32-32
-; RUN: llc -march=mipsel -mattr=+fp64,+mips32r2 < %s | FileCheck %s -check-prefix=32
-; RUN: llc -march=mips64el -mcpu=mips3 < %s | FileCheck %s -check-prefix=64
-; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck %s -check-prefix=64
-; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s -check-prefix=64
-; RUN: llc -march=mips64el -mcpu=mips64 -stack-alignment=32 < %s | FileCheck %s -check-prefix=A32-64
+; RUN: split-file %s %t
+; RUN: cat %t/main.ll %t/_32.ll > %t/32.ll
+; RUN: llc -march=mipsel < %t/main.ll | FileCheck %s -check-prefix=32
+; RUN: llc -march=mipsel < %t/32.ll | FileCheck %s -check-prefix=A32-32
+; RUN: llc -march=mipsel -mattr=+fp64,+mips32r2 < %t/main.ll | FileCheck %s -check-prefix=32
+; RUN: llc -march=mips64el -mcpu=mips3 < %t/main.ll | FileCheck %s -check-prefix=64
+; RUN: llc -march=mips64el -mcpu=mips4 < %t/main.ll | FileCheck %s -check-prefix=64
+; RUN: llc -march=mips64el -mcpu=mips64 < %t/main.ll | FileCheck %s -check-prefix=64
+; RUN: llc -march=mips64el -mcpu=mips64 < %t/32.ll | FileCheck %s -check-prefix=A32-64
 
+;--- main.ll
 ; 32:      addiu  $sp, $sp, -8
 ; 64:      daddiu  $sp, $sp, -16
 ; A32-32:  addiu  $sp, $sp, -32
 ; A32-64:  daddiu  $sp, $sp, -32
 
 define i32 @foo1() #0 {
 entry:
   ret i32 14
 }
 
 attributes #0 = { "frame-pointer"="all" }
+;--- _32.ll
+!llvm.module.flags = !{!0}
+!0 = !{i32 1, !"override-stack-alignment", i32 32}

llvm/test/CodeGen/X86/base-pointer-and-cmpxchg.ll

-; RUN: llc -mtriple=x86_64-apple-macosx -mattr=+cx16 -x86-use-base-pointer=true -stackrealign -stack-alignment=32  %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE --check-prefix=USE_BASE_64 %s
-; RUN: llc -mtriple=x86_64-apple-macosx -mattr=+cx16 -x86-use-base-pointer=false -stackrealign -stack-alignment=32  %s -o - | FileCheck --check-prefix=CHECK --check-prefix=DONT_USE_BASE %s
-; RUN: llc -mtriple=x86_64-linux-gnux32 -mattr=+cx16 -x86-use-base-pointer=true -stackrealign -stack-alignment=32  %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE --check-prefix=USE_BASE_32 %s
-; RUN: llc -mtriple=x86_64-linux-gnux32 -mattr=+cx16 -x86-use-base-pointer=false -stackrealign -stack-alignment=32  %s -o - | FileCheck --check-prefix=CHECK --check-prefix=DONT_USE_BASE %s
+; RUN: llc -mtriple=x86_64-apple-macosx -mattr=+cx16 -x86-use-base-pointer=true -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE --check-prefix=USE_BASE_64 %s
+; RUN: llc -mtriple=x86_64-apple-macosx -mattr=+cx16 -x86-use-base-pointer=false -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=DONT_USE_BASE %s
+; RUN: llc -mtriple=x86_64-linux-gnux32 -mattr=+cx16 -x86-use-base-pointer=true -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE --check-prefix=USE_BASE_32 %s
+; RUN: llc -mtriple=x86_64-linux-gnux32 -mattr=+cx16 -x86-use-base-pointer=false -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=DONT_USE_BASE %s
 
 ; This function uses dynamic allocated stack to force the use
 ; of a frame pointer.
 ; The inline asm clobbers a bunch of registers to make sure
 ; the frame pointer will need to be used (for spilling in that case).
 ;
 ; Then, we check that when we use rbx as the base pointer,
 ; we do not use cmpxchg, since using that instruction requires
define i1 @cmp_and_swap16(i128 %a, i128 %b, i128* %addr, i32 %n) {
   %dummy = alloca i32, i32 %n
 tail call void asm sideeffect "nop", "~{rax},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
   %cmp = cmpxchg i128* %addr, i128 %a, i128 %b seq_cst seq_cst
   %res = extractvalue { i128, i1 } %cmp, 1
   %idx = getelementptr i32, i32* %dummy, i32 5
   store i32 %n, i32* %idx
   ret i1 %res
 }
+!llvm.module.flags = !{!0}
+!0 = !{i32 2, !"override-stack-alignment", i32 32}

llvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll

-; RUN: llc -mtriple=x86_64-pc-linux-gnu -mattr=+mwaitx -x86-use-base-pointer=true -stackrealign -stack-alignment=32  %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE_64 %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -mattr=+mwaitx -x86-use-base-pointer=true -stackrealign -stack-alignment=32  %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE_32 %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -mattr=+mwaitx -x86-use-base-pointer=true  %s -o - | FileCheck --check-prefix=CHECK --check-prefix=NO_BASE_64 %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -mattr=+mwaitx -x86-use-base-pointer=true  %s -o - | FileCheck --check-prefix=CHECK --check-prefix=NO_BASE_32 %s
+; RUN: split-file %s %t
+; RUN: cat %t/main.ll %t/_align32.ll > %t/align32.ll
+; RUN: llc -mtriple=x86_64-pc-linux-gnu -mattr=+mwaitx -x86-use-base-pointer=true -stackrealign %t/align32.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE_64 %s
+; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -mattr=+mwaitx -x86-use-base-pointer=true -stackrealign %t/align32.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE_32 %s
+; RUN: llc -mtriple=x86_64-pc-linux-gnu -mattr=+mwaitx -x86-use-base-pointer=true %t/main.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=NO_BASE_64 %s
+; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -mattr=+mwaitx -x86-use-base-pointer=true %t/main.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=NO_BASE_32 %s
+
+;--- main.ll
 
 ; This test checks that we save and restore the base pointer (ebx or rbx) in the
 ; presence of the mwaitx intrinsic which requires to use ebx for one of its
 ; argument.
 ; This function uses a dynamically allocated stack to force the use
 ; of a base pointer.
 ; After the call to the mwaitx intrinsic we do a volatile store to the
 ; dynamically allocated memory which will require the use of the base pointer.

 ; No need to save base pointer.
 ; NO_BASE_32-NOT: movl %ebx
 ; NO_BASE_32: mwaitx
 ; No need to restore base pointer.
 ; NO_BASE_32-NOT: movl {{.*}}, %ebx
 ; NO_BASE_32-NEXT: {{.+$}}
 
 declare void @llvm.x86.mwaitx(i32, i32, i32) nounwind
+;--- _align32.ll
+!llvm.module.flags = !{!0}
+!0 = !{i32 2, !"override-stack-alignment", i32 32}

llvm/test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll

+; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -stackrealign -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s
+; rdar://11496434
+declare void @t1_helper(i32*)
+declare void @t3_helper(i32*, i32*)
+
+; Test when forcing stack alignment
+define i32 @t8() nounwind uwtable {
+entry:
+  %a = alloca i32, align 4
+  call void @t1_helper(i32* %a) nounwind
+  %0 = load i32, i32* %a, align 4
+  %add = add nsw i32 %0, 13
+  ret i32 %add
+
+; CHECK: _t8
+; CHECK:      movq %rsp, %rbp
+; CHECK:      andq $-32, %rsp
+; CHECK-NEXT: subq $32, %rsp
+; CHECK:      movq %rbp, %rsp
+; CHECK:      popq %rbp
+}
+
+; VLAs
+define i32 @t9(i64 %sz) nounwind uwtable {
+entry:
+  %a = alloca i32, align 4
+  %vla = alloca i32, i64 %sz, align 16
+  call void @t3_helper(i32* %a, i32* %vla) nounwind
+  %0 = load i32, i32* %a, align 4
+  %add = add nsw i32 %0, 13
+  ret i32 %add
+
+; CHECK: _t9
+; CHECK: pushq %rbp
+; CHECK: movq %rsp, %rbp
+; CHECK: pushq %rbx
+; CHECK: andq $-32, %rsp
+; CHECK: subq $32, %rsp
+; CHECK: movq %rsp, %rbx
+
+; CHECK: leaq -8(%rbp), %rsp
+; CHECK: popq %rbx
+; CHECK: popq %rbp
+}
+!llvm.module.flags = !{!0}
+!0 = !{i32 2, !"override-stack-alignment", i32 32}

llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll

 ; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s
-; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -stackrealign -stack-alignment=32 -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=FORCE-ALIGN
 ; rdar://11496434
 
 ; no VLAs or dynamic alignment
 define i32 @t1() nounwind uwtable ssp {
 entry:
   %a = alloca i32, align 4
   call void @t1_helper(i32* %a) nounwind
   %0 = load i32, i32* %a, align 4

 ; CHECK:     popq %rbp
 }
 
 declare i8* @llvm.stacksave() nounwind
 
 declare void @bar(i32, i32*, %struct.struct_t* byval(%struct.struct_t) align 8)
 
 declare void @llvm.stackrestore(i8*) nounwind
-
-
-; Test when forcing stack alignment
-define i32 @t8() nounwind uwtable {
-entry:
-  %a = alloca i32, align 4
-  call void @t1_helper(i32* %a) nounwind
-  %0 = load i32, i32* %a, align 4
-  %add = add nsw i32 %0, 13
-  ret i32 %add
-
-; FORCE-ALIGN: _t8
-; FORCE-ALIGN:      movq %rsp, %rbp
-; FORCE-ALIGN:      andq $-32, %rsp
-; FORCE-ALIGN-NEXT: subq $32, %rsp
-; FORCE-ALIGN:      movq %rbp, %rsp
-; FORCE-ALIGN:      popq %rbp
-}
-
-; VLAs
-define i32 @t9(i64 %sz) nounwind uwtable {
-entry:
-  %a = alloca i32, align 4
-  %vla = alloca i32, i64 %sz, align 16
-  call void @t3_helper(i32* %a, i32* %vla) nounwind
-  %0 = load i32, i32* %a, align 4
-  %add = add nsw i32 %0, 13
-  ret i32 %add
-
-; FORCE-ALIGN: _t9
-; FORCE-ALIGN: pushq %rbp
-; FORCE-ALIGN: movq %rsp, %rbp
-; FORCE-ALIGN: pushq %rbx
-; FORCE-ALIGN: andq $-32, %rsp
-; FORCE-ALIGN: subq $32, %rsp
-; FORCE-ALIGN: movq %rsp, %rbx
-
-; FORCE-ALIGN: leaq -8(%rbp), %rsp
-; FORCE-ALIGN: popq %rbx
-; FORCE-ALIGN: popq %rbp
-}

llvm/test/CodeGen/X86/force-align-stack-alloca.ll

 ; This test is attempting to detect when we request forced re-alignment of the
 ; stack to an alignment greater than would be available due to the ABI. We
 ; arbitrarily force alignment up to 32-bytes for i386 hoping that this will
 ; exceed any ABI provisions.
 ;
-; RUN: llc < %s -mcpu=generic -stackrealign -stack-alignment=32 | FileCheck %s
+; RUN: llc < %s -mcpu=generic -stackrealign | FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
 target triple = "i386-unknown-linux-gnu"
 
 define i32 @f(i8* %p) nounwind {
 entry:
   %0 = load i8, i8* %p
   %conv = sext i8 %0 to i32
if.then:
   %0 = alloca i8, i32 %i
   call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 %i, i1 false)
   %call = call i32 @f(i8* %0)
   %conv = sext i32 %call to i64
   ret i64 %conv
 }
 
 declare void @llvm.memset.p0i8.i32(i8*, i8, i32, i1) nounwind
+
+!llvm.module.flags = !{!0}
+!0 = !{i32 2, !"override-stack-alignment", i32 32}

llvm/test/CodeGen/X86/hipe-cc.ll

-; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -code-model=medium -stack-alignment=4 -mtriple=i686-linux-gnu -mcpu=pentium | FileCheck %s
+; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -code-model=medium -mtriple=i686-linux-gnu -mcpu=pentium | FileCheck %s
 
 ; Check the HiPE calling convention works (x86-32)
 
 define void @zap(i32 %a, i32 %b) nounwind {
 entry:
   ; CHECK:      movl 40(%esp), %eax
   ; CHECK-NEXT: movl 44(%esp), %edx
   ; CHECK-NEXT: movl       $8, %ecx

 
 !hipe.literals = !{ !0, !1, !2 }
 !0 = !{ !"P_NSP_LIMIT", i32 84 }
 !1 = !{ !"X86_LEAF_WORDS", i32 24 }
 !2 = !{ !"AMD64_LEAF_WORDS", i32 24 }
 @clos = external dso_local constant i32
 declare cc 11 void @bar(i32, i32, i32, i32, i32)
 declare cc 11 { i32, i32, i32 } @tailcallee(i32, i32, i32, i32, i32, i32)
+
+!llvm.module.flags = !{!3}
+!3 = !{i32 2, !"override-stack-alignment", i32 4}

llvm/test/CodeGen/X86/hipe-cc64.ll

-; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -relocation-model=static -code-model=medium -stack-alignment=8 -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s
+; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -relocation-model=static -code-model=medium -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s
 
 ; Check the HiPE calling convention works (x86-64)
 
 define void @zap(i64 %a, i64 %b) nounwind {
 entry:
   ; CHECK:      movq %rsi, %rdx
   ; CHECK-NEXT: movl $8, %ecx
   ; CHECK-NEXT: movl $9, %r8d

 
 !hipe.literals = !{ !0, !1, !2 }
 !0 = !{ !"P_NSP_LIMIT", i32 160 }
 !1 = !{ !"X86_LEAF_WORDS", i32 24 }
 !2 = !{ !"AMD64_LEAF_WORDS", i32 24 }
 @clos = external constant i64
 declare cc 11 void @bar(i64, i64, i64, i64, i64, i64)
 declare cc 11 { i64, i64, i64 } @tailcallee(i64, i64, i64, i64, i64, i64, i64)
+!llvm.module.flags = !{!3}
+!3 = !{i32 2, !"override-stack-alignment", i32 8}

llvm/test/CodeGen/X86/movtopush-stack-align.ll

+; RUN: llc < %s -mtriple=i686-windows -stackrealign | FileCheck %s
+
+declare void @good(i32 %a, i32 %b, i32 %c, i32 %d)
+declare void @oneparam(i32 %a)
+declare void @eightparams(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h)
+
+; When there is no reserved call frame, check that additional alignment
+; is added when the pushes don't add up to the required alignment.
+; CHECK-LABEL: test5:
+; CHECK: subl    $16, %esp
+; CHECK-NEXT: pushl   $4
+; CHECK-NEXT: pushl   $3
+; CHECK-NEXT: pushl   $2
+; CHECK-NEXT: pushl   $1
+; CHECK-NEXT: call
+define void @test5(i32 %k) {
+entry:
+  %a = alloca i32, i32 %k
+  call void @good(i32 1, i32 2, i32 3, i32 4)
+  ret void
+}
+
+; When the alignment adds up, do the transformation
+; CHECK-LABEL: test5b:
+; CHECK: pushl   $8
+; CHECK-NEXT: pushl   $7
+; CHECK-NEXT: pushl   $6
+; CHECK-NEXT: pushl   $5
+; CHECK-NEXT: pushl   $4
+; CHECK-NEXT: pushl   $3
+; CHECK-NEXT: pushl   $2
+; CHECK-NEXT: pushl   $1
+; CHECK-NEXT: call
+define void @test5b() optsize {
+entry:
+  call void @eightparams(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8)
+  ret void
+}
+
+; When having to compensate for the alignment isn't worth it,
+; don't use pushes.
+; CHECK-LABEL: test5c:
+; CHECK: movl $1, (%esp)
+; CHECK-NEXT: call
+define void @test5c() optsize {
+entry:
+  call void @oneparam(i32 1)
+  ret void
+}
+
+!llvm.module.flags = !{!0}
+!0 = !{i32 2, !"override-stack-alignment", i32 32}

llvm/test/CodeGen/X86/movtopush.ll

 ; RUN: llc < %s -mtriple=i686-windows | FileCheck %s -check-prefix=NORMAL
 ; RUN: llc < %s -mtriple=i686-windows -no-x86-call-frame-opt | FileCheck %s -check-prefix=NOPUSH
 ; RUN: llc < %s -mtriple=x86_64-windows | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i686-windows -stackrealign -stack-alignment=32 | FileCheck %s -check-prefix=ALIGNED
 ; RUN: llc < %s -mtriple=i686-pc-linux | FileCheck %s -check-prefix=LINUX
 
 %class.Class = type { i32 }
 %struct.s = type { i64 }
 
 declare void @good(i32 %a, i32 %b, i32 %c, i32 %d)
 declare void @inreg(i32 %a, i32 inreg %b, i32 %c, i32 %d)
 declare x86_thiscallcc void @thiscall(%class.Class* %class, i32 %a, i32 %b, i32 %c, i32 %d)

 ; NORMAL-NEXT: call
 ; NORMAL-NEXT: ret
 define void @test4b(%class.Class* %f) optsize {
 entry:
   call x86_thiscallcc void @thiscall(%class.Class* %f, i32 1, i32 2, i32 3, i32 4)
   ret void
 }
 
-; When there is no reserved call frame, check that additional alignment
-; is added when the pushes don't add up to the required alignment.
-; ALIGNED-LABEL: test5:
-; ALIGNED: subl    $16, %esp
-; ALIGNED-NEXT: pushl   $4
-; ALIGNED-NEXT: pushl   $3
-; ALIGNED-NEXT: pushl   $2
-; ALIGNED-NEXT: pushl   $1
-; ALIGNED-NEXT: call
-define void @test5(i32 %k) {
-entry:
-  %a = alloca i32, i32 %k
-  call void @good(i32 1, i32 2, i32 3, i32 4)
-  ret void
-}
-
-; When the alignment adds up, do the transformation
-; ALIGNED-LABEL: test5b:
-; ALIGNED: pushl   $8
-; ALIGNED-NEXT: pushl   $7
-; ALIGNED-NEXT: pushl   $6
-; ALIGNED-NEXT: pushl   $5
-; ALIGNED-NEXT: pushl   $4
-; ALIGNED-NEXT: pushl   $3
-; ALIGNED-NEXT: pushl   $2
-; ALIGNED-NEXT: pushl   $1
-; ALIGNED-NEXT: call
-define void @test5b() optsize {
-entry:
-  call void @eightparams(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8)
-  ret void
-}
-
-; When having to compensate for the alignment isn't worth it,
-; don't use pushes.
-; ALIGNED-LABEL: test5c:
-; ALIGNED: movl $1, (%esp)
-; ALIGNED-NEXT: call
-define void @test5c() optsize {
-entry:
-  call void @oneparam(i32 1)
-  ret void
-}
-
 ; Check that pushing the addresses of globals (Or generally, things that
 ; aren't exactly immediates) isn't broken.
 ; Fixes PR21878.
 ; NORMAL-LABEL: test6:
 ; NORMAL: pushl    $_ext
 ; NORMAL-NEXT: call
 declare void @f(i8*)
 @ext = external dso_local constant i8

llvm/test/CodeGen/X86/pr11468.ll

-; RUN: llc < %s -stackrealign -stack-alignment=32 -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s
+; RUN: llc < %s -stackrealign -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s
 ; PR11468
 
 define void @f(i64 %sz) uwtable {
 entry:
   %a = alloca i32, align 32
   store volatile i32 0, i32* %a, align 32
   ; force to push r14 on stack
   call void asm sideeffect "nop", "~{r14},~{dirflag},~{fpsr},~{flags}"() nounwind, !srcloc !0

 ; Restore %rsp from %rbp and subtract the total size of saved registers.
 ; CHECK: leaq -8(%rbp), %rsp
 
 ; Pop saved registers.
 ; CHECK: popq %r14
 ; CHECK: popq %rbp
 }
 
+!llvm.module.flags = !{!1}
 !0 = !{i32 125}
-
+!1 = !{i32 2, !"override-stack-alignment", i32 32}

llvm/test/CodeGen/X86/unaligned-spill-folding.ll

-; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -stack-alignment=4 -relocation-model=pic < %s | FileCheck %s -check-prefix=UNALIGNED
-; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -stack-alignment=16 -relocation-model=pic < %s | FileCheck %s -check-prefix=ALIGNED
-; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -stack-alignment=4 -stackrealign -relocation-model=pic < %s | FileCheck %s -check-prefix=FORCEALIGNED
+; RUN: split-file %s %t
+; RUN: cat %t/main.ll %t/align4.ll > %t/a2.ll
+; RUN: cat %t/main.ll %t/align16.ll > %t/b2.ll
+; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -relocation-model=pic < %t/a2.ll | FileCheck %s -check-prefix=UNALIGNED
+; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -relocation-model=pic < %t/b2.ll | FileCheck %s -check-prefix=ALIGNED
+; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -stackrealign -relocation-model=pic < %t/a2.ll | FileCheck %s -check-prefix=FORCEALIGNED
 
+;--- main.ll
 @arr = internal unnamed_addr global [32 x i32] zeroinitializer, align 16
 
 ; PR12250
 define i32 @test1() {
 vector.ph:
   br label %vector.body
 
 vector.body:

 ; ALIGNED: movdqa {{.*}} # 16-byte Spill
 ; ALIGNED: paddd {{.*}} # 16-byte Folded Reload
 
 ; FORCEALIGNED-LABEL: @test1
 ; FORCEALIGNED: andl $-{{..}}, %esp
 ; FORCEALIGNED: movdqa {{.*}} # 16-byte Spill
 ; FORCEALIGNED: paddd {{.*}} # 16-byte Folded Reload
 }
+!llvm.module.flags = !{!0}
+;--- align4.ll
+!0 = !{i32 2, !"override-stack-alignment", i32 4}
+;--- align16.ll
+!0 = !{i32 2, !"override-stack-alignment", i32 16}

llvm/test/CodeGen/X86/x86-64-baseptr.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-pc-linux -stackrealign -stack-alignment=32 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -stackrealign -stack-alignment=32 < %s | FileCheck -check-prefix=X32ABI %s
+; RUN: llc -mtriple=x86_64-pc-linux -stackrealign < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -stackrealign < %s | FileCheck -check-prefix=X32ABI %s
 
 ; This should run with NaCl as well ( -mtriple=x86_64-pc-nacl ) but currently doesn't due to PR22655
 
 ; Make sure the correct register gets set up as the base pointer
 ; This should be rbx for x64 and 64-bit NaCl and ebx for x32
 ; NACL-LABEL: base
 ; NACL: subq $32, %rsp
 ; NACL: movq %rsp, %rbx

 entry:
   %k = call i32 @helper()
   %a = alloca i32, i32 %k, align 4
   store i32 0, i32* %a, align 4
   ret void
 }
 
 attributes #0 = { nounwind "frame-pointer"="all"}
+!llvm.module.flags = !{!0}
+!0 = !{i32 2, !"override-stack-alignment", i32 32}

llvm/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll

 ; Make sure that when the stack may be misaligned on function entry, fixed frame
 ; elements (here: XMM spills) are accessed using instructions that tolerate
 ; unaligned access.
 ;
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -mattr=+sse,+sse-unaligned-mem -stack-alignment=8 --frame-pointer=all < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -mattr=+sse,+sse-unaligned-mem --frame-pointer=all < %s | FileCheck %s
 
 define dso_local preserve_allcc void @func() #0 {
 ; CHECK-LABEL: func:
 ; CHECK: movups  %xmm0, -{{[0-9]+}}(%rbp)
   call void asm sideeffect "", "~{xmm0},~{dirflag},~{fpsr},~{flags}"() #1
 ; CHECK: movups  -{{[0-9]+}}(%rbp), %xmm0
   ret void
 }
 
 attributes #0 = { nounwind }
+!llvm.module.flags = !{!0}
+!0 = !{i32 2, !"override-stack-alignment", i32 8}

llvm/test/Linker/stack-alignment.ll

+; RUN: split-file %s %t
+; RUN: llvm-link %t/main.ll %t/8.ll
+; RUN: not llvm-link %t/main.ll %t/16.ll 2>&1 | FileCheck --check-prefix=CHECK-16 %s
+
+;--- main.ll
+; NONE: error: linking module flags 'override-stack-alignment': IDs have conflicting values
+; CHECK-16: error: linking module flags 'override-stack-alignment': IDs have conflicting values
+!llvm.module.flags = !{!0}
+!0 = !{i32 1, !"override-stack-alignment", i32 8}
+;--- 8.ll
+!llvm.module.flags = !{!0}
+!0 = !{i32 1, !"override-stack-alignment", i32 8}
+;--- 16.ll
+!llvm.module.flags = !{!0}
+!0 = !{i32 1, !"override-stack-alignment", i32 16}