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srj (Steven Johnson)
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Aug 23 2018, 5:53 PM (101 w, 3 d)

Recent Activity

Jun 4 2020

srj added a comment to D81013: [InstCombine] move vector select ahead of select-shuffle.

@spatel thanks for the quick fix!

Jun 4 2020, 3:30 PM · Restricted Project
srj added a comment to D81013: [InstCombine] move vector select ahead of select-shuffle.

This seems to have injected breakages into Halide when used for x86-64 targets with 'narrow' SIMD (eg., using only SSE2 or SSE4.1); many of our tests now fail in that configuration with variations of

Jun 4 2020, 1:15 PM · Restricted Project

May 26 2020

srj added a comment to D50078: clang-format: support aligned nested conditionals formatting.

And I also think it should be on by default instead of modifying many .clang-format files. So IMHO if we add an option, it should be opt-out.

May 26 2020, 10:16 AM · Restricted Project, Restricted Project

May 21 2020

srj added a comment to D50078: clang-format: support aligned nested conditionals formatting.

I think the new formatting is unquestionably better than the old formatting.

May 21 2020, 4:49 PM · Restricted Project, Restricted Project

Mar 12 2020

srj added a comment to rG8ec71585719d: [InstSimplify] simplify FP ops harder with FMF.

This seems to have injected a breakage into Halide; as of this change, one of our tests (a vectorized reduction of a bunch of infinities to find the minimum, which should also be infinity) now fails with the result being an apparently-garbage value that varies from run to run.

Mar 12 2020, 4:51 PM
srj added a comment to rG8ec71585719d: [InstSimplify] simplify FP ops harder with FMF.

This seems to have injected a breakage into Halide; as of this change, one of our tests (a vectorized reduction of a bunch of infinities to find the minimum, which should also be infinity) now fails with the result being an apparently-garbage value that varies from run to run.

Mar 12 2020, 4:51 PM

Feb 6 2020

srj added a comment to D74102: [CMake] Link against ZLIB::ZLIB.

We too get this bogus result from llvm-config (and it's breaking some of our builds). Please fix or revert.

Feb 6 2020, 1:29 PM · Restricted Project

Dec 2 2019

srj added a comment to rG340e7c0b77a7: build: avoid hardcoding the libxml2 library name.

This has injected a bug into llvm-config --system-libs (at least, on OSX and Linux) for me; previously, the output would be something like

Dec 2 2019, 12:06 PM
srj added a comment to D69412: build: avoid hardcoding the libxml2 library name.

I haven't found any reasonable workarounds for this breakage; CMake is apparently splitting -l/usr/lib/x86_64-linux-gnu/libxml2.so into -l/usr/lib/x86_64 and -linux-gnu/libxml2.so, neither of which are valid dependencies, so our builds are totally broken. If a fix isn't forthcoming, can we please roll this change back at your earliest convenience?

Dec 2 2019, 11:38 AM · Restricted Project

Dec 1 2019

srj added a comment to D69412: build: avoid hardcoding the libxml2 library name.

This has injected a bug into llvm-config --system-libs (at least, on OSX and Linux) for me; previously, the output would be something like

Dec 1 2019, 5:40 PM · Restricted Project

Jul 23 2019

srj added a comment to rL366860: FileCheck [8/12]: Define numeric var from expr.

If I change line 345 to explicitly move-and-construct the result, it builds fine:

Jul 23 2019, 5:54 PM
srj added a comment to rL366860: FileCheck [8/12]: Define numeric var from expr.

This commit is failing to compile for me (on Linux x86-64, gcc 7.3):

Jul 23 2019, 5:28 PM

Aug 24 2018

srj added a comment to D46179: [X86] Lowering addus/subus intrinsics to native IR (LLVM part).

Would it help or hurt if we narrowed the select in IR to match the final return type and original operand types (I made the types smaller from your code just to make this easier to read):

Aug 24 2018, 11:01 AM
srj added a comment to D46179: [X86] Lowering addus/subus intrinsics to native IR (LLVM part).

I took the liberty of opening a bug on this to simplify discussion: https://bugs.llvm.org/show_bug.cgi?id=38691

Aug 24 2018, 10:54 AM

Aug 23 2018

srj added a comment to D46179: [X86] Lowering addus/subus intrinsics to native IR (LLVM part).

I'm trying to update Halide to generate IR that will be recognized by this patch (instead of calling the now-deprecated intrinsics), but having trouble with a somewhat degenerate-but-legal case.

Aug 23 2018, 6:39 PM