[PowerPC] Enable OpenMP for powerpcle target. [5/5]

[Bdragon28]

Summary

Enable OpenMP for powerpcle to match the rest of powerpc*.

Update tests.

[Bdragon28]

On FreeBSD, the main use of this will be on the new powerpc64le arch, where we need to build a 32-bit LE bootloader for use with pseries. (it is easier to retarget LLVM than make a cross-endian bootloader, as it would involve rewriting filesystem code etc.)

On Linux, I suspect the primary use will be with user-space CPU emulation tools that do syscall translation from foreign LE architectures.

On Linux, I set the defaults assuming that this target would primarily be used as a multiarch instead of the "native" arch for an install (i.e. assume lib32 instead of lib). If there are any existing powerpcle userlands out there that do not do this, it can be changed.

Note: I do not have commit access yet.

[nemanjai]

This seems problematic to me for a few reasons:

1. There is no 32-bit toolchains or libraries for little endian Linux systems
2. There is no support in the ELFv2 ABI for 32-bit object mode and there may be a number of places we assume that little endian systems use ELFv2 ABI
3. There are a number of places that make the assumption that little endian systems must be 64-bit so there's no checking for 32-bit mode (which will likely result in 64-bit specific code gen)

Since this seems to be for a very specific use case, can we perhaps severely restrict the support for 32-bit little endian mode (perhaps BSD only, no Altivec/VSX, etc.)?

[MaskRay]

This patch should be split. I suggest that you create 4 patches.

• llvm: triple change
• llvm: llvm/Object/ELFObjectFile.h llvm-readobj llvm-objdump
• clang
• lld

[Bdragon28]

In D92445#2427438, @nemanjai wrote:

This seems problematic to me for a few reasons:

1. There is no 32-bit toolchains or libraries for little endian Linux systems
2. There is no support in the ELFv2 ABI for 32-bit object mode and there may be a number of places we assume that little endian systems use ELFv2 ABI
3. There are a number of places that make the assumption that little endian systems must be 64-bit so there's no checking for 32-bit mode (which will likely result in 64-bit specific code gen)

Since this seems to be for a very specific use case, can we perhaps severely restrict the support for 32-bit little endian mode (perhaps BSD only, no Altivec/VSX, etc.)?

Technically, 32 bit PowerPC systems are neither ELFv1 nor ELFv2, they are Power Architecture 32-bit ABI (which has various extensions) that does not have the complexities that plagued ELFv1 and is a relatively "normal" ABI.

I have not seen any places that this is problematic that I am not already addressing with this patch.

[Bdragon28]

In D92445#2427439, @MaskRay wrote:

This patch should be split. I suggest that you create 4 patches.

• llvm: triple change
• llvm: llvm/Object/ELFObjectFile.h llvm-readobj llvm-objdump
• clang
• lld

Can do.

[Bdragon28]

In D92445#2427537, @Bdragon28 wrote:

In D92445#2427438, @nemanjai wrote:

This seems problematic to me for a few reasons:

1. There is no 32-bit toolchains or libraries for little endian Linux systems
2. There is no support in the ELFv2 ABI for 32-bit object mode and there may be a number of places we assume that little endian systems use ELFv2 ABI
3. There are a number of places that make the assumption that little endian systems must be 64-bit so there's no checking for 32-bit mode (which will likely result in 64-bit specific code gen)

Since this seems to be for a very specific use case, can we perhaps severely restrict the support for 32-bit little endian mode (perhaps BSD only, no Altivec/VSX, etc.)?

Technically, 32 bit PowerPC systems are neither ELFv1 nor ELFv2, they are Power Architecture 32-bit ABI (which has various extensions) that does not have the complexities that plagued ELFv1 and is a relatively "normal" ABI.

I have not seen any places that this is problematic that I am not already addressing with this patch.

I would be fine with restricting this to FreeBSD and/or limiting it to freestanding. I mainly added the Linux support as there was recent interest in 32-bit LE and it is a possibility there will be some experimental userlands at some point in the future. https://lists.ozlabs.org/pipermail/linuxppc-dev/2020-May/211669.html

[Bdragon28]

Regarding things like Altivec and VSX:
Altivec should be just fine to run in 32-bit LE.
I am undecided as to whether VSX should be banned or not. However that goes, it should be identical in powerpc64 -m32 and powerpc64le -m32.

Regarding codegen:
CPU capabilities are a property of the selected CPU, not whether it is 32-bit/64-bit code, or LE/BE. (With the exception of certain instructions that are banned in LE, and certain instructions that are banned in 32-bit IIRC)

Regarding Book-III support for powerpcle:
I see zero value in using powerpcle for any Book-III activities. Modern LE kernels will always be 64-bit, and oldschool LE kernels were A) proprietary, and B) ancient history.
Since bridge mode is gone on modern TRUELE processors, it's pointless anyway, as you can't run a 32-bit kernel in either endian.

Regarding cpu support for powerpcle:
I see zero value in supporting non-TRUELE processors such as PPC74xx. Limiting it to POWER7 and above (or even POWER8 and above) seems sane to me. That is, I think it is a valid assumption
that powerpcle will not be being used in a "true" 32-bit environment where the 64-bit options are not implemented on the processor.

Regarding hosted use:
TBD. We don't have plans in FreeBSD for building a powerpcle compat32 userland. Linux userlands are experimental. There may be some open ABI questions. I'm fine with putting that off for now.

[sfertile]

On FreeBSD, the main use of this will be on the new powerpc64le arch, where we need to build a 32-bit LE bootloader for use with pseries. (it is easier to retarget LLVM than make a cross-endian bootloader, as it would involve rewriting filesystem code etc.)

Excuse my ignorance, but what are there technical limitations preventing writing n 64-bit LE boot loader and avoid having a 32-bit LE target all-together?

[tstellar]

Could you add some more information to the commit message to better describe the powerpcle target. It's not clear from the target name exactly what it is for.

[Bdragon28]

In D92445#2428563, @sfertile wrote:

On FreeBSD, the main use of this will be on the new powerpc64le arch, where we need to build a 32-bit LE bootloader for use with pseries. (it is easier to retarget LLVM than make a cross-endian bootloader, as it would involve rewriting filesystem code etc.)

Excuse my ignorance, but what are there technical limitations preventing writing n 64-bit LE boot loader and avoid having a 32-bit LE target all-together?

LoPAPR client binding requirements, section B.10.
"OF Client Programs for an LoPAPR platform shall execute in 32-bit mode with an OF cell size of 1."

FreeBSD loader on pseries is an OF client, and as such, while it is free to be either BE or LE (OF is required to adapt itself), it MUST be a 32-bit image.

[q66]

I am interested in this, since we are currently bootstrapping an entire ppcle userland in our distribution (glibc and musl) - we already have everything generally working (on ppc64le host), with llvm being a notable blocker for some things - so i will be testing this in near future

[q66]

we are also interested in running this on "true" 32-bit hardware eventually, so not restricting to POWER7 would be a good thing, potentially

[q66]

I've tested the patch (applied to LLVM11) and can confirm it works. There have been some changes/fixes I needed to do, which I already reported on IRC, so I will not include them here (Bdragon28 should just be able to apply them and push them out)

Right now, I have a full ppcle Linux userland (which can fully compile itself, so it's self-hosted), I will be making binary packages available soon (source is already available through the Void Linux project) so anyone with a ppc64le kernel with a couple of fixes (also available through Void) should be able to run a full 32-bit LE environment

[MaskRay]

clang/lib/Basic/Targets/PPC.h

358

redundant ()

clang/lib/CodeGen/CodeGenModule.cpp

971 ↗

(On Diff #308833)

Drop this change.

The ppc32 code path was actually dead and I have deleted it about 2 weeks ago.

clang/lib/Driver/ToolChains/Linux.cpp

146

Should it be powerpcle?

[Bdragon28]

Splitting up into multiple commits as per MaskRay's suggestion.

[MaskRay]

The lld/ELF part change looks good.

[Bdragon28]

Trying again..

[Bdragon28]

• Address review comment from MaskRay.
• Incorporate changes from the Void powerpcle patchset.

[Bdragon28]

clang/lib/Driver/ToolChains/Gnu.cpp

2152

Pointed out by q66 in irc:

This triples list is bogus, and I need to update the comment too.

[Bdragon28]

Fix merge base.

[Bdragon28]

• Fix bug in clang/test/Driver/linux-header-search.cpp -- The powerpc64le test was being done with -m32 accidentally.
• Update llvm/unittests/ADT/TripleTest.cpp for powerpcle.
• Update gcc driver bits to reflect use of powerpcle in void-ppc.

[Bdragon28]

• Fix LLVM object handling unit test.

[Bdragon28]

Add q66 to reviewers list for the targeting bits relevant to Void ppcle.

[Bdragon28]

Re-uploading patch for part 5 now that I have the dependency tree fixed.

[Bdragon28]

Add missing OpenMP TLS test for powerpcle.

[MaskRay]

Thanks!

[Bdragon28]

Forcing retest again.

clang/lib/Basic/Targets.cpp

case llvm::Triple::ppc:
     case llvm::Triple::RTEMS:
       return new RTEMSTargetInfo<PPC32TargetInfo>(Triple, Opts);
     case llvm::Triple::AIX:
       return new AIXPPC32TargetInfo(Triple, Opts);
     default:
       return new PPC32TargetInfo(Triple, Opts);
     }
 
+  case llvm::Triple::ppcle:
+    switch (os) {
+    case llvm::Triple::Linux:
+      return new LinuxTargetInfo<PPC32TargetInfo>(Triple, Opts);
+    case llvm::Triple::FreeBSD:
+      return new FreeBSDTargetInfo<PPC32TargetInfo>(Triple, Opts);
+    default:
+      return new PPC32TargetInfo(Triple, Opts);
+    }
+
   case llvm::Triple::ppc64:
     if (Triple.isOSDarwin())
       return new DarwinPPC64TargetInfo(Triple, Opts);
     switch (os) {
     case llvm::Triple::Linux:
       return new LinuxTargetInfo<PPC64TargetInfo>(Triple, Opts);
     case llvm::Triple::Lv2:
       return new PS3PPUTargetInfo<PPC64TargetInfo>(Triple, Opts);

clang/lib/Basic/Targets/OSTargets.h

FreeBSDTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
     default:
     case llvm::Triple::x86:
     case llvm::Triple::x86_64:
       this->MCountName = ".mcount";
       break;
     case llvm::Triple::mips:
     case llvm::Triple::mipsel:
     case llvm::Triple::ppc:
+    case llvm::Triple::ppcle:
     case llvm::Triple::ppc64:
     case llvm::Triple::ppc64le:
       this->MCountName = "_mcount";
       break;
     case llvm::Triple::arm:
       this->MCountName = "__mcount";
       break;
     }
LinuxTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
     switch (Triple.getArch()) {
     default:
       break;
     case llvm::Triple::mips:
     case llvm::Triple::mipsel:
     case llvm::Triple::mips64:
     case llvm::Triple::mips64el:
     case llvm::Triple::ppc:
+    case llvm::Triple::ppcle:
     case llvm::Triple::ppc64:
     case llvm::Triple::ppc64le:
       this->MCountName = "_mcount";
       break;
     case llvm::Triple::x86:
     case llvm::Triple::x86_64:
       this->HasFloat128 = true;
       break;

clang/lib/Basic/Targets/PPC.h

 };
 
 class LLVM_LIBRARY_VISIBILITY PPC32TargetInfo : public PPCTargetInfo {
 public:
   PPC32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
       : PPCTargetInfo(Triple, Opts) {
     if (Triple.isOSAIX())
       resetDataLayout("E-m:a-p:32:32-i64:64-n32");
+    else if (Triple.getArch() == llvm::Triple::ppcle)
+      resetDataLayout("e-m:e-p:32:32-i64:64-n32");
     else
       resetDataLayout("E-m:e-p:32:32-i64:64-n32");
 
     switch (getTriple().getOS()) {
     case llvm::Triple::Linux:
     case llvm::Triple::FreeBSD:
     case llvm::Triple::NetBSD:
       SizeType = UnsignedInt;

clang/lib/Basic/Targets/PPC.cpp

void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
   if (PointerWidth == 64) {
     Builder.defineMacro("_ARCH_PPC64");
     Builder.defineMacro("__powerpc64__");
     Builder.defineMacro("__ppc64__");
     Builder.defineMacro("__PPC64__");
   }
 
   // Target properties.
-  if (getTriple().getArch() == llvm::Triple::ppc64le) {
+  if (getTriple().getArch() == llvm::Triple::ppc64le ||
+      getTriple().getArch() == llvm::Triple::ppcle) {
     Builder.defineMacro("_LITTLE_ENDIAN");
   } else {
     if (!getTriple().isOSNetBSD() &&
         !getTriple().isOSOpenBSD())
       Builder.defineMacro("_BIG_ENDIAN");
   }
 
   // ABI options.

clang/lib/CodeGen/CGBuiltin.cpp

case llvm::Triple::aarch64_be:
     return CGF->EmitAArch64BuiltinExpr(BuiltinID, E, Arch);
   case llvm::Triple::bpfeb:
   case llvm::Triple::bpfel:
     return CGF->EmitBPFBuiltinExpr(BuiltinID, E);
   case llvm::Triple::x86:
   case llvm::Triple::x86_64:
     return CGF->EmitX86BuiltinExpr(BuiltinID, E);
   case llvm::Triple::ppc:
+  case llvm::Triple::ppcle:
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le:
     return CGF->EmitPPCBuiltinExpr(BuiltinID, E);
   case llvm::Triple::r600:
   case llvm::Triple::amdgcn:
     return CGF->EmitAMDGPUBuiltinExpr(BuiltinID, E);
   case llvm::Triple::systemz:
     return CGF->EmitSystemZBuiltinExpr(BuiltinID, E);

clang/lib/CodeGen/TargetInfo.cpp

Result = Address(Builder.CreateLoad(Result, "aggr"),
                      getContext().getTypeAlignInChars(Ty));
   }
 
   return Result;
 }
 
 bool PPC32TargetCodeGenInfo::isStructReturnInRegABI(
     const llvm::Triple &Triple, const CodeGenOptions &Opts) {
-  assert(Triple.getArch() == llvm::Triple::ppc);
+  assert(Triple.isPPC32());
 
   switch (Opts.getStructReturnConvention()) {
   case CodeGenOptions::SRCK_Default:
     break;
   case CodeGenOptions::SRCK_OnStack: // -maix-struct-return
     return false;
   case CodeGenOptions::SRCK_InRegs: // -msvr4-struct-return
     return true;
case llvm::Triple::ppc: {
 
     bool IsSoftFloat =
         CodeGenOpts.FloatABI == "soft" || getTarget().hasFeature("spe");
     bool RetSmallStructInRegABI =
         PPC32TargetCodeGenInfo::isStructReturnInRegABI(Triple, CodeGenOpts);
     return SetCGInfo(
         new PPC32TargetCodeGenInfo(Types, IsSoftFloat, RetSmallStructInRegABI));
   }
+  case llvm::Triple::ppcle: {
+    bool IsSoftFloat = CodeGenOpts.FloatABI == "soft";
+    bool RetSmallStructInRegABI =
+        PPC32TargetCodeGenInfo::isStructReturnInRegABI(Triple, CodeGenOpts);
+    return SetCGInfo(
+        new PPC32TargetCodeGenInfo(Types, IsSoftFloat, RetSmallStructInRegABI));
+  }
   case llvm::Triple::ppc64:
     if (Triple.isOSAIX())
       return SetCGInfo(new AIXTargetCodeGenInfo(Types, /*Is64Bit*/ true));
 
     if (Triple.isOSBinFormatELF()) {
       PPC64_SVR4_ABIInfo::ABIKind Kind = PPC64_SVR4_ABIInfo::ELFv1;
       if (getTarget().getABI() == "elfv2")
         Kind = PPC64_SVR4_ABIInfo::ELFv2;

clang/lib/Driver/Driver.cpp

if (!TC) {
     case llvm::Triple::ELFIAMCU:
       if (Target.getArch() == llvm::Triple::hexagon)
         TC = std::make_unique<toolchains::HexagonToolChain>(*this, Target,
                                                              Args);
       else if ((Target.getVendor() == llvm::Triple::MipsTechnologies) &&
                !Target.hasEnvironment())
         TC = std::make_unique<toolchains::MipsLLVMToolChain>(*this, Target,
                                                               Args);
-      else if (Target.getArch() == llvm::Triple::ppc ||
-               Target.getArch() == llvm::Triple::ppc64 ||
-               Target.getArch() == llvm::Triple::ppc64le)
+      else if (Target.isPPC())
         TC = std::make_unique<toolchains::PPCLinuxToolChain>(*this, Target,
                                                               Args);
       else if (Target.getArch() == llvm::Triple::ve)
         TC = std::make_unique<toolchains::VEToolChain>(*this, Target, Args);
 
       else
         TC = std::make_unique<toolchains::Linux>(*this, Target, Args);
       break;

clang/lib/Driver/ToolChain.cpp

case llvm::Triple::aarch64: {
     if (getTriple().isArm64e())
       return "arm64e";
     return "arm64";
   }
   case llvm::Triple::aarch64_32:
     return "arm64_32";
   case llvm::Triple::ppc:
     return "ppc";
+  case llvm::Triple::ppcle:
+    return "ppcle";
   case llvm::Triple::ppc64:
     return "ppc64";
   case llvm::Triple::ppc64le:
     return "ppc64le";
   default:
     return Triple.getArchName();
   }
 }

clang/lib/Driver/ToolChains/Clang.cpp

static void getTargetFeatures(const Driver &D, const llvm::Triple &Triple,
   case llvm::Triple::arm:
   case llvm::Triple::armeb:
   case llvm::Triple::thumb:
   case llvm::Triple::thumbeb:
     arm::getARMTargetFeatures(D, Triple, Args, CmdArgs, Features, ForAS);
     break;
 
   case llvm::Triple::ppc:
+  case llvm::Triple::ppcle:
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le:
     ppc::getPPCTargetFeatures(D, Triple, Args, Features);
     break;
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
     riscv::getRISCVTargetFeatures(D, Triple, Args, Features);
     break;
static bool useFramePointerForTargetByDefault(const ArgList &Args,
   case llvm::Triple::xcore:
   case llvm::Triple::wasm32:
   case llvm::Triple::wasm64:
   case llvm::Triple::msp430:
     // XCore never wants frame pointers, regardless of OS.
     // WebAssembly never wants frame pointers.
     return false;
   case llvm::Triple::ppc:
+  case llvm::Triple::ppcle:
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le:
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
   case llvm::Triple::amdgcn:
   case llvm::Triple::r600:
     return !areOptimizationsEnabled(Args);
   default:
static bool isSignedCharDefault(const llvm::Triple &Triple) {
 
   case llvm::Triple::ppc:
   case llvm::Triple::ppc64:
     if (Triple.isOSDarwin())
       return true;
     return false;
 
   case llvm::Triple::hexagon:
+  case llvm::Triple::ppcle:
   case llvm::Triple::ppc64le:
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
   case llvm::Triple::systemz:
   case llvm::Triple::xcore:
     return false;
   }
 }
void Clang::RenderTargetOptions(const llvm::Triple &EffectiveTriple,
   case llvm::Triple::mips:
   case llvm::Triple::mipsel:
   case llvm::Triple::mips64:
   case llvm::Triple::mips64el:
     AddMIPSTargetArgs(Args, CmdArgs);
     break;
 
   case llvm::Triple::ppc:
+  case llvm::Triple::ppcle:
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le:
     AddPPCTargetArgs(Args, CmdArgs);
     break;
 
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
     AddRISCVTargetArgs(Args, CmdArgs);
#endif
 
   if (Arg *A = Args.getLastArg(options::OPT_mregparm_EQ)) {
     CmdArgs.push_back("-mregparm");
     CmdArgs.push_back(A->getValue());
   }
 
   if (Arg *A = Args.getLastArg(options::OPT_maix_struct_return,
                                options::OPT_msvr4_struct_return)) {
-    if (TC.getArch() != llvm::Triple::ppc) {
+    if (!TC.getTriple().isPPC32()) {
       D.Diag(diag::err_drv_unsupported_opt_for_target)
           << A->getSpelling() << RawTriple.str();
     } else if (A->getOption().matches(options::OPT_maix_struct_return)) {
       CmdArgs.push_back("-maix-struct-return");
     } else {
       assert(A->getOption().matches(options::OPT_msvr4_struct_return));
       CmdArgs.push_back("-msvr4-struct-return");
     }
if (Arg *A = Args.getLastArg(options::OPT_mdouble_EQ)) {
     else
       D.Diag(diag::err_drv_unsupported_opt_for_target)
           << A->getAsString(Args) << TripleStr;
   }
 
   if (Arg *A = Args.getLastArg(options::OPT_LongDouble_Group)) {
     if (TC.getTriple().isX86())
       A->render(Args, CmdArgs);
-    else if ((TC.getArch() == llvm::Triple::ppc || TC.getTriple().isPPC64()) &&
+    else if (TC.getTriple().isPPC() &&
              (A->getOption().getID() != options::OPT_mlong_double_80))
       A->render(Args, CmdArgs);
     else
       D.Diag(diag::err_drv_unsupported_opt_for_target)
           << A->getAsString(Args) << TripleStr;
   }
 
   // Decide whether to use verbose asm. Verbose assembly is the default on

clang/lib/Driver/ToolChains/CommonArgs.cpp

std::string tools::getCPUName(const ArgList &Args, const llvm::Triple &T,
 
   case llvm::Triple::nvptx:
   case llvm::Triple::nvptx64:
     if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
       return A->getValue();
     return "";
 
   case llvm::Triple::ppc:
+  case llvm::Triple::ppcle:
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le: {
     std::string TargetCPUName = ppc::getPPCTargetCPU(Args);
     // LLVM may default to generating code for the native CPU,
     // but, like gcc, we default to a more generic option for
     // each architecture. (except on AIX)
     if (!TargetCPUName.empty())
       return TargetCPUName;

clang/lib/Driver/ToolChains/FreeBSD.cpp

void freebsd::Assembler::ConstructJob(Compilation &C, const JobAction &JA,
   // instruct as in the base system to assemble 32-bit code.
   switch (getToolChain().getArch()) {
   default:
     break;
   case llvm::Triple::x86:
     CmdArgs.push_back("--32");
     break;
   case llvm::Triple::ppc:
+  case llvm::Triple::ppcle:
     CmdArgs.push_back("-a32");
     break;
   case llvm::Triple::mips:
   case llvm::Triple::mipsel:
   case llvm::Triple::mips64:
   case llvm::Triple::mips64el: {
     StringRef CPUName;
     StringRef ABIName;
void freebsd::Linker::ConstructJob(Compilation &C, const JobAction &JA,
   case llvm::Triple::x86:
     CmdArgs.push_back("-m");
     CmdArgs.push_back("elf_i386_fbsd");
     break;
   case llvm::Triple::ppc:
     CmdArgs.push_back("-m");
     CmdArgs.push_back("elf32ppc_fbsd");
     break;
+  case llvm::Triple::ppcle:
+    CmdArgs.push_back("-m");
+    // Use generic -- only usage is for freestanding.
+    CmdArgs.push_back("elf32lppc");
+    break;
   case llvm::Triple::mips:
     CmdArgs.push_back("-m");
     CmdArgs.push_back("elf32btsmip_fbsd");
     break;
   case llvm::Triple::mipsel:
     CmdArgs.push_back("-m");
     CmdArgs.push_back("elf32ltsmip_fbsd");
     break;

 
 FreeBSD::FreeBSD(const Driver &D, const llvm::Triple &Triple,
                  const ArgList &Args)
     : Generic_ELF(D, Triple, Args) {
 
   // When targeting 32-bit platforms, look for '/usr/lib32/crt1.o' and fall
   // back to '/usr/lib' if it doesn't exist.
   if ((Triple.getArch() == llvm::Triple::x86 || Triple.isMIPS32() ||
-       Triple.getArch() == llvm::Triple::ppc) &&
+       Triple.isPPC32()) &&
       D.getVFS().exists(getDriver().SysRoot + "/usr/lib32/crt1.o"))
     getFilePaths().push_back(getDriver().SysRoot + "/usr/lib32");
   else
     getFilePaths().push_back(getDriver().SysRoot + "/usr/lib");
 }
 
 ToolChain::CXXStdlibType FreeBSD::GetDefaultCXXStdlibType() const {
   if (getTriple().getOSMajorVersion() >= 10)

clang/lib/Driver/ToolChains/Gnu.cpp

void tools::gcc::Common::ConstructJob(Compilation &C, const JobAction &JA,
   //
   // FIXME: The triple class should directly provide the information we want
   // here.
   switch (getToolChain().getArch()) {
   default:
     break;
   case llvm::Triple::x86:
   case llvm::Triple::ppc:
+  case llvm::Triple::ppcle:
     CmdArgs.push_back("-m32");
     break;
   case llvm::Triple::x86_64:
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le:
     CmdArgs.push_back("-m64");
     break;
   case llvm::Triple::sparcel:
case llvm::Triple::aarch64_be:
     return "aarch64linuxb";
   case llvm::Triple::arm:
   case llvm::Triple::thumb:
   case llvm::Triple::armeb:
   case llvm::Triple::thumbeb:
     return isArmBigEndian(T, Args) ? "armelfb_linux_eabi" : "armelf_linux_eabi";
   case llvm::Triple::ppc:
     return "elf32ppclinux";
+  case llvm::Triple::ppcle:
+    return "elf32lppc";
   case llvm::Triple::ppc64:
     return "elf64ppc";
   case llvm::Triple::ppc64le:
     return "elf64lppc";
   case llvm::Triple::riscv32:
     return "elf32lriscv";
   case llvm::Triple::riscv64:
     return "elf64lriscv";
case llvm::Triple::x86_64:
     break;
   case llvm::Triple::ppc: {
     CmdArgs.push_back("-a32");
     CmdArgs.push_back("-mppc");
     CmdArgs.push_back(
       ppc::getPPCAsmModeForCPU(getCPUName(Args, getToolChain().getTriple())));
     break;
   }
+  case llvm::Triple::ppcle: {
+    CmdArgs.push_back("-a32");
+    CmdArgs.push_back("-mppc");
+    CmdArgs.push_back("-mlittle-endian");
+    CmdArgs.push_back(
+        ppc::getPPCAsmModeForCPU(getCPUName(Args, getToolChain().getTriple())));
+    break;
+  }
   case llvm::Triple::ppc64: {
     CmdArgs.push_back("-a64");
     CmdArgs.push_back("-mppc64");
     CmdArgs.push_back(
       ppc::getPPCAsmModeForCPU(getCPUName(Args, getToolChain().getTriple())));
     break;
   }
   case llvm::Triple::ppc64le: {
/*static*/ void Generic_GCC::GCCInstallationDetector::CollectLibDirsAndTriples(
   static const char *const MSP430Triples[] = {"msp430-elf"};
 
   static const char *const PPCLibDirs[] = {"/lib32", "/lib"};
   static const char *const PPCTriples[] = {
       "powerpc-linux-gnu", "powerpc-unknown-linux-gnu", "powerpc-linux-gnuspe",
       // On 32-bit PowerPC systems running SUSE Linux, gcc is configured as a
       // 64-bit compiler which defaults to "-m32", hence "powerpc64-suse-linux".
       "powerpc64-suse-linux", "powerpc-montavista-linuxspe"};
+  static const char *const PPCLELibDirs[] = {"/lib32", "/lib"};
+  static const char *const PPCLETriples[] = {"powerpcle-linux-gnu",
+                                             "powerpcle-unknown-linux-gnu",
+                                             "powerpcle-linux-musl"};
+
   static const char *const PPC64LibDirs[] = {"/lib64", "/lib"};
   static const char *const PPC64Triples[] = {
       "powerpc64-linux-gnu", "powerpc64-unknown-linux-gnu",
       "powerpc64-suse-linux", "ppc64-redhat-linux"};
   static const char *const PPC64LELibDirs[] = {"/lib64", "/lib"};
   static const char *const PPC64LETriples[] = {
       "powerpc64le-linux-gnu", "powerpc64le-unknown-linux-gnu",
       "powerpc64le-suse-linux", "ppc64le-redhat-linux"};
 
case llvm::Triple::msp430:
     TripleAliases.append(begin(MSP430Triples), end(MSP430Triples));
     break;
   case llvm::Triple::ppc:
     LibDirs.append(begin(PPCLibDirs), end(PPCLibDirs));
     TripleAliases.append(begin(PPCTriples), end(PPCTriples));
     BiarchLibDirs.append(begin(PPC64LibDirs), end(PPC64LibDirs));
     BiarchTripleAliases.append(begin(PPC64Triples), end(PPC64Triples));
     break;
+  case llvm::Triple::ppcle:
+    LibDirs.append(begin(PPCLELibDirs), end(PPCLELibDirs));
+    TripleAliases.append(begin(PPCLETriples), end(PPCLETriples));
+    BiarchLibDirs.append(begin(PPC64LELibDirs), end(PPC64LELibDirs));
+    BiarchTripleAliases.append(begin(PPC64LETriples), end(PPC64LETriples));
+    break;
   case llvm::Triple::ppc64:
     LibDirs.append(begin(PPC64LibDirs), end(PPC64LibDirs));
     TripleAliases.append(begin(PPC64Triples), end(PPC64Triples));
     BiarchLibDirs.append(begin(PPCLibDirs), end(PPCLibDirs));
     BiarchTripleAliases.append(begin(PPCTriples), end(PPCTriples));
     break;
   case llvm::Triple::ppc64le:
     LibDirs.append(begin(PPC64LELibDirs), end(PPC64LELibDirs));
     TripleAliases.append(begin(PPC64LETriples), end(PPC64LETriples));
+    BiarchLibDirs.append(begin(PPCLELibDirs), end(PPCLELibDirs));
+    BiarchTripleAliases.append(begin(PPCLETriples), end(PPCLETriples));
     break;
   case llvm::Triple::riscv32:
     LibDirs.append(begin(RISCV32LibDirs), end(RISCV32LibDirs));
     TripleAliases.append(begin(RISCV32Triples), end(RISCV32Triples));
     BiarchLibDirs.append(begin(RISCV64LibDirs), end(RISCV64LibDirs));
     BiarchTripleAliases.append(begin(RISCV64Triples), end(RISCV64Triples));
     break;
   case llvm::Triple::riscv64:
bool Generic_GCC::IsIntegratedAssemblerDefault() const {
   case llvm::Triple::arm:
   case llvm::Triple::armeb:
   case llvm::Triple::avr:
   case llvm::Triple::bpfel:
   case llvm::Triple::bpfeb:
   case llvm::Triple::thumb:
   case llvm::Triple::thumbeb:
   case llvm::Triple::ppc:
+  case llvm::Triple::ppcle:
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le:
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
   case llvm::Triple::systemz:
   case llvm::Triple::mips:
   case llvm::Triple::mipsel:
   case llvm::Triple::mips64:

clang/lib/Driver/ToolChains/Linux.cpp

case llvm::Triple::mips64el: {
     break;
   }
   case llvm::Triple::ppc:
     if (D.getVFS().exists(SysRoot + "/lib/powerpc-linux-gnuspe"))
       return "powerpc-linux-gnuspe";
     if (D.getVFS().exists(SysRoot + "/lib/powerpc-linux-gnu"))
       return "powerpc-linux-gnu";
     break;
+  case llvm::Triple::ppcle:
+    if (D.getVFS().exists(SysRoot + "/lib/powerpcle-linux-gnu"))
+      return "powerpcle-linux-gnu";
+    break;
   case llvm::Triple::ppc64:
     if (D.getVFS().exists(SysRoot + "/lib/powerpc64-linux-gnu"))
       return "powerpc64-linux-gnu";
     break;
   case llvm::Triple::ppc64le:
     if (D.getVFS().exists(SysRoot + "/lib/powerpc64le-linux-gnu"))
       return "powerpc64le-linux-gnu";
     break;
static StringRef getOSLibDir(const llvm::Triple &Triple, const ArgList &Args) {
   // oslibdir, and using that variant while targeting other architectures causes
   // problems because the libraries are laid out in shared system roots that
   // can't cope with a 'lib32' library search path being considered. So we only
   // enable them when we know we may need it.
   //
   // FIXME: This is a bit of a hack. We should really unify this code for
   // reasoning about oslibdir spellings with the lib dir spellings in the
   // GCCInstallationDetector, but that is a more significant refactoring.
   if (Triple.getArch() == llvm::Triple::x86 ||
-      Triple.getArch() == llvm::Triple::ppc ||
+      Triple.isPPC32() ||
       Triple.getArch() == llvm::Triple::sparc)
     return "lib32";
 
   if (Triple.getArch() == llvm::Triple::x86_64 &&
       Triple.getEnvironment() == llvm::Triple::GNUX32)
     return "libx32";
 
   if (Triple.getArch() == llvm::Triple::riscv32)
else
       Loader = IsNaN2008 ? "ld-linux-mipsn8.so.1" : "ld.so.1";
 
     break;
   }
   case llvm::Triple::ppc:
     LibDir = "lib";
     Loader = "ld.so.1";
     break;
+  case llvm::Triple::ppcle:
+    LibDir = "lib";
+    Loader = "ld.so.1";
+    break;
   case llvm::Triple::ppc64:
     LibDir = "lib64";
     Loader =
         (tools::ppc::hasPPCAbiArg(Args, "elfv2")) ? "ld64.so.2" : "ld64.so.1";
     break;
   case llvm::Triple::ppc64le:
     LibDir = "lib64";
     Loader =
const StringRef MIPS64R6ELMultiarchIncludeDirs[] = {
       "/usr/include/mipsisa64r6el-linux-gnuabi64"};
   const StringRef MIPSN32R6MultiarchIncludeDirs[] = {
       "/usr/include/mipsisa64r6-linux-gnuabin32"};
   const StringRef MIPSN32R6ELMultiarchIncludeDirs[] = {
       "/usr/include/mipsisa64r6el-linux-gnuabin32"};
   const StringRef PPCMultiarchIncludeDirs[] = {
       "/usr/include/powerpc-linux-gnu",
       "/usr/include/powerpc-linux-gnuspe"};
+  const StringRef PPCLEMultiarchIncludeDirs[] = {
+      "/usr/include/powerpcle-linux-gnu"};
   const StringRef PPC64MultiarchIncludeDirs[] = {
       "/usr/include/powerpc64-linux-gnu"};
   const StringRef PPC64LEMultiarchIncludeDirs[] = {
       "/usr/include/powerpc64le-linux-gnu"};
   const StringRef SparcMultiarchIncludeDirs[] = {
       "/usr/include/sparc-linux-gnu"};
   const StringRef Sparc64MultiarchIncludeDirs[] = {
       "/usr/include/sparc64-linux-gnu"};
case llvm::Triple::mips64el:
     else if (getTriple().getEnvironment() == llvm::Triple::GNUABIN32)
       MultiarchIncludeDirs = MIPSN32ELMultiarchIncludeDirs;
     else
       MultiarchIncludeDirs = MIPS64ELMultiarchIncludeDirs;
     break;
   case llvm::Triple::ppc:
     MultiarchIncludeDirs = PPCMultiarchIncludeDirs;
     break;
+  case llvm::Triple::ppcle:
+    MultiarchIncludeDirs = PPCLEMultiarchIncludeDirs;
+    break;
   case llvm::Triple::ppc64:
     MultiarchIncludeDirs = PPC64MultiarchIncludeDirs;
     break;
   case llvm::Triple::ppc64le:
     MultiarchIncludeDirs = PPC64LEMultiarchIncludeDirs;
     break;
   case llvm::Triple::sparc:
     MultiarchIncludeDirs = SparcMultiarchIncludeDirs;

clang/lib/Frontend/CompilerInvocation.cpp

auto getArchPtrSize = [](const llvm::Triple &T) {
       assert(T.isArch64Bit() && "Expected 64-bit architecture");
       return Arch64Bit;
     };
 
     for (unsigned i = 0; i < A->getNumValues(); ++i) {
       llvm::Triple TT(A->getValue(i));
 
       if (TT.getArch() == llvm::Triple::UnknownArch ||
           !(TT.getArch() == llvm::Triple::aarch64 ||
-            TT.getArch() == llvm::Triple::ppc ||
-            TT.getArch() == llvm::Triple::ppc64 ||
-            TT.getArch() == llvm::Triple::ppc64le ||
+            TT.isPPC() ||
             TT.getArch() == llvm::Triple::nvptx ||
             TT.getArch() == llvm::Triple::nvptx64 ||
             TT.getArch() == llvm::Triple::amdgcn ||
             TT.getArch() == llvm::Triple::x86 ||
             TT.getArch() == llvm::Triple::x86_64))
         Diags.Report(diag::err_drv_invalid_omp_target) << A->getValue(i);
       else if (getArchPtrSize(T) != getArchPtrSize(TT))
         Diags.Report(diag::err_drv_incompatible_omp_arch)

clang/lib/Sema/SemaChecking.cpp

bool Sema::CheckTSBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
   case llvm::Triple::mips64el:
     return CheckMipsBuiltinFunctionCall(TI, BuiltinID, TheCall);
   case llvm::Triple::systemz:
     return CheckSystemZBuiltinFunctionCall(BuiltinID, TheCall);
   case llvm::Triple::x86:
   case llvm::Triple::x86_64:
     return CheckX86BuiltinFunctionCall(TI, BuiltinID, TheCall);
   case llvm::Triple::ppc:
+  case llvm::Triple::ppcle:
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le:
     return CheckPPCBuiltinFunctionCall(TI, BuiltinID, TheCall);
   case llvm::Triple::amdgcn:
     return CheckAMDGCNBuiltinFunctionCall(BuiltinID, TheCall);
   }
 }
 

clang/test/CodeGen/altivec.c

-// RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s
-// RUN: %clang_cc1 -target-feature +altivec -mabi=vec-extabi -triple powerpc-unknown-aix -emit-llvm %s -o - | FileCheck %s
-// RUN: %clang_cc1 -target-feature +altivec -mabi=vec-extabi -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE
+// RUN: %clang_cc1 -target-feature +altivec -triple powerpcle-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-LE
+// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE
+// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-LE
+// RUN: %clang_cc1 -target-feature +altivec -mabi=vec-extabi -triple powerpc-unknown-aix -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE
+// RUN: %clang_cc1 -target-feature +altivec -mabi=vec-extabi -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE
 // RUN: not %clang_cc1 -target-feature +altivec -mabi=vec-default -triple powerpc-unknown-aix -emit-llvm %s 2>&1 | FileCheck %s --check-prefix=AIX-ERROR
 // RUN: not %clang_cc1 -target-feature +altivec -mabi=vec-default -triple powerpc64-unknown-aix -emit-llvm %s 2>&1 | FileCheck %s --check-prefix=AIX-ERROR
  
-// RUN: %clang -S -emit-llvm -maltivec -mabi=vec-extabi -target powerpc-unknown-aix %s -o - | FileCheck %s
+// RUN: %clang -S -emit-llvm -maltivec -mabi=vec-extabi -target powerpc-unknown-aix %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE
 // RUN: not %clang -S -emit-llvm -maltivec -target powerpc-unknown-aix %s 2>&1 | FileCheck %s --check-prefix=AIX-ERROR
 // RUN: not %clang -S -emit-llvm -maltivec -target powerpc64-unknown-aix %s 2>&1 | FileCheck %s --check-prefix=AIX-ERROR 
 // RUN: not %clang -S -emit-llvm -mabi=vec-default -target powerpc-unknown-aix %s 2>&1  | FileCheck  %s --check-prefix=AIX-ATVER
 // RUN: not %clang -S -emit-llvm -mabi=vec-extabi -target powerpc-unknown-aix %s 2>&1  | FileCheck  %s --check-prefix=AIX-ATVER
-// RUN: %clang -S -emit-llvm -maltivec -mabi=vec-extabi -target powerpc64-unknown-aix %s -o - | FileCheck %s
+// RUN: %clang -S -emit-llvm -maltivec -mabi=vec-extabi -target powerpc64-unknown-aix %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE
 // RUN: not %clang -S -emit-llvm -mabi=vec-default -target powerpc64-unknown-aix %s 2>&1  | FileCheck  %s --check-prefix=AIX-ATVER
 // RUN: not %clang -S -emit-llvm -mabi=vec-extabi -target powerpc64-unknown-aix %s 2>&1  | FileCheck  %s --check-prefix=AIX-ATVER
 // RUN: not %clang -S -mabi=vec-default -target powerpc-unknown-aix %s 2>&1  | FileCheck  %s --check-prefix=AIX-ATVER
 // RUN: not %clang -S -mabi=vec-extabi -target powerpc-unknown-aix %s 2>&1  | FileCheck  %s --check-prefix=AIX-ATVER
 // RUN: not %clang -S -mabi=vec-default -target powerpc64-unknown-aix %s 2>&1  | FileCheck  %s --check-prefix=AIX-ATVER
 // RUN: not %clang -S -mabi=vec-extabi -target powerpc64-unknown-aix %s 2>&1  | FileCheck  %s --check-prefix=AIX-ATVER
 // Check initialization
 
 vector int test0 = (vector int)(1);       // CHECK: @test0 = global <4 x i32> <i32 1, i32 1, i32 1, i32 1>
 vector float test1 = (vector float)(1.0); // CHECK: @test1 = global <4 x float> <float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}>
 
-// CHECK: @v1 = global <16 x i8> <i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 4>
+// CHECK-BE: @v1 = global <16 x i8> <i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 4>
+// CHECK-LE: @v1 = global <16 x i8> <i8 1, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 4, i8 0, i8 0, i8 0>
 vector char v1 = (vector char)((vector int)(1, 2, 3, 4));
-// CHECK: @v2 = global <16 x i8> <i8 63, i8 -128, i8 0, i8 0, i8 64, i8 0, i8 0, i8 0, i8 64, i8 64, i8 0, i8 0, i8 64, i8 -128, i8 0, i8 0>
+// CHECK-BE: @v2 = global <16 x i8> <i8 63, i8 -128, i8 0, i8 0, i8 64, i8 0, i8 0, i8 0, i8 64, i8 64, i8 0, i8 0, i8 64, i8 -128, i8 0, i8 0>
+// CHECK-LE: @v2 = global <16 x i8> <i8 0, i8 0, i8 -128, i8 63, i8 0, i8 0, i8 0, i8 64, i8 0, i8 0, i8 64, i8 64, i8 0, i8 0, i8 -128, i8 64>
 vector char v2 = (vector char)((vector float)(1.0f, 2.0f, 3.0f, 4.0f));
-// CHECK: @v3 = global <16 x i8> <i8 0, i8 0, i8 0, i8 97, i8 0, i8 0, i8 0, i8 98, i8 0, i8 0, i8 0, i8 99, i8 0, i8 0, i8 0, i8 100>
+// CHECK-BE: @v3 = global <16 x i8> <i8 0, i8 0, i8 0, i8 97, i8 0, i8 0, i8 0, i8 98, i8 0, i8 0, i8 0, i8 99, i8 0, i8 0, i8 0, i8 100>
+// CHECK-LE: @v3 = global <16 x i8> <i8 97, i8 0, i8 0, i8 0, i8 98, i8 0, i8 0, i8 0, i8 99, i8 0, i8 0, i8 0, i8 100, i8 0, i8 0, i8 0>
 vector char v3 = (vector char)((vector int)('a', 'b', 'c', 'd'));
-// CHECK: @v4 = global <4 x i32> <i32 16909060, i32 0, i32 0, i32 0>
+// CHECK-BE: @v4 = global <4 x i32> <i32 16909060, i32 0, i32 0, i32 0>
+// CHECK-LE: @v4 = global <4 x i32> <i32 67305985, i32 0, i32 0, i32 0>
 vector int v4 = (vector char){1, 2, 3, 4};
 
 void test2()
 {
   vector int vi;
   vector float vf;
   vi = (vector int)(1);             // CHECK: <i32 1, i32 1, i32 1, i32 1>
   vf = (vector float)(1.0);         // CHECK: <float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}>

clang/test/CodeGen/builtins-ppc-altivec.c

 // REQUIRES: powerpc-registered-target
 // RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown -emit-llvm %s \
 // RUN:            -flax-vector-conversions=none -o - | FileCheck %s
+// RUN: %clang_cc1 -target-feature +altivec -triple powerpcle-unknown-unknown -emit-llvm %s \
+// RUN:            -flax-vector-conversions=none -o - | FileCheck %s -check-prefix=CHECK-LE
 // RUN: %clang_cc1 -target-feature +altivec -triple powerpc64-unknown-unknown -emit-llvm %s \
 // RUN:            -flax-vector-conversions=none -o - | FileCheck %s
 // RUN: %clang_cc1 -target-feature +altivec -triple powerpc64le-unknown-unknown -emit-llvm %s \
 // RUN:            -flax-vector-conversions=none -o - | FileCheck %s -check-prefix=CHECK-LE
 // RUN: not %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
 // RUN:            -ferror-limit 0 -DNO_ALTIVEC -o - 2>&1 \
 // RUN:            | FileCheck %s -check-prefix=CHECK-NOALTIVEC
 #ifndef NO_ALTIVEC

clang/test/CodeGen/ppc32-and-aix-struct-return.c

 // REQUIRES: powerpc-registered-target
 // RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
 // RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
+// RUN: %clang_cc1 -triple powerpcle-unknown-freebsd \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
 // RUN: %clang_cc1 -triple powerpc-unknown-aix \
 // RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
 // RUN: %clang_cc1 -triple powerpc64-unknown-aix \
 // RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
 // RUN: %clang_cc1 -triple powerpc-unknown-linux \
 // RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
 // RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
 // RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
 // RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
 // RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
+// RUN: %clang_cc1 -triple powerpcle-unknown-linux \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
+// RUN: %clang_cc1 -triple powerpcle-unknown-linux -maix-struct-return \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
+// RUN: %clang_cc1 -triple powerpcle-unknown-linux -msvr4-struct-return \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
 // RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
 // RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
 // RUN: %clang_cc1 -triple powerpc-unknown-openbsd \
 // RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
 // RUN: %clang_cc1 -triple powerpc-unknown-openbsd -maix-struct-return \
 // RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
 // RUN: %clang_cc1 -triple powerpc-unknown-openbsd -msvr4-struct-return \
 // RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4

clang/test/CodeGen/target-data.c

 // RUN: %clang_cc1 -triple lanai-unknown-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=LANAI
 // LANAI: target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
 
 // RUN: %clang_cc1 -triple powerpc-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=PPC
 // PPC: target datalayout = "E-m:e-p:32:32-i64:64-n32"
 
+// RUN: %clang_cc1 -triple powerpcle-unknown -o - -emit-llvm %s | \
+// RUN: FileCheck %s -check-prefix=PPCLE
+// PPCLE: target datalayout = "e-m:e-p:32:32-i64:64-n32"
+
 // RUN: %clang_cc1 -triple powerpc64-freebsd -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=PPC64-FREEBSD
 // PPC64-FREEBSD: target datalayout = "E-m:e-i64:64-n32:64"
 
 // RUN: %clang_cc1 -triple powerpc64le-freebsd -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=PPC64LE-FREEBSD
 // PPC64LE-FREEBSD: target datalayout = "e-m:e-i64:64-n32:64"
 

clang/test/Driver/linux-header-search.cpp

 // CHECK-UBUNTU-14-04-I686: "-triple" "i386-unknown-linux-gnu"
 // CHECK-UBUNTU-14-04-I686: "-isysroot" "[[SYSROOT:[^"]+]]"
 // CHECK-UBUNTU-14-04-I686: "-internal-isystem" "[[SYSROOT]]/usr/lib/gcc/i686-linux-gnu/4.8/../../../../include/c++/4.8"
 // CHECK-UBUNTU-14-04-I686: "-internal-isystem" "[[SYSROOT]]/usr/lib/gcc/i686-linux-gnu/4.8/../../../../include/i386-linux-gnu/c++/4.8"
 // CHECK-UBUNTU-14-04-I686: "-internal-isystem" "[[SYSROOT]]/usr/lib/gcc/i686-linux-gnu/4.8/../../../../include/c++/4.8/backward"
 //
 // Test Ubuntu/Debian's Ubuntu 14.04 for powerpc64le
 // RUN: %clang -no-canonical-prefixes %s -### -fsyntax-only 2>&1 \
-// RUN:     -target powerpc64le-unknown-linux-gnu -m32 -stdlib=libstdc++ \
+// RUN:     -target powerpc64le-unknown-linux-gnu -stdlib=libstdc++ \
 // RUN:     --sysroot=%S/Inputs/ubuntu_14.04_multiarch_tree \
 // RUN:     --gcc-toolchain="" \
 // RUN:   | FileCheck --check-prefix=CHECK-UBUNTU-14-04-PPC64LE %s
 // CHECK-UBUNTU-14-04-PPC64LE: "{{[^"]*}}clang{{[^"]*}}" "-cc1"
 // CHECK-UBUNTU-14-04-PPC64LE: "-triple" "powerpc64le-unknown-linux-gnu"
 // CHECK-UBUNTU-14-04-PPC64LE: "-isysroot" "[[SYSROOT:[^"]+]]"
 // CHECK-UBUNTU-14-04-PPC64LE: "-internal-isystem" "[[SYSROOT]]/usr/lib/gcc/powerpc64le-linux-gnu/4.8/../../../../include/c++/4.8"
 // CHECK-UBUNTU-14-04-PPC64LE: "-internal-isystem" "[[SYSROOT]]/usr/lib/gcc/powerpc64le-linux-gnu/4.8/../../../../include/powerpc64le-linux-gnu/c++/4.8"

clang/test/Driver/ppc-endian.c

-// RUN: %clang -target powerpc64le -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE %s
-// RUN: %clang -target powerpc64le -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE %s
-// RUN: %clang -target powerpc64 -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE %s
-// CHECK-LE: "-cc1"{{.*}} "-triple" "powerpc64le{{.*}}"
+// RUN: %clang -target powerpc-unknown -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE32 %s
+// RUN: %clang -target powerpc-unknown -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE32 %s
+// RUN: %clang -target powerpcle-unknown -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE32 %s
+// CHECK-BE32: "-cc1"{{.*}} "-triple" "powerpc-{{.*}}"
 
-// RUN: %clang -target powerpc64 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE %s
-// RUN: %clang -target powerpc64 -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE %s
-// RUN: %clang -target powerpc64le -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE %s
-// CHECK-BE: "-cc1"{{.*}} "-triple" "powerpc64{{.*}}"
+// RUN: %clang -target powerpcle-unknown -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE32 %s
+// RUN: %clang -target powerpcle-unknown -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE32 %s
+// RUN: %clang -target powerpc-unknown -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE32 %s
+// CHECK-LE32: "-cc1"{{.*}} "-triple" "powerpcle-{{.*}}"
+
+// RUN: %clang -target powerpc64-unknown -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE64 %s
+// RUN: %clang -target powerpc64-unknown -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE64 %s
+// RUN: %clang -target powerpc64le-unknown -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE64 %s
+// CHECK-BE64: "-cc1"{{.*}} "-triple" "powerpc64-{{.*}}"
+
+// RUN: %clang -target powerpc64le-unknown -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE64 %s
+// RUN: %clang -target powerpc64le-unknown -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE64 %s
+// RUN: %clang -target powerpc64-unknown -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE64 %s
+// CHECK-LE64: "-cc1"{{.*}} "-triple" "powerpc64le-{{.*}}"

lld/ELF/Driver.cpp

std::pair<ELFKind, uint16_t> ret =
           .Cases("aarch64elf", "aarch64linux", "aarch64_elf64_le_vec",
                  {ELF64LEKind, EM_AARCH64})
           .Cases("armelf", "armelf_linux_eabi", {ELF32LEKind, EM_ARM})
           .Case("elf32_x86_64", {ELF32LEKind, EM_X86_64})
           .Cases("elf32btsmip", "elf32btsmipn32", {ELF32BEKind, EM_MIPS})
           .Cases("elf32ltsmip", "elf32ltsmipn32", {ELF32LEKind, EM_MIPS})
           .Case("elf32lriscv", {ELF32LEKind, EM_RISCV})
           .Cases("elf32ppc", "elf32ppclinux", {ELF32BEKind, EM_PPC})
+          .Cases("elf32lppc", "elf32lppclinux", {ELF32LEKind, EM_PPC})
           .Case("elf64btsmip", {ELF64BEKind, EM_MIPS})
           .Case("elf64ltsmip", {ELF64LEKind, EM_MIPS})
           .Case("elf64lriscv", {ELF64LEKind, EM_RISCV})
           .Case("elf64ppc", {ELF64BEKind, EM_PPC64})
           .Case("elf64lppc", {ELF64LEKind, EM_PPC64})
           .Cases("elf_amd64", "elf_x86_64", {ELF64LEKind, EM_X86_64})
           .Case("elf_i386", {ELF32LEKind, EM_386})
           .Case("elf_iamcu", {ELF32LEKind, EM_IAMCU})

lld/ELF/InputFiles.cpp

static uint16_t getBitcodeMachineKind(StringRef path, const Triple &t) {
   case Triple::mips:
   case Triple::mipsel:
   case Triple::mips64:
   case Triple::mips64el:
     return EM_MIPS;
   case Triple::msp430:
     return EM_MSP430;
   case Triple::ppc:
+  case Triple::ppcle:
     return EM_PPC;
   case Triple::ppc64:
   case Triple::ppc64le:
     return EM_PPC64;
   case Triple::riscv32:
   case Triple::riscv64:
     return EM_RISCV;
   case Triple::x86:

lld/ELF/ScriptParser.cpp

static std::pair<ELFKind, uint16_t> parseBfdName(StringRef s) {
   return StringSwitch<std::pair<ELFKind, uint16_t>>(s)
       .Case("elf32-i386", {ELF32LEKind, EM_386})
       .Case("elf32-iamcu", {ELF32LEKind, EM_IAMCU})
       .Case("elf32-littlearm", {ELF32LEKind, EM_ARM})
       .Case("elf32-x86-64", {ELF32LEKind, EM_X86_64})
       .Case("elf64-aarch64", {ELF64LEKind, EM_AARCH64})
       .Case("elf64-littleaarch64", {ELF64LEKind, EM_AARCH64})
       .Case("elf32-powerpc", {ELF32BEKind, EM_PPC})
+      .Case("elf32-powerpcle", {ELF32LEKind, EM_PPC})
       .Case("elf64-powerpc", {ELF64BEKind, EM_PPC64})
       .Case("elf64-powerpcle", {ELF64LEKind, EM_PPC64})
       .Case("elf64-x86-64", {ELF64LEKind, EM_X86_64})
       .Cases("elf32-tradbigmips", "elf32-bigmips", {ELF32BEKind, EM_MIPS})
       .Case("elf32-ntradbigmips", {ELF32BEKind, EM_MIPS})
       .Case("elf32-tradlittlemips", {ELF32LEKind, EM_MIPS})
       .Case("elf32-ntradlittlemips", {ELF32LEKind, EM_MIPS})
       .Case("elf64-tradbigmips", {ELF64BEKind, EM_MIPS})

lld/test/ELF/emulation-ppc.s

 # REQUIRES: ppc
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %tppc64
 # RUN: ld.lld -m elf64ppc %tppc64 -o %t2ppc64
-# RUN: llvm-readobj --file-headers %t2ppc64 | FileCheck --check-prefix=PPC64 %s
+# RUN: llvm-readobj --file-headers %t2ppc64 | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCBE %s
 # RUN: ld.lld %tppc64 -o %t3ppc64
-# RUN: llvm-readobj --file-headers %t3ppc64 | FileCheck --check-prefix=PPC64 %s
+# RUN: llvm-readobj --file-headers %t3ppc64 | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCBE %s
 # RUN: echo 'OUTPUT_FORMAT(elf64-powerpc)' > %tppc64.script
 # RUN: ld.lld %tppc64.script  %tppc64 -o %t4ppc64
-# RUN: llvm-readobj --file-headers %t4ppc64 | FileCheck --check-prefix=PPC64 %s
-
-# PPC64:      ElfHeader {
-# PPC64-NEXT:   Ident {
-# PPC64-NEXT:     Magic: (7F 45 4C 46)
-# PPC64-NEXT:     Class: 64-bit (0x2)
-# PPC64-NEXT:     DataEncoding: BigEndian (0x2)
-# PPC64-NEXT:     FileVersion: 1
-# PPC64-NEXT:     OS/ABI: SystemV (0x0)
-# PPC64-NEXT:     ABIVersion: 0
-# PPC64-NEXT:     Unused: (00 00 00 00 00 00 00)
-# PPC64-NEXT:   }
-# PPC64-NEXT:   Type: Executable (0x2)
-# PPC64-NEXT:   Machine: EM_PPC64 (0x15)
-# PPC64-NEXT:   Version: 1
-# PPC64-NEXT:   Entry:
-# PPC64-NEXT:   ProgramHeaderOffset: 0x40
-# PPC64-NEXT:   SectionHeaderOffset:
-# PPC64-NEXT:   Flags [ (0x2)
-# PPC64-NEXT:     0x2
-# PPC64-NEXT:   ]
-# PPC64-NEXT:   HeaderSize: 64
-# PPC64-NEXT:   ProgramHeaderEntrySize: 56
-# PPC64-NEXT:   ProgramHeaderCount:
-# PPC64-NEXT:   SectionHeaderEntrySize: 64
-# PPC64-NEXT:   SectionHeaderCount:
-# PPC64-NEXT:   StringTableSectionIndex:
-# PPC64-NEXT: }
-
-# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-freebsd %s -o %tppc64fbsd
-# RUN: echo 'OUTPUT_FORMAT(elf64-powerpc-freebsd)' > %tppc64fbsd.script
-# RUN: ld.lld %tppc64fbsd.script  %tppc64fbsd -o %t2ppc64fbsd
-# RUN: llvm-readobj --file-headers %t2ppc64fbsd | FileCheck --check-prefix=PPC64-FBSD %s
-
-# PPC64-FBSD:      ElfHeader {
-# PPC64-FBSD-NEXT:   Ident {
-# PPC64-FBSD-NEXT:     Magic: (7F 45 4C 46)
-# PPC64-FBSD-NEXT:     Class: 64-bit (0x2)
-# PPC64-FBSD-NEXT:     DataEncoding: BigEndian (0x2)
-# PPC64-FBSD-NEXT:     FileVersion: 1
-# PPC64-FBSD-NEXT:     OS/ABI: FreeBSD (0x9)
-# PPC64-FBSD-NEXT:     ABIVersion: 0
-# PPC64-FBSD-NEXT:     Unused: (00 00 00 00 00 00 00)
-# PPC64-FBSD-NEXT:   }
-# PPC64-FBSD-NEXT:   Type: Executable (0x2)
-# PPC64-FBSD-NEXT:   Machine: EM_PPC64 (0x15)
-# PPC64-FBSD-NEXT:   Version: 1
-# PPC64-FBSD-NEXT:   Entry:
-# PPC64-FBSD-NEXT:   ProgramHeaderOffset: 0x40
-# PPC64-FBSD-NEXT:   SectionHeaderOffset:
-# PPC64-FBSD-NEXT:   Flags [ (0x2)
-# PPC64-FBSD-NEXT:     0x2
-# PPC64-FBSD-NEXT:   ]
-# PPC64-FBSD-NEXT:   HeaderSize: 64
-# PPC64-FBSD-NEXT:   ProgramHeaderEntrySize: 56
-# PPC64-FBSD-NEXT:   ProgramHeaderCount:
-# PPC64-FBSD-NEXT:   SectionHeaderEntrySize: 64
-# PPC64-FBSD-NEXT:   SectionHeaderCount:
-# PPC64-FBSD-NEXT:   StringTableSectionIndex:
-# PPC64-FBSD-NEXT: }
+# RUN: llvm-readobj --file-headers %t4ppc64 | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCBE %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %tppc64le
 # RUN: ld.lld -m elf64lppc %tppc64le -o %t2ppc64le
-# RUN: llvm-readobj --file-headers %t2ppc64le | FileCheck --check-prefix=PPC64LE %s
+# RUN: llvm-readobj --file-headers %t2ppc64le | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCLE %s
 # RUN: ld.lld %tppc64le -o %t3ppc64le
-# RUN: llvm-readobj --file-headers %t3ppc64le | FileCheck --check-prefix=PPC64LE %s
+# RUN: llvm-readobj --file-headers %t3ppc64le | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCLE %s
 # RUN: echo 'OUTPUT_FORMAT(elf64-powerpcle)' > %tppc64le.script
 # RUN: ld.lld %tppc64le.script  %tppc64le -o %t4ppc64le
-# RUN: llvm-readobj --file-headers %t4ppc64le | FileCheck --check-prefix=PPC64LE %s
-
-# PPC64LE:      ElfHeader {
-# PPC64LE-NEXT:   Ident {
-# PPC64LE-NEXT:     Magic: (7F 45 4C 46)
-# PPC64LE-NEXT:     Class: 64-bit (0x2)
-# PPC64LE-NEXT:     DataEncoding: LittleEndian (0x1)
-# PPC64LE-NEXT:     FileVersion: 1
-# PPC64LE-NEXT:     OS/ABI: SystemV (0x0)
-# PPC64LE-NEXT:     ABIVersion: 0
-# PPC64LE-NEXT:     Unused: (00 00 00 00 00 00 00)
-# PPC64LE-NEXT:   }
-# PPC64LE-NEXT:   Type: Executable (0x2)
-# PPC64LE-NEXT:   Machine: EM_PPC64 (0x15)
-# PPC64LE-NEXT:   Version: 1
-# PPC64LE-NEXT:   Entry:
-# PPC64LE-NEXT:   ProgramHeaderOffset: 0x40
-# PPC64LE-NEXT:   SectionHeaderOffset:
-# PPC64LE-NEXT:   Flags [ (0x2)
-# PPC64LE-NEXT:     0x2
-# PPC64LE-NEXT:   ]
-# PPC64LE-NEXT:   HeaderSize: 64
-# PPC64LE-NEXT:   ProgramHeaderEntrySize: 56
-# PPC64LE-NEXT:   ProgramHeaderCount:
-# PPC64LE-NEXT:   SectionHeaderEntrySize: 64
-# PPC64LE-NEXT:   SectionHeaderCount:
-# PPC64LE-NEXT:   StringTableSectionIndex:
-# PPC64LE-NEXT: }
+# RUN: llvm-readobj --file-headers %t4ppc64le | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCLE %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc-unknown-linux %s -o %tppc32
 # RUN: ld.lld -m elf32ppc %tppc32 -o %t2ppc32
-# RUN: llvm-readobj --file-headers %t2ppc32 | FileCheck --check-prefix=PPC32 %s
+# RUN: llvm-readobj --file-headers %t2ppc32 | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCBE %s
 # RUN: ld.lld %tppc32 -o %t3ppc32
-# RUN: llvm-readobj --file-headers %t3ppc32 | FileCheck --check-prefix=PPC32 %s
+# RUN: llvm-readobj --file-headers %t3ppc32 | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCBE %s
 # RUN: echo 'OUTPUT_FORMAT(elf32-powerpc)' > %tppc32.script
 # RUN: ld.lld %tppc32.script  %tppc32 -o %t4ppc32
-# RUN: llvm-readobj --file-headers %t4ppc32 | FileCheck --check-prefix=PPC32 %s
+# RUN: llvm-readobj --file-headers %t4ppc32 | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCBE %s
 # RUN: ld.lld -m elf32ppclinux %tppc32 -o %t5ppc32
-# RUN: llvm-readobj --file-headers %t5ppc32 | FileCheck --check-prefix=PPC32 %s
+# RUN: llvm-readobj --file-headers %t5ppc32 | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCBE %s
+
+# RUN: llvm-mc -filetype=obj -triple=powerpcle-unknown-linux %s -o %tppc32le
+# RUN: ld.lld -m elf32lppc %tppc32le -o %t2ppc32le
+# RUN: llvm-readobj --file-headers %t2ppc32le | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCLE %s
+# RUN: ld.lld %tppc32le -o %t3ppc32le
+# RUN: llvm-readobj --file-headers %t3ppc32le | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCLE %s
+# RUN: echo 'OUTPUT_FORMAT(elf32-powerpcle)' > %tppc32le.script
+# RUN: ld.lld %tppc32le.script  %tppc32le -o %t4ppc32le
+# RUN: llvm-readobj --file-headers %t4ppc32le | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCLE %s
+# RUN: ld.lld -m elf32lppclinux %tppc32le -o %t5ppc32le
+# RUN: llvm-readobj --file-headers %t5ppc32le | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCLE %s
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc-unknown-freebsd %s -o %tppc32fbsd
+# RUN: echo 'OUTPUT_FORMAT(elf32-powerpc-freebsd)' > %tppc32fbsd.script
+# RUN: ld.lld %tppc32fbsd.script  %tppc32fbsd -o %t2ppc32fbsd
+# RUN: llvm-readobj --file-headers %t2ppc32fbsd | FileCheck --check-prefixes=CHECK,PPC32,FBSD,PPCBE %s
+
+# RUN: llvm-mc -filetype=obj -triple=powerpcle-unknown-freebsd %s -o %tppc32fbsdle
+# RUN: echo 'OUTPUT_FORMAT(elf32-powerpcle-freebsd)' > %tppc32fbsdle.script
+# RUN: ld.lld %tppc32fbsdle.script  %tppc32fbsdle -o %t2ppc32fbsdle
+# RUN: llvm-readobj --file-headers %t2ppc32fbsdle | FileCheck --check-prefixes=CHECK,PPC32,FBSD,PPCLE %s
 
-# PPC32:      ElfHeader {
-# PPC32-NEXT:   Ident {
-# PPC32-NEXT:     Magic: (7F 45 4C 46)
+# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-freebsd %s -o %tppc64fbsd
+# RUN: echo 'OUTPUT_FORMAT(elf64-powerpc-freebsd)' > %tppc64fbsd.script
+# RUN: ld.lld %tppc64fbsd.script  %tppc64fbsd -o %t2ppc64fbsd
+# RUN: llvm-readobj --file-headers %t2ppc64fbsd | FileCheck --check-prefixes=CHECK,PPC64,FBSD,PPCBE %s
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-freebsd %s -o %tppc64fbsdle
+# RUN: echo 'OUTPUT_FORMAT(elf64-powerpcle-freebsd)' > %tppc64fbsdle.script
+# RUN: ld.lld %tppc64fbsdle.script  %tppc64fbsdle -o %t2ppc64fbsdle
+# RUN: llvm-readobj --file-headers %t2ppc64fbsdle | FileCheck --check-prefixes=CHECK,PPC64,FBSD,PPCLE %s
+
+# CHECK:      ElfHeader {
+# CHECK-NEXT:   Ident {
+# CHECK-NEXT:     Magic: (7F 45 4C 46)
+
+# PPC64-NEXT:     Class: 64-bit (0x2)
 # PPC32-NEXT:     Class: 32-bit (0x1)
-# PPC32-NEXT:     DataEncoding: BigEndian (0x2)
-# PPC32-NEXT:     FileVersion: 1
-# PPC32-NEXT:     OS/ABI: SystemV (0x0)
-# PPC32-NEXT:     ABIVersion: 0
-# PPC32-NEXT:     Unused: (00 00 00 00 00 00 00)
-# PPC32-NEXT:   }
-# PPC32-NEXT:   Type: Executable (0x2)
+
+# PPCBE-NEXT:     DataEncoding: BigEndian (0x2)
+# PPCLE-NEXT:     DataEncoding: LittleEndian (0x1)
+
+# CHECK-NEXT:     FileVersion: 1
+
+# LINUX-NEXT:     OS/ABI: SystemV (0x0)
+# FBSD-NEXT:      OS/ABI: FreeBSD (0x9)
+
+# CHECK-NEXT:     ABIVersion: 0
+# CHECK-NEXT:     Unused: (00 00 00 00 00 00 00)
+# CHECK-NEXT:   }
+# CHECK-NEXT:   Type: Executable (0x2)
+
+# PPC64-NEXT:   Machine: EM_PPC64 (0x15)
 # PPC32-NEXT:   Machine: EM_PPC (0x14)
-# PPC32-NEXT:   Version: 1
-# PPC32-NEXT:   Entry:
+
+# CHECK-NEXT:   Version: 1
+# CHECK-NEXT:   Entry:
+# PPC64-NEXT:   ProgramHeaderOffset: 0x40
 # PPC32-NEXT:   ProgramHeaderOffset: 0x34
-# PPC32-NEXT:   SectionHeaderOffset:
+# CHECK-NEXT:   SectionHeaderOffset:
+# PPC64-NEXT:   Flags [ (0x2)
 # PPC32-NEXT:   Flags [ (0x0)
-# PPC32-NEXT:   ]
+# PPC64-NEXT:     0x2
+# CHECK-NEXT:   ]
+# PPC64-NEXT:   HeaderSize: 64
 # PPC32-NEXT:   HeaderSize: 52
+# PPC64-NEXT:   ProgramHeaderEntrySize: 56
 # PPC32-NEXT:   ProgramHeaderEntrySize: 32
-# PPC32-NEXT:   ProgramHeaderCount:
+# CHECK-NEXT:   ProgramHeaderCount:
+# PPC64-NEXT:   SectionHeaderEntrySize: 64
 # PPC32-NEXT:   SectionHeaderEntrySize: 40
-# PPC32-NEXT:   SectionHeaderCount:
-# PPC32-NEXT:   StringTableSectionIndex:
-# PPC32-NEXT: }
+# CHECK-NEXT:   SectionHeaderCount:
+# CHECK-NEXT:   StringTableSectionIndex:
+# CHECK-NEXT: }
 
 .globl _start
 _start:

lld/test/ELF/ppc32-gnu-ifunc.s

 # REQUIRES: ppc
 # RUN: llvm-mc -filetype=obj -triple=powerpc %s -o %t.o
 # RUN: ld.lld %t.o -o %t
 # RUN: llvm-readobj -r %t | FileCheck --check-prefix=RELOC %s
 # RUN: llvm-readelf -S -s %t | FileCheck --check-prefixes=SEC,SYM %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
+# RUN: llvm-mc -filetype=obj -triple=powerpcle %s -o %t.o
+# RUN: ld.lld %t.o -o %t
+# RUN: llvm-readobj -r %t | FileCheck --check-prefix=RELOC %s
+# RUN: llvm-readelf -S -s %t | FileCheck --check-prefixes=SEC,SYM %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
+
 # RELOC:      .rela.dyn {
 # RELOC-NEXT:   0x10020118 R_PPC_IRELATIVE - 0x100100E0
 # RELOC-NEXT: }
 
 # SEC: .rela.dyn RELA 100000d4 0000d4 00000c
 # SYM: 100100e0 0 FUNC GLOBAL DEFAULT {{.*}} func
 
 # CHECK-LABEL: <func_resolver>:

lld/test/ELF/ppc32-reloc-rel.s

 # REQUIRES: ppc
-# RUN: llvm-mc -filetype=obj -triple=powerpc %s -o %t.o
-# RUN: ld.lld %t.o -o %t
+# RUN: llvm-mc -filetype=obj -triple=powerpc %s -o %t.be.o
+# RUN: ld.lld %t.be.o -o %t
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
+
+# RUN: llvm-mc -filetype=obj -triple=powerpcle %s -o %t.le.o
+# RUN: ld.lld %t.le.o -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
 .section .R_PPC_REL14,"ax",@progbits
   beq 1f
 1:
 # CHECK-LABEL: section .R_PPC_REL14:
 # CHECK: 100100b4: bt 2, 0x100100b8
 

llvm/cmake/config.guess

EOF
   echo powerpc64-unknown-linux-gnu
   exit ;;
     ppc64le:Linux:*:*)
   echo powerpc64le-unknown-linux-gnu
   exit ;;
     ppc:Linux:*:*)
   echo powerpc-unknown-linux-gnu
   exit ;;
+    ppcle:Linux:*:*)
+  echo powerpcle-unknown-linux-gnu
+  exit ;;
     riscv32:Linux:*:* | riscv64:Linux:*:*)
   LIBC=gnu
   eval $set_cc_for_build
   # Do not check for __GLIBC__ because uclibc defines it too
   sed 's/^ //' << EOF >$dummy.c
   #include <features.h>
   #if defined(__UCLIBC__)
   LIBC=uclibc

llvm/include/llvm/ADT/Triple.h

 ///
 /// See autoconf/config.guess for a glimpse into what configuration names
 /// look like in practice.
 class Triple {
 public:
   enum ArchType {
     UnknownArch,
 
     arm,            // ARM (little endian): arm, armv.*, xscale
     armeb,          // ARM (big endian): armeb
     aarch64,        // AArch64 (little endian): aarch64
     aarch64_be,     // AArch64 (big endian): aarch64_be
     aarch64_32,     // AArch64 (little endian) ILP32: aarch64_32
     arc,            // ARC: Synopsys ARC
     avr,            // AVR: Atmel AVR microcontroller
     bpfel,          // eBPF or extended BPF or 64-bit BPF (little endian)
     bpfeb,          // eBPF or extended BPF or 64-bit BPF (big endian)
     csky,           // CSKY: csky
     hexagon,        // Hexagon: hexagon
     mips,           // MIPS: mips, mipsallegrex, mipsr6
     mipsel,         // MIPSEL: mipsel, mipsallegrexe, mipsr6el
     mips64,         // MIPS64: mips64, mips64r6, mipsn32, mipsn32r6
     mips64el,       // MIPS64EL: mips64el, mips64r6el, mipsn32el, mipsn32r6el
     msp430,         // MSP430: msp430
     ppc,            // PPC: powerpc
+    ppcle,          // PPCLE: powerpc (little endian)
     ppc64,          // PPC64: powerpc64, ppu
     ppc64le,        // PPC64LE: powerpc64le
     r600,           // R600: AMD GPUs HD2XXX - HD6XXX
     amdgcn,         // AMDGCN: AMD GCN GPUs
     riscv32,        // RISC-V (32-bit): riscv32
     riscv64,        // RISC-V (64-bit): riscv64
     sparc,          // Sparc: sparc
     sparcv9,        // Sparcv9: Sparcv9
bool isMIPS64() const {
     return getArch() == Triple::mips64 || getArch() == Triple::mips64el;
   }
 
   /// Tests whether the target is MIPS (little and big endian, 32- or 64-bit).
   bool isMIPS() const {
     return isMIPS32() || isMIPS64();
   }
 
+  /// Tests whether the target is PowerPC (32- or 64-bit LE or BE).
+  bool isPPC() const {
+    return getArch() == Triple::ppc || getArch() == Triple::ppc64 ||
+           getArch() == Triple::ppcle || getArch() == Triple::ppc64le;
+  }
+
+  /// Tests whether the target is 32-bit PowerPC (little and big endian).
+  bool isPPC32() const {
+    return getArch() == Triple::ppc || getArch() == Triple::ppcle;
+  }
+
   /// Tests whether the target is 64-bit PowerPC (little and big endian).
   bool isPPC64() const {
     return getArch() == Triple::ppc64 || getArch() == Triple::ppc64le;
   }
 
   /// Tests whether the target is RISC-V (32- and 64-bit).
   bool isRISCV() const {
     return getArch() == Triple::riscv32 || getArch() == Triple::riscv64;

llvm/include/llvm/Frontend/OpenMP/OMPKinds.def

 __OMP_TRAIT_SELECTOR(device, arch, true)
 
 __OMP_TRAIT_PROPERTY(device, arch, arm)
 __OMP_TRAIT_PROPERTY(device, arch, armeb)
 __OMP_TRAIT_PROPERTY(device, arch, aarch64)
 __OMP_TRAIT_PROPERTY(device, arch, aarch64_be)
 __OMP_TRAIT_PROPERTY(device, arch, aarch64_32)
 __OMP_TRAIT_PROPERTY(device, arch, ppc)
+__OMP_TRAIT_PROPERTY(device, arch, ppcle)
 __OMP_TRAIT_PROPERTY(device, arch, ppc64)
 __OMP_TRAIT_PROPERTY(device, arch, ppc64le)
 __OMP_TRAIT_PROPERTY(device, arch, x86)
 __OMP_TRAIT_PROPERTY(device, arch, x86_64)
 __OMP_TRAIT_PROPERTY(device, arch, amdgcn)
 __OMP_TRAIT_PROPERTY(device, arch, nvptx)
 __OMP_TRAIT_PROPERTY(device, arch, nvptx64)
 

llvm/include/llvm/Object/ELFObjectFile.h

case ELF::EM_HEXAGON:
       return "elf32-hexagon";
     case ELF::EM_LANAI:
       return "elf32-lanai";
     case ELF::EM_MIPS:
       return "elf32-mips";
     case ELF::EM_MSP430:
       return "elf32-msp430";
     case ELF::EM_PPC:
-      return "elf32-powerpc";
+      return (IsLittleEndian ? "elf32-powerpcle" : "elf32-powerpc");
     case ELF::EM_RISCV:
       return "elf32-littleriscv";
     case ELF::EM_CSKY:
       return "elf32-csky";
     case ELF::EM_SPARC:
     case ELF::EM_SPARC32PLUS:
       return "elf32-sparc";
     case ELF::EM_AMDGPU:
case ELF::EM_MIPS:
     case ELF::ELFCLASS64:
       return IsLittleEndian ? Triple::mips64el : Triple::mips64;
     default:
       report_fatal_error("Invalid ELFCLASS!");
     }
   case ELF::EM_MSP430:
     return Triple::msp430;
   case ELF::EM_PPC:
-    return Triple::ppc;
+    return IsLittleEndian ? Triple::ppcle : Triple::ppc;
   case ELF::EM_PPC64:
     return IsLittleEndian ? Triple::ppc64le : Triple::ppc64;
   case ELF::EM_RISCV:
     switch (EF.getHeader().e_ident[ELF::EI_CLASS]) {
     case ELF::ELFCLASS32:
       return Triple::riscv32;
     case ELF::ELFCLASS64:
       return Triple::riscv64;

llvm/lib/CodeGen/TargetLoweringBase.cpp

#define HANDLE_LIBCALL(code, name) \
   setLibcallName(RTLIB::code, name);
 #include "llvm/IR/RuntimeLibcalls.def"
 #undef HANDLE_LIBCALL
   // Initialize calling conventions to their default.
   for (int LC = 0; LC < RTLIB::UNKNOWN_LIBCALL; ++LC)
     setLibcallCallingConv((RTLIB::Libcall)LC, CallingConv::C);
 
   // For IEEE quad-precision libcall names, PPC uses "kf" instead of "tf".
-  if (TT.getArch() == Triple::ppc || TT.isPPC64()) {
+  if (TT.isPPC()) {
     setLibcallName(RTLIB::ADD_F128, "__addkf3");
     setLibcallName(RTLIB::SUB_F128, "__subkf3");
     setLibcallName(RTLIB::MUL_F128, "__mulkf3");
     setLibcallName(RTLIB::DIV_F128, "__divkf3");
     setLibcallName(RTLIB::POWI_F128, "__powikf2");
     setLibcallName(RTLIB::FPEXT_F32_F128, "__extendsfkf2");
     setLibcallName(RTLIB::FPEXT_F64_F128, "__extenddfkf2");
     setLibcallName(RTLIB::FPROUND_F128_F32, "__trunckfsf2");

llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp

void TargetLoweringObjectFileELF::Initialize(MCContext &Ctx,
   case Triple::armeb:
   case Triple::thumb:
   case Triple::thumbeb:
     if (Ctx.getAsmInfo()->getExceptionHandlingType() == ExceptionHandling::ARM)
       break;
     // Fallthrough if not using EHABI
     LLVM_FALLTHROUGH;
   case Triple::ppc:
+  case Triple::ppcle:
   case Triple::x86:
     PersonalityEncoding = isPositionIndependent()
                               ? dwarf::DW_EH_PE_indirect |
                                     dwarf::DW_EH_PE_pcrel |
                                     dwarf::DW_EH_PE_sdata4
                               : dwarf::DW_EH_PE_absptr;
     LSDAEncoding = isPositionIndependent()
                        ? dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4

llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp

case Triple::aarch64_be:
     break;
   case Triple::arm: // Fall through.
   case Triple::armeb:
   case Triple::thumb:
   case Triple::thumbeb:
     resolveARMRelocation(Section, Offset, (uint32_t)(Value & 0xffffffffL), Type,
                          (uint32_t)(Addend & 0xffffffffL));
     break;
-  case Triple::ppc:
+  case Triple::ppc: // Fall through.
+  case Triple::ppcle:
     resolvePPC32Relocation(Section, Offset, Value, Type, Addend);
     break;
   case Triple::ppc64: // Fall through.
   case Triple::ppc64le:
     resolvePPC64Relocation(Section, Offset, Value, Type, Addend);
     break;
   case Triple::systemz:
     resolveSystemZRelocation(Section, Offset, Value, Type, Addend);

llvm/lib/Frontend/OpenMP/OMPContext.cpp

OMPContext::OMPContext(bool IsDeviceCompilation, Triple TargetTriple) {
   case Triple::aarch64:
   case Triple::aarch64_be:
   case Triple::aarch64_32:
   case Triple::mips:
   case Triple::mipsel:
   case Triple::mips64:
   case Triple::mips64el:
   case Triple::ppc:
+  case Triple::ppcle:
   case Triple::ppc64:
   case Triple::ppc64le:
   case Triple::x86:
   case Triple::x86_64:
     ActiveTraits.set(unsigned(TraitProperty::device_kind_cpu));
     break;
   case Triple::amdgcn:
   case Triple::nvptx:

llvm/lib/Object/RelocationResolver.cpp

if (Obj.isCOFF()) {
 
     // 32-bit object file
     assert(Obj.getBytesInAddress() == 4 &&
            "Invalid word size in object file");
 
     switch (Obj.getArch()) {
     case Triple::x86:
       return {supportsX86, resolveX86};
+    case Triple::ppcle:
     case Triple::ppc:
       return {supportsPPC32, resolvePPC32};
     case Triple::arm:
     case Triple::armeb:
       return {supportsARM, resolveARM};
     case Triple::avr:
       return {supportsAVR, resolveAVR};
     case Triple::lanai:

llvm/lib/Support/Triple.cpp

StringRef Triple::getArchTypeName(ArchType Kind) {
   case mips:           return "mips";
   case mipsel:         return "mipsel";
   case msp430:         return "msp430";
   case nvptx64:        return "nvptx64";
   case nvptx:          return "nvptx";
   case ppc64:          return "powerpc64";
   case ppc64le:        return "powerpc64le";
   case ppc:            return "powerpc";
+  case ppcle:          return "powerpcle";
   case r600:           return "r600";
   case renderscript32: return "renderscript32";
   case renderscript64: return "renderscript64";
   case riscv32:        return "riscv32";
   case riscv64:        return "riscv64";
   case shave:          return "shave";
   case sparc:          return "sparc";
   case sparcel:        return "sparcel";
StringRef Triple::getArchTypePrefix(ArchType Kind) {
   case armeb:
   case thumb:
   case thumbeb:     return "arm";
 
   case avr:         return "avr";
 
   case ppc64:
   case ppc64le:
-  case ppc:         return "ppc";
+  case ppc:
+  case ppcle:       return "ppc";
 
   case mips:
   case mipsel:
   case mips64:
   case mips64el:    return "mips";
 
   case hexagon:     return "hexagon";
 
static Triple::ArchType parseBPFArch(StringRef ArchName) {
   } else {
     return Triple::UnknownArch;
   }
 }
 
 Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
   Triple::ArchType BPFArch(parseBPFArch(Name));
   return StringSwitch<Triple::ArchType>(Name)
     .Case("aarch64", aarch64)
     .Case("aarch64_be", aarch64_be)
     .Case("aarch64_32", aarch64_32)
     .Case("arc", arc)
     .Case("arm64", aarch64) // "arm64" is an alias for "aarch64"
     .Case("arm64_32", aarch64_32)
     .Case("arm", arm)
     .Case("armeb", armeb)
     .Case("avr", avr)
     .StartsWith("bpf", BPFArch)
     .Case("mips", mips)
     .Case("mipsel", mipsel)
     .Case("mips64", mips64)
     .Case("mips64el", mips64el)
     .Case("msp430", msp430)
     .Case("ppc64", ppc64)
     .Case("ppc32", ppc)
     .Case("ppc", ppc)
+    .Case("ppc32le", ppcle)
+    .Case("ppcle", ppcle)
     .Case("ppc64le", ppc64le)
     .Case("r600", r600)
     .Case("amdgcn", amdgcn)
     .Case("riscv32", riscv32)
     .Case("riscv64", riscv64)
     .Case("hexagon", hexagon)
     .Case("sparc", sparc)
     .Case("sparcel", sparcel)
else
       return Triple::thumb;
   }
 
   return arch;
 }
 
 static Triple::ArchType parseArch(StringRef ArchName) {
   auto AT = StringSwitch<Triple::ArchType>(ArchName)
     .Cases("i386", "i486", "i586", "i686", Triple::x86)
     // FIXME: Do we need to support these?
     .Cases("i786", "i886", "i986", Triple::x86)
     .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64)
     .Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc)
+    .Cases("powerpcle", "ppcle", "ppc32le", Triple::ppcle)
     .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64)
     .Cases("powerpc64le", "ppc64le", Triple::ppc64le)
     .Case("xscale", Triple::arm)
     .Case("xscaleeb", Triple::armeb)
     .Case("aarch64", Triple::aarch64)
     .Case("aarch64_be", Triple::aarch64_be)
     .Case("aarch64_32", Triple::aarch64_32)
     .Case("arc", Triple::arc)
static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
   case Triple::mips64:
   case Triple::mips64el:
   case Triple::mips:
   case Triple::mipsel:
   case Triple::msp430:
   case Triple::nvptx64:
   case Triple::nvptx:
   case Triple::ppc64le:
+  case Triple::ppcle:
   case Triple::r600:
   case Triple::renderscript32:
   case Triple::renderscript64:
   case Triple::riscv32:
   case Triple::riscv64:
   case Triple::shave:
   case Triple::sparc:
   case Triple::sparcel:
static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
   case llvm::Triple::hsail:
   case llvm::Triple::kalimba:
   case llvm::Triple::lanai:
   case llvm::Triple::le32:
   case llvm::Triple::mips:
   case llvm::Triple::mipsel:
   case llvm::Triple::nvptx:
   case llvm::Triple::ppc:
+  case llvm::Triple::ppcle:
   case llvm::Triple::r600:
   case llvm::Triple::renderscript32:
   case llvm::Triple::riscv32:
   case llvm::Triple::shave:
   case llvm::Triple::sparc:
   case llvm::Triple::sparcel:
   case llvm::Triple::spir:
   case llvm::Triple::tce:
Triple Triple::get32BitArchVariant() const {
   Triple T(*this);
   switch (getArch()) {
   case Triple::UnknownArch:
   case Triple::amdgcn:
   case Triple::avr:
   case Triple::bpfeb:
   case Triple::bpfel:
   case Triple::msp430:
-  case Triple::ppc64le:
   case Triple::systemz:
   case Triple::ve:
     T.setArch(UnknownArch);
     break;
 
   case Triple::aarch64_32:
   case Triple::amdil:
   case Triple::arc:
   case Triple::arm:
   case Triple::armeb:
   case Triple::csky:
   case Triple::hexagon:
   case Triple::hsail:
   case Triple::kalimba:
   case Triple::lanai:
   case Triple::le32:
   case Triple::mips:
   case Triple::mipsel:
   case Triple::nvptx:
   case Triple::ppc:
+  case Triple::ppcle:
   case Triple::r600:
   case Triple::renderscript32:
   case Triple::riscv32:
   case Triple::shave:
   case Triple::sparc:
   case Triple::sparcel:
   case Triple::spir:
   case Triple::tce:
Triple Triple::get32BitArchVariant() const {
   case Triple::aarch64_be:     T.setArch(Triple::armeb);   break;
   case Triple::amdil64:        T.setArch(Triple::amdil);   break;
   case Triple::hsail64:        T.setArch(Triple::hsail);   break;
   case Triple::le64:           T.setArch(Triple::le32);    break;
   case Triple::mips64:         T.setArch(Triple::mips);    break;
   case Triple::mips64el:       T.setArch(Triple::mipsel);  break;
   case Triple::nvptx64:        T.setArch(Triple::nvptx);   break;
   case Triple::ppc64:          T.setArch(Triple::ppc);     break;
+  case Triple::ppc64le:        T.setArch(Triple::ppcle);   break;
   case Triple::renderscript64: T.setArch(Triple::renderscript32); break;
   case Triple::riscv64:        T.setArch(Triple::riscv32); break;
   case Triple::sparcv9:        T.setArch(Triple::sparc);   break;
   case Triple::spir64:         T.setArch(Triple::spir);    break;
   case Triple::wasm64:         T.setArch(Triple::wasm32);  break;
   case Triple::x86_64:         T.setArch(Triple::x86);     break;
   }
   return T;
Triple Triple::get64BitArchVariant() const {
   case Triple::arm:             T.setArch(Triple::aarch64);    break;
   case Triple::armeb:           T.setArch(Triple::aarch64_be); break;
   case Triple::hsail:           T.setArch(Triple::hsail64);    break;
   case Triple::le32:            T.setArch(Triple::le64);       break;
   case Triple::mips:            T.setArch(Triple::mips64);     break;
   case Triple::mipsel:          T.setArch(Triple::mips64el);   break;
   case Triple::nvptx:           T.setArch(Triple::nvptx64);    break;
   case Triple::ppc:             T.setArch(Triple::ppc64);      break;
+  case Triple::ppcle:           T.setArch(Triple::ppc64le);    break;
   case Triple::renderscript32:  T.setArch(Triple::renderscript64);     break;
   case Triple::riscv32:         T.setArch(Triple::riscv64);    break;
   case Triple::sparc:           T.setArch(Triple::sparcv9);    break;
   case Triple::spir:            T.setArch(Triple::spir64);     break;
   case Triple::thumb:           T.setArch(Triple::aarch64);    break;
   case Triple::thumbeb:         T.setArch(Triple::aarch64_be); break;
   case Triple::wasm32:          T.setArch(Triple::wasm64);     break;
   case Triple::x86:             T.setArch(Triple::x86_64);     break;
Triple Triple::getBigEndianArchVariant() const {
   case Triple::thumb:
     T.setArch(UnknownArch);
     break;
 
   case Triple::aarch64: T.setArch(Triple::aarch64_be); break;
   case Triple::bpfel:   T.setArch(Triple::bpfeb);      break;
   case Triple::mips64el:T.setArch(Triple::mips64);     break;
   case Triple::mipsel:  T.setArch(Triple::mips);       break;
+  case Triple::ppcle:   T.setArch(Triple::ppc);        break;
   case Triple::ppc64le: T.setArch(Triple::ppc64);      break;
   case Triple::sparcel: T.setArch(Triple::sparc);      break;
   case Triple::tcele:   T.setArch(Triple::tce);        break;
   default:
     llvm_unreachable("getBigEndianArchVariant: unknown triple.");
   }
   return T;
 }
 
 Triple Triple::getLittleEndianArchVariant() const {
   Triple T(*this);
   if (isLittleEndian())
     return T;
 
   switch (getArch()) {
   case Triple::UnknownArch:
   case Triple::lanai:
-  case Triple::ppc:
   case Triple::sparcv9:
   case Triple::systemz:
 
   // ARM is intentionally unsupported here, changing the architecture would
   // drop any arch suffixes.
   case Triple::armeb:
   case Triple::thumbeb:
     T.setArch(UnknownArch);
     break;
 
   case Triple::aarch64_be: T.setArch(Triple::aarch64);  break;
   case Triple::bpfeb:      T.setArch(Triple::bpfel);    break;
   case Triple::mips64:     T.setArch(Triple::mips64el); break;
   case Triple::mips:       T.setArch(Triple::mipsel);   break;
+  case Triple::ppc:        T.setArch(Triple::ppcle);    break;
   case Triple::ppc64:      T.setArch(Triple::ppc64le);  break;
   case Triple::sparc:      T.setArch(Triple::sparcel);  break;
   case Triple::tce:        T.setArch(Triple::tcele);    break;
   default:
     llvm_unreachable("getLittleEndianArchVariant: unknown triple.");
   }
   return T;
 }
bool Triple::isLittleEndian() const {
   case Triple::kalimba:
   case Triple::le32:
   case Triple::le64:
   case Triple::mips64el:
   case Triple::mipsel:
   case Triple::msp430:
   case Triple::nvptx64:
   case Triple::nvptx:
+  case Triple::ppcle:
   case Triple::ppc64le:
   case Triple::r600:
   case Triple::renderscript32:
   case Triple::renderscript64:
   case Triple::riscv32:
   case Triple::riscv64:
   case Triple::shave:
   case Triple::sparcel:

llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp

bool PPCAsmParser::ParseDirectiveLocalEntry(SMLoc L) {
   return false;
 }
 
 
 
 /// Force static initialization.
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmParser() {
   RegisterMCAsmParser<PPCAsmParser> A(getThePPC32Target());
-  RegisterMCAsmParser<PPCAsmParser> B(getThePPC64Target());
-  RegisterMCAsmParser<PPCAsmParser> C(getThePPC64LETarget());
+  RegisterMCAsmParser<PPCAsmParser> B(getThePPC32LETarget());
+  RegisterMCAsmParser<PPCAsmParser> C(getThePPC64Target());
+  RegisterMCAsmParser<PPCAsmParser> D(getThePPC64LETarget());
 }
 
 #define GET_REGISTER_MATCHER
 #define GET_MATCHER_IMPLEMENTATION
 #define GET_MNEMONIC_SPELL_CHECKER
 #include "PPCGenAsmMatcher.inc"
 
 // Define this matcher function after the auto-generated include so we

llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp

static MCDisassembler *createPPCLEDisassembler(const Target &T,
                                                MCContext &Ctx) {
   return new PPCDisassembler(STI, Ctx, /*IsLittleEndian=*/true);
 }
 
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCDisassembler() {
   // Register the disassembler for each target.
   TargetRegistry::RegisterMCDisassembler(getThePPC32Target(),
                                          createPPCDisassembler);
+  TargetRegistry::RegisterMCDisassembler(getThePPC32LETarget(),
+                                         createPPCLEDisassembler);
   TargetRegistry::RegisterMCDisassembler(getThePPC64Target(),
                                          createPPCDisassembler);
   TargetRegistry::RegisterMCDisassembler(getThePPC64LETarget(),
                                          createPPCLEDisassembler);
 }
 
 static DecodeStatus decodeCondBrTarget(MCInst &Inst, unsigned Imm,
                                        uint64_t /*Address*/,

llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp

 PPCELFMCAsmInfo::PPCELFMCAsmInfo(bool is64Bit, const Triple& T) {
   // FIXME: This is not always needed. For example, it is not needed in the
   // v2 abi.
   NeedsLocalForSize = true;
 
   if (is64Bit) {
     CodePointerSize = CalleeSaveStackSlotSize = 8;
   }
-  IsLittleEndian = T.getArch() == Triple::ppc64le;
+  IsLittleEndian =
+      T.getArch() == Triple::ppc64le || T.getArch() == Triple::ppcle;
 
   // ".comm align is in bytes but .align is pow-2."
   AlignmentIsInBytes = false;
 
   CommentString = "#";
 
   // Uses '.section' before '.bss' directive
   UsesELFSectionDirectiveForBSS = true;
PPCELFMCAsmInfo::PPCELFMCAsmInfo(bool is64Bit, const Triple& T) {
   Data64bitsDirective = is64Bit ? "\t.quad\t" : nullptr;
   AssemblerDialect = 1;           // New-Style mnemonics.
   LCOMMDirectiveAlignmentType = LCOMM::ByteAlignment;
 }
 
 void PPCXCOFFMCAsmInfo::anchor() {}
 
 PPCXCOFFMCAsmInfo::PPCXCOFFMCAsmInfo(bool Is64Bit, const Triple &T) {
-  if (T.getArch() == Triple::ppc64le)
+  if (T.getArch() == Triple::ppc64le || T.getArch() == Triple::ppcle)
     report_fatal_error("XCOFF is not supported for little-endian targets");
   CodePointerSize = CalleeSaveStackSlotSize = Is64Bit ? 8 : 4;
 
   // A size of 8 is only supported by the assembler under 64-bit.
   Data64bitsDirective = Is64Bit ? "\t.vbyte\t8, " : nullptr;
 }

llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp

static MCInstPrinter *createPPCMCInstPrinter(const Triple &T,
                                              unsigned SyntaxVariant,
                                              const MCAsmInfo &MAI,
                                              const MCInstrInfo &MII,
                                              const MCRegisterInfo &MRI) {
   return new PPCInstPrinter(MAI, MII, MRI, T);
 }
 
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTargetMC() {
-  for (Target *T :
-       {&getThePPC32Target(), &getThePPC64Target(), &getThePPC64LETarget()}) {
+  for (Target *T : {&getThePPC32Target(), &getThePPC32LETarget(),
+                    &getThePPC64Target(), &getThePPC64LETarget()}) {
     // Register the MC asm info.
     RegisterMCAsmInfoFn C(*T, createPPCMCAsmInfo);
 
     // Register the MC instruction info.
     TargetRegistry::RegisterMCInstrInfo(*T, createPPCMCInstrInfo);
 
     // Register the MC register info.
     TargetRegistry::RegisterMCRegInfo(*T, createPPCMCRegisterInfo);

llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp

createPPCAsmPrinterPass(TargetMachine &tm,
 
   return new PPCLinuxAsmPrinter(tm, std::move(Streamer));
 }
 
 // Force static initialization.
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmPrinter() {
   TargetRegistry::RegisterAsmPrinter(getThePPC32Target(),
                                      createPPCAsmPrinterPass);
+  TargetRegistry::RegisterAsmPrinter(getThePPC32LETarget(),
+                                     createPPCAsmPrinterPass);
   TargetRegistry::RegisterAsmPrinter(getThePPC64Target(),
                                      createPPCAsmPrinterPass);
   TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(),
                                      createPPCAsmPrinterPass);
 }

llvm/lib/Target/PowerPC/PPCSubtarget.cpp

void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
   // If not SPE, set standard FPU
   if (!HasSPE)
     HasFPU = true;
 
   StackAlignment = getPlatformStackAlignment();
 
   // Determine endianness.
   // FIXME: Part of the TargetMachine.
-  IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le);
+  IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le ||
+                    TargetTriple.getArch() == Triple::ppcle);
 }
 
 bool PPCSubtarget::enableMachineScheduler() const { return true; }
 
 bool PPCSubtarget::enableMachinePipeliner() const {
   return getSchedModel().hasInstrSchedModel() && EnableMachinePipeliner;
 }
 

llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

 
 static cl::opt<bool>
   ReduceCRLogical("ppc-reduce-cr-logicals",
                   cl::desc("Expand eligible cr-logical binary ops to branches"),
                   cl::init(true), cl::Hidden);
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTarget() {
   // Register the targets
   RegisterTargetMachine<PPCTargetMachine> A(getThePPC32Target());
-  RegisterTargetMachine<PPCTargetMachine> B(getThePPC64Target());
-  RegisterTargetMachine<PPCTargetMachine> C(getThePPC64LETarget());
+  RegisterTargetMachine<PPCTargetMachine> B(getThePPC32LETarget());
+  RegisterTargetMachine<PPCTargetMachine> C(getThePPC64Target());
+  RegisterTargetMachine<PPCTargetMachine> D(getThePPC64LETarget());
 
   PassRegistry &PR = *PassRegistry::getPassRegistry();
 #ifndef NDEBUG
   initializePPCCTRLoopsVerifyPass(PR);
 #endif
   initializePPCLoopInstrFormPrepPass(PR);
   initializePPCTOCRegDepsPass(PR);
   initializePPCEarlyReturnPass(PR);
#endif
   initializeGlobalISel(PR);
 }
 
 /// Return the datalayout string of a subtarget.
 static std::string getDataLayoutString(const Triple &T) {
   bool is64Bit = T.getArch() == Triple::ppc64 || T.getArch() == Triple::ppc64le;
   std::string Ret;
 
-  // Most PPC* platforms are big endian, PPC64LE is little endian.
-  if (T.getArch() == Triple::ppc64le)
+  // Most PPC* platforms are big endian, PPC(64)LE is little endian.
+  if (T.getArch() == Triple::ppc64le || T.getArch() == Triple::ppcle)
     Ret = "e";
   else
     Ret = "E";
 
   Ret += DataLayout::getManglingComponent(T);
 
   // PPC32 has 32 bit pointers. The PS3 (OS Lv2) is a PPC64 machine with 32 bit
   // pointers.

llvm/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.h

 //===-- PowerPCTargetInfo.h - PowerPC Target Implementation -----*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_LIB_TARGET_POWERPC_TARGETINFO_POWERPCTARGETINFO_H
 #define LLVM_LIB_TARGET_POWERPC_TARGETINFO_POWERPCTARGETINFO_H
 
 namespace llvm {
 
 class Target;
 
 Target &getThePPC32Target();
+Target &getThePPC32LETarget();
 Target &getThePPC64Target();
 Target &getThePPC64LETarget();
 
 } // namespace llvm
 
 #endif // LLVM_LIB_TARGET_POWERPC_TARGETINFO_POWERPCTARGETINFO_H

llvm/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp

 //===-- PowerPCTargetInfo.cpp - PowerPC Target Implementation -------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "TargetInfo/PowerPCTargetInfo.h"
 #include "llvm/Support/TargetRegistry.h"
 using namespace llvm;
 
 Target &llvm::getThePPC32Target() {
   static Target ThePPC32Target;
   return ThePPC32Target;
 }
+Target &llvm::getThePPC32LETarget() {
+  static Target ThePPC32LETarget;
+  return ThePPC32LETarget;
+}
 Target &llvm::getThePPC64Target() {
   static Target ThePPC64Target;
   return ThePPC64Target;
 }
 Target &llvm::getThePPC64LETarget() {
   static Target ThePPC64LETarget;
   return ThePPC64LETarget;
 }
 
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTargetInfo() {
-  RegisterTarget<Triple::ppc, /*HasJIT=*/true> X(getThePPC32Target(), "ppc32",
+  RegisterTarget<Triple::ppc, /*HasJIT=*/true> W(getThePPC32Target(), "ppc32",
                                                  "PowerPC 32", "PPC");
 
+  RegisterTarget<Triple::ppcle, /*HasJIT=*/true> X(
+      getThePPC32LETarget(), "ppc32le", "PowerPC 32 LE", "PPC");
+
   RegisterTarget<Triple::ppc64, /*HasJIT=*/true> Y(getThePPC64Target(), "ppc64",
                                                    "PowerPC 64", "PPC");
 
   RegisterTarget<Triple::ppc64le, /*HasJIT=*/true> Z(
       getThePPC64LETarget(), "ppc64le", "PowerPC 64 LE", "PPC");
 }

llvm/test/tools/llvm-objcopy/ELF/binary-output-target.test

 # RUN: llvm-readobj --file-headers %t.i386.o | FileCheck %s --check-prefixes=CHECK,LE,I386,32
 
 # RUN: llvm-objcopy -I binary -O elf64-x86-64 %t.txt %t.x86-64.o
 # RUN: llvm-readobj --file-headers %t.x86-64.o | FileCheck %s --check-prefixes=CHECK,LE,X86-64,64
 
 # RUN: llvm-objcopy -I binary -O elf32-bigmips %t.txt %t.mips.o
 # RUN: llvm-readobj --file-headers %t.mips.o | FileCheck %s --check-prefixes=CHECK,BE,MIPS,32
 
+# RUN: llvm-objcopy -I binary -O elf32-powerpc %t.txt %t.ppc32be.o
+# RUN: llvm-readobj --file-headers %t.ppc32be.o | FileCheck %s --check-prefixes=CHECK,BE,PPC32,PPC32BE,32
+
+# RUN: llvm-objcopy -I binary -O elf32-powerpcle %t.txt %t.ppc32le.o
+# RUN: llvm-readobj --file-headers %t.ppc32le.o | FileCheck %s --check-prefixes=CHECK,LE,PPC32,PPC32LE,32
+
+# RUN: llvm-objcopy -I binary -O elf64-powerpc %t.txt %t.ppc64be.o
+# RUN: llvm-readobj --file-headers %t.ppc64be.o | FileCheck %s --check-prefixes=CHECK,BE,PPC64,PPC64BE,64
+
 # RUN: llvm-objcopy -I binary -O elf64-powerpcle %t.txt %t.ppc64le.o
-# RUN: llvm-readobj --file-headers %t.ppc64le.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64,64
+# RUN: llvm-readobj --file-headers %t.ppc64le.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64,PPC64LE,64
 
 # RUN: llvm-objcopy -I binary -O elf32-littleriscv %t.txt %t.rv32.o
 # RUN: llvm-readobj --file-headers %t.rv32.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32
 
 # RUN: llvm-objcopy -I binary -O elf64-littleriscv %t.txt %t.rv64.o
 # RUN: llvm-readobj --file-headers %t.rv64.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV64,64
 
 # RUN: llvm-objcopy -I binary -O elf32-sparc %t.txt %t.sparc.o

 # 64-SAME:      elf64-
 # AARCH64-SAME: littleaarch64
 # ARM-SAME:     littlearm
 # HEXAGON-SAME: hexagon
 # I386-SAME:    i386
 # MIPS-SAME:    mips{{$}}
 # RISCV32-SAME: riscv{{$}}
 # RISCV64-SAME: riscv{{$}}
-# PPC-SAME:     powerpc{{$}}
-# PPC64le-SAME: powerpc{{$}}
+# PPCBE-SAME:   powerpc{{$}}
+# PPCLE-SAME:   powerpcle{{$}}
 # SPARC-SAME:   sparc
 # SPARCEL-SAME: sparc
 # X86-64-SAME:  x86-64
 
 # AARCH64-NEXT: Arch: aarch64
 # ARM-NEXT:     Arch: arm
 # HEXAGON-NEXT: Arch: hexagon
 # I386-NEXT:    Arch: i386
 # MIPS-NEXT:    Arch: mips{{$}}
-# PPC-NEXT:     Arch: powerpc{{$}}
-# PPC64-NEXT:   Arch: powerpc64le
+# PPC32BE-NEXT: Arch: powerpc{{$}}
+# PPC32LE-NEXT: Arch: powerpcle{{$}}
+# PPC64BE-NEXT: Arch: powerpc64{{$}}
+# PPC64LE-NEXT: Arch: powerpc64le{{$}}
 # RISCV32-NEXT: Arch: riscv32
 # RISCV64-NEXT: Arch: riscv64
 # SPARC-NEXT:   Arch: sparc{{$}}
 # SPARCEL-NEXT: Arch: sparcel
 # X86-64-NEXT:  Arch: x86_64
 
 # 32-NEXT:      AddressSize: 32bit
 # 64-NEXT:      AddressSize: 64bit

 ## In GNU objcopy, e_machine is EM_NONE unless -B is specifid.
 ## It is not very clear why it behaves this way.
 ## We fill in the field regardless of -B.
 # AARCH64-NEXT:   Machine: EM_AARCH64 (0xB7)
 # ARM-NEXT:       Machine: EM_ARM (0x28)
 # HEXAGON-NEXT:   Machine: EM_HEXAGON (0xA4)
 # I386-NEXT:      Machine: EM_386 (0x3)
 # MIPS-NEXT:      Machine: EM_MIPS (0x8)
-# PPC-NEXT:       Machine: EM_PPC (0x14)
+# PPC32-NEXT:     Machine: EM_PPC (0x14)
 # PPC64-NEXT:     Machine: EM_PPC64 (0x15)
 # RISCV32-NEXT:   Machine: EM_RISCV (0xF3)
 # RISCV64-NEXT:   Machine: EM_RISCV (0xF3)
 # SPARC-NEXT:     Machine: EM_SPARC (0x2)
 # SPARCEL-NEXT:   Machine: EM_SPARC (0x2)
 # X86-64-NEXT:    Machine: EM_X86_64 (0x3E)
 
 # CHECK-NEXT:     Version: 1

llvm/test/tools/llvm-objcopy/ELF/cross-arch-headers.test

 # RUN: llvm-readobj --file-headers %t.elf64_aarch64.o | FileCheck %s --check-prefixes=CHECK,LE,AARCH,64,SYSV
 # RUN: llvm-readobj --file-headers %t.elf64_aarch64.dwo | FileCheck %s --check-prefixes=CHECK,LE,AARCH,64,SYSV
 
 # RUN: llvm-objcopy %t.o -O elf64-littleaarch64 %t.elf64_littleaarch64.o --split-dwo=%t.elf64_littleaarch64.dwo
 # RUN: llvm-readobj --file-headers %t.elf64_littleaarch64.o | FileCheck %s --check-prefixes=CHECK,LE,AARCH,64,SYSV
 # RUN: llvm-readobj --file-headers %t.elf64_littleaarch64.dwo | FileCheck %s --check-prefixes=CHECK,LE,AARCH,64,SYSV
 
 # RUN: llvm-objcopy %t.o -O elf32-powerpc %t.elf32_powerpc.o --split-dwo=%t.elf32_powerpc.dwo
-# RUN: llvm-readobj --file-headers %t.elf32_powerpc.o | FileCheck %s --check-prefixes=CHECK,BE,PPC,32,SYSV
-# RUN: llvm-readobj --file-headers %t.elf32_powerpc.dwo | FileCheck %s --check-prefixes=CHECK,BE,PPC,32,SYSV
+# RUN: llvm-readobj --file-headers %t.elf32_powerpc.o | FileCheck %s --check-prefixes=CHECK,BE,PPC32,PPCBE,PPC32BE,32,SYSV
+# RUN: llvm-readobj --file-headers %t.elf32_powerpc.dwo | FileCheck %s --check-prefixes=CHECK,BE,PPC32,PPCBE,PPC32BE,32,SYSV
 
 # RUN: llvm-objcopy %t.o -O elf64-powerpc %t.elf64_powerpc.o --split-dwo=%t.elf64_powerpc.dwo
-# RUN: llvm-readobj --file-headers %t.elf64_powerpc.o | FileCheck %s --check-prefixes=CHECK,BE,PPC64BE,64,SYSV
-# RUN: llvm-readobj --file-headers %t.elf64_powerpc.dwo | FileCheck %s --check-prefixes=CHECK,BE,PPC64BE,64,SYSV
+# RUN: llvm-readobj --file-headers %t.elf64_powerpc.o | FileCheck %s --check-prefixes=CHECK,BE,PPC64,PPCBE,PPC64BE,64,SYSV
+# RUN: llvm-readobj --file-headers %t.elf64_powerpc.dwo | FileCheck %s --check-prefixes=CHECK,BE,PPC64,PPCBE,PPC64BE,64,SYSV
 
 # RUN: llvm-objcopy %t.o -O elf32-powerpcle %t.elf32_ppcle.o --split-dwo=%t.elf32_ppcle.dwo
-# RUN: llvm-readobj --file-headers %t.elf32_ppcle.o | FileCheck %s --check-prefixes=CHECK,LE,PPC,32,SYSV
-# RUN: llvm-readobj --file-headers %t.elf32_ppcle.dwo | FileCheck %s --check-prefixes=CHECK,LE,PPC,32,SYSV
+# RUN: llvm-readobj --file-headers %t.elf32_ppcle.o | FileCheck %s --check-prefixes=CHECK,LE,PPC32,PPCLE,PPC32LE,32,SYSV
+# RUN: llvm-readobj --file-headers %t.elf32_ppcle.dwo | FileCheck %s --check-prefixes=CHECK,LE,PPC32,PPCLE,PPC32LE,32,SYSV
+
+# RUN: llvm-objcopy %t.o -O elf64-powerpcle %t.elf64_ppcle.o --split-dwo=%t.elf64_ppcle.dwo
+# RUN: llvm-readobj --file-headers %t.elf64_ppcle.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64,PPCLE,PPC64LE,64,SYSV
+# RUN: llvm-readobj --file-headers %t.elf64_ppcle.dwo | FileCheck %s --check-prefixes=CHECK,LE,PPC64,PPCLE,PPC64LE,64,SYSV
 
 # RUN: llvm-objcopy %t.o -O elf32-x86-64 %t.elf32_x86_64.o --split-dwo=%t.elf32_x86_64.dwo
 # RUN: llvm-readobj --file-headers %t.elf32_x86_64.o | FileCheck %s --check-prefixes=CHECK,LE,X86-64,32,SYSV
 # RUN: llvm-readobj --file-headers %t.elf32_x86_64.dwo | FileCheck %s --check-prefixes=CHECK,LE,X86-64,32,SYSV
 
-# RUN: llvm-objcopy %t.o -O elf64-powerpcle %t.elf64_ppcle.o --split-dwo=%t.elf64_ppcle.dwo
-# RUN: llvm-readobj --file-headers %t.elf64_ppcle.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64LE,64,SYSV
-# RUN: llvm-readobj --file-headers %t.elf64_ppcle.dwo | FileCheck %s --check-prefixes=CHECK,LE,PPC64LE,64,SYSV
-
 # RUN: llvm-objcopy %t.o -O elf32-littleriscv %t.elf32_littleriscv.o --split-dwo=%t.elf32_littleriscv.dwo
 # RUN: llvm-readobj --file-headers %t.elf32_littleriscv.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32,SYSV
 # RUN: llvm-readobj --file-headers %t.elf32_littleriscv.dwo | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32,SYSV
 
 # RUN: llvm-objcopy %t.o -O elf64-littleriscv %t.elf64_littleriscv.o --split-dwo=%t.elf64_littleriscv.dwo
 # RUN: llvm-readobj --file-headers %t.elf64_littleriscv.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV64,64,SYSV
 # RUN: llvm-readobj --file-headers %t.elf64_littleriscv.dwo | FileCheck %s --check-prefixes=CHECK,LE,RISCV64,64,SYSV
 

 # 32-SAME:      elf32-
 # 64-SAME:      elf64-
 # I386-SAME:    i386
 # IAMCU-SAME:   iamcu
 # AARCH-SAME:   aarch64
 # ARM-SAME:     littlearm
 # HEXAGON-SAME: hexagon
 # MIPS-SAME:    mips
-# PPC-SAME:     powerpc{{$}}
-# PPC64BE-SAME: powerpc{{$}}
-# PPC64LE-SAME: powerpcle{{$}}
+# PPCBE-SAME:   powerpc{{$}}
+# PPCLE-SAME:   powerpcle{{$}}
 # RISCV32-SAME: riscv{{$}}
 # RISCV64-SAME: riscv{{$}}
 # SPARC-SAME:   sparc
 # X86-64-SAME:  x86-64
 # DEFAULT-SAME: unknown
 
 # I386-NEXT:     Arch: i386
 # IAMCU-NEXT:    Arch: i386
 # AARCH-NEXT:    Arch: aarch64
 # ARM-NEXT:      Arch: arm
 # HEXAGON-NEXT:  Arch: hexagon
 # MIPSBE-NEXT:   Arch: mips{{$}}
 # MIPSLE-NEXT:   Arch: mipsel{{$}}
 # MIPS64BE-NEXT: Arch: mips64{{$}}
 # MIPS64LE-NEXT: Arch: mips64el{{$}}
-# PPC-NEXT:      Arch: powerpc{{$}}
+# PPC32BE-NEXT:  Arch: powerpc{{$}}
+# PPC32LE-NEXT:  Arch: powerpcle{{$}}
 # PPC64BE-NEXT:  Arch: powerpc64{{$}}
-# PPC64LE-NEXT:  Arch: powerpc64le
+# PPC64LE-NEXT:  Arch: powerpc64le{{$}}
 # RISCV32-NEXT:  Arch: riscv32
 # RISCV64-NEXT:  Arch: riscv64
 # SPARC-NEXT:    Arch: sparc{{$}}
 # SPARCEL-NEXT:  Arch: sparcel
 # X86-64-NEXT:   Arch: x86_64
 # DEFAULT-NEXT:  Arch: unknown
 
 # 32-NEXT:      AddressSize: 32bit

 # DEFAULT: OS/ABI: Standalone (0xFF)
 
 # AARCH:   Machine: EM_AARCH64 (0xB7)
 # ARM:     Machine: EM_ARM (0x28)
 # HEXAGON: Machine: EM_HEXAGON (0xA4)
 # I386:    Machine: EM_386 (0x3)
 # IAMCU:   Machine: EM_IAMCU (0x6)
 # MIPS:    Machine: EM_MIPS (0x8)
-# PPC:     Machine: EM_PPC (0x14)
+# PPC32:   Machine: EM_PPC (0x14)
 # PPC64:   Machine: EM_PPC64 (0x15)
 # RISCV32: Machine: EM_RISCV (0xF3)
 # RISCV64: Machine: EM_RISCV (0xF3)
 # SPARC:   Machine: EM_SPARC (0x2)
 # X86-64:  Machine: EM_X86_64 (0x3E)
 
 # 32: HeaderSize: 52
 # 64: HeaderSize: 64
 
 # 32: SectionHeaderEntrySize: 40
 # 64: SectionHeaderEntrySize: 64

llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s

-# RUN: llvm-mc -triple=powerpc -filetype=obj %s -o %t.32.o
-# RUN: llvm-objdump -d --no-show-raw-insn %t.32.o | FileCheck --check-prefixes=ELF32,CHECK %s
+# RUN: llvm-mc -triple=powerpc -filetype=obj %s -o %t.32be.o
+# RUN: llvm-objdump -d --no-show-raw-insn %t.32be.o | FileCheck --check-prefixes=ELF32,CHECK %s
 
-# RUN: llvm-mc -triple=powerpc64le -filetype=obj %s -o %t.64.o
-# RUN: llvm-objdump -d --no-show-raw-insn %t.64.o | FileCheck --check-prefixes=ELF64,CHECK %s
+# RUN: llvm-mc -triple=powerpcle -filetype=obj %s -o %t.32le.o
+# RUN: llvm-objdump -d --no-show-raw-insn %t.32le.o | FileCheck --check-prefixes=ELF32,CHECK %s
 
-# RUN: llvm-mc -triple=powerpc64 -filetype=obj %s -o %t.64.o
-# RUN: llvm-objdump -d --no-show-raw-insn %t.64.o | FileCheck --check-prefixes=ELF64,CHECK %s
+# RUN: llvm-mc -triple=powerpc64 -filetype=obj %s -o %t.64be.o
+# RUN: llvm-objdump -d --no-show-raw-insn %t.64be.o | FileCheck --check-prefixes=ELF64,CHECK %s
+
+# RUN: llvm-mc -triple=powerpc64le -filetype=obj %s -o %t.64le.o
+# RUN: llvm-objdump -d --no-show-raw-insn %t.64le.o | FileCheck --check-prefixes=ELF64,CHECK %s
 
 # CHECK-LABEL: <bl>:
 # ELF32-NEXT:   bl 0xfffffffc
 # ELF64-NEXT:   bl 0xfffffffffffffffc
 # CHECK-NEXT:   bl 0x4
 # CHECK-NEXT:   bl 0xc
 
 bl:

llvm/unittests/ADT/TripleTest.cpp

TEST(TripleTest, EndianArchVariants) {
   EXPECT_EQ(Triple::mipsel, T.getLittleEndianArchVariant().getArch());
 
   T.setArch(Triple::mipsel);
   EXPECT_EQ(Triple::mips, T.getBigEndianArchVariant().getArch());
   EXPECT_EQ(Triple::mipsel, T.getLittleEndianArchVariant().getArch());
 
   T.setArch(Triple::ppc);
   EXPECT_EQ(Triple::ppc, T.getBigEndianArchVariant().getArch());
-  EXPECT_EQ(Triple::UnknownArch, T.getLittleEndianArchVariant().getArch());
+  EXPECT_EQ(Triple::ppcle, T.getLittleEndianArchVariant().getArch());
 
   T.setArch(Triple::ppc64);
   EXPECT_EQ(Triple::ppc64, T.getBigEndianArchVariant().getArch());
   EXPECT_EQ(Triple::ppc64le, T.getLittleEndianArchVariant().getArch());
 
   T.setArch(Triple::ppc64le);
   EXPECT_EQ(Triple::ppc64, T.getBigEndianArchVariant().getArch());
   EXPECT_EQ(Triple::ppc64le, T.getLittleEndianArchVariant().getArch());