User Details
User Details
- User Since
- May 4 2016, 7:01 PM (359 w, 4 d)
Mon, Mar 6
Mon, Mar 6
HsiangKai committed rG0847cc06a6c4: [NFC][AArch64] Use 'i' to encode the offset form of load/store. (authored by HsiangKai).
[NFC][AArch64] Use 'i' to encode the offset form of load/store.
Feb 11 2023
Feb 11 2023
HsiangKai committed rG08f31b8fa85c: [docs] Make consistent between MLIR tutorial doc and example code (authored by HsiangKai).
[docs] Make consistent between MLIR tutorial doc and example code
HsiangKai committed rGc9a7b92a23bb: [AArch64] Consider tiny code model in emitLoadFromConstantPool. (authored by HsiangKai).
[AArch64] Consider tiny code model in emitLoadFromConstantPool.
HsiangKai added a comment to D143814: [docs] Make consistent between MLIR tutorial doc and example code.
HsiangKai requested review of D143814: [docs] Make consistent between MLIR tutorial doc and example code.
Jan 15 2023
Jan 15 2023
HsiangKai requested review of D141819: [NFC][AArch64] Use 'i' to encode the offset form of load/store..
HsiangKai requested review of D141817: [NFC][AArch64] Append 'W' to LDAPUR..
Jan 12 2023
Jan 12 2023
HsiangKai requested review of D141646: [NFC][LoopVectorize] Move WideningDecision close to its first use..
Jan 8 2023
Jan 8 2023
Jan 4 2023
Jan 4 2023
Dec 29 2022
Dec 29 2022
HsiangKai committed rGaf5dd2706c84: [RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative (authored by HsiangKai).
[RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative
HsiangKai committed rG002005e6740e: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative (authored by HsiangKai).
[RISCV] Add integer scalar instructions to isAssociativeAndCommutative
Dec 28 2022
Dec 28 2022
HsiangKai updated the diff for D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
Address comments.
HsiangKai committed rG740cb3377d58: [RISCV][NFC] Remove redundant setOperationAction. (authored by HsiangKai).
[RISCV][NFC] Remove redundant setOperationAction.
Dec 27 2022
Dec 27 2022
HsiangKai requested review of D140716: [RISCV][NFC] Remove redundant setOperationAction..
Dec 26 2022
Dec 26 2022
HsiangKai updated the diff for D140602: [RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative.
Rebase.
HsiangKai updated the diff for D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
- Add comment for MUL.
- Add MIN(U)/MAX(U).
Dec 25 2022
Dec 25 2022
HsiangKai added a comment to D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
HsiangKai updated the diff for D140602: [RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative.
Remove unnecessary fast-math flags in the test cases.
HsiangKai added inline comments to D140602: [RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative.
HsiangKai added inline comments to D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
HsiangKai added a comment to D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
Dec 22 2022
Dec 22 2022
HsiangKai updated the diff for D140602: [RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative.
No need to check RmReassoc and FmNsz for fmin/fmax.
HsiangKai added inline comments to D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
HsiangKai updated the diff for D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
clang format
HsiangKai updated the diff for D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
- Move FRM operand checking to hasReassociableSibling.
- Add ADD, SUB, ADDW, SUBW to getInverseOpcode and add test cases for the inverse cases.
HsiangKai added inline comments to D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
HsiangKai updated the diff for D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
Remove MULH, MULHU from the list.
HsiangKai added inline comments to D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
HsiangKai updated the diff for D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
clang format
HsiangKai updated the diff for D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
Add default case for the switch statement.
Out of date.
HsiangKai requested review of D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative.
Oct 10 2022
Oct 10 2022
HsiangKai added inline comments to D135633: [GlobalISel] Combine things like (z = x <= 0 ? z = x : z = 0) -> x & (x >> bw-1).
Oct 4 2022
Oct 4 2022
HsiangKai added inline comments to D135009: [RISCV] Refactor and improve eliminateFrameIndex..
Sep 27 2022
Sep 27 2022
HsiangKai added inline comments to D134711: [AArch64] Select SMULL for zero extended vectors when top bit is zero.
Sep 25 2022
Sep 25 2022
HsiangKai added a comment to D132536: [AArch64] Consider tiny code model in emitLoadFromConstantPool..
Sep 4 2022
Sep 4 2022
HsiangKai added inline comments to D133213: [LLVM][AArch64] Explain that X19 is used as the frame base pointer register.
Aug 25 2022
Aug 25 2022
HsiangKai committed rGa8690143057b: [AArch64] Filter out invalid code model in frontend. (authored by HsiangKai).
[AArch64] Filter out invalid code model in frontend.
Aug 24 2022
Aug 24 2022
HsiangKai added inline comments to D132538: [AArch64] Filter out invalid code model in frontend..
HsiangKai updated the diff for D132538: [AArch64] Filter out invalid code model in frontend..
Make the test lines consistent.
HsiangKai requested review of D132538: [AArch64] Filter out invalid code model in frontend..
HsiangKai requested review of D132536: [AArch64] Consider tiny code model in emitLoadFromConstantPool..
May 2 2022
May 2 2022
HsiangKai committed rG3baff8080447: [RISCV] Precommit test cases for (uaddo X, C) (authored by HsiangKai).
[RISCV] Precommit test cases for (uaddo X, C)
HsiangKai committed rGeaaa31ff2c2b: [RISCV][TargetLowering] Special case overflow expansion for (uaddo X, C). (authored by HsiangKai).
[RISCV][TargetLowering] Special case overflow expansion for (uaddo X, C).
Apr 28 2022
Apr 28 2022
HsiangKai committed rGc62b014db979: [RISCV] Merge addi into load/store as there is a ADD between them (authored by HsiangKai).
[RISCV] Merge addi into load/store as there is a ADD between them
HsiangKai updated the diff for D124374: [RISCV][TargetLowering] Special case overflow expansion for (uaddo X, C)..
Address comments.
HsiangKai updated the diff for D124231: [RISCV] Merge addi into load/store as there is a ADD between them.
Address comments.
HsiangKai updated the diff for D124374: [RISCV][TargetLowering] Special case overflow expansion for (uaddo X, C)..
Revert the change and modify the comments only.
HsiangKai added inline comments to D124374: [RISCV][TargetLowering] Special case overflow expansion for (uaddo X, C)..
HsiangKai updated the diff for D124374: [RISCV][TargetLowering] Special case overflow expansion for (uaddo X, C)..
Add predicate for (uaddo X, C).
HsiangKai requested review of D124602: [RISCV] Precommit test cases for (uaddo X, C).
HsiangKai updated the diff for D124231: [RISCV] Merge addi into load/store as there is a ADD between them.
Take the return value of UpdateNodeOperands().
HsiangKai added inline comments to D124231: [RISCV] Merge addi into load/store as there is a ADD between them.
Apr 26 2022
Apr 26 2022
HsiangKai updated the diff for D124374: [RISCV][TargetLowering] Special case overflow expansion for (uaddo X, C)..
Update failed PowerPC test cases.
Apr 25 2022
Apr 25 2022
HsiangKai updated the diff for D124374: [RISCV][TargetLowering] Special case overflow expansion for (uaddo X, C)..
Move new test cases to the end of the test file to remove unnecessary noises.
HsiangKai updated the diff for D124374: [RISCV][TargetLowering] Special case overflow expansion for (uaddo X, C)..
Add test cases.
Apr 21 2022
Apr 21 2022
HsiangKai updated the diff for D124231: [RISCV] Merge addi into load/store as there is a ADD between them.
Update test cases.
HsiangKai updated the diff for D124231: [RISCV] Merge addi into load/store as there is a ADD between them.
It is not safe to do this peephole for ADD*W.
HsiangKai added inline comments to D124231: [RISCV] Merge addi into load/store as there is a ADD between them.
HsiangKai updated the summary of D124231: [RISCV] Merge addi into load/store as there is a ADD between them.
HsiangKai requested review of D124231: [RISCV] Merge addi into load/store as there is a ADD between them.
Apr 15 2022
Apr 15 2022
HsiangKai added inline comments to D123264: [RISCV] Pre-RA expand pseudos pass.
HsiangKai added inline comments to D123264: [RISCV] Pre-RA expand pseudos pass.
HsiangKai added inline comments to D123264: [RISCV] Pre-RA expand pseudos pass.
HsiangKai added inline comments to D123264: [RISCV] Pre-RA expand pseudos pass.
Feb 28 2022
Feb 28 2022
[AArch64][SME] Add rdsvl instruction
HsiangKai committed rG7dd7cb0487ca: [AArch64][SME] Add addsvl and addspl instructions (authored by HsiangKai).
[AArch64][SME] Add addsvl and addspl instructions
Feb 28 2022, 3:15 PM · Restricted Project
Feb 28 2022, 3:15 PM · Restricted Project
Feb 25 2022
Feb 25 2022
HsiangKai requested review of D120603: [AArch64][SME] Add rdsvl instruction.
Feb 25 2022, 7:00 PM · Restricted Project
HsiangKai requested review of D120554: [AArch64][SME] Add addsvl and addspl instructions.
Feb 25 2022, 3:32 AM · Restricted Project
HsiangKai committed rG2cd675249d8d: [NFC][AArch64][SME] Remove '#' prefix in PSEL test cases (authored by HsiangKai).
[NFC][AArch64][SME] Remove '#' prefix in PSEL test cases
Feb 25 2022, 1:24 AM · Restricted Project
HsiangKai requested review of D120543: [NFC][AArch64][SME] Remove '#' prefix in PSEL test cases.
Feb 25 2022, 12:04 AM · Restricted Project
Jan 25 2022
Jan 25 2022
HsiangKai committed rG901dd53cbf61: [docs] There are more than three bit storage containers. (authored by HsiangKai).
[docs] There are more than three bit storage containers.
HsiangKai committed rG48f763edb471: [docs] Refine the description in Set-Like and Map-Like container options. (authored by HsiangKai).
[docs] Refine the description in Set-Like and Map-Like container options.
Jan 25 2022, 2:09 AM · Restricted Project
HsiangKai closed D117858: [docs] Refine the description in Set-Like and Map-Like container options..
Jan 25 2022, 2:09 AM · Restricted Project
Jan 24 2022
Jan 24 2022
HsiangKai updated the summary of D117858: [docs] Refine the description in Set-Like and Map-Like container options..
Jan 24 2022, 12:16 AM · Restricted Project
HsiangKai updated the summary of D117858: [docs] Refine the description in Set-Like and Map-Like container options..
Jan 24 2022, 12:16 AM · Restricted Project
HsiangKai updated the diff for D117858: [docs] Refine the description in Set-Like and Map-Like container options..
Update ProgrammersManual.rst according to @dexonsmith's suggestions.
Jan 24 2022, 12:13 AM · Restricted Project
Jan 23 2022
Jan 23 2022
HsiangKai added inline comments to D117858: [docs] Refine the description in Set-Like and Map-Like container options..
Jan 23 2022, 11:50 PM · Restricted Project
HsiangKai retitled D117849: [docs] There are more than three bit storage containers. from [docs] There are four bit storage containers. to [docs] There are more than three bit storage containers..
Jan 23 2022, 11:46 PM · Restricted Project
HsiangKai added inline comments to D117849: [docs] There are more than three bit storage containers..
Jan 23 2022, 11:45 PM · Restricted Project
HsiangKai updated the diff for D117849: [docs] There are more than three bit storage containers..
Address dexonsmith's comments.
Jan 23 2022, 11:43 PM · Restricted Project
Jan 21 2022
Jan 21 2022
HsiangKai requested review of D117858: [docs] Refine the description in Set-Like and Map-Like container options..
Jan 21 2022, 12:24 AM · Restricted Project
Jan 20 2022
Jan 20 2022
HsiangKai requested review of D117849: [docs] There are more than three bit storage containers..
Jan 20 2022, 5:49 PM · Restricted Project