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jhibbits (Justin Hibbits)
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User Since
Sep 8 2014, 1:26 PM (279 w, 6 d)

Recent Activity

Tue, Jan 14

jhibbits added inline comments to D72673: [PowerPC] Fix powerpcspe subtarget enablement in llvm backend.
Tue, Jan 14, 7:43 AM · Restricted Project

Mon, Jan 13

jhibbits created D72673: [PowerPC] Fix powerpcspe subtarget enablement in llvm backend.
Mon, Jan 13, 6:14 PM · Restricted Project

Fri, Jan 10

jhibbits accepted D72433: [Driver][PowerPC] Move powerpcspe logic from cc1 to Driver.

Fine with me. I just wanted -target powerpcspe-... to work with D72014.

Fri, Jan 10, 11:46 AM · Restricted Project

Wed, Jan 8

jhibbits updated subscribers of D72014: [PowerPC]: Add powerpcspe target triple subarch component.
Wed, Jan 8, 8:09 AM · Restricted Project, Restricted Project

Tue, Jan 7

jhibbits accepted D72363: [PowerPC] Default ppc64 linux-gnu/freebsd to -fno-PIC.
Tue, Jan 7, 2:54 PM · Restricted Project

Mon, Jan 6

jhibbits resigned from D70758: [PowerPC][NFC] Rename record instructions to use _rec suffix instead of o.

Not happy, but won't hold it up.

Mon, Jan 6, 7:11 AM · Restricted Project

Sun, Jan 5

jhibbits added a comment to D72014: [PowerPC]: Add powerpcspe target triple subarch component.

Any more feedback on this?

Sun, Jan 5, 11:39 AM · Restricted Project, Restricted Project

Thu, Jan 2

jhibbits added a comment to D69483: [PowerPC]: Fix predicate handling with SPE.

@Jim Yeah, I know. I normally do fix the commit message, but forgot before pushing this one. I'll have to check, but I thought arc had a way to update the commit message when generating the review.

Thu, Jan 2, 7:30 PM · Restricted Project
jhibbits closed D69483: [PowerPC]: Fix predicate handling with SPE.

Committed as 2c4620ad57b

Thu, Jan 2, 5:38 PM · Restricted Project
jhibbits updated the diff for D69483: [PowerPC]: Fix predicate handling with SPE.

Address comments. As part of this I ran 'update_llc_test_checks.py' on the
whole spe.ll file. I'm not sure if that's necessary for this, but I included
the output anyway. If it's better as a separate change I can do that.

Thu, Jan 2, 1:21 PM · Restricted Project

Tue, Dec 31

jhibbits updated the diff for D72014: [PowerPC]: Add powerpcspe target triple subarch component.

Add triple unit test. I chose freebsd as the OS since that's my environment.

Tue, Dec 31, 8:46 AM · Restricted Project, Restricted Project

Mon, Dec 30

jhibbits added inline comments to D69483: [PowerPC]: Fix predicate handling with SPE.
Mon, Dec 30, 8:32 PM · Restricted Project
jhibbits updated the diff for D72014: [PowerPC]: Add powerpcspe target triple subarch component.

Reuse the SPE feature test preprocessor test check instead of duplicating it.
powerpcspe-* is exactly equivalent to the -mspe command line argument.

Mon, Dec 30, 7:36 PM · Restricted Project, Restricted Project
jhibbits added inline comments to D72014: [PowerPC]: Add powerpcspe target triple subarch component.
Mon, Dec 30, 7:27 PM · Restricted Project, Restricted Project
jhibbits added a comment to D69483: [PowerPC]: Fix predicate handling with SPE.

Looks like to me that Vector Compare in SPE also has different CR bit semantics .
So this patch will only handle floating point part for SPE? If so, maybe we should make it explicit in title.

Mon, Dec 30, 1:48 PM · Restricted Project
jhibbits updated the diff for D72014: [PowerPC]: Add powerpcspe target triple subarch component.

Fix a test typo made at the last minute.

Mon, Dec 30, 1:20 PM · Restricted Project, Restricted Project
jhibbits created D72014: [PowerPC]: Add powerpcspe target triple subarch component.
Mon, Dec 30, 1:14 PM · Restricted Project, Restricted Project
jhibbits accepted D72008: [PowerPC][docs] Update Embedded PowerPC docs in Compiler Writers Info page.
Mon, Dec 30, 11:21 AM · Restricted Project
jhibbits added a comment to D69483: [PowerPC]: Fix predicate handling with SPE.

Ping on this? I've been using this patch for quite some time now, and really want to get it in before 10.

Mon, Dec 30, 7:16 AM · Restricted Project

Fri, Dec 27

jhibbits added a comment to D71287: [PowerPC] Use fcti[dw] instructions in additional cases.

The conflict I see is the other patch uses VSX for the operations, but this uses instructions that have been around as far back as the PPC970.

Fri, Dec 27, 9:58 AM · Restricted Project

Dec 19 2019

jhibbits added a comment to D69484: [PowerPC] Relax the restrictions on loading doubles with SPE.

@kthomsen do you have any tests we can massage for this?

Dec 19 2019, 7:44 AM · Restricted Project

Dec 18 2019

jhibbits updated the diff for D70570: [PowerPC] Only use PLT annotations if using PIC relocation model.

Updated diff after clang-format. I actually had run git-clang-format on it
before submitting, but forgot to amend it to the change before submitting
for review.

Dec 18 2019, 8:28 AM · Restricted Project
jhibbits updated the diff for D70570: [PowerPC] Only use PLT annotations if using PIC relocation model.

Update diff. It would help if I actually compiled when rebasing...

Dec 18 2019, 8:04 AM · Restricted Project

Dec 17 2019

jhibbits updated the diff for D70570: [PowerPC] Only use PLT annotations if using PIC relocation model.

Rebase

Dec 17 2019, 12:17 PM · Restricted Project

Dec 16 2019

jhibbits added a comment to D69483: [PowerPC]: Fix predicate handling with SPE.

Thanks @Jim, yes the code was copied from a comment in another review and I didn't run clang-format on it. Thanks for pointing out 'git-clang-format', I didn't know about that before.

Dec 16 2019, 7:38 AM · Restricted Project
jhibbits updated the diff for D69483: [PowerPC]: Fix predicate handling with SPE.

Apply style fixes.

Dec 16 2019, 7:38 AM · Restricted Project

Dec 13 2019

jhibbits updated the diff for D69483: [PowerPC]: Fix predicate handling with SPE.

Add tests, taken from the C test in comments in D54583.

Dec 13 2019, 8:24 AM · Restricted Project

Dec 10 2019

jhibbits added a comment to D70570: [PowerPC] Only use PLT annotations if using PIC relocation model.

@MaskRay , @jhibbits Thank you for providing the correct ABI doc, and for the answers. I'll start going through it.

  • It is an error to not use a PLTREL relocation for a call that needs to be indirected through the PLT. The linker will complain to recompile with -fPIC.

Means you can't link static execs against shared objects anymore. Is this the intent? Or am I missing something obvious?

Dec 10 2019, 1:15 PM · Restricted Project
jhibbits added a comment to D70570: [PowerPC] Only use PLT annotations if using PIC relocation model.

@Bdragon28 we might need to use -mlongcall for modules, if we aren't already. This should(?) force the compiler to generate the appropriate long-distance code sequences. I'm not sure, though, if clang supports this yet.

Dec 10 2019, 10:37 AM · Restricted Project

Dec 5 2019

jhibbits added a comment to D69486: PowerPC: Fix SPE f64 VAARG handling..

Hi Stefan, thanks for the review. You're right this and the other two reviews (D69483, D69484) need tests. @kthomsen created these, I'm trying to marshall them in. He has some tests, but not in a state that's committable yet, and is working on that/looking for help to create reduced cases.

Dec 5 2019, 1:03 PM · Restricted Project
jhibbits added a reviewer for D69486: PowerPC: Fix SPE f64 VAARG handling.: Restricted Project.
Dec 5 2019, 9:55 AM · Restricted Project
jhibbits added a reviewer for D69484: [PowerPC] Relax the restrictions on loading doubles with SPE: Restricted Project.
Dec 5 2019, 9:55 AM · Restricted Project
jhibbits added a comment to D70758: [PowerPC][NFC] Rename record instructions to use _rec suffix instead of o.

I might object less to a _rec suffix. However, you would still need to understand what "record form" means, which requires understanding of the ISA. Why not simply add a comment block to the top of PPCInstrInfo.td, describing things like this? I have a feeling other newbies would have similar questions/concerns/complaints, and they can't all be addressed by renaming everything.

Dec 5 2019, 9:55 AM · Restricted Project

Dec 3 2019

jhibbits added a comment to D70758: [PowerPC][NFC] Rename record instructions to use _rec suffix instead of o.

I personally think the status quo is easy to read. The definitions look like the instructions themselves, and the added verbosity seems very unnecessary. I don't know about others, but I consider people working in the PPCInstr*.td files to be either knowing exactly what they're looking for (grepping), or have a sufficient handle on the ISA that the existing notation is clear. At most I could see changing the 'o' suffix to '_o', which might help newcomers familiar with '_' notation to indicate a diminutive or subscript, but '_record' is very verbose, and as @nemanjai points out, can make some text very ugly.

Dec 3 2019, 11:29 AM · Restricted Project
jhibbits accepted D70928: [PowerPC][NFC] Rename ANDI(S)o8 to ANDI(S)8o.
Dec 3 2019, 7:46 AM · Restricted Project
jhibbits added a comment to D70758: [PowerPC][NFC] Rename record instructions to use _rec suffix instead of o.

I still hold pretty strongly that this change is a more negative impact than positive. As shown in the tests, it's very easy to read the generated statements as "FOO-dot", and search for what 'foo.' actually is. The only difficult part is the '*8' vs '*4', since you can't search for that, and need to remember to drop the number, which isn't difficult after the first time.

Dec 3 2019, 7:27 AM · Restricted Project

Dec 2 2019

jhibbits added a comment to D70758: [PowerPC][NFC] Rename record instructions to use _rec suffix instead of o.

When discussing optimizations related to "ADD-o", if it's "ADDO" I'd call it "ADD-O", but if it's "ADDo" I'd call it "ADD-dot", since all record forms are referred to as 'dot's, even in all the documentation I've seen. For instance, immediately above this text box is the "rlwinm_rldicl_to_andi.mir" test, with the change of "ANDIo8..." to "ANDIr8".... I read that instinctively as "ANDI-dot-8", whereas "ANDIr8" looks like "ANDI-R-8" which doesn't have a corresponding instruction in the ISA. Additionally, the asm string in PPCInstrInfo.td is "andi. ...", which would make someone question what the 'r' is for, when it doesn't even exist in the instruction. Seeing a 'ANDIo' alongside "andi." someone will easily see the 'o' stands for the '.'.

Dec 2 2019, 2:44 PM · Restricted Project
jhibbits requested changes to D70758: [PowerPC][NFC] Rename record instructions to use _rec suffix instead of o.

I second @nemanjai, the lowercase 'o' suffix stands out to me as a clear indicator of it being punctuation, not a letter in the instruction. I would much rather see ANDIo than ANDIr, the 'r' just doesn't look right when reading over it. My vote is to reject. It looks like a lot of churn without much benefit.

Dec 2 2019, 1:57 PM · Restricted Project

Nov 28 2019

jhibbits added a comment to D38554: Fixed ppc32 function relocations in non-pic mode.

Without this or D70570, secure-PLT does not work. the @plt relocation annotations cause GNU ld to force BSS-PLT instead.

Nov 28 2019, 7:28 AM

Nov 24 2019

jhibbits updated the diff for D69483: [PowerPC]: Fix predicate handling with SPE.

Update diff with @kthomsen's comment. With this, and D69484, D69486, and
D70570, clang can now build a fully working powerpcspe FreeBSD world.

Nov 24 2019, 12:44 PM · Restricted Project

Nov 21 2019

jhibbits created D70570: [PowerPC] Only use PLT annotations if using PIC relocation model.
Nov 21 2019, 2:39 PM · Restricted Project

Nov 16 2019

jhibbits accepted D70352: [PowerPC] Rename DarwinDirective to CPUDirective (NFC).
Nov 16 2019, 9:58 AM · Restricted Project

Nov 11 2019

jhibbits added a comment to D67787: Add 8548 CPU definition and attributes.

@vit9696 mind reviewing again with the added tests?

Nov 11 2019, 2:19 PM · Restricted Project
jhibbits requested review of D67787: Add 8548 CPU definition and attributes.
Nov 11 2019, 2:19 PM · Restricted Project

Nov 9 2019

jhibbits updated the diff for D67787: Add 8548 CPU definition and attributes.

Add clang-translation tests for e500 and 8548 CPU definitions.

Nov 9 2019, 11:53 AM · Restricted Project

Oct 29 2019

jhibbits added a comment to D69483: [PowerPC]: Fix predicate handling with SPE.

@kthomsen you can use 'clang -emit-llvm' to emit LLVM IR from your C test cases. There are reducer passes that you can run on that as well, to reduce the test case to the smallest needed, but I can't recall what they are.

Oct 29 2019, 12:19 PM · Restricted Project

Oct 28 2019

jhibbits added a comment to D69483: [PowerPC]: Fix predicate handling with SPE.

Thanks, @kthomsen. Can you provide a LLVM IR test case for this? And test cases for the other two reviews I added you on, since you wrote the patches initially?

Oct 28 2019, 7:07 AM · Restricted Project

Oct 27 2019

jhibbits created D69486: PowerPC: Fix SPE f64 VAARG handling..
Oct 27 2019, 12:53 PM · Restricted Project
jhibbits created D69484: [PowerPC] Relax the restrictions on loading doubles with SPE.
Oct 27 2019, 12:48 PM · Restricted Project
jhibbits created D69483: [PowerPC]: Fix predicate handling with SPE.
Oct 27 2019, 12:48 PM · Restricted Project
jhibbits updated the diff for D67787: Add 8548 CPU definition and attributes.

Don't double-check 8548 CPU for setting LLVM CPU type.

Oct 27 2019, 12:39 PM · Restricted Project
jhibbits added inline comments to D67787: Add 8548 CPU definition and attributes.
Oct 27 2019, 12:39 PM · Restricted Project

Oct 25 2019

jhibbits updated the diff for D67787: Add 8548 CPU definition and attributes.

Make 8548 actually denote e500 LLVM target, add SPE checks to 8548 preprocessor test.

Oct 25 2019, 8:48 PM · Restricted Project

Oct 24 2019

jhibbits added a comment to D67787: Add 8548 CPU definition and attributes.

A side note regarding SPE support. I am currently upgrading to LLVM 9.0 and I discovered that this patch was not committed anyhow at all:
https://reviews.llvm.org/D54583#1444288

Oct 24 2019, 12:18 PM · Restricted Project

Oct 23 2019

jhibbits added a comment to D67787: Add 8548 CPU definition and attributes.

@vit9696 The only thing GCC defines for mcpu=8548 is NO_LWSYNC, the SPE-specific #defines are from -mspe. That said, since I explicitly do enable SPE for e500 CPU, I guess it makes sense to add it to the test.

Oct 23 2019, 2:05 PM · Restricted Project

Sep 19 2019

jhibbits added a comment to D67787: Add 8548 CPU definition and attributes.

I made 8548 an alias in clang to e500, because e500 is recognized in llvm as a CPU, so gets us the feature list and, more importantly, the instruction scheduler.

Sep 19 2019, 8:23 PM · Restricted Project
jhibbits created D67787: Add 8548 CPU definition and attributes.
Sep 19 2019, 8:23 PM · Restricted Project

Sep 12 2019

jhibbits accepted D67513: [PowerPC] Remove the SPE4RC register class and instead add f32 to the GPRC register class..
Sep 12 2019, 2:44 PM · Restricted Project
jhibbits added inline comments to D67513: [PowerPC] Remove the SPE4RC register class and instead add f32 to the GPRC register class..
Sep 12 2019, 2:21 PM · Restricted Project
jhibbits added a comment to D67513: [PowerPC] Remove the SPE4RC register class and instead add f32 to the GPRC register class..

Thanks for getting rid of SPE4RC, I really did not like it, but couldn't think of a better way. Glad you did.

Sep 12 2019, 1:17 PM · Restricted Project

Sep 5 2019

jhibbits added a comment to D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang.

Not in 9.0, but I will try to push for it in 9.0.1.

Sep 5 2019, 7:26 AM · Restricted Project, Restricted Project
jhibbits committed rG3dac214273ee: Add -m(no)-spe to clang (authored by jhibbits).
Add -m(no)-spe to clang
Sep 5 2019, 6:39 AM
jhibbits committed rL371066: Add -m(no)-spe to clang.
Add -m(no)-spe to clang
Sep 5 2019, 6:39 AM
jhibbits closed D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang.
Sep 5 2019, 6:39 AM · Restricted Project, Restricted Project

Sep 3 2019

jhibbits accepted D67119: On PowerPC, Secure-PLT by default for FreeBSD 13 and higher.
Sep 3 2019, 11:41 AM · Restricted Project, Restricted Project
jhibbits accepted D67118: On PowerPC, Secure-PLT by default for FreeBSD 13 and higher.

Thanks for pushing these through. They've been sitting in my private repo for too long now out of laziness.

Sep 3 2019, 11:40 AM · Restricted Project

Jul 29 2019

jhibbits requested review of D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang.

Should've marked it as need review earlier.

Jul 29 2019, 12:53 PM · Restricted Project, Restricted Project
jhibbits added a reviewer for D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang: hfinkel.
Jul 29 2019, 12:53 PM · Restricted Project, Restricted Project

Jul 17 2019

jhibbits accepted D60335: Use -fomit-frame-pointer when optimizing PowerPC code.

Looks fine to me. Since it can be turned off, I don't see a problem if it causes issues.

Jul 17 2019, 9:45 AM · Restricted Project
jhibbits committed rG0257c6b659f1: PowerPC: Fix register spilling for SPE registers (authored by jhibbits).
PowerPC: Fix register spilling for SPE registers
Jul 17 2019, 5:32 AM
jhibbits committed rG5214956eaaa1: PowerPC/SPE: Fix load/store handling for SPE (authored by jhibbits).
PowerPC/SPE: Fix load/store handling for SPE
Jul 17 2019, 5:31 AM
jhibbits committed rL366319: PowerPC: Fix register spilling for SPE registers.
PowerPC: Fix register spilling for SPE registers
Jul 17 2019, 5:31 AM
jhibbits closed D56703: PowerPC: Fix register spilling for SPE registers.
Jul 17 2019, 5:31 AM · Restricted Project
jhibbits committed rL366318: PowerPC/SPE: Fix load/store handling for SPE.
PowerPC/SPE: Fix load/store handling for SPE
Jul 17 2019, 5:31 AM
jhibbits closed D54409: PowerPC/SPE: Fix load/store handling for SPE.
Jul 17 2019, 5:30 AM · Restricted Project

Jul 16 2019

jhibbits added inline comments to D54409: PowerPC/SPE: Fix load/store handling for SPE.
Jul 16 2019, 6:46 PM · Restricted Project

Jun 29 2019

jhibbits updated the diff for D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang.

Made '8548' CPU designation just a stub, to be filled out later. I added it
just for parity with GCC. The 8548 CPU, for GCC, also sets the
NO_LWSYNC macro, which doesn't belong with the SPE change, so will have
to be revisited later.

Jun 29 2019, 8:08 PM · Restricted Project, Restricted Project

Jun 28 2019

jhibbits added a comment to D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang.

Actually, I'm not yet ready to commit this. I want to enforce the 8548 -> e500 processor model before I call this ready. How do I do that with the mcpu?

Jun 28 2019, 8:50 PM · Restricted Project, Restricted Project
jhibbits added a comment to D54409: PowerPC/SPE: Fix load/store handling for SPE.

The immediate offsets for the evldd/evstdd instructions are UInt8, not SInt8, but otherwise your change looks fine. Do you have additional tests for it? You had mentioned before about problematic relocations, is that still the case with your patch?

Jun 28 2019, 7:36 AM · Restricted Project
jhibbits added a comment to D56703: PowerPC: Fix register spilling for SPE registers.

I removed the extra spill changes. Those can be done later if there actually is a problem. This didn't change the tests at all. I'm not quite sure how to write a test to demonstrate that "some but not all" registers are spilled in a given case, given that the register allocator can change at any time, so can't hard-code the registers that would get spilled, and I don't think I can even hard-code the number of registers that could get spilled.

Jun 28 2019, 7:23 AM · Restricted Project
jhibbits updated the summary of D56703: PowerPC: Fix register spilling for SPE registers.
Jun 28 2019, 7:17 AM · Restricted Project
jhibbits added a comment to D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang.

I'll commit it tonight. Was going to last night, but ran into a clang test failure, that turned out to be a long-standing failure with FreeBSD/powerpc64, not a problem with my change.

Jun 28 2019, 7:17 AM · Restricted Project, Restricted Project

Jun 27 2019

jhibbits added inline comments to D49754: Add -m(no-)spe, and e500 CPU definitions and support to clang.
Jun 27 2019, 8:27 PM · Restricted Project, Restricted Project
jhibbits updated the diff for D56703: PowerPC: Fix register spilling for SPE registers.

Reduce the scope of the patch.

Jun 27 2019, 6:56 PM · Restricted Project
jhibbits updated the diff for D54409: PowerPC/SPE: Fix load/store handling for SPE.

Address nemanjai's feedback. Move the EVX check into a separate callable
function. In the future it could possibly be used as a separate addressing
mode, but a naive approach didn't work, and this solves the problem at hand.

Jun 27 2019, 6:56 PM · Restricted Project

Jun 23 2019

jhibbits accepted D63563: [PPC32] Fix PLT calls for -msecure-plt -fpic.

Looks fine to me. @hfinkel or @nemanjai?

Jun 23 2019, 7:28 PM · Restricted Project

Jun 16 2019

jhibbits committed rG1d1cf30b738b: PowerPC: Optimize SPE double parameter calling setup (authored by jhibbits).
PowerPC: Optimize SPE double parameter calling setup
Jun 16 2019, 8:15 PM
jhibbits committed rL363526: PowerPC: Optimize SPE double parameter calling setup.
PowerPC: Optimize SPE double parameter calling setup
Jun 16 2019, 8:15 PM
jhibbits closed D54583: PowerPC: Optimize SPE double parameter calling setup.
Jun 16 2019, 8:15 PM · Restricted Project

May 11 2019

jhibbits added a comment to D56703: PowerPC: Fix register spilling for SPE registers.

Can you add a test case? At least for the spills that you're adding.

May 11 2019, 10:37 AM · Restricted Project

Apr 29 2019

jhibbits added inline comments to D54409: PowerPC/SPE: Fix load/store handling for SPE.
Apr 29 2019, 7:26 AM · Restricted Project

Apr 24 2019

jhibbits accepted D61026: Fix initial-exec in PIC mode for PPC32.

Looks fine to me.

Apr 24 2019, 1:37 PM · Restricted Project

Apr 2 2019

jhibbits added inline comments to D54583: PowerPC: Optimize SPE double parameter calling setup.
Apr 2 2019, 1:12 PM · Restricted Project

Mar 28 2019

jhibbits added a comment to D54583: PowerPC: Optimize SPE double parameter calling setup.

@jhibbits I don't know how to create a new revision here. My idea is to handle this fix via you, as you are already known for the SPE modifications.

Mar 28 2019, 7:22 AM · Restricted Project

Mar 27 2019

jhibbits added a comment to D59310: [PowerPC] Fix issue with inline asm - soft float mode.

Can you adjust the summary? This doesn't prevent floating point instructions completely, it only prevents floating point register constraints. The assertion that it prevents all floating point instructions is what I first took issue with, so please make it explicit that this is *only* regarding register constraints.

Mar 27 2019, 8:26 AM · Restricted Project, Restricted Project
jhibbits accepted D59310: [PowerPC] Fix issue with inline asm - soft float mode.

Reading through the diff again, closer, and checking the FreeBSD source, this is acceptable. FreeBSD only uses the base register, and hard-codes register numbers, so doesn't go through float register allocation.

Mar 27 2019, 8:23 AM · Restricted Project, Restricted Project
jhibbits accepted D59185: [PowerPC] Set the default PLT mode on musl to Secure PLT.

Looks fine to me.

Mar 27 2019, 8:15 AM · Restricted Project, Restricted Project
jhibbits added a comment to D54583: PowerPC: Optimize SPE double parameter calling setup.

@kthomsen can you create a new revision just for that diff?

Mar 27 2019, 8:15 AM · Restricted Project

Mar 14 2019

jhibbits added a comment to D59310: [PowerPC] Fix issue with inline asm - soft float mode.

I'd like to amend my previous comment: FreeBSD, and I'd guess Linux, too, explicitly builds the kernel with -msoft-float, in order to prevent FPU-consuming optimizations. However, we still need to be able to save and restore FPU context, which requires inline asm (or a completely asm file, not something we want). This change would prevent us being able to do that.

Mar 14 2019, 7:43 AM · Restricted Project, Restricted Project

Mar 13 2019

jhibbits added a comment to D59310: [PowerPC] Fix issue with inline asm - soft float mode.

I really don't like this. It should be possible to mix soft-float, Altivec, VSX, and SPE in the same file using inline asm. I put a check in for SPE codegen specifically to permit inline asm for other floating point models.

Mar 13 2019, 11:16 AM · Restricted Project, Restricted Project