Depends on D151395.
This is the 2nd patch of the patch-set. For the cover letter of the
patch-set, please checkout D151395. This patch originates from
This commit models vxrm by adding an immediate operand into intrinsics
and machine instructions of RVV fixed-point instruction vaadd,
vaaddu, vasub, and vasubu. This commit only covers intrinsics of
the four instructions, the proceeding patches of the patch-set will do
the same to other RVV fixed-point instructions.
The current naiive approach is to have a write to vxrm inserted before
every fixed-point instruction. This is done by the new added pass
RISCVInsertReadWriteCSR. The reason to name the pass in a more general
term is because we will also model rounding mode for the RVV floating-
point instructions. The approach will be improved in the future,
implementing partial redundancy elimination algorithms to it.
The original LLVM intrinsics and machine instructions, take vaadd as
an example, does not model the rounding mode is not removed in this
patch. That is, int.riscv.vaadd.* co-exists with
int.riscv.vaadd.rm.* after this patch. The next patch will add C
intrinsics of vaadd with an additional operand that models the control
of the rounding mode, in this patch, int.riscv.vaadd.rm.* will
Authored-by: ShihPo Hung <firstname.lastname@example.org>
Co-Authored-by: eop Chen <email@example.com>