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[5/8][RISCV] Add rounding mode control variant for vfwmacc, vfwnmacc, vfwmsac, vfwnmsac ClosedPublic Authored by eopXD on Jul 6 2023, 11:00 AM.
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Event TimelineHerald added projects: Restricted Project, Restricted Project. · View Herald TranscriptJul 6 2023, 11:00 AM eopXD added a child revision: D154634: [6/8][RISCV] Add rounding mode control variant for vfsqrt, vfrec7.Jul 6 2023, 11:01 AM eopXD retitled this revision from [RISCV] Add rounding mode control variant for vfwmacc, vfwnmacc, vfwmsac, vfwnmsac to [5/8][RISCV] Add rounding mode control variant for vfwmacc, vfwnmacc, vfwmsac, vfwnmsac.Jul 6 2023, 11:10 AM This revision is now accepted and ready to land.Jul 10 2023, 1:46 PM This revision was landed with ongoing or failed builds.Jul 13 2023, 12:50 AM Closed by commit rG4085b23609e9: [5/8][RISCV] Add rounding mode control variant for vfwmacc, vfwnmacc, vfwmsac… (authored by eopXD). · Explain Why This revision was automatically updated to reflect the committed changes.
Revision Contents
Diff 539879 clang/include/clang/Basic/riscv_vector.td
clang/lib/Sema/SemaChecking.cpp
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwnmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwnmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwnmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwnmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwnmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwnmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwnmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwnmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfwmacc-out-of-range.c
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfwmsac-out-of-range.c
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfwnmacc-out-of-range.c
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfwnmsac-out-of-range.c
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
llvm/test/CodeGen/RISCV/rvv/masked-tama.ll
llvm/test/CodeGen/RISCV/rvv/masked-tamu.ll
llvm/test/CodeGen/RISCV/rvv/masked-tuma.ll
llvm/test/CodeGen/RISCV/rvv/masked-tumu.ll
llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll
llvm/test/CodeGen/RISCV/rvv/vfwmacc.ll
llvm/test/CodeGen/RISCV/rvv/vfwmsac.ll
llvm/test/CodeGen/RISCV/rvv/vfwnmacc.ll
llvm/test/CodeGen/RISCV/rvv/vfwnmsac.ll
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