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[RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI
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Authored by arichardson on Aug 16 2022, 6:31 AM.

Details

Summary

This commit moves the information on whether a register is constant into
the Tablegen files to allow generating the implementaiton of
isConstantPhysReg(). I've marked isConstantPhysReg() as final in this
generated file to ensure that changes are made to tablegen instead of
overriding this function, but if that turns out to be too restrictive,
we can remove the qualifier.

This should be pretty much NFC, but I did notice that e.g. the AMDGPU
generated file also includes the LO16/HI16 registers now.

The new isConstant flag will also be used by D131958 to ensure that
constant registers are marked as call-preserved.

Diff Detail

Event Timeline

arichardson created this revision.Aug 16 2022, 6:31 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 16 2022, 6:31 AM
arichardson requested review of this revision.Aug 16 2022, 6:31 AM

fix indentation

Include the tablegen changes here

The generated functions look as follows and mostly match the existing ones (a few extra subregs for AMDGPU and added PPC registers).

cmake-build-debug/lib/Target/AArch64/AArch64GenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/AArch64/AArch64GenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/AArch64/AArch64GenRegisterInfo.inc-      PhysReg == AArch64::WZR ||
cmake-build-debug/lib/Target/AArch64/AArch64GenRegisterInfo.inc-      PhysReg == AArch64::XZR ||
cmake-build-debug/lib/Target/AArch64/AArch64GenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/AArch64/AArch64GenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SGPR_NULL ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SGPR_NULL_HI ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_POPS_EXITING_WAVE_ID ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_PRIVATE_BASE ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_PRIVATE_LIMIT ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_SHARED_BASE ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_SHARED_LIMIT ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SGPR_NULL64 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SGPR_NULL_HI16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SGPR_NULL_HI_HI16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SGPR_NULL_HI_LO16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SGPR_NULL_LO16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_POPS_EXITING_WAVE_ID_HI16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_POPS_EXITING_WAVE_ID_LO16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_PRIVATE_BASE_HI16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_PRIVATE_BASE_LO16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_PRIVATE_LIMIT_HI16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_PRIVATE_LIMIT_LO16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_SHARED_BASE_HI16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_SHARED_BASE_LO16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_SHARED_LIMIT_HI16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      PhysReg == AMDGPU::SRC_SHARED_LIMIT_LO16 ||
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/AMDGPU/R600GenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/AMDGPU/R600GenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/AMDGPU/R600GenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/AMDGPU/R600GenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/ARM/ARMGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/ARM/ARMGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/ARM/ARMGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/ARM/ARMGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/AVR/AVRGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/AVR/AVRGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/AVR/AVRGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/AVR/AVRGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/BPF/BPFGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/BPF/BPFGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/BPF/BPFGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/BPF/BPFGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/Hexagon/HexagonGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/Hexagon/HexagonGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/Hexagon/HexagonGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/Hexagon/HexagonGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/Lanai/LanaiGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/Lanai/LanaiGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/Lanai/LanaiGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/Lanai/LanaiGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/Mips/MipsGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/Mips/MipsGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/Mips/MipsGenRegisterInfo.inc-      PhysReg == Mips::ZERO ||
cmake-build-debug/lib/Target/Mips/MipsGenRegisterInfo.inc-      PhysReg == Mips::ZERO_64 ||
cmake-build-debug/lib/Target/Mips/MipsGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/Mips/MipsGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/MSP430/MSP430GenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/MSP430/MSP430GenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/MSP430/MSP430GenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/MSP430/MSP430GenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/PowerPC/PPCGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/PowerPC/PPCGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/PowerPC/PPCGenRegisterInfo.inc-      PhysReg == PPC::ZERO ||
cmake-build-debug/lib/Target/PowerPC/PPCGenRegisterInfo.inc-      PhysReg == PPC::ZERO8 ||
cmake-build-debug/lib/Target/PowerPC/PPCGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/PowerPC/PPCGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/RISCV/RISCVGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/RISCV/RISCVGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/RISCV/RISCVGenRegisterInfo.inc-      PhysReg == RISCV::VLENB ||
cmake-build-debug/lib/Target/RISCV/RISCVGenRegisterInfo.inc-      PhysReg == RISCV::X0 ||
cmake-build-debug/lib/Target/RISCV/RISCVGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/RISCV/RISCVGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/Sparc/SparcGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/Sparc/SparcGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/Sparc/SparcGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/Sparc/SparcGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/SystemZ/SystemZGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/SystemZ/SystemZGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/SystemZ/SystemZGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/SystemZ/SystemZGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/VE/VEGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/VE/VEGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/VE/VEGenRegisterInfo.inc-      PhysReg == VE::VM0 ||
cmake-build-debug/lib/Target/VE/VEGenRegisterInfo.inc-      PhysReg == VE::VMP0 ||
cmake-build-debug/lib/Target/VE/VEGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/VE/VEGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/WebAssembly/WebAssemblyGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/WebAssembly/WebAssemblyGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/WebAssembly/WebAssemblyGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/WebAssembly/WebAssemblyGenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/X86/X86GenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/X86/X86GenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/X86/X86GenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/X86/X86GenRegisterInfo.inc-}
--
cmake-build-debug/lib/Target/XCore/XCoreGenRegisterInfo.inc:isConstantPhysReg(MCRegister PhysReg) const {
cmake-build-debug/lib/Target/XCore/XCoreGenRegisterInfo.inc-  return
cmake-build-debug/lib/Target/XCore/XCoreGenRegisterInfo.inc-      false;
cmake-build-debug/lib/Target/XCore/XCoreGenRegisterInfo.inc-}
jrtc27 added inline comments.Aug 16 2022, 7:06 AM
llvm/lib/Target/AMDGPU/SIRegisterInfo.td
146 ↗(On Diff #452992)

Not used any more

227 ↗(On Diff #452992)

This wasn't constant before

242 ↗(On Diff #452992)

This wasn't constant before

llvm/lib/Target/Mips/MipsRegisterInfo.td
87 ↗(On Diff #452992)

let ... in gets used for SubRegIndices later

improve tablegen style

arichardson marked an inline comment as done.

SRC_POPS_EXITING_WAVE_ID should not be constant

arichardson marked 2 inline comments as done.Aug 16 2022, 7:11 AM
arichardson added inline comments.
llvm/lib/Target/AMDGPU/SIRegisterInfo.td
227 ↗(On Diff #452992)

That's true, but since it's a subreg if SGPR_NULL64 I assumed it must be.

242 ↗(On Diff #452992)

fixed.

asb added a comment.Aug 17 2022, 5:51 AM

This LGTM from a RISC-V perspective and makes a lot of sense to generate from from TableGen rather than hand-coding.

I think it would be worth getting an LGTM from the AMDGPU side before landing.

LGTM for PPC.

foad accepted this revision.Aug 23 2022, 4:05 AM

LGTM for AMDGPU.

llvm/lib/Target/AMDGPU/SIRegisterInfo.td
231 ↗(On Diff #452996)

Please don't remove the blank line :)

This revision is now accepted and ready to land.Aug 23 2022, 4:05 AM
This revision was landed with ongoing or failed builds.Aug 24 2022, 7:17 AM
This revision was automatically updated to reflect the committed changes.
arichardson marked an inline comment as done.