[PoC][RISCV] Define a symbol flags and a dynamic tag to avoid lazy binding for vector calls.

[HsiangKai]

Summary

This is the primitive work for https://github.com/riscv/riscv-elf-psabi-doc/pull/190.

Functions with vector arguments will use vector registers to pass
arguments, In the dynamic linker resolver, we plan not to save/restore
the vector argument registers for lazy binding efficiency. To avoid
ruining the vector arguments by the dynamic linker resolver, functions
with vector arguments will not go through the resolver.

To achieve the goal, we will annotate the function symbols with
STO_RISCV_VARIANT_CC flag and add DT_RISCV_VARIANT_CC tag in the dynamic
section. For assembler, we add a new directive, .variant_cc, to annotate
the symbol has special calling convention and does not go through the
resolver.

[HsiangKai]

Related discussions in RISC-V psABI is here. https://github.com/riscv/riscv-elf-psabi-doc/issues/66

[craig.topper]

llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp

156

Put with the other emitDirective* methods?

llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h

42

Maybe put this with the other emitDirective* declarations?

llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

205

Use a reference liek the two functions right above this for consistency.

llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp

358 ↗

(On Diff #348885)

This is incorrect if the element size of the vector is larger than i64. Not sure how much that matters in practice since it would be pretty unusual to have such a vector argument/return.

I was really hoping to find a way to get this from Machine IR directly. MachineRegisterInfo does have a list of livein physical registers, but I can't find anywhere that knows what physical registers are used for returns

[jhenderson]

Could you please split this patch into a patch that adds the new enum values, which would include the llvm-readobj and yaml2obj/obj2yaml changes, and then another patch (or patches) with the rest in? The latter builds on the former, but the former doesn't need the latter to work.

llvm/tools/llvm-readobj/ELFDumper.cpp

1605

Nit: clang-format

[jrtc27]

llvm/tools/llvm-readobj/ELFDumper.cpp

3776

So if STO_RISCV_VARIANT_CC isn't set but another bit is we now don't print anything? This looks like a bug in the AArch64 code you've copied?

[HsiangKai]

Address comments.

[HsiangKai]

clang-format.

[HsiangKai]

Record IsVectorCall in RISCVMachineFunctionInfo.

[HsiangKai]

Move RISCVTargetStreamer::emitDirectiveVariantCC near to emitDirectiveXXX.

[jrtc27]

llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

203

RMFI?

[MaskRay]

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

2210

unneeded blank line

2216

unneeded blank line

2221

Delete // Eat the symbol which does not convey more information than the code

2223

comments are usually full sentences ending with .

2225

addErrorSuffix is generally not useful because the error contains the source line.

llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h

106

If Symbol is non-null, prefer a reference.