[8/11] patch series to port HWASAN for riscv64
Depends On D132994
smd on Aug 30 2022, 11:18 PM.Authored by
Is the tagging actually incompatible with the code model or only with the address materialization instructions that we use as part of the implementation of the code model? Does the tagging actually change the location of globals? I was assuming the location was the same, and the tag was just changing how we encoded that location in a numerical value. My understanding of the code model specifications is that they only care about the actual address ranges. Although the RISC-V psABI gives examples of instruction sequences my interpretation of that is that it's non-normative. So if the location doesn't actually change in principle you could materialize those with a different instruction sequence and still claim you comply with the code model, is that not the case? That only impacts the comments in the patch, I'm not opposed to the approach of using the GOT.
The overall patch LGTM.
No, it doesn't.
Yes, you're right.
I guess that you're right. However from what I can tell, this would require to make linker to distinguish different kind of addresses of variables. I guess that's why ARM has a separate symbol for such tags.
I'll fix the comments as you suggested, thanks.