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[Triple] Add llvm::Triple::isRISCV{32,64}
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Authored by smd on Aug 6 2022, 2:43 PM.

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smd created this revision.Aug 6 2022, 2:43 PM
Herald added a project: Restricted Project. · View Herald TranscriptAug 6 2022, 2:43 PM
smd retitled this revision from [RISC-V][HWASAN] Add intrinsics required for HWASAN support for RISC-V to [RISC-V] Add explicit check for risc-v 32/64 bit triples.Aug 6 2022, 3:05 PM
smd added a project: Restricted Project.
smd published this revision for review.Aug 7 2022, 3:28 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 7 2022, 3:28 AM

LGTM. This makes sense. It may also simplify some of https://reviews.llvm.org/D128612

vitalybuka accepted this revision.Aug 9 2022, 3:32 PM
This revision is now accepted and ready to land.Aug 9 2022, 3:32 PM
MaskRay accepted this revision.Aug 9 2022, 4:03 PM
MaskRay added a subscriber: MaskRay.
MaskRay added inline comments.
llvm/include/llvm/ADT/Triple.h
862

The order "32-bit RISC-V" is more common.

smd updated this revision to Diff 451354.Aug 9 2022, 10:11 PM

Addressing comments

llvm/include/llvm/ADT/Triple.h
862

Fixed, thanks

craig.topper added a comment.EditedAug 9 2022, 10:28 PM

Can we re-title this revision to something like [Triple] Add isRISCV32 and isRISCV64? First reading of the phrase "add explicit check" makes me think there's an if statement being added somewhere.

smd retitled this revision from [RISC-V] Add explicit check for risc-v 32/64 bit triples to [Triple] Add llvm::Triple::isRISCV{32,64}.Aug 10 2022, 7:41 AM
smd edited the summary of this revision. (Show Details)
smd added a comment.Aug 10 2022, 7:41 AM

Can we re-title this revision to something like [Triple] Add isRISCV32 and isRISCV64? First reading of the phrase "add explicit check" makes me think there's an if statement being added somewhere.

Sure, should fixed now.

smd edited the summary of this revision. (Show Details)Aug 10 2022, 7:42 AM
MaskRay accepted this revision.Aug 11 2022, 12:08 PM
craig.topper accepted this revision.Aug 11 2022, 12:09 PM
This revision was landed with ongoing or failed builds.Aug 13 2022, 6:51 PM
Closed by commit rGb2f31cac28c8: [Triple] Add llvm::Triple::isRISCV{32,64} (authored by smd, committed by MaskRay). · Explain Why
This revision was automatically updated to reflect the committed changes.