[ELF][PPC] Allow PT_LOAD to have overlapping p_offset ranges

[MaskRay]

Summary

This change affects the non-linker script case (precisely, when the
SECTIONS command is not used). It deletes 3 alignments at PT_LOAD
boundaries for the default case: the size of a powerpc64 binary can be
decreased by at most 192kb. The technique can be ported to other
targets.

Let me demonstrate the idea with a maxPageSize=65536 example:

When assigning the address to the first output section of a new PT_LOAD,
if the end p_vaddr of the previous PT_LOAD is 0x10020, we advance to
the next multiple of maxPageSize: 0x20000. The new PT_LOAD will thus
have p_vaddr=0x20000. Because p_offset and p_vaddr are congruent modulo
maxPageSize, p_offset will be 0x20000, leaving a p_offset gap [0x10020,
0x20000) in the output.

Alternatively, if we advance the position to 0x20020, the new PT_LOAD
will have p_vaddr=0x20020. We can pick either 0x10020 or 0x20020 for p_offset!
Obviously 0x10020 is the choice because it leaves no gap.
At runtime, p_vaddr will be rounded down by pagesize
(65536 if pagesize=maxPageSize). This PT_LOAD will load additional
initial contents from p_offset ranges [0x10000,0x10020), which will also
be loaded by the previous PT_LOAD. This is fine if -z noseparate-code is
in effect or if we are not transiting between executable and
non-executable segments.

ld.bfd -z noseparate-code leverages this technique to keep output small.
This patch implements the technique in lld, which is mostly effective on
targets with large defaultMaxPageSize (AArch64/MIPS/PPC: 65536). The 3
removed alignments can save almost 3*65536 bytes.

Two places that rely on p_vaddr%pagesize = 0 have to be updated.

1. We used to round p_memsz(PT_GNU_RELRO) up to commonPageSize (defaults to 4096 on all targets). Now p_vaddr%commonPageSize may be non-zero. The updated formula takes account of that factor.
2. Our TP offsets formulae are only correct if p_vaddr%p_align = 0. Fix them. See the updated comments in InputSection.cpp for details.
   
   On targets that we enable the technique (only PPC64 now), we can potentially make p_vaddr(PT_TLS)%p_align(PT_TLS) != 0 if sh_addralign(.tdata) < sh_addralign(.tbss)
   
   This exposes many problems in ld.so implementations, especially the offsets of dynamic TLS blocks. Known issues:
   
   FreeBSD 13.0-CURRENT rtld-elf (i386/amd64/powerpc/arm64) glibc (HEAD) i386 and x86_64 https://sourceware.org/bugzilla/show_bug.cgi?id=24606 musl<=1.1.22 on TLS Variant I architectures (aarch64/powerpc64/...)
   
   So, force p_vaddr%p_align = 0 by rounding dot up to p_align(PT_TLS).

The technique will be enabled (with updated tests) for other targets in
subsequent patches.

[MaskRay]

Fix ppc64 tests

[MaskRay]

Ready for review.

[MaskRay]

Add descriptions

[MaskRay]

Delete an unnecessary change in computeFileOffset

[MaskRay]

Simplify p_memsz of PT_GNU_RELRO

[MaskRay]

ELF/Writer.cpp

2390 ↗

(On Diff #210729)

@pcc I think after D29242, we may lose PROT_READ protection of the last page of PT_GNU_RELRO. (This patch should keep the behavior unchanged.)

glibc/musl essentially do:

start = p_vaddr & -pagesize
mprotect(start, (p_vaddr+p_memsz & -pagesize) - start, PROT_READ)

The last page is unprotected if maxPageSize > pagesize >= commonPageSize.

I guess that may be why ld.bfd aligns the end of PT_GNU_RELRO, instead of its start.

[MaskRay]

Discussed with dalias, let me summary the findings (this goes beyond the scope of this patch...):

1. FreeBSD rtld.c is wrong: its last page of PT_GNU_RELRO may not be protected:

// if p_vaddr%pagesz != 0, relro_size may not cover the last page.
obj->relro_page = obj->relocbase + trunc_page(ph->p_vaddr);
obj->relro_size = round_page(ph->p_memsz);

2. ld.bfd seems to align the end of PT_GNU_RELRO to common-page-size (can be observed with -z relro -z max-page-size=0x200000 -z common-page-size=0x4000). This may leave a gap before the RW. Moreover, if common-page-size < runtime pagesz <= max-page-size, the last page may not be protected. lld's current two RW approach (D58892) perfectly avoids the waste. This also has the implication that runtime pagesz cannot be larger than common-page-size.

3. The status quo (D29242) seems the best we can do. We cannot round p_memsz up to max-page-size. If RW(relro(...)) RW(non-relro(empty)), and runtime pagesz < max-page-size, mprotect invoked by ld.so (glibc/elf/dl-reloc.c:_dl_protect_relro and musl/ldso/dynlink.c:reloc_all) will have an out-of-range len. According to POSIX, [ENOMEM] Addresses in the range [addr,addr+len) are invalid for the address space of a process, or specify one or more pages which are not mapped.

4. If PT_GNU_RELRO could be redesigned, completely dropping p->p_memsz = alignTo(p->p_memsz, config->commonPageSize); and letting ld.so handle round-up would be better. We keep it so that (common-page-size = runtime pagesz) systems will get proper protection of the last page.

The best thing is to keep the lld behavior unchanged, and let ld.so round up p_memsz.

[MaskRay]

Don't force alignment for relro. It is unnecessary

[peter.smith]

As I understand it this will only affect the non-linker script case as fixSectionAlignments() will only be called when there is no script->hasSectionsCommand. It will be worth making this clear in the description. I expect to get equivalent behaviour in the linker script we'd need to alter the implementation of DATA_SEGMENT_ALIGN in ScriptParser.cpp.

I would like to do a bit more research about RELRO, as I can't see from this patch alone. I think it is fine if RELRO is double mapped into an RO page. However if RELRO is adjacent to RW segments I think it could be a bad idea to have something like

VA [0x10000, 0x10020)	.data.rel.ro	PA [0x10000, 0x10020)
VA [0x20020, ...)	.data	PA [0x10020, ...)

As in theory (I'm not sure about how this works in the OS/loader so I could have this wrong) if the physical contents of .data was mapped RW from 0x10000 -> 0x20000 we'd have an ability to write to the .data.rel.ro via .data.

Is there some other part of the code that prevents this or does some other mechanism in the loader/OS prevent this from happening?

ELF/Writer.cpp

2211 ↗

(On Diff #210780)

Does this comment need updating. What does page aligned mean now? Moreover does the comment about PT_GNU_RELRO make sense?

2215 ↗

(On Diff #210780)

I suggest prev or prevPhdr rather than last, or perhaps lastSeen. At a glance last on its own can imply the final Phdr.

2220 ↗

(On Diff #210780)

Suggest: "When -z separate-code is used we must not have any overlap in pages between an executable segment and a non-executable segment. We align to the next maximum page size boundary on transitions between executable and non-executable segments.

[peter.smith]

I would like to do a bit more research about RELRO, as I can't see from this patch alone. I think it is fine if RELRO is double mapped into an RO page. However if RELRO is adjacent to RW segments I think it could be a bad idea to have something like

VA [0x10000, 0x10020)	.data.rel.ro	PA [0x10000, 0x10020)
VA [0x20020, ...)	.data	PA [0x10020, ...)

As in theory (I'm not sure about how this works in the OS/loader so I could have this wrong) if the physical contents of .data was mapped RW from 0x10000 -> 0x20000 we'd have an ability to write to the .data.rel.ro via .data.

Is there some other part of the code that prevents this or does some other mechanism in the loader/OS prevent this from happening?

To answer my own question https://sourceware.org/binutils/docs-2.32/ld/Builtin-Functions.html has DATA_SEGMENT_RELRO_END which mentions:

DATA_SEGMENT_ALIGN is padded so that exp + offset is aligned to the commonpagesize argument given to DATA_SEGMENT_ALIGN

There is also the comment in DATA_SEGMENT_ALIGN

commonpagesize should be less or equal to maxpagesize and should be the system page size the object wants to be optimized for while still running on system page sizes up to maxpagesize. Note however that ‘-z relro’ protection will not be effective if the system page size is larger than commonpagesize.

So this implies that if you are on a linux distro with a 64k page size and you want full relro protection you must increase the common page size to match the max page size.

[MaskRay]

Address review comments

[MaskRay]

This comment was removed by MaskRay.

[MaskRay]

I would like to do a bit more research about RELRO, as I can't see from this patch alone. I think it is fine if RELRO is double mapped into an RO page.

Yes, the RELRO region may be double mapped.

As in theory (I'm not sure about how this works in the OS/loader so I could have this wrong) if the physical contents of .data was mapped RW from 0x10000 -> 0x20000 we'd have an ability to write to the .data.rel.ro via .data.

This should not be a concern. PT_LOAD segments are mapped with the MAP_PRIVATE flag. The contents are copy-on-write and not shared between two maps:

MAP_PRIVATE
   Create  a  private copy-on-write mapping.  Updates to the mapping are not visible to other pro‐
   cesses mapping the same file, and are not carried  through  to  the  underlying  file.   It  is
   unspecified  whether  changes  made to the file after the mmap() call are visible in the mapped
   region.

To answer my own question https://sourceware.org/binutils/docs-2.32/ld/Builtin-Functions.html has DATA_SEGMENT_RELRO_END which mentions:

There is also the comment in DATA_SEGMENT_ALIGN

Thanks for the reference! I see that document partly answered my point 5 above (https://reviews.llvm.org/D64906#1592854). Their choice is to avoid maxpagesize alignment at the end of PT_GNU_RELRO, but there can still be a commonpagesize alignment at DATA_SEGMENT_ALIGN. The downside is that the last page may not be protected (common case on PPC: commonpagesize=4k, pagesz=maxpagesize=64k).

Since D58892, we have two RW segments: RW(relro) + RW(non-relro). By allowing double mapped RELRO contents, we don't have an alignment. (Our .got and .got.plt are separate - which has been the case for a long time. There seems no issue with it.)

[MaskRay]

Align the RW PT_LOAD which includes PT_TLS, and add ppc64-tls-vaddr-align.s

A stage2 check-llvm check-clang check-lld passed before this revision. But
when I test this patch (the x86_64 version) in our internal code base, I
noticed PT_TLS may not satisfy p_vaddr%p_align=0. This update fixes the issue.

[MaskRay]

Fix TP offset computation if p_vaddr % p_align != 0

[MaskRay]

Fix gcc 8 -Wparentheses

Passed stage 2 check-llvm check-clang check-lld on a powerpc64le machine

[MaskRay]

Comment about static TLS blocks Variants 1 and 2.

[MaskRay]

ELF/InputSection.cpp

611 ↗

(On Diff #211406)

@peter.smith Moved the comment here because this mostly applies on other Variant I targets (PPC,RISC-V,...).

[MaskRay]

Reword the comment about TLS

[MaskRay]

Add a p_vaddr%p_align = 0 hack to work around some ld.so bugs

[MaskRay]

Edit a comment: FreeBSD rtld-elf amd64 has the same bug as glibc(i386 x86-64) https://sourceware.org/bugzilla/show_bug.cgi?id=24606

[MaskRay]

D64903 is committed. This patch is ready now. It can delete 3 alignments at PT_LOAD boundaries (because -z noseparate-code is the default): it can decrease the size of a powerpc64 executable/shared object by at most 192kb (it can save more than 96kb on average).

[peter.smith]

I'm happy to go ahead as this is a pre-requisite for supporting AArch64.

[MaskRay]

Update description to mention ld.so bugs (why we have to add a workaround)

[MaskRay]

Move AArch64 TLS formula here

[MaskRay]

🥳It would be nice to get this in. Recently I learned that Brandon Bergren at FreeBSD used a local patch to fix the powerpc64 size regression caused by lld:

  // We need 64K pages (at least under glibc/Linux, the loader won't
  // set different permissions on a finer granularity than that).
-  defaultMaxPageSize = 65536;
+ defaultMaxPageSize = 4096;

(It works for them because they use 4k pagesize, but a general fix (this patch) will be preferable.) D64906 is also a prerequisite for aarch64 support, which many more people may want.

[Bdragon28]

It turns out I need the proper fix after all in my local tree, because lately I have been working on getting a working Petitboot loader binary, and that means I'm technically cross compiling code for ppc64le Linux. So yeah, it would be very nice to get this in.

[ruiu]

LGTM

[MaskRay]

Rebase. 3 ppc tests have changed recently.

[troyj]

p->p_memsz = alignTo(p->p_offset + p->p_memsz, config->commonPageSize) - p->p_offset;

I think the whole rounding step is questionable, not simply this change to it. As far as I can tell from researching this, the rounding down that occurs is for the starting address to place RELRO on a page boundary. The size of RELRO does not get rounded down, so rounding it up here by any amount risks making more data read-only than is necessary, which can lead to seg faults.

[MaskRay]

In D64906#1711802, @troyj wrote:

p->p_memsz = alignTo(p->p_offset + p->p_memsz, config->commonPageSize) - p->p_offset;

I think the whole rounding step is questionable, not simply this change to it. As far as I can tell from researching this, the rounding down that occurs is for the starting address to place RELRO on a page boundary. The size of RELRO does not get rounded down, so rounding it up here by any amount risks making more data read-only than is necessary, which can lead to seg faults.

p->p_memsz = alignTo(p->p_offset + p->p_memsz, config->commonPageSize) -
             p->p_offset;

is necessary. In GNU ld, the last page of RELRO may not be protected as documented. To make that page protected on all of glibc/musl/FreeBSD libc, the change like https://reviews.llvm.org/D28267 is needed. Please also read https://reviews.llvm.org/D64906#1592854

If you cannot use -z norelro, you may try -z separate-code or -z separate-loadable-segments (D67481)

[troyj]

Respectfully, I've read all of that plus https://www.airs.com/blog/archives/189, and we've arrived at different conclusions. I'm fine with maintaining a local patch; I just wanted to point it out in case it was useful to others upstream.

[MaskRay]

In D64906#1712768, @troyj wrote:

Respectfully, I've read all of that plus https://www.airs.com/blog/archives/189, and we've arrived at different conclusions. I'm fine with maintaining a local patch; I just wanted to point it out in case it was useful to others upstream.

Can you be more specific about how this conflicts with the blog post? Out of curiosity I want to learn why your software needs a local patch. I am 90% certain that that specific software makes unfounded assumption about the section/segment layout. GNU ld places PT_GNU_RELRO starting at a maxpagesize boundary and ending at a commonpagesize boundary. The last page may be unprotected. I agree that https://reviews.llvm.org/D29242 is not very ideal but it does not matter in practice: if runtime pagesize is smaller than commonpagesize(4096 on all targets but SPARCV9 that are supported by lld; 4096 on most targets supported by GNU ld), it can segfault.

There some some other differences, e.g. lld has .bss.rel.ro when no SECTIONS command is used. This was motivated by An Evil Copy: How the Loader Betrays You (I really dislike the misleading and exaggerated title) GNU ld and gold haven't implemented this. 2 RW schemes play well with PT_GNU_RELRO. etc

[troyj]

Can you be more specific about how this conflicts with the blog post?

The blog post says "Note that the current dynamic linker code will only work correctly if the PT_GNU_RELRO segment starts on a page boundary. This is because the dynamic linker rounds the p_vaddr field down to the previous page boundary." The lld code comment says "musl/glibc ld.so rounds the size down" and then proceeds to round the size up in what appears to be a countermeasure. So the blog post is talking about the starting address of the segment, but the lld code is rounding the size, not the starting address. For programs that I have linked, the starting address appears to already be on a page boundary, so no rounding is required there, and apply any rounding to the size results in an error because too much of the RW data segment gets marked RO.

Out of curiosity I want to learn why your software needs a local patch. I am 90% certain that that specific software makes unfounded assumption about the section/segment layout.

Yes, it makes assumptions that may be unfounded but happen to match ld.bfd and ld.gold behavior. Specifically, it assumes that the linker creates a single RW segment like ld.bfd and ld.gold, and that the starting address of that RW segment matches the starting address of the RELRO segment. I'm not aware of any rule that ld.lld violates by creating more than one RW segment, but it is inconvenient that it does not match the behavior of the other linkers. My local patch stops splitting the RW segment so that there is only one segment and then removes the rounding of the RELRO size. IF I leave the rounding in place, then the entire RW segment ends up being covered by the RELRO, which is bad because then the program can't write to any of its data. With the rounding removed, the emitted layout is much closer to the one emitted by ld.bfd and ld.gold.

The last page may be unprotected.

The last page being unprotected is better than incorrectly making the first page of writable data be RELRO. The former may miss identifying some programming errors or possibly open a security hole, but the latter certainly leads to the program crashing.

A better way might be to nudge the start of the writable data to begin later in the RW segment so that an integral number of initial pages can be RELRO, but ld.lld doesn't seem to do that and I'm not familiar with the code enough to add that myself. Hence, I'm settling for possibly not protecting all of the RO data until I know of a way to do the above.

[MaskRay]

In D64906#1717096, @troyj wrote:

Can you be more specific about how this conflicts with the blog post?

The blog post says "Note that the current dynamic linker code will only work correctly if the PT_GNU_RELRO segment starts on a page boundary. This is because the dynamic linker rounds the p_vaddr field down to the previous page boundary." The lld code comment says "musl/glibc ld.so rounds the size down" and then proceeds to round the size up in what appears to be a countermeasure. So the blog post is talking about the starting address of the segment, but the lld code is rounding the size, not the starting address. For programs that I have linked, the starting address appears to already be on a page boundary, so no rounding is required there, and apply any rounding to the size results in an error because too much of the RW data segment gets marked RO.

It is best not to interpret this as a doctrine. musl does mprotect(laddr(p, p->relro_start), p->relro_end-p->relro_start, PROT_READ) where relro_end is computed as (ph->p_vaddr + ph->p_memsz) & -PAGE_SIZE (glibc is similar). The changed formula matches how musl/glibc mprotect PT_GNU_RELRO. FreeBSD rounds the size up. I have said it can be problematic in one of my previous comments and reiterated in my previous comment to your question.

"PT_GNU_RELRO segment starts on a page boundary" does not preclude the possibility that p_vaddr%maxpagesize!=0.

Out of curiosity I want to learn why your software needs a local patch. I am 90% certain that that specific software makes unfounded assumption about the section/segment layout.

Yes, it makes assumptions that may be unfounded but happen to match ld.bfd and ld.gold behavior. Specifically, it assumes that the linker creates a single RW segment like ld.bfd and ld.gold, and that the starting address of that RW segment matches the starting address of the RELRO segment. I'm not aware of any rule that ld.lld violates by creating more than one RW segment, but it is inconvenient that it does not match the behavior of the other linkers. My local patch stops splitting the RW segment so that there is only one segment and then removes the rounding of the RELRO size. IF I leave the rounding in place, then the entire RW segment ends up being covered by the RELRO, which is bad because then the program can't write to any of its data. With the rounding removed, the emitted layout is much closer to the one emitted by ld.bfd and ld.gold.

Your software may need -z separate-loadable-segments, as I mentioned in my previous comments to your question. We still have 2 RW, but they don't have overlapping p_offset, and they can actually be merged into one. Put it in another way, after mprotect'ing PT_GNU_RELRO, the memory mapping layout is not different from the case when there is only one RW. If your program does not parse its program header, there should be no runtime perceivable behavior differences. Merging 2 RW into one can be seen as an optimization, and lld does not support it. I think it is fine because a program header just costs sizeof(Elf64_Phdr)=56 bytes on ELF64.

The last page may be unprotected.

The last page being unprotected is better than incorrectly making the first page of writable data be RELRO. The former may miss identifying some programming errors or possibly open a security hole, but the latter certainly leads to the program crashing.

A better way might be to nudge the start of the writable data to begin later in the RW segment so that an integral number of initial pages can be RELRO, but ld.lld doesn't seem to do that and I'm not familiar with the code enough to add that myself. Hence, I'm settling for possibly not protecting all of the RO data until I know of a way to do the above.

The current layout is R RX RW(RELRO) RW(non-RELRO). Android folks proposed an alternative layout in August https://lists.llvm.org/pipermail/llvm-dev/2019-August/134801.html You can find David Chisnall's and my replies. I am not convinced it improves things.

[troyj]

If your program does not parse its program header, there should be no runtime perceivable behavior differences.

It parses the program header. That's why it knows that there is more than one RW. It's looking for a single RW so that it can mremap its data, but it's confused when it finds more than one RW.

Merging 2 RW into one can be seen as an optimization, and lld does not support it.

Well....hold on. lld used to emit one RW prior to that patch, and now it doesn't. My issue is that I'm fine reverting the patch locally, but then RELRO overlaps the entire RW due to the rounding. So far I've tried eliminating the rounding, but now I'm trying it with the rounding restored and attempting to insert a dummy section prior to .data. to push .data. up to the next page boundary. I'm trying to figure that part out now, but it's not clear if I need to create it early as another synthetic section or if I can just create one in Writer.cpp.

[MaskRay]

In D64906#1718052, @troyj wrote:

If your program does not parse its program header, there should be no runtime perceivable behavior differences.

It parses the program header. That's why it knows that there is more than one RW. It's looking for a single RW so that it can mremap its data, but it's confused when it finds more than one RW.

Merging 2 RW into one can be seen as an optimization, and lld does not support it.

Well....hold on. lld used to emit one RW prior to that patch, and now it doesn't. My issue is that I'm fine reverting the patch locally, but then RELRO overlaps the entire RW due to the rounding.

My feeling is one RW partially overlapping PT_GNU_RELRO can be more problematic. Because lld does not have code to align a middle section in a segment to maxpagesize. "overlaps the entire RW due to the rounding" is indeed the problem you may face. I think the current lld segment layout is better than GNU linkers'.

So far I've tried eliminating the rounding, but now I'm trying it with the rounding restored and attempting to insert a dummy section prior to .data. to push .data. up to the next page boundary. I'm trying to figure that part out now, but it's not clear if I need to create it early as another synthetic section or if I can just create one in Writer.cpp.

I suggest that you update the software that parses RW. If you really want to keep a local lld patch that restores the original behavior (which I consider inferior), in Writer.cpp:fixSectionAlignments, sets addrExpr to align to the maxpagesize for the first section after the last PT_GNU_RELRO section.

[troyj]

I suggest that you update the software that parses RW. If you really want to keep a local lld patch that restores the original behavior (which I consider inferior) ...

Thank you for the advice. I understand from your perspective it is inferior, so I'm not trying to submit an upstream patch for this. I'm dealing with released software that is not receiving any further updates but will need to coexist with a new toolchain that uses lld. I can modify lld; I can't modify the other software.

lld/trunk/ELF/InputSection.cpp

 
 // A TLS symbol's virtual address is relative to the TLS segment. Add a
 // target-specific adjustment to produce a thread-pointer-relative offset.
 static int64_t getTlsTpOffset(const Symbol &s) {
   // On targets that support TLSDESC, _TLS_MODULE_BASE_@tpoff = 0.
   if (&s == ElfSym::tlsModuleBase)
     return 0;
 
+  // There are 2 TLS layouts. Among targets we support, x86 uses TLS Variant 2
+  // while most others use Variant 1. At run time TP will be aligned to p_align.
+
+  // Variant 1. TP will be followed by an optional gap (which is the size of 2
+  // pointers on ARM/AArch64, 0 on other targets), followed by alignment
+  // padding, then the static TLS blocks. The alignment padding is added so that
+  // (TP + gap + padding) is congruent to p_vaddr modulo p_align.
+  //
+  // Variant 2. Static TLS blocks, followed by alignment padding are placed
+  // before TP. The alignment padding is added so that (TP - padding -
+  // p_memsz) is congruent to p_vaddr modulo p_align.
+  elf::PhdrEntry *tls = Out::tlsPhdr;
   switch (config->emachine) {
+    // Variant 1.
   case EM_ARM:
   case EM_AARCH64:
-    // Variant 1. The thread pointer points to a TCB with a fixed 2-word size,
-    // followed by a variable amount of alignment padding, followed by the TLS
-    // segment.
-    return s.getVA(0) + alignTo(config->wordsize * 2, Out::tlsPhdr->p_align);
-  case EM_386:
-  case EM_X86_64:
-    // Variant 2. The TLS segment is located just before the thread pointer.
-    return s.getVA(0) - alignTo(Out::tlsPhdr->p_memsz, Out::tlsPhdr->p_align);
+    return s.getVA(0) + config->wordsize * 2 +
+           ((tls->p_vaddr - config->wordsize * 2) & (tls->p_align - 1));
   case EM_MIPS:
   case EM_PPC:
   case EM_PPC64:
-    // The thread pointer points to a fixed offset from the start of the
-    // executable's TLS segment. An offset of 0x7000 allows a signed 16-bit
-    // offset to reach 0x1000 of TCB/thread-library data and 0xf000 of the
-    // program's TLS segment.
-    return s.getVA(0) - 0x7000;
+    // Adjusted Variant 1. TP is placed with a displacement of 0x7000, which is
+    // to allow a signed 16-bit offset to reach 0x1000 of TCB/thread-library
+    // data and 0xf000 of the program's TLS segment.
+    return s.getVA(0) + (tls->p_vaddr & (tls->p_align - 1)) - 0x7000;
   case EM_RISCV:
-    return s.getVA(0);
+    return s.getVA(0) + (tls->p_vaddr & (tls->p_align - 1));
+
+    // Variant 2.
+  case EM_386:
+  case EM_X86_64:
+    return s.getVA(0) - tls->p_memsz -
+           ((-tls->p_vaddr - tls->p_memsz) & (tls->p_align - 1));
   default:
     llvm_unreachable("unhandled Config->EMachine");
   }
 }
 
 static uint64_t getRelocTargetVA(const InputFile *file, RelType type, int64_t a,
                                  uint64_t p, const Symbol &sym, RelExpr expr) {
   switch (expr) {

lld/trunk/ELF/Writer.cpp

void Writer<ELFT>::addPhdrForSection(Partition &part, unsigned shType,
   if (i == outputSections.end())
     return;
 
   PhdrEntry *entry = make<PhdrEntry>(pType, pFlags);
   entry->add(*i);
   part.phdrs.push_back(entry);
 }
 
-// The first section of each PT_LOAD, the first section in PT_GNU_RELRO and the
-// first section after PT_GNU_RELRO have to be page aligned so that the dynamic
-// linker can set the permissions.
+// Place the first section of each PT_LOAD to a different page (of maxPageSize).
+// This is achieved by assigning an alignment expression to addrExpr of each
+// such section.
 template <class ELFT> void Writer<ELFT>::fixSectionAlignments() {
-  auto pageAlign = [](OutputSection *cmd) {
-    if (cmd && !cmd->addrExpr)
-      cmd->addrExpr = [=] {
+  const PhdrEntry *prev;
+  auto pageAlign = [&](const PhdrEntry *p) {
+    OutputSection *cmd = p->firstSec;
+    if (cmd && !cmd->addrExpr) {
+      // Prefer advancing to align(dot, maxPageSize) + dot%maxPageSize to avoid
+      // padding in the file contents.
+      //
+      // When -z separate-code is used we must not have any overlap in pages
+      // between an executable segment and a non-executable segment. We align to
+      // the next maximum page size boundary on transitions between executable
+      // and non-executable segments.
+      //
+      // TODO Enable this technique on all targets.
+      bool enable = config->emachine == EM_PPC64;
+
+      if (!enable || (config->zSeparateCode && prev &&
+                      (prev->p_flags & PF_X) != (p->p_flags & PF_X)))
+        cmd->addrExpr = [] {
           return alignTo(script->getDot(), config->maxPageSize);
         };
+      // PT_TLS is at the start of the first RW PT_LOAD. If `p` includes PT_TLS,
+      // it must be the RW. Align to p_align(PT_TLS) to make sure
+      // p_vaddr(PT_LOAD)%p_align(PT_LOAD) = 0. Otherwise, if
+      // sh_addralign(.tdata) < sh_addralign(.tbss), we will set p_align(PT_TLS)
+      // to sh_addralign(.tbss), while p_vaddr(PT_TLS)=p_vaddr(PT_LOAD) may not
+      // be congruent to 0 modulo p_align(PT_TLS).
+      //
+      // Technically this is not required, but as of 2019, some dynamic loaders
+      // don't handle p_vaddr%p_align != 0 correctly, e.g. glibc (i386 and
+      // x86-64) doesn't make runtime address congruent to p_vaddr modulo
+      // p_align for dynamic TLS blocks (PR/24606), FreeBSD rtld has the same
+      // bug, musl (TLS Variant 1 architectures) before 1.1.23 handled TLS
+      // blocks correctly. We need to keep the workaround for a while.
+      else if (Out::tlsPhdr && Out::tlsPhdr->firstSec == p->firstSec)
+        cmd->addrExpr = [] {
+          return alignTo(script->getDot(), config->maxPageSize) +
+                 alignTo(script->getDot() % config->maxPageSize,
+                         Out::tlsPhdr->p_align);
+        };
+      else
+        cmd->addrExpr = [] {
+          return alignTo(script->getDot(), config->maxPageSize) +
+                 script->getDot() % config->maxPageSize;
+        };
+    }
   };
 
   for (Partition &part : partitions) {
+    prev = nullptr;
     for (const PhdrEntry *p : part.phdrs)
-      if (p->p_type == PT_LOAD && p->firstSec)
-        pageAlign(p->firstSec);
+      if (p->p_type == PT_LOAD && p->firstSec) {
+        pageAlign(p);
+        prev = p;
+      }
   }
 }
 
 // Compute an in-file position for a given section. The file offset must be the
 // same with its virtual address modulo the page size, so that the loader can
 // load executables without any address adjustment.
 static uint64_t computeFileOffset(OutputSection *os, uint64_t off) {
   // File offsets are not significant for .bss sections. By convention, we keep
if (first) {
       if (!p->hasLMA)
         p->p_paddr = first->getLMA();
     }
 
     if (p->p_type == PT_LOAD) {
       p->p_align = std::max<uint64_t>(p->p_align, config->maxPageSize);
     } else if (p->p_type == PT_GNU_RELRO) {
       p->p_align = 1;
-      // The glibc dynamic loader rounds the size down, so we need to round up
+      // musl/glibc ld.so rounds the size down, so we need to round up
       // to protect the last page. This is a no-op on FreeBSD which always
       // rounds up.
-      p->p_memsz = alignTo(p->p_memsz, config->commonPageSize);
+      p->p_memsz = alignTo(p->p_offset + p->p_memsz, config->commonPageSize) -
+                   p->p_offset;
     }
   }
 }
 
 // A helper struct for checkSectionOverlap.
 namespace {
 struct SectionOffset {
   OutputSection *sec;

lld/trunk/test/ELF/basic-ppc64.s

 // CHECK-NEXT:    FileVersion: 1
 // CHECK-NEXT:    OS/ABI: SystemV (0x0)
 // CHECK-NEXT:    ABIVersion: 0
 // CHECK-NEXT:    Unused: (00 00 00 00 00 00 00)
 // CHECK-NEXT:  }
 // CHECK-NEXT:  Type: SharedObject (0x3)
 // CHECK-NEXT:  Machine: EM_PPC64 (0x15)
 // CHECK-NEXT:  Version: 1
-// CHECK-NEXT:  Entry: 0x10000
+// CHECK-NEXT:  Entry: 0x1022C
 // CHECK-NEXT:  ProgramHeaderOffset: 0x40
-// CHECK-NEXT:  SectionHeaderOffset: 0x200F8
+// CHECK-NEXT:  SectionHeaderOffset: 0x330
 // CHECK-NEXT:  Flags [ (0x2)
 // CHECK-NEXT:    0x2
 // CHECK-NEXT:  ]
 // CHECK-NEXT:  HeaderSize: 64
 // CHECK-NEXT:  ProgramHeaderEntrySize: 56
 // CHECK-NEXT:  ProgramHeaderCount: 7
 // CHECK-NEXT:  SectionHeaderEntrySize: 64
 // CHECK-NEXT:  SectionHeaderCount: 11

 // CHECK-NEXT:  Section {
 // CHECK-NEXT:    Index: 4
 // CHECK-NEXT:    Name: .text (23)
 // CHECK-NEXT:    Type: SHT_PROGBITS (0x1)
 // CHECK-NEXT:    Flags [ (0x6)
 // CHECK-NEXT:      SHF_ALLOC (0x2)
 // CHECK-NEXT:      SHF_EXECINSTR (0x4)
 // CHECK-NEXT:    ]
-// CHECK-NEXT:    Address: 0x10000
-// CHECK-NEXT:    Offset: 0x10000
+// CHECK-NEXT:    Address: 0x1022C
+// CHECK-NEXT:    Offset: 0x22C
 // CHECK-NEXT:    Size: 12
 // CHECK-NEXT:    Link: 0
 // CHECK-NEXT:    Info: 0
 // CHECK-NEXT:    AddressAlignment: 4
 // CHECK-NEXT:    EntrySize: 0
 // CHECK-NEXT:    SectionData (
 // LE-NEXT:         0000: 01000038 37006038 02000044
 // BE-NEXT:         0000: 38000001 38600037 44000002
 // CHECK-NEXT:    )
 // CHECK-NEXT:  }
 // CHECK-NEXT:  Section {
 // CHECK-NEXT:    Index: 5
 // CHECK-NEXT:    Name: .dynamic (29)
 // CHECK-NEXT:    Type: SHT_DYNAMIC (0x6)
 // CHECK-NEXT:    Flags [ (0x3)
 // CHECK-NEXT:      SHF_ALLOC (0x2)
 // CHECK-NEXT:      SHF_WRITE (0x1)
 // CHECK-NEXT:    ]
-// CHECK-NEXT:    Address: 0x20000
-// CHECK-NEXT:    Offset: 0x20000
+// CHECK-NEXT:    Address: 0x20238
+// CHECK-NEXT:    Offset: 0x238
 // CHECK-NEXT:    Size: 96
 // CHECK-NEXT:    Link: 3
 // CHECK-NEXT:    Info: 0
 // CHECK-NEXT:    AddressAlignment: 8
 // CHECK-NEXT:    EntrySize: 16
 // CHECK-NEXT:    SectionData (
 // LE-NEXT:         0000: 06000000 00000000 00020000 00000000  |
 // LE-NEXT:         0010: 0B000000 00000000 18000000 00000000  |

 // CHECK-NEXT:  Section {
 // CHECK-NEXT:    Index: 6
 // CHECK-NEXT:    Name: .branch_lt (38)
 // CHECK-NEXT:    Type: SHT_NOBITS (0x8)
 // CHECK-NEXT:    Flags [ (0x3)
 // CHECK-NEXT:      SHF_ALLOC (0x2)
 // CHECK-NEXT:      SHF_WRITE (0x1)
 // CHECK-NEXT:    ]
-// CHECK-NEXT:    Address: 0x30000
-// CHECK-NEXT:    Offset: 0x20060
+// CHECK-NEXT:    Address: 0x30298
+// CHECK-NEXT:    Offset: 0x298
 // CHECK-NEXT:    Size: 0
 // CHECK-NEXT:    Link: 0
 // CHECK-NEXT:    Info: 0
 // CHECK-NEXT:    AddressAlignment: 8
 // CHECK-NEXT:    EntrySize: 0
 // CHECK-NEXT:  }
 // CHECK-NEXT:  Section {
 // CHECK-NEXT:    Index: 7
 // CHECK-NEXT:    Name: .comment (49)
 // CHECK-NEXT:    Type: SHT_PROGBITS (0x1)
 // CHECK-NEXT:    Flags [ (0x30)
 // CHECK-NEXT:      SHF_MERGE (0x10)
 // CHECK-NEXT:      SHF_STRINGS (0x20)
 // CHECK-NEXT:    ]
 // CHECK-NEXT:    Address: 0x0
-// CHECK-NEXT:    Offset: 0x20060
+// CHECK-NEXT:    Offset: 0x298
 // CHECK-NEXT:    Size: 8
 // CHECK-NEXT:    Link: 0
 // CHECK-NEXT:    Info: 0
 // CHECK-NEXT:    AddressAlignment: 1
 // CHECK-NEXT:    EntrySize: 1
 // CHECK-NEXT:    SectionData (
 // CHECK-NEXT:      0000: 4C4C4420 312E3000                    |LLD 1.0.|
 // CHECK-NEXT:    )
 // CHECK-NEXT:  }
 // CHECK-NEXT:  Section {
 // CHECK-NEXT:    Index: 8
 // CHECK-NEXT:    Name: .symtab (58)
 // CHECK-NEXT:    Type: SHT_SYMTAB (0x2)
 // CHECK-NEXT:    Flags [ (0x0)
 // CHECK-NEXT:    ]
 // CHECK-NEXT:    Address: 0x0
-// CHECK-NEXT:    Offset: 0x20068
+// CHECK-NEXT:    Offset: 0x2A0
 // CHECK-NEXT:    Size: 48
 // CHECK-NEXT:    Link: 10
 // CHECK-NEXT:    Info: 2
 // CHECK-NEXT:    AddressAlignment: 8
 // CHECK-NEXT:    EntrySize: 24
 // CHECK-NEXT:    SectionData (
-// LE-NEXT:         0000: 00000000 00000000 00000000 00000000  |................|
-// LE-NEXT:         0010: 00000000 00000000 01000000 00020500  |................|
-// LE-NEXT:         0020: 00000200 00000000 00000000 00000000  |................|
-// BE-NEXT:         0000: 00000000 00000000 00000000 00000000  |................|
-// BE-NEXT:         0010: 00000000 00000000 00000001 00020005  |................|
-// BE-NEXT:         0020: 00000000 00020000 00000000 00000000  |................|
+// LE-NEXT:         0000: 00000000 00000000 00000000 00000000
+// LE-NEXT:         0010: 00000000 00000000 01000000 00020500
+// LE-NEXT:         0020: 38020200 00000000 00000000 00000000
+// BE-NEXT:         0000: 00000000 00000000 00000000 00000000
+// BE-NEXT:         0010: 00000000 00000000 00000001 00020005
+// BE-NEXT:         0020: 00000000 00020238 00000000 00000000
 // CHECK-NEXT:    )
 // CHECK-NEXT:  }
 // CHECK-NEXT:  Section {
 // CHECK-NEXT:    Index: 9
 // CHECK-NEXT:    Name: .shstrtab (66)
 // CHECK-NEXT:    Type: SHT_STRTAB (0x3)
 // CHECK-NEXT:    Flags [ (0x0)
 // CHECK-NEXT:    ]
 // CHECK-NEXT:    Address: 0x0
-// CHECK-NEXT:    Offset: 0x20098
+// CHECK-NEXT:    Offset: 0x2D0
 // CHECK-NEXT:    Size: 84
 // CHECK-NEXT:    Link: 0
 // CHECK-NEXT:    Info: 0
 // CHECK-NEXT:    AddressAlignment: 1
 // CHECK-NEXT:    EntrySize: 0
 // CHECK-NEXT:    SectionData (
 // CHECK-NEXT:      0000: 002E6479 6E73796D 002E6861 7368002E  |..dynsym..hash..|
 // CHECK-NEXT:      0010: 64796E73 7472002E 74657874 002E6479  |dynstr..text..dy|
 // CHECK-NEXT:      0020: 6E616D69 63002E62 72616E63 685F6C74  |namic..branch_lt|
 // CHECK-NEXT:      0030: 002E636F 6D6D656E 74002E73 796D7461  |..comment..symta|
 // CHECK-NEXT:      0040: 62002E73 68737472 74616200 2E737472  |b..shstrtab..str|
 // CHECK-NEXT:      0050: 74616200                             |tab.|
 // CHECK-NEXT:    )
 // CHECK-NEXT:  }
 // CHECK-NEXT:  Section {
 // CHECK-NEXT:    Index: 10
 // CHECK-NEXT:    Name: .strtab (76)
 // CHECK-NEXT:    Type: SHT_STRTAB (0x3)
 // CHECK-NEXT:    Flags [ (0x0)
 // CHECK-NEXT:    ]
 // CHECK-NEXT:    Address: 0x0
-// CHECK-NEXT:    Offset: 0x200EC
+// CHECK-NEXT:    Offset: 0x324
 // CHECK-NEXT:    Size: 10
 // CHECK-NEXT:    Link: 0
 // CHECK-NEXT:    Info: 0
 // CHECK-NEXT:    AddressAlignment: 1
 // CHECK-NEXT:    EntrySize: 0
 // CHECK-NEXT:    SectionData (
 // CHECK-NEXT:      0000: 005F4459 4E414D49 4300               |._DYNAMIC.|
 // CHECK-NEXT:    )

 // CHECK-NEXT:    MemSize: 553
 // CHECK-NEXT:    Flags [ (0x4)
 // CHECK-NEXT:      PF_R (0x4)
 // CHECK-NEXT:    ]
 // CHECK-NEXT:    Alignment: 65536
 // CHECK-NEXT:  }
 // CHECK-NEXT:  ProgramHeader {
 // CHECK-NEXT:    Type: PT_LOAD (0x1)
-// CHECK-NEXT:    Offset: 0x10000
-// CHECK-NEXT:    VirtualAddress: 0x10000
-// CHECK-NEXT:    PhysicalAddress: 0x10000
+// CHECK-NEXT:    Offset: 0x22C
+// CHECK-NEXT:    VirtualAddress: 0x1022C
+// CHECK-NEXT:    PhysicalAddress: 0x1022C
 // CHECK-NEXT:    FileSize: 12
 // CHECK-NEXT:    MemSize: 12
 // CHECK-NEXT:    Flags [ (0x5)
 // CHECK-NEXT:      PF_R (0x4)
 // CHECK-NEXT:      PF_X (0x1)
 // CHECK-NEXT:    ]
 // CHECK-NEXT:    Alignment: 65536
 // CHECK-NEXT:  }
 // CHECK-NEXT:  ProgramHeader {
 // CHECK-NEXT:    Type: PT_LOAD (0x1)
-// CHECK-NEXT:    Offset: 0x20000
-// CHECK-NEXT:    VirtualAddress: 0x20000
-// CHECK-NEXT:    PhysicalAddress: 0x20000
+// CHECK-NEXT:    Offset: 0x238
+// CHECK-NEXT:    VirtualAddress: 0x20238
+// CHECK-NEXT:    PhysicalAddress: 0x20238
 // CHECK-NEXT:    FileSize: 96
 // CHECK-NEXT:    MemSize: 96
 // CHECK-NEXT:    Flags [ (0x6)
 // CHECK-NEXT:      PF_R (0x4)
 // CHECK-NEXT:      PF_W (0x2)
 // CHECK-NEXT:    ]
 // CHECK-NEXT:    Alignment: 65536
 // CHECK-NEXT:  }
 // CHECK-NEXT:  ProgramHeader {
 // CHECK-NEXT:    Type: PT_DYNAMIC (0x2)
-// CHECK-NEXT:    Offset: 0x20000
-// CHECK-NEXT:    VirtualAddress: 0x20000
-// CHECK-NEXT:    PhysicalAddress: 0x20000
+// CHECK-NEXT:    Offset: 0x238
+// CHECK-NEXT:    VirtualAddress: 0x20238
+// CHECK-NEXT:    PhysicalAddress: 0x20238
 // CHECK-NEXT:    FileSize: 96
 // CHECK-NEXT:    MemSize: 96
 // CHECK-NEXT:    Flags [ (0x6)
 // CHECK-NEXT:      PF_R (0x4)
 // CHECK-NEXT:      PF_W (0x2)
 // CHECK-NEXT:    ]
 // CHECK-NEXT:    Alignment: 8
 // CHECK-NEXT:  }
 // CHECK-NEXT:  ProgramHeader {
 // CHECK-NEXT:    Type: PT_GNU_RELRO (0x6474E552)
-// CHECK-NEXT:    Offset: 0x20000
-// CHECK-NEXT:    VirtualAddress: 0x20000
-// CHECK-NEXT:    PhysicalAddress: 0x20000
+// CHECK-NEXT:    Offset: 0x238
+// CHECK-NEXT:    VirtualAddress: 0x20238
+// CHECK-NEXT:    PhysicalAddress: 0x20238
 // CHECK-NEXT:    FileSize: 96
-// CHECK-NEXT:    MemSize: 4096
+// CHECK-NEXT:    MemSize: 3528
 // CHECK-NEXT:    Flags [ (0x4)
 // CHECK-NEXT:      PF_R (0x4)
 // CHECK-NEXT:    ]
 // CHECK-NEXT:    Alignment: 1
 // CHECK-NEXT:  }
 // CHECK-NEXT:  ProgramHeader {
 // CHECK-NEXT:    Type: PT_GNU_STACK (0x6474E551)
 // CHECK-NEXT:    Offset: 0x0

lld/trunk/test/ELF/ppc64-abs64-dyn.s

 # REQUIRES: ppc
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
 # RUN: ld.lld -shared %t.o -o %t.so
 # RUN: llvm-readobj -r %t.so | FileCheck %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
 # RUN: ld.lld -shared %t.o -o %t.so
 # RUN: llvm-readobj -r %t.so | FileCheck %s
 
 ## Test that we create R_PPC64_RELATIVE for R_PPC64_ADDR64 to non-preemptable
 ## symbols and R_PPC64_TOC in writable sections.
 
 ## FIXME the addend for offset 0x20000 should be TOC base+0x8000+1, not 0x80001.
 # CHECK:      .rela.dyn {
-# CHECK-NEXT:   0x20000 R_PPC64_RELATIVE - 0x8001
-# CHECK-NEXT:   0x20008 R_PPC64_RELATIVE - 0x20001
-# CHECK-NEXT:   0x20010 R_PPC64_ADDR64 external 0x1
-# CHECK-NEXT:   0x20018 R_PPC64_ADDR64 global 0x1
+# CHECK-NEXT:   0x303B0 R_PPC64_RELATIVE - 0x8001
+# CHECK-NEXT:   0x303B8 R_PPC64_RELATIVE - 0x303B1
+# CHECK-NEXT:   0x303C0 R_PPC64_ADDR64 external 0x1
+# CHECK-NEXT:   0x303C8 R_PPC64_ADDR64 global 0x1
 # CHECK-NEXT: }
 
 .data
 .globl global
 global:
 local:
 
 .quad .TOC.@tocbase + 1
 .quad local + 1
 .quad external + 1
 .quad global + 1

lld/trunk/test/ELF/ppc64-bsymbolic-toc-restore.s

 # CHECK-NEXT:    add 3, 3, 31
 # CHECK-NEXT:    addi 1, 1, 32
 # CHECK-NEXT:    ld 0, -16(1)
 # CHECK-NEXT:    mtlr 0
 # CHECK-NEXT:    blr
 # CHECK-EMPTY:
 # CHECK-NEXT:  def:
 # CHECK-NEXT:    addis 2, 12, 2
-# CHECK-NEXT:    addi 2, 2, -32616
+# CHECK-NEXT:    addi 2, 2, -32456
 # CHECK-NEXT:    li 3, 55
 # CHECK-NEXT:    blr

lld/trunk/test/ELF/ppc64-call-reach.s

 # REQUIRES: ppc
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
 # RUN: ld.lld --defsym callee=0x12010010 --defsym tail_callee=0x12010020 \
-# RUN: %t.o -o %t
+# RUN:   -z separate-code %t.o -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 # RUN: ld.lld --defsym callee=0x12010010 --defsym tail_callee=0x12010020 \
-# RUN: %t.o -o %t
+# RUN:   -z separate-code %t.o -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 # RUN: ld.lld --defsym callee=0xE010014 --defsym tail_callee=0xE010024 \
-# RUN: %t.o -o %t
+# RUN:   -z separate-code %t.o -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=NEGOFFSET  %s
 # RUN: ld.lld --defsym callee=0x12010018 --defsym tail_callee=0x12010028 \
-# RUN: %t.o -o %t
+# RUN:   -z separate-code %t.o -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=THUNK %s
 # RUN: llvm-readelf --sections %t | FileCheck --check-prefix=BRANCHLT %s
 # RUN: not ld.lld --defsym callee=0x1001002D --defsym tail_callee=0x1001002F \
-# RUN: %t.o -o %t 2>&1 | FileCheck --check-prefix=MISSALIGNED %s
+# RUN:   -z separate-code %t.o -o %t 2>&1 | FileCheck --check-prefix=MISSALIGNED %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
 # RUN: ld.lld --defsym callee=0x12010010 --defsym tail_callee=0x12010020 \
-# RUN: %t.o -o %t
+# RUN:   -z separate-code %t.o -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 # RUN: ld.lld --defsym callee=0x12010010 --defsym tail_callee=0x12010020 \
-# RUN: %t.o -o %t
+# RUN:   -z separate-code %t.o -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 # RUN: ld.lld --defsym callee=0xE010014 --defsym tail_callee=0xE010024 \
-# RUN: %t.o -o %t
+# RUN:   -z separate-code %t.o -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=NEGOFFSET  %s
 # RUN: ld.lld --defsym callee=0x12010018 --defsym tail_callee=0x12010028 \
-# RUN: %t.o -o %t
+# RUN:   -z separate-code %t.o -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=THUNK %s
 # RUN: llvm-readelf --sections %t | FileCheck --check-prefix=BRANCHLT %s
 # RUN: not ld.lld --defsym callee=0x1001002D --defsym tail_callee=0x1001002F \
-# RUN: %t.o -o %t 2>&1 | FileCheck --check-prefix=MISSALIGNED %s
+# RUN:   -z separate-code %t.o -o %t 2>&1 | FileCheck --check-prefix=MISSALIGNED %s
 
 # MISSALIGNED: ld.lld: error: {{.*}}.o:(.text+0x14): improper alignment for relocation R_PPC64_REL24: 0x19 is not aligned to 4 bytes
 # MISSALIGNED: ld.lld: error: {{.*}}.o:(.text+0x24): improper alignment for relocation R_PPC64_REL24: 0xB is not aligned to 4 bytes
 
         .global test
         .p2align        4
         .type   test,@function
 test:

 
 # THUNK-LABEL: test:
 # THUNK: 10010014:       bl .+20
 # THUNK: 10010024:       b .+20
 
 # .branch_lt[0]
 # THUNK-LABEL: __long_branch_callee:
 # THUNK-NEXT: 10010028:       addis 12, 2, 1
-# THUNK-NEXT:                 ld 12, -32768(12)
+# THUNK-NEXT:                 ld 12, -32760(12)
 # THUNK-NEXT:                 mtctr 12
 # THUNK-NEXT:                 bctr
 
 # .branch_lt[1]
 # THUNK-LABEL: __long_branch_tail_callee:
 # THUNK-NEXT: 10010038:       addis 12, 2, 1
-# THUNK-NEXT:                 ld 12, -32760(12)
+# THUNK-NEXT:                 ld 12, -32752(12)
 # THUNK-NEXT:                 mtctr 12
 # THUNK-NEXT:                 bctr
 
 # The offset from the TOC to the .branch_lt section  is (-1 << 16) - 32768.
 #                Name             Type            Address          Off    Size
 # BRANCHLT:     .got              PROGBITS        0000000010020000 020000 000008
-# BRANCHLT:     .branch_lt        PROGBITS        0000000010030000 030000 000010
+# BRANCHLT:     .branch_lt        PROGBITS        0000000010030008 020008 000010
 # BRANCHLT-NOT: .plt

lld/trunk/test/ELF/ppc64-dq.s

.Llep:
         stxv  3, qword@toc@l(3)
         blr
 
        .comm qword, 16, 16
 
 # Verify that we don't overwrite any of the extended opcode bits on a DQ form
 # instruction.
 # CHECK-LABEL: test
-# CHECK:         lxv 3, -32768(3)
-# CHECK:         stxv 3, -32768(3)
+# CHECK:         addis 3, 2, 1
+# CHECK-NEXT:    lxv 3, -32752(3)
+# CHECK-NEXT:    addis 3, 2, 1
+# CHECK-NEXT:    stxv 3, -32752(3)

lld/trunk/test/ELF/ppc64-dtprel.s

 // InputRelocs: R_PPC64_DTPREL64          {{[0-9a-f]+}} i + 8000
 
 // Expect a single dynamic relocation in the '.rela.dyn section for the module id.
 // OutputRelocs:      Relocation section '.rela.dyn' at offset 0x{{[0-9a-f]+}} contains 1 entries:
 // OutputRelocs-NEXT: Offset Info Type Symbol's Value Symbol's Name + Addend
 // OutputRelocs-NEXT: R_PPC64_DTPMOD64
 
 
-// The got entry for i is at .got+8*3 = 0x420510
+// The got entry for i is at .got+8*1 = 0x4209e0
 // i@dtprel = 1024 - 0x8000 = -31744 = 0xffffffffffff8400
 // HEX-LE:      section '.got':
-// HEX-LE-NEXT: 4204f8 f8844200 00000000 00000000 00000000
-// HEX-LE-NEXT: 420508 00000000 00000000
+// HEX-LE-NEXT: 4209d8 d8894200 00000000 00000000 00000000
+// HEX-LE-NEXT: 4209e8 00000000 00000000
 
 // HEX-BE:      section '.got':
-// HEX-BE-NEXT: 4204f8 00000000 004284f8 00000000 00000000
-// HEX-BE-NEXT: 420508 00000000 00000000
+// HEX-BE-NEXT: 4209d8 00000000 004289d8 00000000 00000000
+// HEX-BE-NEXT: 4209e8 00000000 00000000
 
 // Dis:     test:
 // Dis:      addi 4, 3, -31744
 // Dis-NEXT: lwa 4, -31744(3)
 
 // #k@dtprel(1024 + 4 + 1024 * 1024 * 4) = 0x400404
 
 // #highesta(k@dtprel) --> ((0x400404 - 0x8000 + 0x8000) >> 48) & 0xffff = 0

lld/trunk/test/ELF/ppc64-entry-point.s

.Lfunc_gep0:
 
   # exit 55
   li    0, 1
   li    3, 55
   sc
 .Lfunc_end0:
     .size   _start, .Lfunc_end0-.Lfunc_begin0
 
-# NM-DAG: 0000000010028000 d .TOC.
-# NM-DAG: 0000000010010000 T _start
+# NM-DAG: 00000000100281f0 d .TOC.
+# NM-DAG: 00000000100101d0 T _start
 
-# 0x10010000 = (4097<<16) + 0
-# CHECK:      10010000:       lis 4, 4097
-# CHECK-NEXT: 10010004:       addi 4, 4, 0
-# .TOC. - _start = (2<<16) - 32768
-# CHECK-NEXT: 10010008:       lis 5, 2
-# CHECK-NEXT: 1001000c:       addi 5, 5, -32768
+# 0x100101d0 = (4097<<16) + 464
+# CHECK:      100101d0:       lis 4, 4097
+# CHECK-NEXT: 100101d4:       addi 4, 4, 464
+# .TOC. - _start = (2<<16) - 32736
+# CHECK-NEXT: 100101d8:       lis 5, 2
+# CHECK-NEXT: 100101dc:       addi 5, 5, -32736

lld/trunk/test/ELF/ppc64-error-missaligned-dq.s

 # REQUIRES: ppc
 #
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
 # RUN: not ld.lld %t.o -o %t 2>&1 | FileCheck %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
 # RUN: not ld.lld %t.o -o %t 2>&1 | FileCheck %s
 
-# CHECK: improper alignment for relocation R_PPC64_TOC16_LO_DS: 0x8001 is not aligned to 16 bytes
+# CHECK: improper alignment for relocation R_PPC64_TOC16_LO_DS: 0x8009 is not aligned to 16 bytes
 
         .global test
         .p2align        4
         .type   test,@function
 test:
 .Lgep:
         addis 2, 12, .TOC.-.Lgep@ha
         addi  2, 2,  .TOC.-.Lgep@l
 .Llep:
         .localentry test, .Llep-.Lgep
         addis 3, 2, qword@toc@ha
         lxv   3, qword@toc@l(3)
         blr
 
+       .p2align 4
        .comm pad, 1, 1
        .comm qword, 16, 1
-

lld/trunk/test/ELF/ppc64-error-missaligned-ds.s

 # REQUIRES: ppc
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
 # RUN: not ld.lld %t.o -o %t 2>&1 | FileCheck %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
 # RUN: not ld.lld %t.o -o %t 2>&1 | FileCheck %s
 
-# CHECK: improper alignment for relocation R_PPC64_TOC16_LO_DS: 0x8001 is not aligned to 4 bytes
+# CHECK: improper alignment for relocation R_PPC64_TOC16_LO_DS: 0x8009 is not aligned to 4 bytes
 
         .global test
         .p2align        4
         .type   test,@function
 test:
 .Lgep:
         addis 2, 12, .TOC.-.Lgep@ha
         addi  2, 2,  .TOC.-.Lgep@l
 .Llep:
         .localentry test, .Llep-.Lgep
         addis 3, 2, word@toc@ha
         lwa   3, word@toc@l(3)
         blr
 
+       .p2align 4
        .comm pad, 1, 1
        .comm word, 4, 1
-

lld/trunk/test/ELF/ppc64-func-entry-points.s

 // REQUIRES: ppc
 
 // RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/ppc64-func-global-entry.s -o %t2.o
 // RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/ppc64-func-local-entry.s -o %t3.o
 // RUN: ld.lld -dynamic-linker /lib64/ld64.so.2 %t.o %t2.o %t3.o -o %t
-// RUN: llvm-objdump -d %t | FileCheck %s
+// RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
 // RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/ppc64-func-global-entry.s -o %t2.o
 // RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/ppc64-func-local-entry.s -o %t3.o
 // RUN: ld.lld -dynamic-linker /lib64/ld64.so.2 %t.o %t2.o %t3.o -o %t
-// RUN: llvm-objdump -d %t | FileCheck %s
+// RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
   .text
   .abiversion 2
   .globl  _start                    # -- Begin function _start
   .p2align  4
   .type _start,@function
 _start:                                   # @_start
 .Lfunc_begin0:

 glob:
   .long 10                      # 0xa
   .size glob, 4
 
 # Check that foo_external_diff has a global entry point and we branch to
 # foo_external_diff+8. Also check that foo_external_same has no global entry
 # point and we branch to start of foo_external_same.
 
-// CHECK: _start:
-// CHECK: 10010020:       {{.*}}     bl .+144
-// CHECK: 10010034:       {{.*}}     bl .+84
-// CHECK: foo_external_diff:
-// CHECK-NEXT: 10010080:       {{.*}}     addis 2, 12, 1
-// CHECK-NEXT: 10010084:       {{.*}}     addi 2, 2, 32640
-// CHECK-NEXT: 10010088:       {{.*}}     addis 5, 2, 1
-// CHECK: foo_external_same:
-// CHECK-NEXT: 100100b0:       {{.*}}     add 3, 4, 3
+// CHECK-LABEL: _start:
+// CHECK:         100101f0: bl .+144
+// CHECK:         10010204: bl .+84
+// CHECK-LABEL: foo_external_diff:
+// CHECK-NEXT:    10010250: addis 2, 12, 2
+// CHECK-NEXT:    10010254: addi 2, 2, -32696
+// CHECK-NEXT:    10010258: addis 5, 2, 1
+// CHECK-LABEL: foo_external_same:
+// CHECK-NEXT:    10010280: add 3, 4, 3

lld/trunk/test/ELF/ppc64-ifunc.s

 # REQUIRES: ppc
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
 # RUN: ld.lld %t.o -o %t
 # RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
 # RUN: llvm-readelf -S %t | FileCheck --check-prefix=SECTIONS %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 # RUN: llvm-readobj -r %t | FileCheck --check-prefix=REL %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
 # RUN: ld.lld %t.o -o %t
 # RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
 # RUN: llvm-readelf -S %t | FileCheck --check-prefix=SECTIONS %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 # RUN: llvm-readobj -r %t | FileCheck --check-prefix=REL %s
 
-# NM-DAG: 0000000010028000 d .TOC.
-# NM-DAG: 0000000010010000 T ifunc
-# NM-DAG: 0000000010010004 T ifunc2
+# NM-DAG: 0000000010028248 d .TOC.
+# NM-DAG: 00000000100101f8 T ifunc
+# NM-DAG: 00000000100101fc T ifunc2
 
-# SECTIONS: .plt NOBITS 0000000010030000
+# SECTIONS: .plt NOBITS 0000000010030250 000250 000010 00 WA 0 0 8
 
-# __plt_ifunc - . = 0x10010020 - 0x10010010 = 16
-# __plt_ifunc2 - . = 0x10010044 - 0x10010018 = 28
+# __plt_ifunc - . = 0x10010218 - 0x10010208 = 16
+# __plt_ifunc2 - . = 0x1001022c - 0x10010210 = 28
 # CHECK: _start:
-# CHECK-NEXT:                 addis 2, 12, 1
-# CHECK-NEXT:                 addi 2, 2, 32760
-# CHECK-NEXT: 10010010:       bl .+16
+# CHECK-NEXT:                 addis 2, 12, 2
+# CHECK-NEXT:                 addi 2, 2, -32696
+# CHECK-NEXT: 10010208:       bl .+16
 # CHECK-NEXT:                 ld 2, 24(1)
-# CHECK-NEXT: 10010018:       bl .+28
+# CHECK-NEXT: 10010210:       bl .+28
 # CHECK-NEXT:                 ld 2, 24(1)
 
-# .plt[0] - .TOC. = 0x10030000 - 0x10028000 = (1<<16) - 32768
+# .plt[0] - .TOC. = 0x10030250 - 0x10028248 = (1<<16) - 32760
 # CHECK: __plt_ifunc:
 # CHECK-NEXT:     std 2, 24(1)
 # CHECK-NEXT:     addis 12, 2, 1
-# CHECK-NEXT:     ld 12, -32768(12)
+# CHECK-NEXT:     ld 12, -32760(12)
 # CHECK-NEXT:     mtctr 12
 # CHECK-NEXT:     bctr
 
-# .plt[1] - .TOC. = 0x10030000+8 - 0x10028000 = (1<<16) - 32760
+# .plt[1] - .TOC. = 0x10030250+8 - 0x10028248 = (1<<16) - 32752
 # CHECK: __plt_ifunc2:
 # CHECK-NEXT:     std 2, 24(1)
 # CHECK-NEXT:     addis 12, 2, 1
-# CHECK-NEXT:     ld 12, -32760(12)
+# CHECK-NEXT:     ld 12, -32752(12)
 # CHECK-NEXT:     mtctr 12
 # CHECK-NEXT:     bctr
 
 ## Check that we emit 2 R_PPC64_IRELATIVE in .rela.dyn.
 ## glibc powerpc64 does not eagerly resolve R_PPC64_IRELATIVE if they are in .rela.plt.
 # REL:      .rela.dyn {
-# REL-NEXT:   0x10030000 R_PPC64_IRELATIVE - 0x10010000
-# REL-NEXT:   0x10030008 R_PPC64_IRELATIVE - 0x10010004
+# REL-NEXT:   0x10030250 R_PPC64_IRELATIVE - 0x100101F8
+# REL-NEXT:   0x10030258 R_PPC64_IRELATIVE - 0x100101FC
 # REL-NEXT: }
 
 .type ifunc STT_GNU_IFUNC
 .globl ifunc
 ifunc:
   nop
 
 .type ifunc2 STT_GNU_IFUNC

lld/trunk/test/ELF/ppc64-local-dynamic.s

 // REQUIRES: ppc
 
 // RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
-// RUN: ld.lld -shared %t.o -o %t.so
+// RUN: ld.lld -shared %t.o -z separate-code -o %t.so
 // RUN: llvm-readelf -r %t.o | FileCheck --check-prefix=InputRelocs %s
 // RUN: llvm-readelf -r %t.so | FileCheck --check-prefix=OutputRelocs %s
 // RUN: llvm-objdump --section-headers %t.so | FileCheck --check-prefix=CheckGot %s
 // RUN: llvm-objdump -d %t.so | FileCheck --check-prefix=Dis %s
 
 // RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
-// RUN: ld.lld -shared %t.o -o %t.so
+// RUN: ld.lld -shared %t.o -z separate-code -o %t.so
 // RUN: llvm-readelf -r %t.o | FileCheck --check-prefix=InputRelocs %s
 // RUN: llvm-readelf -r %t.so | FileCheck --check-prefix=OutputRelocs %s
 // RUN: llvm-objdump --section-headers %t.so | FileCheck --check-prefix=CheckGot %s
 // RUN: llvm-objdump -d %t.so | FileCheck --check-prefix=Dis %s
 
         .text
         .abiversion 2
         .globl  test

lld/trunk/test/ELF/ppc64-long-branch-localentry-offset.s

 # REQUIRES: ppc
 
 # RUN: llvm-mc -filetype=obj -triple=ppc64le %s -o %t.o
-# RUN: ld.lld %t.o -o %t
+# RUN: ld.lld %t.o -z separate-code -o %t
 # RUN: llvm-nm %t | FileCheck %s
 
 # CHECK-DAG: 0000000010010000 t __long_branch_callee
 # CHECK-DAG: 0000000010010010 T _start
 # CHECK-DAG: 0000000012010008 T callee
 
 # The bl instruction jumps to the local entry. The distance requires a long branch stub:
 # localentry(callee) - _start = 0x12010008+8 - 0x10010010 = 0x2000000

lld/trunk/test/ELF/ppc64-long-branch.s

 # REQUIRES: ppc
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
-# RUN: ld.lld --no-toc-optimize %t.o -o %t
+# RUN: ld.lld --no-toc-optimize -z separate-code %t.o -o %t
 # RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
 # RUN: llvm-readelf -x .branch_lt %t | FileCheck %s -check-prefix=BRANCH-LE
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
-# RUN: ld.lld --no-toc-optimize %t.o -o %t
+# RUN: ld.lld --no-toc-optimize -z separate-code %t.o -o %t
 # RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
 # RUN: llvm-readelf -x .branch_lt %t | FileCheck %s -check-prefix=BRANCH-BE
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
         .text
         .abiversion 2
         .protected callee
         .globl callee

 # __long_branch_callee - . = 0x12010050 - 0x12010034 = 20
 # __long_branch_callee is not a PLT call stub. Calling it does not need TOC
 # restore, so it doesn't have to be followed by a nop.
 # CHECK: _start:
 # CHECK:   12010034:       bl .+20
 # CHECK:   12010038:       bl .+16
 
 # BRANCH-LE:     section '.branch_lt':
-# BRANCH-LE-NEXT: 0x12030008 08000110 00000000
+# BRANCH-LE-NEXT: 0x12030018 08000110 00000000
 # BRANCH-BE:     section '.branch_lt':
-# BRANCH-BE-NEXT: 0x12030008 00000000 10010008
+# BRANCH-BE-NEXT: 0x12030018 00000000 10010008
 
-# .branch_lt - .TOC. = 0x12030008 - 0x12028000 = (1<<16) - 32760
+# .branch_lt - .TOC. = 0x12030018 - 0x12028000 = (1<<16) - 32744
 # CHECK:     __long_branch_callee:
 # CHECK-NEXT: 12010048:       addis 12, 2, 1
-# CHECK-NEXT:                 ld 12, -32760(12)
+# CHECK-NEXT:                 ld 12, -32744(12)
 # CHECK-NEXT:                 mtctr 12
 # CHECK-NEXT:                 bctr

lld/trunk/test/ELF/ppc64-plt-stub.s

 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
 # RUN: ld.lld -shared %t2.o -soname=t2.so -o %t2.so
 # RUN: ld.lld %t.o %t2.so -o %t
 # RUN: llvm-readelf -S -d %t | FileCheck --check-prefix=SEC %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
 ## DT_PLTGOT points to .plt
-# SEC: .plt NOBITS 0000000010030000 030000 000018
-# SEC: 0x0000000000000003 (PLTGOT) 0x10030000
+# SEC: .plt NOBITS 00000000100303e8 0003e8 000018
+# SEC: 0x0000000000000003 (PLTGOT) 0x100303e8
 
 ## .plt[0] holds the address of _dl_runtime_resolve.
 ## .plt[1] holds the link map.
 ## The JMP_SLOT relocation is stored at .plt[2]
 # RELOC: 0x10030010 R_PPC64_JMP_SLOT foo 0x0
 
 # CHECK:      _start:
-# CHECK:      10010008: bl .+16
+# CHECK:      10010298: bl .+16
 
-# CHECK-LABEL: 0000000010010018 __plt_foo:
+# CHECK-LABEL: 00000000100102a8 __plt_foo:
 # CHECK-NEXT:      std 2, 24(1)
-# CHECK-NEXT:      addis 12, 2, 0
-# CHECK-NEXT:      ld 12, 32560(12)
+# CHECK-NEXT:      addis 12, 2, 1
+# CHECK-NEXT:      ld 12, -32744(12)
 # CHECK-NEXT:      mtctr 12
 # CHECK-NEXT:      bctr
 
 
         .text
         .abiversion 2
         .globl  _start
         .p2align        4

lld/trunk/test/ELF/ppc64-rel-calls.s

 # REQUIRES: ppc
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t
 # RUN: ld.lld %t -o %t2
-# RUN: llvm-objdump -d %t2 | FileCheck %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t2 | FileCheck %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t
 # RUN: ld.lld %t -o %t2
-# RUN: llvm-objdump -d %t2 | FileCheck %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t2 | FileCheck %s
 
 # CHECK: Disassembly of section .text:
 # CHECK-EMPTY:
 
 .text
 .global _start
 _start:
 .Lfoo:
   li      0,1
   li      3,42
   sc
 
-# CHECK: 10010000:       {{.*}}     li 0, 1
-# CHECK: 10010004:       {{.*}}     li 3, 42
-# CHECK: 10010008:       {{.*}}     sc
+# CHECK: 10010158: li 0, 1
+# CHECK: 1001015c: li 3, 42
+# CHECK: 10010160: sc
 
 .global bar
 bar:
   bl _start
   nop
   bl .Lfoo
   nop
   blr
 
-# CHECK: 1001000c:       {{.*}}     bl .-12
-# CHECK: 10010010:       {{.*}}     nop
-# CHECK: 10010014:       {{.*}}     bl .-20
-# CHECK: 10010018:       {{.*}}     nop
-# CHECK: 1001001c:       {{.*}}     blr
+# CHECK:      10010164: bl .-12
+# CHECK-NEXT:           nop
+# CHECK-NEXT: 1001016c: bl .-20
+# CHECK-NEXT:           nop
+# CHECK-NEXT:           blr

lld/trunk/test/ELF/ppc64-reloc-rel.s

.section .REL32_AND_REL64,"ax",@progbits
   .cfi_endproc
 rel64:
   li 3, 0
 # REL:      .rela.eh_frame {
 # REL-NEXT:   0x12 R_PPC64_REL64 .REL32_AND_REL64 0x4
 # REL-NEXT:   0x28 R_PPC64_REL32 .REL32_AND_REL64 0x0
 # REL-NEXT: }
 
-# SEC: .REL32_AND_REL64 PROGBITS 0000000010010020
+# SEC: .REL32_AND_REL64 PROGBITS 00000000100101b4
 
-## CIE Personality Address: 0x10010020-(0x10000168+2)+4 = 0xfeba
-## FDE PC Begin: 0x10010020-(0x10000178+8) = 0xfea0
+## CIE Personality Address: 0x100101b4-(0x10000168+2)+4 = 0x1004e
+## FDE PC Begin: 0x100101b4-(0x10000178+8) = 0x10034
 # HEX:      section '.eh_frame':
 # HEX-NEXT: 0x10000158
-# HEX-NEXT: 0x10000168 {{....}}bafe 00000000
-# HEX-NEXT: 0x10000178 {{[0-9a-f]+}} {{[0-9a-f]+}} a0fe0000
+# HEX-NEXT: 0x10000168 {{....}}4e00 01000000 0000{{....}}
+# HEX-NEXT: 0x10000178 {{[0-9a-f]+}} {{[0-9a-f]+}} 34000100

lld/trunk/test/ELF/ppc64-relocs.s

 .section .toc,"aw",@progbits
 .L1:
   .quad 22, 37, 89, 47
 
 .section .R_PPC64_TOC16_LO_DS,"ax",@progbits
   ld 1, .L1@toc@l(2)
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_TOC16_LO_DS:
-# CHECK: 1001000c:       ld 1, -32768(2)
+# CHECK: ld 1, -32768(2)
 
 .section .R_PPC64_TOC16_LO,"ax",@progbits
   addi  1, 2, .L1@toc@l
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_TOC16_LO:
-# CHECK: 10010010:       addi 1, 2, -32768
+# CHECK: addi 1, 2, -32768
 
 .section .R_PPC64_TOC16_HI,"ax",@progbits
   addis 1, 2, .L1@toc@h
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_TOC16_HI:
-# CHECK: 10010014:       addis 1, 2, -1
+# CHECK: addis 1, 2, -1
 
 .section .R_PPC64_TOC16_HA,"ax",@progbits
   addis 1, 2, .L1@toc@ha
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_TOC16_HA:
-# CHECK: 10010018:       addis 1, 2, 0
+# CHECK: addis 1, 2, 0
 
 .section .R_PPC64_ADDR16_LO,"ax",@progbits
   li 1, .Lfoo@l
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_LO:
-# CHECK: li 1, 0
+# CHECK: li 1, 464
 
 .section .R_PPC64_ADDR16_HI,"ax",@progbits
   li 1, .Lfoo@h
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HI:
 # CHECK: li 1, 4097
 
 .section .R_PPC64_ADDR16_HA,"ax",@progbits
.section .R_PPC64_ADDR16_HIGHESTA,"ax",@progbits
   li 1, .Lfoo@highesta
 
 # CHECK-LABEL: Disassembly of section .R_PPC64_ADDR16_HIGHESTA:
 # CHECK: li 1, 0
 
 .section .R_PPC64_TOC,"a",@progbits
   .quad .TOC.@tocbase
 
-# SEC: .got PROGBITS 0000000010020000
+# SEC: .got PROGBITS 0000000010020208
 
-## tocbase = .got+0x8000 = 0x10028000
+## tocbase = .got+0x8000 = 0x10028208
 # DATALE-LABEL: section '.R_PPC64_TOC':
-# DATALE: 00800210 00000000
+# DATALE: 08820210 00000000
 
 # DATABE-LABEL: section '.R_PPC64_TOC':
-# DATABE: 00000000 10028000
+# DATABE: 00000000 10028208

lld/trunk/test/ELF/ppc64-shared-long_branch.s

 # REQUIRES: ppc
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
-# RUN: ld.lld --no-toc-optimize -shared %t.o -o %t
+# RUN: ld.lld --no-toc-optimize -shared -z separate-code %t.o -o %t
 # RUN: llvm-objdump -d -start-address=0x10000 -stop-address=0x10018  %t | FileCheck %s -check-prefix=CALLEE_DUMP
 # RUN: llvm-objdump -d -start-address=0x2010020 -stop-address=0x2010070  %t | FileCheck %s -check-prefix=CALLER_DUMP
 # RUN: llvm-readelf --sections %t | FileCheck %s -check-prefix=SECTIONS
 # RUN: llvm-readelf --relocations %t | FileCheck %s -check-prefix=DYNRELOC
 
 
 # _start calls protected function callee. Since callee is protected no plt stub
 # is needed. The binary however has been padded out with space so that the call

 # CALLEE_DUMP:   10004:  {{.*}}  addi 2, 2, -32528
 # CALLEE_DUMP:   10008:  {{.*}}  addis 4, 2, 0
 
 # Verify the address of _start, and the call to the long-branch thunk.
 # CALLER_DUMP: _start:
 # CALLER_DUMP:   2010020:  {{.*}}  addis 2, 12, 2
 # CALLER_DUMP:   2010038:  {{.*}}  bl .+56
 
-# Verify the thunks contents: TOC-pointer + offset = .branch_lt[0]
-#                             0x20280F0   + 32560  = 0x2030020
+## .branch_lt[0] - .TOC. = 
 # CALLER_DUMP: __long_branch_callee:
-# CALLER_DUMP:   2010060:  {{.*}}  addis 12, 2, 0
-# CALLER_DUMP:   2010064:  {{.*}}  ld 12, 32560(12)
+# CALLER_DUMP:   2010060:  {{.*}}  addis 12, 2, 1
+# CALLER_DUMP:   2010064:  {{.*}}  ld 12, -32712(12)
 # CALLER_DUMP:   2010068:  {{.*}}  mtctr 12
 # CALLER_DUMP:   201006c:  {{.*}}  bctr
 
 # .got section is at address 0x20300f0 so TOC pointer points to 0x20400F0.
 # .plt section has a 2 entry header and a single entry for the long branch.
 #            [Nr] Name        Type            Address          Off     Size
 # SECTIONS:  [10] .got        PROGBITS        00000000020200f0 20200f0 000008
-# SECTIONS:  [13] .plt        NOBITS          0000000002030008 2030008 000018
-# SECTIONS:  [14] .branch_lt  NOBITS          0000000002030020 2030008 000008
+# SECTIONS:  [13] .plt        NOBITS          0000000002030110 2020110 000018
+# SECTIONS:  [14] .branch_lt  NOBITS          0000000002030128 2020110 000008
 
 # There is a relative dynamic relocation for (.plt + 16 bytes), with a base
 # address equal to callees local entry point (0x10000 + 8).
 # DYNRELOC: Relocation section '.rela.dyn' at offset 0x{{[0-9a-f]+}} contains 3 entries:
 # DYNRELOC:    Offset             Info             Type               Symbol's Value
-# DYNRELOC:    0000000002030020   0000000000000016 R_PPC64_RELATIVE   10008
+# DYNRELOC:    0000000002030128   0000000000000016 R_PPC64_RELATIVE   10008

lld/trunk/test/ELF/ppc64-tls-gd.s

 # RUN: llvm-readelf -r %t | FileCheck --check-prefix=NOREL %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=LE %s
 
 # RUN: ld.lld %t.o %t1.so -o %t
 # RUN: llvm-readobj -r %t | FileCheck --check-prefix=IE-REL %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=IE %s
 
 # GD-REL:      .rela.dyn {
-# GD-REL-NEXT:   0x200F0 R_PPC64_DTPMOD64 a 0x0
-# GD-REL-NEXT:   0x200F8 R_PPC64_DTPREL64 a 0x0
-# GD-REL-NEXT:   0x20100 R_PPC64_DTPMOD64 b 0x0
-# GD-REL-NEXT:   0x20108 R_PPC64_DTPREL64 b 0x0
-# GD-REL-NEXT:   0x20110 R_PPC64_DTPMOD64 c 0x0
-# GD-REL-NEXT:   0x20118 R_PPC64_DTPREL64 c 0x0
+# GD-REL-NEXT:   0x20540 R_PPC64_DTPMOD64 a 0x0
+# GD-REL-NEXT:   0x20548 R_PPC64_DTPREL64 a 0x0
+# GD-REL-NEXT:   0x20550 R_PPC64_DTPMOD64 b 0x0
+# GD-REL-NEXT:   0x20558 R_PPC64_DTPREL64 b 0x0
+# GD-REL-NEXT:   0x20560 R_PPC64_DTPMOD64 c 0x0
+# GD-REL-NEXT:   0x20568 R_PPC64_DTPREL64 c 0x0
 # GD-REL-NEXT: }
 
 ## &DTPMOD(a) - .TOC. = &.got[0] - (.got+0x8000) = -32768
 # GD:      addis 3, 2, 0
 # GD-NEXT: addi 3, 3, -32768
 # GD-NEXT: bl .+40
 # GD-NEXT: ld 2, 24(1)
 

 # LE-NEXT: nop
 # LE-NEXT: addi 3, 3, -28660
 ## c@tprel = st_value(c)-0x7000 = -28656
 # LE-NEXT: addis 3, 13, 0
 # LE-NEXT: nop
 # LE-NEXT: addi 3, 3, -28656
 
 # IE-REL:      .rela.dyn {
-# IE-REL-NEXT:   0x100200C0 R_PPC64_TPREL64 b 0x0
-# IE-REL-NEXT:   0x100200C8 R_PPC64_TPREL64 c 0x0
+# IE-REL-NEXT:   0x10020418 R_PPC64_TPREL64 b 0x0
+# IE-REL-NEXT:   0x10020420 R_PPC64_TPREL64 c 0x0
 # IE-REL-NEXT: }
 
 ## a is relaxed to use LE.
 ## a@tprel = st_value(a)-0x7000 = -28664
 # IE:      nop
 # IE-NEXT: addis 3, 13, 0
 # IE-NEXT: nop
 # IE-NEXT: addi 3, 3, -28664

lld/trunk/test/ELF/ppc64-tls-ie.s

 # RUN: llvm-readobj -r %t.so | FileCheck --check-prefix=IE-REL %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t.so | FileCheck --check-prefix=IE %s
 ## IE -> LE
 # RUN: ld.lld %t.o -o %t
 # RUN: llvm-readelf -r %t | FileCheck --check-prefix=NOREL %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=LE %s
 
 # IE-REL:      .rela.dyn {
-# IE-REL-NEXT:   0x200B0 R_PPC64_TPREL64 c 0x0
-# IE-REL-NEXT:   0x200C0 R_PPC64_TPREL64 i 0x0
-# IE-REL-NEXT:   0x200C8 R_PPC64_TPREL64 l 0x0
-# IE-REL-NEXT:   0x200B8 R_PPC64_TPREL64 s 0x0
+# IE-REL-NEXT:   0x204A0 R_PPC64_TPREL64 c 0x0
+# IE-REL-NEXT:   0x204B0 R_PPC64_TPREL64 i 0x0
+# IE-REL-NEXT:   0x204B8 R_PPC64_TPREL64 l 0x0
+# IE-REL-NEXT:   0x204A8 R_PPC64_TPREL64 s 0x0
 # IE-REL-NEXT: }
 
 # INPUT-REL: R_PPC64_GOT_TPREL16_HA c 0x0
 # INPUT-REL: R_PPC64_GOT_TPREL16_LO_DS c 0x0
 # INPUT-REL: R_PPC64_TLS c 0x0
 ## &.got[0] - .TOC. = -32768
 # IE-LABEL: test1:
 # IE-NEXT:  addis 3, 2, 0

lld/trunk/test/ELF/ppc64-tls-vaddr-align.s

+# REQUIRES: ppc
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le %s -o %t.o
+# RUN: ld.lld %t.o -o %t
+# RUN: llvm-readelf -S -l %t | FileCheck --check-prefix=SEC %s
+# RUN: llvm-objdump -d %t | FileCheck --check-prefix=DIS %s
+
+# SEC: Name   Type     Address          Off    Size   ES Flg Lk Inf Al
+# SEC: .tdata PROGBITS 0000000010020300 000300 000001 00 WAT 0    0  1
+# SEC: .tbss  NOBITS   0000000010020400 000301 000008 00 WAT 0    0 256
+
+# SEC: Type Offset   VirtAddr           PhysAddr           FileSiz  MemSiz   Flg Align
+# SEC: TLS  0x000300 0x0000000010020300 0x0000000010020300 0x000001 0x000108 R   0x100
+
+## We currently have a hack in Writer.cpp:fixSectionAlignments() to force
+## p_vaddr(PT_TLS)%p_align(PT_TLS)=0, to work around bugs in some dynamic loaders.
+
+## p_vaddr rounded down to p_align has TP offset -0x7000.
+## The first address of PT_TLS (p_vaddr) has TP offset (p_vaddr%p_align - 0x7000).
+## Once we delete the hack, it is likely p_vaddr%p_align != 0.
+
+## a@tprel = st_value(a) + p_vaddr%p_align - 0x7000 = .tbss-.tdata + p_vaddr%p_align - 0x7000
+## = 0x10020400-0x10020300 + 0 - 0x7000 = -28416
+# DIS: ld 3, -28416(13)
+
+ld 3, a@tprel(13)
+
+.section .tdata,"awT"
+.byte 0
+
+.section .tbss,"awT"
+.p2align 8
+a:
+.quad 0

lld/trunk/test/ELF/ppc64-toc-addis-nop-lqsq.s

 # REQUIRES: ppc
+# XFAIL: *
 
 # RUN: llvm-readelf -relocations --wide  %p/Inputs/ppc64le-quadword-ldst.o | FileCheck --check-prefix=QuadInputRelocs %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
 # RUN: ld.lld -shared %t2.o -o %t2.so
 
 # RUN: ld.lld  %t2.so %p/Inputs/ppc64le-quadword-ldst.o -o %t
 # RUN: llvm-objdump -d %t | FileCheck --check-prefix=Dis %s

lld/trunk/test/ELF/ppc64-toc-addis-nop.s

 # REQUIRES: ppc
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
 # RUN: llvm-readelf -r %t.o | FileCheck --check-prefix=InputRelocs %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
-# RUN: ld.lld -shared %t2.o -o %t2.so
+# RUN: ld.lld -shared -soname=t2.so %t2.o -o %t2.so
+
+## Place all sections in the same segment so that .text and .TOC. are on the same page.
+# RUN: echo 'PHDRS { all PT_LOAD; }' > %t.script
 #
-# RUN: ld.lld  %t2.so %t.o -o %t
+# RUN: ld.lld %t2.so %t.o -T %t.script -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=Dis %s
 #
-# RUN: ld.lld --no-toc-optimize %t2.so %t.o -o %t
+# RUN: ld.lld %t2.so %t.o -T %t.script --no-toc-optimize -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=NoOpt %s
 
 # InputRelocs:  Relocation section '.rela.text'
 # InputRelocs:   R_PPC64_TOC16_HA
 # InputRelocs:   R_PPC64_TOC16_LO
 # InputRelocs:   R_PPC64_TOC16_LO_DS
 
 
.Lbytes_lep:
         lbz   3,    byteLd@toc@l(3)
         addis 4, 2, byteSt@toc@ha
         stb   3,    byteSt@toc@l(4)
         blr
 # Dis-LABEL: bytes:
 # Dis-NEXT:   addis
 # Dis-NEXT:   addi
 # Dis-NEXT:   nop
-# Dis-NEXT:   lbz   3, 32624(2)
+# Dis-NEXT:   lbz   3, -32752(2)
 # Dis-NEXT:   nop
-# Dis-NEXT:   stb   3, 32625(2)
+# Dis-NEXT:   stb   3, -32751(2)
 # Dis-NEXT:   blr
 
 # NoOpt-LABEL: bytes:
 # NoOpt-NEXT:     addis
 # NoOpt-NEXT:     addi
 # NoOpt-NEXT:     addis 3, 2, 0
-# NoOpt-NEXT:     lbz 3, 32624(3)
+# NoOpt-NEXT:     lbz 3, -32752(3)
 # NoOpt-NEXT:     addis 4, 2, 0
-# NoOpt-NEXT:     stb 3, 32625(4)
+# NoOpt-NEXT:     stb 3, -32751(4)
 # NoOpt-NEXT:     blr
 
         .global  halfs
         .p2align        4
         .type   halfs,@function
 halfs:
 .Lhalfs_gep:
         addis 2, 12, .TOC.-.Lhalfs_gep@ha
         addi  2, 2,  .TOC.-.Lhalfs_gep@l
 .Lhalfs_lep:
         .localentry  halfs, .Lhalfs_lep-.Lhalfs_gep
         addis 3, 2, halfLd@toc@ha
         lhz   3,    halfLd@toc@l(3)
         addis 4, 2, halfLd@toc@ha
         lha   4,    halfLd@toc@l(4)
         addis 5, 2, halfSt@toc@ha
         sth   4,    halfSt@toc@l(5)
         blr
 # Dis-LABEL: halfs:
 # Dis-NEXT:   addis
 # Dis-NEXT:   addi
 # Dis-NEXT:   nop
-# Dis-NEXT:   lhz   3, 32626(2)
+# Dis-NEXT:   lhz 3, -32750(2)
 # Dis-NEXT:   nop
-# Dis-NEXT:   lha 4, 32626(2)
+# Dis-NEXT:   lha 4, -32750(2)
 # Dis-NEXT:   nop
-# Dis-NEXT:   sth 4, 32628(2)
+# Dis-NEXT:   sth 4, -32748(2)
 # Dis-NEXT:   blr
 
 # NoOpt-LABEL: halfs:
 # NoOpt-NEXT:   addis
 # NoOpt-NEXT:   addi
 # NoOpt-NEXT:   addis 3, 2, 0
-# NoOpt-NEXT:   lhz   3, 32626(3)
+# NoOpt-NEXT:   lhz   3, -32750(3)
 # NoOpt-NEXT:   addis 4, 2, 0
-# NoOpt-NEXT:   lha 4, 32626(4)
+# NoOpt-NEXT:   lha 4, -32750(4)
 # NoOpt-NEXT:   addis 5, 2, 0
-# NoOpt-NEXT:   sth 4, 32628(5)
+# NoOpt-NEXT:   sth 4, -32748(5)
 # NoOpt-NEXT:   blr
 
 
         .global words
         .p2align        4
         .type   words,@function
 words:
 .Lwords_gep:
        addis 2, 12, .TOC.-.Lwords_gep@ha
        addi  2, 2,  .TOC.-.Lwords_gep@l
 .Lwords_lep:
        .localentry words, .Lwords_lep-.Lwords_gep
        addis 3, 2, wordLd@toc@ha
        lwz   3,    wordLd@toc@l(3)
        addis 4, 2, wordLd@toc@ha
        lwa   4,    wordLd@toc@l(4)
        addis 5, 2, wordSt@toc@ha
        stw   4,    wordSt@toc@l(5)
        blr
 # Dis-LABEL: words
 # Dis-NEXT:    addis
 # Dis-NEXT:    addi
 # Dis-NEXT:    nop
-# Dis-NEXT:    lwz 3, 32632(2)
+# Dis-NEXT:    lwz 3, -32744(2)
 # Dis-NEXT:    nop
-# Dis-NEXT:    lwa 4, 32632(2)
+# Dis-NEXT:    lwa 4, -32744(2)
 # Dis-NEXT:    nop
-# Dis-NEXT:    stw 4, 32636(2)
+# Dis-NEXT:    stw 4, -32740(2)
 # Dis-NEXT:    blr
 
 # NoOpt-LABEL: words
 # NoOpt-NEXT:    addis
 # NoOpt-NEXT:    addi
 # NoOpt-NEXT:    addis 3, 2, 0
-# NoOpt-NEXT:    lwz 3, 32632(3)
+# NoOpt-NEXT:    lwz 3, -32744(3)
 # NoOpt-NEXT:    addis 4, 2, 0
-# NoOpt-NEXT:    lwa 4, 32632(4)
+# NoOpt-NEXT:    lwa 4, -32744(4)
 # NoOpt-NEXT:    addis 5, 2, 0
-# NoOpt-NEXT:    stw 4, 32636(5)
+# NoOpt-NEXT:    stw 4, -32740(5)
 # NoOpt-NEXT:    blr
 
         .global doublewords
         .p2align        4
         .type   doublewords,@function
 doublewords:
 .Ldoublewords_gep:
        addis 2, 12, .TOC.-.Ldoublewords_gep@ha
        addi  2, 2,  .TOC.-.Ldoublewords_gep@l
 .Ldoublewords_lep:
        .localentry doublewords, .Ldoublewords_lep-.Ldoublewords_gep
         addis 3, 2, dwordLd@toc@ha
         ld    3,    dwordLd@toc@l(3)
         addis 4, 2, dwordSt@toc@ha
         std   3,    dwordSt@toc@l(4)
         blr
 
 # Dis-LABEL: doublewords
 # Dis-NEXT:    addis
 # Dis-NEXT:    addi
 # Dis-NEXT:    nop
-# Dis-NEXT:    ld 3, 32640(2)
+# Dis-NEXT:    ld 3, -32736(2)
 # Dis-NEXT:    nop
-# Dis-NEXT:    std 3, 32648(2)
+# Dis-NEXT:    std 3, -32728(2)
 # Dis-NEXT:    blr
 
 # NoOpt-LABEL: doublewords
 # NoOpt-NEXT:    addis
 # NoOpt-NEXT:    addi
 # NoOpt-NEXT:    addis 3, 2, 0
-# NoOpt-NEXT:    ld 3, 32640(3)
+# NoOpt-NEXT:    ld 3, -32736(3)
 # NoOpt-NEXT:    addis 4, 2, 0
-# NoOpt-NEXT:    std 3, 32648(4)
+# NoOpt-NEXT:    std 3, -32728(4)
 # NoOpt-NEXT:    blr
 
        .global vec_dq
        .p2align 4
         .type vec_dq,@function
 vec_dq:
 .Lvec_dq_gep:
         addis 2, 12, .TOC.-.Lvec_dq_gep@ha
         addi  2,  2, .TOC.-.Lvec_dq_gep@l
 .Lvec_dq_lep:
         .localentry  vec_dq, .Lvec_dq_lep-.Lvec_dq_gep
         addis 3, 2, vecLd@toc@ha
         lxv   3,    vecLd@toc@l(3)
         addis 3, 2, vecSt@toc@ha
         stxv  3,    vecSt@toc@l(3)
         blr
 
 # Dis-LABEL: vec_dq:
 # Dis-NEXT:    addis
 # Dis-NEXT:    addi
 # Dis-NEXT:    nop
-# Dis-NEXT:    lxv 3, 32656(2)
+# Dis-NEXT:    lxv 3, -32720(2)
 # Dis-NEXT:    nop
-# Dis-NEXT:    stxv 3, 32672(2)
+# Dis-NEXT:    stxv 3, -32704(2)
 # Dis-NEXT:    blr
 
 # NoOpt-LABEL: vec_dq:
 # NoOpt-NEXT:    addis
 # NoOpt-NEXT:    addi
 # NoOpt-NEXT:    addis 3, 2, 0
-# NoOpt-NEXT:    lxv 3, 32656(3)
+# NoOpt-NEXT:    lxv 3, -32720(3)
 # NoOpt-NEXT:    addis 3, 2, 0
-# NoOpt-NEXT:    stxv 3, 32672(3)
+# NoOpt-NEXT:    stxv 3, -32704(3)
 # NoOpt-NEXT:    blr
 
        .global vec_ds
        .p2align 4
         .type vec_ds,@function
 vec_ds:
 .Lvec_ds_gep:
         addis 2, 12, .TOC.-.Lvec_ds_gep@ha
         addi  2,  2, .TOC.-.Lvec_ds_gep@l
 .Lvec_ds_lep:
         .localentry  vec_ds, .Lvec_dq_lep-.Lvec_dq_gep
         addis  3, 2, vecLd@toc@ha
         lxsd   3,    vecLd@toc@l(3)
         addis  3, 2, vecSt@toc@ha
         stxsd  3,    vecSt@toc@l(3)
         addis  3, 2, vecLd@toc@ha
         lxssp  3,    vecLd@toc@l(3)
         addis  3, 2, vecSt@toc@ha
         stxssp 3,    vecSt@toc@l(3)
         blr
 # Dis-LABEL: vec_ds:
 # Dis-NEXT:   addis
 # Dis-NEXT:   addi
 # Dis-NEXT:   nop
-# Dis-NEXT:   lxsd 3, 32656(2)
+# Dis-NEXT:   lxsd 3, -32720(2)
 # Dis-NEXT:   nop
-# Dis-NEXT:   stxsd 3, 32672(2)
+# Dis-NEXT:   stxsd 3, -32704(2)
 # Dis-NEXT:   nop
-# Dis-NEXT:   lxssp 3, 32656(2)
+# Dis-NEXT:   lxssp 3, -32720(2)
 # Dis-NEXT:   nop
-# Dis-NEXT:   stxssp 3, 32672(2)
+# Dis-NEXT:   stxssp 3, -32704(2)
 # Dis-NEXT:   blr
 
 # NoOpt-LABEL: vec_ds:
 # NoOpt-NEXT:   addis
 # NoOpt-NEXT:   addi
 # NoOpt-NEXT:   addis 3, 2, 0
-# NoOpt-NEXT:   lxsd 3, 32656(3)
+# NoOpt-NEXT:   lxsd 3, -32720(3)
 # NoOpt-NEXT:   addis 3, 2, 0
-# NoOpt-NEXT:   stxsd 3, 32672(3)
+# NoOpt-NEXT:   stxsd 3, -32704(3)
 # NoOpt-NEXT:   addis 3, 2, 0
-# NoOpt-NEXT:   lxssp 3, 32656(3)
+# NoOpt-NEXT:   lxssp 3, -32720(3)
 # NoOpt-NEXT:   addis 3, 2, 0
-# NoOpt-NEXT:   stxssp 3, 32672(3)
+# NoOpt-NEXT:   stxssp 3, -32704(3)
 # NoOpt-NEXT:   blr
 
 
        .global byteLd
        .lcomm  byteLd, 1, 1
 
        .global byteSt
        .lcomm  byteSt, 1, 1

lld/trunk/test/ELF/ppc64-toc-rel.s

 
 # RELOCS-BE:      Relocations [
 # RELOCS-BE-NEXT:   .rela.text {
 # RELOCS-BE:          0xA R_PPC64_TOC16_HA global_a 0x0
 # RELOCS-BE:          0xE R_PPC64_TOC16_LO global_a 0x0
 
 # The .TOC. symbol represents the TOC base address: .got + 0x8000 = 0x10028000,
 # which is stored in the first entry of .got
-# NM: 0000000010028000 d .TOC.
-# NM: 0000000010030000 D global_a
+# NM: 00000000100281e8 d .TOC.
+# NM: 00000000100301f0 D global_a
 # HEX-LE:     section '.got':
-# HEX-LE-NEXT: 0x10020000 00800210 00000000
+# HEX-LE-NEXT: 0x100201e8 e8810210 00000000
 # HEX-BE:     section '.got':
-# HEX-BE-NEXT: 0x10020000 00000000 10028000
+# HEX-BE-NEXT: 0x100201e8 00000000 100281e8
 
 # r2 stores the TOC base address. To access global_a with r3, it
 # computes the address with TOC plus an offset.
-# The offset global_a - .TOC. = 0x10030000 - 0x10028000 = 0x8000
-# gets materialized as (1 << 16) - 32768.
+# global_a - .TOC. = 0x100301f0 - 0x100281e8 = (1 << 16) - 32760
 # CHECK:      _start:
-# CHECK:      10010008:       addis 3, 2, 1
-# CHECK-NEXT: 1001000c:       addi 3, 3, -32768
+# CHECK:      100101d0:       addis 3, 2, 1
+# CHECK-NEXT: 100101d4:       addi 3, 3, -32760

lld/trunk/test/ELF/ppc64-toc-relax-constants.s

 # REQUIRES: ppc
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unkown-linux %p/Inputs/ppc64-toc-relax-shared.s -o %t.o
-# RUN: ld.lld -shared %t.o -o %t.so
+# RUN: ld.lld -shared -soname=t.so %t.o -o %t.so
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t1.o
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/ppc64-toc-relax.s -o %t2.o
 # RUN: llvm-readobj -r %t1.o | FileCheck --check-prefix=RELOCS %s
 # RUN: ld.lld %t1.o %t2.o %t.so -o %t
 # RUN: llvm-readelf -S %t | FileCheck --check-prefix=SECTIONS %s
 # RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
 # RUN: llvm-objdump -D %t | FileCheck %s
 
 # In most cases, .toc contains exclusively addresses relocated by R_PPC64_ADDR16.
 # Rarely .toc contain constants or variables.
 # Test we can still perform toc-indirect to toc-relative relaxation.
 
 # RELOCS:      .rela.text {
 # RELOCS-NEXT:   0x0 R_PPC64_TOC16_HA .toc 0x0
 # RELOCS-NEXT:   0x4 R_PPC64_TOC16_LO_DS .toc 0x0
 # RELOCS-NEXT:   0x8 R_PPC64_TOC16_HA .toc 0x8
 # RELOCS-NEXT:   0xC R_PPC64_TOC16_LO_DS .toc 0x8
 # RELOCS-NEXT:   0x10 R_PPC64_TOC16_HA .toc 0x10
 # RELOCS-NEXT:   0x14 R_PPC64_TOC16_LO_DS .toc 0x10
 # RELOCS-NEXT: }
 
-# SECTIONS: .got              PROGBITS        0000000010020090
-# SECTIONS: .toc              PROGBITS        0000000010020090
+# SECTIONS: .got              PROGBITS        00000000100202f8
+# SECTIONS: .toc              PROGBITS        00000000100202f8
 
-# NM: 0000000010030000 D default
+# NM: 0000000010030310 D default
 
 # .LCONST1 is .toc[0].
-# .LCONST1 - (.got+0x8000) = 0x10020090 - (0x10020090+0x8000) = -32768
+# .LCONST1 - (.got+0x8000) = 0x10020350 - (0x10020350+0x8000) = -32768
 # CHECK: nop
 # CHECK: lwa 3, -32768(2)
   addis 3, 2, .LCONST1@toc@ha
   lwa 3, .LCONST1@toc@l(3)
 
 # .LCONST2 is .toc[1]
-# .LCONST2 - (.got+0x8000) = 0x10020098 - (0x10020090+0x8000) = -32760
+# .LCONST2 - (.got+0x8000) = 0x10020358 - (0x10020350+0x8000) = -32760
 # CHECK: nop
 # CHECK: ld 4, -32760(2)
   addis 4, 2, .LCONST2@toc@ha
   ld 4, .LCONST2@toc@l(4)
 
 # .Ldefault is .toc[2]. `default` is not preemptable when producing an executable.
 # After toc-indirection to toc-relative relaxation, it is loaded using an
 # offset relative to r2.
-# CHECK: nop
-# CHECK: addi 5, 2, 32624
+# CHECK: addis 5, 2, 1
+# CHECK: addi 5, 5, -32744
 # CHECK: lwa 5, 0(5)
   addis 5, 2, .Ldefault@toc@ha
   ld    5, .Ldefault@toc@l(5)
   lwa   5, 0(5)
 
 .section .toc,"aw",@progbits
 .LCONST1:
   .quad 11
 .LCONST2:
   .quad 22
 .Ldefault:
   .tc default[TC],default

lld/trunk/test/ELF/ppc64-toc-relax-ifunc.s

 # REQUIRES: ppc
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le %s -o %t.o
 # RUN: echo '.globl ifunc; .type ifunc, %gnu_indirect_function; ifunc:' | \
 # RUN:   llvm-mc -filetype=obj -triple=powerpc64le - -o %t1.o
 # RUN: ld.lld %t.o %t1.o -o %t
 # RUN: llvm-readelf -S -s %t | FileCheck --check-prefix=SEC %s
 # RUN: llvm-readelf -x .toc %t | FileCheck --check-prefix=HEX %s
 # RUN: llvm-objdump -d %t | FileCheck --check-prefix=DIS %s
 
 ## ifunc is a non-preemptable STT_GNU_IFUNC. The R_PPC64_ADDR64 in .toc
 ## creates a canonical PLT for it and changes its type to STT_FUNC. We can thus
 ## still perform toc-indirect to toc-relative relaxation because the distance
 ## to the address of the canonical PLT is fixed.
 
-# SEC: .text PROGBITS 0000000010010000
-# SEC: .plt  NOBITS   0000000010030000
-# SEC: 0000000010010010 0 FUNC GLOBAL DEFAULT 3 ifunc
+# SEC: .text PROGBITS 00000000100101e0
+# SEC: .plt  NOBITS   0000000010030200
+# SEC: 00000000100101f0 0 FUNC GLOBAL DEFAULT 3 ifunc
 
 ## .toc[0] stores the address of the canonical PLT.
 # HEX:      section '.toc':
-# HEX-NEXT: 0x10020000 10000110 00000000
+# HEX-NEXT: 0x100201f8 f0010110 00000000
 
 # REL:      .rela.dyn {
-# REL-NEXT:   0x10030000 R_PPC64_IRELATIVE - 0x10010008
+# REL-NEXT:   0x10030200 R_PPC64_IRELATIVE - 0x100101e8
 # REL-NEXT: }
 
 # DIS: addi 3, 3,
 
 addis 3, 2, .toc@toc@ha
 ld 3, .toc@toc@l(3)
 
 .section .toc,"aw",@progbits
   .quad ifunc

lld/trunk/test/ELF/ppc64-toc-relax-jumptable.s

 # RUN: llvm-objdump -d %t | FileCheck --check-prefixes=CHECK %s
 
 # .LJT is a local symbol (non-preemptable).
 # Test we can perform the toc-indirect to toc-relative relaxation.
 
 # SECTIONS: .rodata PROGBITS 00000000100001c8
 
 # HEX-LE:      section '.toc':
-# HEX-LE-NEXT: 10020008 c8010010 00000000
+# HEX-LE-NEXT: 10020228 c8010010 00000000
 
 # HEX-BE:      section '.toc':
-# HEX-BE-NEXT: 10020008 00000000 100001c8
+# HEX-BE-NEXT: 10020228 00000000 100001c8
 
 # CHECK-LABEL: _start
 # CHECK:       clrldi  3, 3, 62
-# CHECK-NEXT:  addis 4, 2, -2
-# CHECK-NEXT:  addi  4, 4, -32312
+# CHECK-NEXT:  addis 4, 2, -3
+# CHECK-NEXT:  addi  4, 4, 32680
 # CHECK-NEXT:  sldi  3, 3, 2
 
     .text
     .global _start
     .type _start, @function
 _start:
 .Lstart_gep:
     addis 2, 12, .TOC.-.Lstart_gep@ha

lld/trunk/test/ELF/ppc64-toc-relax.s

 # REQUIRES: ppc
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/ppc64-toc-relax-shared.s -o %t.o
-# RUN: ld.lld -shared %t.o -o %t.so
+# RUN: ld.lld -shared -soname=t.so %t.o -o %t.so
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t1.o
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/ppc64-toc-relax.s -o %t2.o
 # RUN: llvm-readobj -r %t1.o | FileCheck --check-prefixes=RELOCS-LE,RELOCS %s
 # RUN: ld.lld %t1.o %t2.o %t.so -o %t
+# RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefixes=COMMON,EXE %s
 
 # RUN: ld.lld -shared %t1.o %t2.o %t.so -o %t2.so
 # RUN: llvm-objdump -d --no-show-raw-insn %t2.so | FileCheck --check-prefixes=COMMON,SHARED %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/ppc64-toc-relax-shared.s -o %t.o
-# RUN: ld.lld -shared %t.o -o %t.so
+# RUN: ld.lld -shared -soname=t.so %t.o -o %t.so
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t1.o
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/ppc64-toc-relax.s -o %t2.o
 # RUN: llvm-readobj -r %t1.o | FileCheck --check-prefixes=RELOCS-BE,RELOCS %s
 # RUN: ld.lld %t1.o %t2.o %t.so -o %t
+# RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefixes=COMMON,EXE %s
 
 # RUN: ld.lld -shared %t1.o %t2.o %t.so -o %t2.so
 # RUN: llvm-objdump -d --no-show-raw-insn %t2.so | FileCheck --check-prefixes=COMMON,SHARED %s
 
 # RELOCS-LE:      .rela.text {
 # RELOCS-LE-NEXT:   0x0 R_PPC64_TOC16_HA .toc 0x0
 # RELOCS-LE-NEXT:   0x4 R_PPC64_TOC16_LO_DS .toc 0x0

 
 # RELOCS:         .rela.toc {
 # RELOCS-NEXT:      0x0 R_PPC64_ADDR64 hidden 0x0
 # RELOCS-NEXT:      0x8 R_PPC64_ADDR64 hidden2 0x0
 # RELOCS-NEXT:      0x10 R_PPC64_ADDR64 shared 0x0
 # RELOCS-NEXT:      0x18 R_PPC64_ADDR64 default 0x0
 # RELOCS-NEXT:    }
 
-# NM-DAG: 0000000010030000 D default
-# NM-DAG: 0000000010030000 d hidden
-# NM-DAG: 0000000010040000 d hidden2
+# NM-DAG: 00000000100303a0 D default
+# NM-DAG: 00000000100303a0 d hidden
+# NM-DAG: 00000000100403a0 d hidden2
 
 # 'hidden' is non-preemptable. It is relaxed.
-# address(hidden) - (.got+0x8000) = 0x10030000 - (0x100200c0+0x8000) = 32576
-# COMMON: nop
-# COMMON: addi 3, 2, 32576
+# address(hidden) - (.got+0x8000) = 0x100303a0 - (0x10020380+0x8000) = (1<<16) - 32736
+# COMMON: addis 3, 2, 1
+# COMMON: addi 3, 3, -32736
 # COMMON: lwa 3, 0(3)
   addis 3, 2, .Lhidden@toc@ha
   ld    3, .Lhidden@toc@l(3)
   lwa   3, 0(3)
 
-# address(hidden2) - (.got+0x8000) = 0x10040000 - (0x100200c0+0x8000) = (1<<16)+32576
-# COMMON: addis 3, 2, 1
-# COMMON: addi 3, 3, 32576
+# address(hidden2) - (.got+0x8000) = 0x100403a0 - (0x10020380+0x8000) = (2<<16) - 32736
+# COMMON: addis 3, 2, 2
+# COMMON: addi 3, 3, -32736
 # COMMON: lwa 3, 0(3)
   addis 3, 2, .Lhidden2@toc@ha
   ld    3, .Lhidden2@toc@l(3)
   lwa   3, 0(3)
 
 # 'shared' is not defined in an object file. Its definition is determined at
 # runtime by the dynamic linker, so the extra indirection cannot be relaxed.
 # The first addis can still be relaxed to nop, though.
 # COMMON: nop
 # COMMON: ld 4, -32752(2)
 # COMMON: lwa 4, 0(4)
   addis 4, 2, .Lshared@toc@ha
   ld    4, .Lshared@toc@l(4)
   lwa   4, 0(4)
 
 # 'default' has default visibility. It is non-preemptable when producing an executable.
-# address(default) - (.got+0x8000) = 0x10030000 - (0x100200c0+0x8000) = 32576
-# EXE: nop
-# EXE: addi 5, 2, 32576
+# address(default) - (.got+0x8000) = 0x100303a0 - (0x10020380+0x8000) = (1<<16) - 32736
+# EXE: addis 5, 2, 1
+# EXE: addi 5, 5, -32736
 # EXE: lwa 5, 0(5)
 
 # SHARED: nop
 # SHARED: ld 5, -32744(2)
 # SHARED: lwa 5, 0(5)
   addis 5, 2, .Ldefault@toc@ha
   ld    5, .Ldefault@toc@l(5)
   lwa   5, 0(5)

lld/trunk/test/ELF/ppc64-toc-restore-recursive-call.s

 # REQUIRES: ppc
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
 # RUN: ld.lld -shared %t.o -o %t.so
 # RUN: llvm-objdump -d --no-show-raw-insn -r %t.so | FileCheck %s
 
 # For a recursive call that is interposable the linker calls the plt-stub rather
 # then calling the function directly. Since the call is through a plt stub and
 # might be interposed with a different definition at runtime, a toc-restore is
 # required to follow the call.
 
 # The decision to use a plt-stub for the recursive call is not one I feel
 # strongly about either way. It was done because it matches what bfd and gold do
 # for recursive calls as well as keeps the logic for recursive calls consistent
 # with non-recursive calls.
 
-# CHECK-LABEL: 0000000000010000 recursive_func:
-# CHECK:       10028:       bl .+32
+# CHECK-LABEL: 0000000000010290 recursive_func:
+# CHECK:       102b8:       bl .+32
 # CHECK-NEXT:               ld 2, 24(1)
 
-# CHECK-LABEL: 0000000000010048 __plt_recursive_func:
+# CHECK-LABEL: 00000000000102d8 __plt_recursive_func:
 
         .abiversion 2
         .section ".text"
         .p2align 2
         .global recursive_func
         .type recursive_func, @function
 recursive_func:
 .Lrf_gep:

lld/trunk/test/ELF/ppc64-toc-restore.s

 // REQUIRES: ppc
 
 // RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
 // RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/ppc64-func.s -o %t3.o
-// RUN: ld.lld -shared %t2.o -o %t2.so
+// RUN: ld.lld -shared -soname=t2.so %t2.o -o %t2.so
 // RUN: ld.lld %t.o %t2.so %t3.o -o %t
 // RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
 // RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
 // RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/ppc64-func.s -o %t3.o
-// RUN: ld.lld -shared %t2.o -o %t2.so
+// RUN: ld.lld -shared -soname=t2.so %t2.o -o %t2.so
 // RUN: ld.lld %t.o %t2.so %t3.o -o %t
 // RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
     .text
     .abiversion 2
 .global bar_local
 bar_local:
   li 3, 2
   blr
 
 # Calling external function foo in a shared object needs a nop.
 # Calling local function bar_local doe not need a nop.
 .global _start
 _start:
   bl foo
   nop
   bl bar_local
 // CHECK-LABEL: _start:
-// CHECK-NEXT:  10010008:       bl .+64
-// CHECK-NEXT:  1001000c:       ld 2, 24(1)
-// CHECK-NEXT:  10010010:       bl .-16
+// CHECK-NEXT:  100102c8:       bl .+64
+// CHECK-NEXT:  100102cc:       ld 2, 24(1)
+// CHECK-NEXT:  100102d0:       bl .-16
 // CHECK-EMPTY:
 
 # Calling a function in another object file which will have same
 # TOC base does not need a nop. If nop present, do not rewrite to
 # a toc restore
 .global diff_object
 _diff_object:
   bl foo_not_shared
   bl foo_not_shared
   nop
 // CHECK-LABEL: _diff_object:
-// CHECK-NEXT:  10010014:       bl .+28
-// CHECK-NEXT:  10010018:       bl .+24
-// CHECK-NEXT:  1001001c:       nop
+// CHECK-NEXT:  100102d4:       bl .+28
+// CHECK-NEXT:  100102d8:       bl .+24
+// CHECK-NEXT:  100102dc:       nop
 
 # Branching to a local function does not need a nop
 .global noretbranch
 noretbranch:
   b bar_local
 // CHECK-LABEL: noretbranch:
-// CHECK:       10010020:        b .+67108832
+// CHECK:       100102e0:        b .+67108832
 // CHECK-EMPTY:
 
 // This should come last to check the end-of-buffer condition.
 .global last
 last:
   bl foo
   nop
 // CHECK-LABEL: last:
-// CHECK-NEXT:  10010024:       bl .+36
-// CHECK-NEXT:  10010028:       ld 2, 24(1)
+// CHECK-NEXT:  100102e4:       bl .+36
+// CHECK-NEXT:  100102e8:       ld 2, 24(1)

lld/trunk/test/ELF/ppc64-weak-undef-call.s

_start:
   blr
 
 .weak weakfunc
 
 # It does not really matter how we fixup the bl, if at all, because it needs to
 # be unreachable. But, we should link successfully. We should not, however,
 # generate a .plt entry (this would be wasted space). For now, we do nothing
 # (leaving the zero relative offset present in the input).
-# CHECK: 10010000:       bl .+0
-# CHECK: 10010004:       nop
-# CHECK: 10010008:       blr
+# CHECK: 10010158:       bl .+0
+# CHECK: 1001015c:       nop
+# CHECK: 10010160:       blr

lld/trunk/test/ELF/relro-copyrel-bss-script.s

 // REQUIRES: x86
 // RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %p/Inputs/shared.s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %p/Inputs/copy-in-shared.s -o %t2.o
-// RUN: ld.lld -shared %t.o %t2.o -o %t.so
+// RUN: ld.lld -shared -soname=t.so %t.o %t2.o -z separate-code -o %t.so
 
 // A linker script that will map .bss.rel.ro into .bss.
 // RUN: echo "SECTIONS { \
 // RUN: .bss : { *(.bss) *(.bss.*) } \
 // RUN: } " > %t.script
 
 // RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t3.o
-// RUN: ld.lld %t3.o %t.so -z relro -o %t --script=%t.script 2>&1
-// RUN: llvm-readobj --program-headers %t | FileCheck %s
+// RUN: ld.lld %t3.o %t.so -z relro -z separate-code -o %t --script=%t.script 2>&1
+// RUN: llvm-readelf -l %t | FileCheck %s
         .section .text, "ax", @progbits
         .global bar
         .global foo
         .global _start
 _start:
         callq bar
         // Will produce .bss.rel.ro that will match in .bss, this will lose
         // the relro property of the copy relocation.
         .quad foo
 
         // Non relro bss
         .bss
         // make large enough to affect PT_GNU_RELRO MemSize if this was marked
         // as relro.
         .space 0x2000
 
-// CHECK:     Type: PT_GNU_RELRO (0x6474E552)
-// CHECK-NEXT:     Offset:
-// CHECK-NEXT:     VirtualAddress:
-// CHECK-NEXT:     PhysicalAddress:
-// CHECK-NEXT:     FileSize:
-// CHECK-NEXT:     MemSize: 4096
-// CHECK-NEXT:     Flags [ (0x4)
-// CHECK-NEXT:       PF_R (0x4)
-// CHECK-NEXT:     ]
-// CHECK-NEXT:     Alignment: 1
-// CHECK-NEXT:   }
+// CHECK: Type      Offset   VirtAddr           PhysAddr           FileSiz  MemSiz   Flg Align
+// CHECK: GNU_RELRO 0x002150 0x0000000000000150 0x0000000000000150 0x000100 0x000eb0 R   0x1