I think we should update the title or summary to indicate that this is P9 only.

You can have a look at llvm/test/MC/Disassembler/PowerPC

@catenacyber Can you please include a testcase for MC please?

Some more nit-picker, other than that, mostly good to me.

Have we thought about adding support in DAGCombine or even InstCombine to combine into ISD::VSELECT too?

Thanks @MaskRay for help fixing and review!

In D59924#1475363, @MaskRay wrote:

May I ask why the mmintrin.h emulation layer must be added to the clang resource directory? Why can't it be provided as a standalone library like https://github.com/intel/ARM_NEON_2_x86_SSE ?

In D60811#1472361, @efriedma wrote:

please fix the code so it's clear that check is happening.

In D60811#1472300, @efriedma wrote:

For vectors where the element type is not byte-sized, loads can't be "consecutive" in the sense of this function; the store size of `<2 x i1>` is one byte.

LGTM. Thanks for reducing the testcase and fixing!

LGTM. Thanks for porting!

Some comments related to testcases.

LGTM, Thanks for fixing this.

@ZhangKang Looks like the patch is suggested by you? Do you have any testcases that can validate this?
And also are you able to reproduce (and narrow down) the problem before suggesting the patch?

Please make sure you run all test before updating patch!

LGTM. Thanks for fixing this bug.

Since we are adding new headers that is not originated by this patch,
please also update the description (and commit message) to include who actually contributed to mmintrin.h and other headers.
eg:headers are mostly based on headers developed by Steven Munroe, with some contribution of Paul Clarke, Bill Schmidt, Jinsong, Zeson.

LGTM. Thanks for refactoring.

LGTM.

Might miss some opportunity related to parameters instead. Please have a look. Thanks.

LGTM.

LGTM, with some comment change please. Thanks.

LGTM. Thanks for exploiting.

Looks like this may cause some unexpected failures. See https://bugs.llvm.org/show_bug.cgi?id=41247 for more details.

LGTM, except for some minor comments change.
Thanks for extending this, it will allow us to tune MachineScheduler specifically for PowerPC going forward.

Thanks for updating! @wuzish However, I am even more confused by your new comments.

Thought we are waiting for @nemanjai 's insight about line 167... But LGTM given that you have run full test.
Thanks for improving this.

In D58712#1437683, @sarveshtamba wrote:

Filed bug at :- https://bugs.llvm.org/show_bug.cgi?id=41177

@sarveshtamba As the author mentioned, yes, this has been upstreamed.

I am not familiar with swift development process,
but looks like you should be able to dump LLVM IR passing -emit-ir -Xfrontend -disable-llvm-optzns according to https://github.com/apple/swift/blob/master/docs/DebuggingTheCompiler.rst#printing-the-intermediate-representations.
And you may try to reduce the SIL first using bug_reducer. https://github.com/apple/swift/blob/master/docs/DebuggingTheCompiler.rst#reducing-sil-test-cases-using-bug-reducer

Comments mostly related to comments and testcases.

In D59403#1430383, @jsji wrote:

Apparently missing some files.

Apparently missing some files.

In D58712#1428691, @sarveshtamba wrote:

@dblaikie, anyone you know who can help here?

@sarveshtamba
Can you produce a reduced testcase that can show the problem?
Then I can find someone who can help to have a look.
Since this is an assert, I think it should not be too hard to create a reduce testcase using bugpoint.

No-relevant testcase update committed in NFC patch https://reviews.llvm.org/rL355945 first.
Update patch to show relevant changes only.

Update testcases(pr36292.ll) to reflect upstream changes.

Ping...

LGTM, except some minor update. Thanks for fixing!

Ping~

Thanks for addressing comments, however, I am still not convinced that this is safe.

I like the idea of trying to use register class to avoid using UseVSXReg flag.

Why is CHECK-NEXT not being used?
Why is ./utils/update_llc_test_checks.py not being used? That dramatically reduces chances of things like this, and spares one from actually having to manually write proper check lines. (thus improves test coverage. one will of course still need to verify that the checks are correct.)

Thanks for quick update, some more comments.

LGTM. Thanks for catching this, I am surprised that those typos slipped through ... FYI. @HLJ2009

LGTM, except minor comments update.