javed.absar (Javed Absar)
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User Since
Mar 27 2015, 6:20 AM (152 w, 18 h)

Recent Activity

Fri, Feb 16

javed.absar added inline comments to D43374: [ARM]Decoding MSR with unpredictable destination register causes an assert.
Fri, Feb 16, 5:26 AM

Tue, Jan 30

javed.absar created D42689: [SCEV] Fix threshold limit check.
Tue, Jan 30, 6:39 AM

Jan 18 2018

javed.absar added inline comments to D42033: [RISCV] Initial Machine Scheduler.
Jan 18 2018, 2:09 AM

Jan 17 2018

javed.absar committed rL322765: [SCEV] Fix typo. NFC..
[SCEV] Fix typo. NFC.
Jan 17 2018, 2:00 PM
javed.absar committed rL322629: [SCEV] fix typo.
[SCEV] fix typo
Jan 17 2018, 3:04 AM

Jan 2 2018

javed.absar added inline comments to D41441: [AArch64][SVE] Asm: Add restricted register classes for SVE predicate vectors..
Jan 2 2018, 2:23 AM

Dec 20 2017

javed.absar committed rL321179: [SCEV] Fix Typo. NFC..
[SCEV] Fix Typo. NFC.
Dec 20 2017, 7:07 AM
javed.absar added inline comments to D41430: [ARM] Armv8-R DFB instruction.
Dec 20 2017, 3:20 AM

Dec 4 2017

javed.absar accepted D36747: [Asm, ARM] Add fallback diag for multiple invalid operands.

LGTM. Thanks for this.

Dec 4 2017, 3:39 AM

Nov 28 2017

javed.absar added inline comments to D38279: [MachineScheduler] Enable latency heuristic based on scheduled lat..
Nov 28 2017, 2:22 AM

Nov 27 2017

javed.absar added a comment to D40480: MemorySSA backed Dead Store Elimination. .

Just a suggestion: To ease review, could this be split into smaller patches along the lines you mention - noop stores, partial overwrites, stores before frees/lifetime_ends ?

Nov 27 2017, 3:19 AM

Nov 24 2017

javed.absar committed rL318952: [SCEV] : Simplify loop to range-loop.NFC..
[SCEV] : Simplify loop to range-loop.NFC.
Nov 24 2017, 6:36 AM

Nov 23 2017

javed.absar added a comment to D40370: [arm] Add support for armv7e-m to the .arch directive..

Hi.
Full context (diff -U999) is missing. Also you may want to write a brief intro which you can use as commit message.

Nov 23 2017, 7:17 AM

Nov 22 2017

javed.absar added inline comments to D40333: Separate LoopTraversal and BreakFalseDeps out of ExecutionDomainFix into their own files.
Nov 22 2017, 2:05 AM

Nov 21 2017

javed.absar accepted D40263: [TableGen] Improve error reporting.

LGTM. Thanks for this.

Nov 21 2017, 11:18 AM
javed.absar added inline comments to D36747: [Asm, ARM] Add fallback diag for multiple invalid operands.
Nov 21 2017, 4:11 AM
javed.absar accepted D40254: [MI scheduler] Fix VADD and VSUB in cortex-a57 model.

Thanks for this.

Nov 21 2017, 2:24 AM
javed.absar added a comment to D40263: [TableGen] Improve error reporting.

Thanks for this. Is it possible to put a test? If not, perhaps you can share the output generated for a purposely failing case here (by omitting a referenced resource).

Nov 21 2017, 2:20 AM

Nov 20 2017

javed.absar added inline comments to D40254: [MI scheduler] Fix VADD and VSUB in cortex-a57 model.
Nov 20 2017, 9:44 AM

Nov 16 2017

javed.absar committed rL318401: [SCEV] simplify loop. NFC..
[SCEV] simplify loop. NFC.
Nov 16 2017, 5:49 AM

Nov 10 2017

javed.absar added a comment to D39808: [ARM GlobalISel] Fix call opcode for Thumb .

Gentle reminder.

Nov 10 2017, 1:50 AM

Nov 9 2017

javed.absar added reviewers for D38378: [ARM] Optimize {s,u}{add,sub}.with.overflow.: rovka, rengolin.
Nov 9 2017, 12:39 PM
javed.absar added inline comments to D38378: [ARM] Optimize {s,u}{add,sub}.with.overflow..
Nov 9 2017, 12:39 PM
javed.absar added inline comments to D39712: [ARM] Add an alias for psr and psr_nzcvq.
Nov 9 2017, 5:15 AM

Nov 8 2017

javed.absar added a comment to D39592: [ARM|GlobalISel] : Adding legalizer tests for Thumb.

This patch is now dependent on https://reviews.llvm.org/D39808

Nov 8 2017, 2:52 PM
javed.absar created D39808: [ARM GlobalISel] Fix call opcode for Thumb .
Nov 8 2017, 10:03 AM

Nov 7 2017

javed.absar added a comment to D39712: [ARM] Add an alias for psr and psr_nzcvq.

Hi Leslie:
As Oli mentioned, I did not find reference to PSR in ARM-ARM when preparing these tables. Leaving it to Renato to decide whether it should still be added.
If you do end up adding, and the encoding is same as XPSR, you could use the Mask bits 1,0,1 to differentiate against existing XPSR encoding entry (otherwise Searchable Table will complain about uniqueness).

Nov 7 2017, 4:03 AM

Nov 6 2017

javed.absar added a comment to D39592: [ARM|GlobalISel] : Adding legalizer tests for Thumb.

Thanks Diana for the review.

Nov 6 2017, 10:30 AM
javed.absar updated the diff for D39592: [ARM|GlobalISel] : Adding legalizer tests for Thumb.
Nov 6 2017, 10:26 AM
javed.absar added a comment to D39592: [ARM|GlobalISel] : Adding legalizer tests for Thumb.

It seems the thumb instruction selection will take more work and needs probably split up into smaller ones (as discussed with Diana). So they will come later.

Nov 6 2017, 1:00 AM

Nov 3 2017

javed.absar updated the diff for D39592: [ARM|GlobalISel] : Adding legalizer tests for Thumb.

Added thumb tests to all three. Also renamed the files to make it clear the test run both arm and thumb

Nov 3 2017, 10:32 AM
javed.absar added a comment to D39592: [ARM|GlobalISel] : Adding legalizer tests for Thumb.

Hi Diana.
Yes I too was thinking of adding just the run line, but I don't know when we move to instruction-selection would/could we do the same.
And if not, the separation upfront might be a good idea. Please advise. I am ok either way.

Nov 3 2017, 6:50 AM
javed.absar created D39592: [ARM|GlobalISel] : Adding legalizer tests for Thumb.
Nov 3 2017, 5:00 AM

Nov 2 2017

javed.absar added a comment to D39558: [TargetParser][AArch64] Reorder enum to preserve 5.0.0 libLLVM ABI..

Would it make sense to add a test, so that any future changes doesn't undo this behaviour?

Nov 2 2017, 9:13 AM
javed.absar added a comment to D39507: [AArch64] Fix the number of iterations for the Newton series.

Full context is missing (seems you forgot diff .... -U9999)

Nov 2 2017, 2:15 AM

Oct 30 2017

javed.absar committed rL316960: [AArch64]: range loopify frame-lowering.
[AArch64]: range loopify frame-lowering
Oct 30 2017, 3:00 PM
javed.absar added a comment to D39415: [ARMISelLowering] Better handling of NEON load/store for sequential memory regions.

Hi Eugene:
Thanks for the work. However, in its current form the implementation is bit hard to follow. Would it be possible to, describe -

  1. Your overall approach in the implementation

2.. Describe above the function what it is trying to do (e.g. checkedGetIncrement - which b.t.w looks non-intuitive name).

Oct 30 2017, 11:01 AM
javed.absar committed rL316902: [GlobalISel|ARM] : Allow legalizing G_FSUB.
[GlobalISel|ARM] : Allow legalizing G_FSUB
Oct 30 2017, 6:52 AM
javed.absar closed D39261: [GlobalISel|ARM] : Allow legalizing G_FSUB by committing rL316902: [GlobalISel|ARM] : Allow legalizing G_FSUB.
Oct 30 2017, 6:52 AM

Oct 29 2017

javed.absar updated the diff for D39261: [GlobalISel|ARM] : Allow legalizing G_FSUB.

Thanks Diana for the feedback. I added the missing tests and they now all pass.

Oct 29 2017, 12:36 PM

Oct 26 2017

javed.absar added inline comments to D38196: [AArch64] Avoid interleaved SIMD store instructions for Exynos.
Oct 26 2017, 1:58 AM

Oct 24 2017

javed.absar created D39261: [GlobalISel|ARM] : Allow legalizing G_FSUB.
Oct 24 2017, 2:36 PM

Oct 20 2017

javed.absar added a comment to D39100: [ARM] Use PostRA machine scheduler when FeatureUseMISched is set.

LGTM. Thanks.

Oct 20 2017, 4:22 AM

Oct 19 2017

javed.absar added a comment to D39100: [ARM] Use PostRA machine scheduler when FeatureUseMISched is set.

Hi Eugene:
As Florian mentioned, it would be good having a test. No need to make a new test, just add a new run line to existing misched test
Thanks

Oct 19 2017, 10:47 AM
javed.absar added inline comments to D39088: [AArch64][SVE] Asm: Replace 'IsVector' by 'RegKind' in AArch64AsmParser (NFC).
Oct 19 2017, 9:46 AM
javed.absar added inline comments to D39090: [AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
Oct 19 2017, 9:24 AM

Oct 16 2017

javed.absar added inline comments to D38959: AMDGPU: Don't use TargetStreamer if it has not been initialized.
Oct 16 2017, 9:44 AM
javed.absar committed rL315911: [TableGen] Simplify CallingConvEmitter.cpp. NFC..
[TableGen] Simplify CallingConvEmitter.cpp. NFC.
Oct 16 2017, 7:52 AM

Oct 15 2017

javed.absar committed rL315891: [TableGen] Range loopify DAGISelMatcher. NFC..
[TableGen] Range loopify DAGISelMatcher. NFC.
Oct 15 2017, 11:44 PM

Oct 13 2017

javed.absar added a comment to D38918: Update successor after branch relaxation in ARM.

Context is missing. You may want to generate diff using -U999

Oct 13 2017, 11:19 PM
javed.absar committed rL315700: [TableGen] : Simplify RegisterInfoEmitter.
[TableGen] : Simplify RegisterInfoEmitter
Oct 13 2017, 9:28 AM

Oct 11 2017

javed.absar added a comment to D38727: [X86][SKL] Updated scheduling information for the SkylakeClient target.

Would it be possible to preprocess the *.td with a compacting script that make use of regular expression feature of instregex e.g. (instregex "MMX_*") instead listing everything.

Oct 11 2017, 2:40 AM
javed.absar committed rL315446: [TableGen] Tidy up CodeGenSchedule.cpp.
[TableGen] Tidy up CodeGenSchedule.cpp
Oct 11 2017, 2:33 AM

Oct 10 2017

javed.absar committed rL315321: [TableGen] Convert VarDef to range_loop. NFC..
[TableGen] Convert VarDef to range_loop. NFC.
Oct 10 2017, 8:59 AM

Oct 9 2017

javed.absar committed rL315209: [TableGen] remove make_range where not necessary.
[TableGen] remove make_range where not necessary
Oct 9 2017, 9:23 AM

Oct 8 2017

javed.absar committed rL315183: [TableGen] Simplify, add range_loop in CodeGenSchedule.
[TableGen] Simplify, add range_loop in CodeGenSchedule
Oct 8 2017, 10:25 AM

Oct 6 2017

javed.absar committed rL315068: [TableGen] Simplify SubtargetEmitter.
[TableGen] Simplify SubtargetEmitter
Oct 6 2017, 8:26 AM
javed.absar committed rL315050: [TableGen] : CodeGenInsrtuction modify to range loop. NFC..
[TableGen] : CodeGenInsrtuction modify to range loop. NFC.
Oct 6 2017, 2:34 AM
javed.absar added inline comments to D38607: [AMDGPU] New 64 bit div/rem expansion.
Oct 6 2017, 1:24 AM

Oct 5 2017

javed.absar committed rL314982: [TablgeGen] : Tidy up CodeGenSchedule. NFC..
[TablgeGen] : Tidy up CodeGenSchedule. NFC.
Oct 5 2017, 6:29 AM
javed.absar closed D38534: [TablgeGen] : Tidy up CodeGenSchedule. NFC. by committing rL314982: [TablgeGen] : Tidy up CodeGenSchedule. NFC..
Oct 5 2017, 6:29 AM
javed.absar added inline comments to D38160: [AArch64] Improve codegen for inverted overflow checking intrinsics.
Oct 5 2017, 2:09 AM

Oct 4 2017

javed.absar created D38534: [TablgeGen] : Tidy up CodeGenSchedule. NFC..
Oct 4 2017, 2:21 AM

Oct 3 2017

javed.absar committed rL314775: [MiSched] - Simplify ProcResEntry access.
[MiSched] - Simplify ProcResEntry access
Oct 3 2017, 2:36 AM
javed.absar closed D38447: [MiSched] - Simplify ProcResEntry access by committing rL314775: [MiSched] - Simplify ProcResEntry access.
Oct 3 2017, 2:36 AM

Oct 2 2017

javed.absar added a comment to D38447: [MiSched] - Simplify ProcResEntry access.

Thanks Matthias.

Oct 2 2017, 12:15 PM
javed.absar retitled D38447: [MiSched] - Simplify ProcResEntry access from [MiSched] - Simply ProcResEntry access to [MiSched] - Simplify ProcResEntry access.
Oct 2 2017, 9:07 AM
javed.absar added inline comments to D38448: [AsmParser] Support GAS's .print directive.
Oct 2 2017, 6:07 AM
javed.absar added a reviewer for D38447: [MiSched] - Simplify ProcResEntry access: atrick.
Oct 2 2017, 1:38 AM

Oct 1 2017

javed.absar added inline comments to D38448: [AsmParser] Support GAS's .print directive.
Oct 1 2017, 1:59 PM
javed.absar created D38447: [MiSched] - Simplify ProcResEntry access.
Oct 1 2017, 12:07 PM

Sep 30 2017

javed.absar added inline comments to D38378: [ARM] Optimize {s,u}{add,sub}.with.overflow..
Sep 30 2017, 12:31 AM

Sep 27 2017

javed.absar committed rL314316: [Misched] : Fix typo in comment. NFC..
[Misched] : Fix typo in comment. NFC.
Sep 27 2017, 9:41 AM
javed.absar committed rL314296: [Misched]: Remove double call getMicroOpFactor.NFC..
[Misched]: Remove double call getMicroOpFactor.NFC.
Sep 27 2017, 3:33 AM
javed.absar closed D38176: [MiSched] : Remove double call getMicroOpFactor. NFC. by committing rL314296: [Misched]: Remove double call getMicroOpFactor.NFC..
Sep 27 2017, 3:33 AM

Sep 25 2017

javed.absar added inline comments to D38234: [ARM] isTruncateFree fix.
Sep 25 2017, 6:07 AM

Sep 22 2017

javed.absar created D38176: [MiSched] : Remove double call getMicroOpFactor. NFC..
Sep 22 2017, 6:19 AM

Sep 21 2017

javed.absar committed rL313874: [TableGen] Tidy up CodeGenRegisters.
[TableGen] Tidy up CodeGenRegisters
Sep 21 2017, 3:53 AM
javed.absar closed D38091: [TableGen] Tidy up CodeGenRegisters by committing rL313874: [TableGen] Tidy up CodeGenRegisters.
Sep 21 2017, 3:53 AM

Sep 20 2017

javed.absar created D38091: [TableGen] Tidy up CodeGenRegisters.
Sep 20 2017, 11:33 AM

Sep 18 2017

javed.absar added a comment to D37988: [AArch64] Improve tests of loads and stores of register pairs.

looks ok to me. Thanks for extending these tests.
Will let, however, assigned reviewers, comment/accept further.

Sep 18 2017, 9:16 PM
javed.absar added inline comments to D38014: [AMDGPU] Prevent post-RA scheduler from breaking memory clauses.
Sep 18 2017, 8:58 PM

Sep 15 2017

javed.absar added inline comments to D37880: Fix an out-of-bounds shufflevector index bug.
Sep 15 2017, 1:35 AM

Sep 13 2017

javed.absar committed rL313140: [MiSched|TableGen] : Tidy up and modernise. NFC..
[MiSched|TableGen] : Tidy up and modernise. NFC.
Sep 13 2017, 3:32 AM
javed.absar closed D37748: [MiSched|TableGen] : Tidy up and modernise. NFC. by committing rL313140: [MiSched|TableGen] : Tidy up and modernise. NFC..
Sep 13 2017, 3:32 AM

Sep 12 2017

javed.absar created D37748: [MiSched|TableGen] : Tidy up and modernise. NFC..
Sep 12 2017, 9:19 AM

Sep 7 2017

javed.absar added inline comments to D37555: [MachineScheduler] Put SchedRegion in an anonymous namespace..
Sep 7 2017, 8:37 AM

Sep 5 2017

javed.absar added inline comments to D37472: [ARM] Enable QADD and QSUB instruction selection.
Sep 5 2017, 6:55 AM

Sep 4 2017

javed.absar added inline comments to D37454: [coroutines] Make sure auto return type of await_resume is properly handled.
Sep 4 2017, 11:16 PM
javed.absar added inline comments to D36534: [aarch64] Support APInt and APFloat in ImmLeaf subclasses and make AArch64 use them..
Sep 4 2017, 11:47 AM
javed.absar added a comment to D36745: [LLD][ELF] Always write non-immediate bits for AArch64 branch instruction..

I am afraid it seems you forgot to do a diff -U9999, as the full context is not visible.

Sep 4 2017, 5:39 AM

Sep 1 2017

javed.absar added a comment to D36895: Add a class for fixed point arithmetic.

You mention "For now point is fixed in the middle [32 bits].[32 bits], which makes calculations simple and fast.". Perhaps this should be commented in the code as well.

Sep 1 2017, 8:21 AM

Aug 30 2017

javed.absar added inline comments to D37055: [ARM] Reverse PostRASched subtarget feature logic.
Aug 30 2017, 7:26 AM
javed.absar added inline comments to D37055: [ARM] Reverse PostRASched subtarget feature logic.
Aug 30 2017, 6:30 AM

Aug 29 2017

javed.absar added inline comments to D37267: AMDGPU: Use set for tracked registers.
Aug 29 2017, 1:31 PM
javed.absar added inline comments to D37264: [Docs] Update CodingStandards to recommend range-based for loops.
Aug 29 2017, 10:13 AM
javed.absar added a comment to D37259: [Tools] Add script to identify new contributors from Phabricator (WIP).

I am not an expert in this so may be a wrong question - once a new contributor is identified by this script, it is added as subscriber to 'what' ?
As a broad brush, more features to phabricator seems a good idea as it is so commonly now used.
Thanks.

Aug 29 2017, 5:45 AM
javed.absar committed rL311993: [ARM] - Tidy-up ARMAsmPrinter.cpp.
[ARM] - Tidy-up ARMAsmPrinter.cpp
Aug 29 2017, 3:05 AM
javed.absar closed D37199: [ARM] - Tidy-up ARMAsmPrinter.cpp by committing rL311993: [ARM] - Tidy-up ARMAsmPrinter.cpp.
Aug 29 2017, 3:05 AM

Aug 28 2017

javed.absar added a comment to D37199: [ARM] - Tidy-up ARMAsmPrinter.cpp.

Ping!

Aug 28 2017, 3:41 AM