javed.absar (Javed Absar)
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User Since
Mar 27 2015, 6:20 AM (130 w, 2 d)

Recent Activity

Fri, Sep 22

javed.absar created D38176: [MiSched] : Remove double call getMicroOpFactor. NFC..
Fri, Sep 22, 6:19 AM

Thu, Sep 21

javed.absar committed rL313874: [TableGen] Tidy up CodeGenRegisters.
[TableGen] Tidy up CodeGenRegisters
Thu, Sep 21, 3:53 AM
javed.absar closed D38091: [TableGen] Tidy up CodeGenRegisters by committing rL313874: [TableGen] Tidy up CodeGenRegisters.
Thu, Sep 21, 3:53 AM

Wed, Sep 20

javed.absar created D38091: [TableGen] Tidy up CodeGenRegisters.
Wed, Sep 20, 11:33 AM

Mon, Sep 18

javed.absar added a comment to D37988: [AArch64] Improve tests of loads and stores of register pairs.

looks ok to me. Thanks for extending these tests.
Will let, however, assigned reviewers, comment/accept further.

Mon, Sep 18, 9:16 PM
javed.absar added inline comments to D38014: [AMDGPU] Prevent post-RA scheduler from breaking memory clauses.
Mon, Sep 18, 8:58 PM

Fri, Sep 15

javed.absar added inline comments to D37880: Fix an out-of-bounds shufflevector index bug.
Fri, Sep 15, 1:35 AM

Wed, Sep 13

javed.absar committed rL313140: [MiSched|TableGen] : Tidy up and modernise. NFC..
[MiSched|TableGen] : Tidy up and modernise. NFC.
Wed, Sep 13, 3:32 AM
javed.absar closed D37748: [MiSched|TableGen] : Tidy up and modernise. NFC. by committing rL313140: [MiSched|TableGen] : Tidy up and modernise. NFC..
Wed, Sep 13, 3:32 AM

Tue, Sep 12

javed.absar created D37748: [MiSched|TableGen] : Tidy up and modernise. NFC..
Tue, Sep 12, 9:19 AM

Thu, Sep 7

javed.absar added inline comments to D37555: [MachineScheduler] Put SchedRegion in an anonymous namespace..
Thu, Sep 7, 8:37 AM

Tue, Sep 5

javed.absar added inline comments to D37472: [ARM] Enable QADD and QSUB instruction selection.
Tue, Sep 5, 6:55 AM

Mon, Sep 4

javed.absar added inline comments to D37454: [coroutines] Make sure auto return type of await_resume is properly handled.
Mon, Sep 4, 11:16 PM
javed.absar added inline comments to D36534: [aarch64] Support APInt and APFloat in ImmLeaf subclasses and make AArch64 use them..
Mon, Sep 4, 11:47 AM
javed.absar added a comment to D36745: [LLD][ELF] Always write non-immediate bits for AArch64 branch instruction..

I am afraid it seems you forgot to do a diff -U9999, as the full context is not visible.

Mon, Sep 4, 5:39 AM

Fri, Sep 1

javed.absar added a comment to D36895: Add a class for fixed point arithmetic.

You mention "For now point is fixed in the middle [32 bits].[32 bits], which makes calculations simple and fast.". Perhaps this should be commented in the code as well.

Fri, Sep 1, 8:21 AM

Wed, Aug 30

javed.absar added inline comments to D37055: [ARM] Reverse PostRASched subtarget feature logic.
Wed, Aug 30, 7:26 AM
javed.absar added inline comments to D37055: [ARM] Reverse PostRASched subtarget feature logic.
Wed, Aug 30, 6:30 AM

Tue, Aug 29

javed.absar added inline comments to D37267: AMDGPU: Use set for tracked registers.
Tue, Aug 29, 1:31 PM
javed.absar added inline comments to D37264: [Docs] Update CodingStandards to recommend range-based for loops.
Tue, Aug 29, 10:13 AM
javed.absar added a comment to D37259: [Tools] Add script to identify new contributors from Phabricator (WIP).

I am not an expert in this so may be a wrong question - once a new contributor is identified by this script, it is added as subscriber to 'what' ?
As a broad brush, more features to phabricator seems a good idea as it is so commonly now used.
Thanks.

Tue, Aug 29, 5:45 AM
javed.absar committed rL311993: [ARM] - Tidy-up ARMAsmPrinter.cpp.
[ARM] - Tidy-up ARMAsmPrinter.cpp
Tue, Aug 29, 3:05 AM
javed.absar closed D37199: [ARM] - Tidy-up ARMAsmPrinter.cpp by committing rL311993: [ARM] - Tidy-up ARMAsmPrinter.cpp.
Tue, Aug 29, 3:05 AM

Mon, Aug 28

javed.absar added a comment to D37199: [ARM] - Tidy-up ARMAsmPrinter.cpp.

Ping!

Mon, Aug 28, 3:41 AM

Sun, Aug 27

javed.absar created D37199: [ARM] - Tidy-up ARMAsmPrinter.cpp.
Sun, Aug 27, 1:55 PM
javed.absar committed rL311860: [ARM] Tidy-up condition-code support functions.
[ARM] Tidy-up condition-code support functions
Sun, Aug 27, 1:40 PM
javed.absar closed D37179: [ARM] Tidy-up condition-code support functions by committing rL311860: [ARM] Tidy-up condition-code support functions.
Sun, Aug 27, 1:40 PM
javed.absar added inline comments to D37179: [ARM] Tidy-up condition-code support functions.
Sun, Aug 27, 12:28 PM
javed.absar committed rL311850: [ARM] Tidy-up ARMAsmParser. NFC..
[ARM] Tidy-up ARMAsmParser. NFC.
Sun, Aug 27, 7:48 AM
javed.absar closed D37118: [ARM] Tidy-up ARMAsmParser. NFC. by committing rL311850: [ARM] Tidy-up ARMAsmParser. NFC..
Sun, Aug 27, 7:48 AM
javed.absar added inline comments to D37179: [ARM] Tidy-up condition-code support functions.
Sun, Aug 27, 6:29 AM
javed.absar added inline comments to D37118: [ARM] Tidy-up ARMAsmParser. NFC..
Sun, Aug 27, 6:03 AM

Sat, Aug 26

javed.absar created D37179: [ARM] Tidy-up condition-code support functions.
Sat, Aug 26, 5:02 AM

Fri, Aug 25

javed.absar added a comment to D37118: [ARM] Tidy-up ARMAsmParser. NFC..

Would it be possible to just used MRI->getSubReg(QReg, ARM::dsub_0) wherever getDRegFromQReg is called? It does not seem like having a getDRegFromQReg function adds much value now.

Fri, Aug 25, 11:43 AM
javed.absar added a comment to D37118: [ARM] Tidy-up ARMAsmParser. NFC..
In D37118#852522, @asb wrote:

Why not use MCRegisterInfo::getSubReg for this purpose, thus avoiding repeating information that's already present in ARMRegisterInfo.td? MRI->getSubReg(QReg, ARM::dsub_0) should replace the functionality of getDRegFromQReg.

Fri, Aug 25, 10:42 AM
javed.absar updated the diff for D37118: [ARM] Tidy-up ARMAsmParser. NFC..
Fri, Aug 25, 10:41 AM

Aug 25 2017

javed.absar added inline comments to D37151: [AArch64] Adjust the cost model for Exynos M1 and M2.
Aug 25 2017, 9:29 AM
javed.absar added a comment to D37118: [ARM] Tidy-up ARMAsmParser. NFC..

Ping!

Aug 25 2017, 6:40 AM

Aug 24 2017

javed.absar retitled D37118: [ARM] Tidy-up ARMAsmParser. NFC. from [ARM] Tidy-up ARMAsmParser to [ARM] Tidy-up ARMAsmParser. NFC..
Aug 24 2017, 8:09 PM
javed.absar created D37118: [ARM] Tidy-up ARMAsmParser. NFC..
Aug 24 2017, 1:17 PM

Aug 20 2017

javed.absar added inline comments to D36617: AMD Zen Scheduler Model Update.
Aug 20 2017, 1:38 PM

Aug 18 2017

javed.absar accepted D36796: [ARM] Add missing patterns for insert_subvector..

LGTM. Maybe elaborate a bit more on the summary part

Aug 18 2017, 12:59 AM

Aug 13 2017

javed.absar committed rL310807: [ARM] Tidy-up Cortex-A15 DPR-SPR optimizer implementation.
[ARM] Tidy-up Cortex-A15 DPR-SPR optimizer implementation
Aug 13 2017, 6:39 PM
javed.absar closed D36502: [ARM] Tidy-up Cortex-A15 DPR-SPR optimizer implementation by committing rL310807: [ARM] Tidy-up Cortex-A15 DPR-SPR optimizer implementation.
Aug 13 2017, 6:39 PM

Aug 8 2017

javed.absar created D36502: [ARM] Tidy-up Cortex-A15 DPR-SPR optimizer implementation.
Aug 8 2017, 8:02 PM

Aug 4 2017

javed.absar committed rL310072: [ARM] Use searchable-table for banked registers.
[ARM] Use searchable-table for banked registers
Aug 4 2017, 10:11 AM
javed.absar closed D36260: [ARM] Use searchable-table for banked registers by committing rL310072: [ARM] Use searchable-table for banked registers.
Aug 4 2017, 10:11 AM
javed.absar added a comment to D36260: [ARM] Use searchable-table for banked registers.

ping!

Aug 4 2017, 1:56 AM

Aug 3 2017

javed.absar updated the diff for D36260: [ARM] Use searchable-table for banked registers.

Revised based on review comments

Aug 3 2017, 8:41 PM
javed.absar added inline comments to D36260: [ARM] Use searchable-table for banked registers.
Aug 3 2017, 8:38 PM
javed.absar created D36260: [ARM] Use searchable-table for banked registers.
Aug 3 2017, 12:57 AM

Aug 2 2017

javed.absar committed rL309910: [ARM] Tidy up banked registers encoding.
[ARM] Tidy up banked registers encoding
Aug 2 2017, 6:25 PM
javed.absar closed D36219: [ARM] Tidy up banked registers encoding by committing rL309910: [ARM] Tidy up banked registers encoding.
Aug 2 2017, 6:25 PM
javed.absar added a comment to D36219: [ARM] Tidy up banked registers encoding.

Thanks @fhahn . I will rebase and commit this patch now.
Will work on the reverse mapping which @olista01 pointed out after that.

Aug 2 2017, 11:01 AM
javed.absar added a comment to D36219: [ARM] Tidy up banked registers encoding.

We also have the reverse mapping (encoding->name) in ARMInstPrinter::printBankedRegOperand, could that use this table too?

Aug 2 2017, 10:11 AM
javed.absar updated the diff for D36219: [ARM] Tidy up banked registers encoding.

In this update-

  1. Removed the manual (name->Encoding) in ARMISelDAGToDAG. Had missed it out earlier.
  2. Moved the comment to ARMSystemRegister.td
  3. Fixed indentation of "namespace namespace " . I too think no indentation on namespace is right choice (as Diana also mentioned).
Aug 2 2017, 10:04 AM
javed.absar added inline comments to D36219: [ARM] Tidy up banked registers encoding.
Aug 2 2017, 8:28 AM
javed.absar created D36219: [ARM] Tidy up banked registers encoding.
Aug 2 2017, 6:51 AM

Jul 28 2017

javed.absar added inline comments to D34682: [Triple] Add isThumb and isARM functions..
Jul 28 2017, 10:26 AM

Jul 26 2017

javed.absar added a comment to D35882: [TargetParser] Use enum classes for various ARM kind enums..

Looks like a nice clean-up.
Its a pity we still need 'invalid' despite using enum class.

Jul 26 2017, 8:27 PM

Jul 20 2017

javed.absar committed rL308607: [ARM] Simplify ExpandPseudoInst. NFC..
[ARM] Simplify ExpandPseudoInst. NFC.
Jul 20 2017, 5:36 AM
javed.absar closed D35626: [ARM] Simplify ExpandPseudoInst. NFC. by committing rL308607: [ARM] Simplify ExpandPseudoInst. NFC..
Jul 20 2017, 5:36 AM

Jul 19 2017

javed.absar created D35626: [ARM] Simplify ExpandPseudoInst. NFC..
Jul 19 2017, 8:56 AM
javed.absar committed rL308456: [ARM] Unify handling of M-Class system registers.
[ARM] Unify handling of M-Class system registers
Jul 19 2017, 5:59 AM
javed.absar closed D35209: [ARM] Unify handling of M-Class system registers by committing rL308456: [ARM] Unify handling of M-Class system registers.
Jul 19 2017, 5:58 AM

Jul 18 2017

javed.absar added a comment to D35209: [ARM] Unify handling of M-Class system registers.

Ping - @t.p.northover @olista01 @john.brawn
I think all changes requested are done and the initial idea of getting everything in one place etc is met.

Jul 18 2017, 3:28 AM
javed.absar committed rL308291: [ARM|CodeGen] Improve the code in FastISel.
[ARM|CodeGen] Improve the code in FastISel
Jul 18 2017, 3:20 AM
javed.absar closed D35494: [ARM|CodeGen] Improve the code in FastISel by committing rL308291: [ARM|CodeGen] Improve the code in FastISel.
Jul 18 2017, 3:20 AM
javed.absar added a comment to D35494: [ARM|CodeGen] Improve the code in FastISel.

Thanks Tim. Will fix the commented code and commit.

Jul 18 2017, 1:22 AM

Jul 17 2017

javed.absar created D35494: [ARM|CodeGen] Improve the code in FastISel.
Jul 17 2017, 10:40 AM
javed.absar committed rL308173: [CodeGen] Add begin-end iterators to MachineInstr.
[CodeGen] Add begin-end iterators to MachineInstr
Jul 17 2017, 6:16 AM
javed.absar closed D35419: [CodeGen] Add begin-end iterators to MachineInstr by committing rL308173: [CodeGen] Add begin-end iterators to MachineInstr.
Jul 17 2017, 6:15 AM
javed.absar updated the diff for D35209: [ARM] Unify handling of M-Class system registers.

Thanks Tim/others for the suggestions. Updated, using 'Requires' , FeatureBits and factoring out common functions. Is much more compact and unified now, as I set out to do.

Jul 17 2017, 3:39 AM
javed.absar added a comment to D35419: [CodeGen] Add begin-end iterators to MachineInstr.

Thanks Diana.

Jul 17 2017, 1:34 AM
javed.absar added inline comments to D35293: AMD znver1 Initial Scheduler model.
Jul 17 2017, 1:32 AM

Jul 15 2017

javed.absar updated the diff for D35419: [CodeGen] Add begin-end iterators to MachineInstr.
Jul 15 2017, 2:04 AM

Jul 14 2017

javed.absar added a comment to D35419: [CodeGen] Add begin-end iterators to MachineInstr.

Ok, I see that now too. Will use MI->operands() as suggested, as that will suffice.

Jul 14 2017, 3:26 PM
javed.absar created D35419: [CodeGen] Add begin-end iterators to MachineInstr.
Jul 14 2017, 8:35 AM
javed.absar added a reviewer for D35229: [CodeGen] Add support for instruction clusters: atrick.
Jul 14 2017, 3:55 AM
javed.absar added inline comments to D35229: [CodeGen] Add support for instruction clusters.
Jul 14 2017, 3:55 AM
javed.absar updated the diff for D35209: [ARM] Unify handling of M-Class system registers.

I have re-implemented using SearchableTable which improves the code quality immensely (great suggestion by Oliver). I have also create a Utils sub-directory (and ARMUtils library) that allows utility functions such as generated by SearchableTable to be incorporated into both CodeGen and others. seamlessly.

Jul 14 2017, 3:31 AM

Jul 13 2017

javed.absar committed rL307897: [ARM] Tidy up and organise better ARM.td. NFC..
[ARM] Tidy up and organise better ARM.td. NFC.
Jul 13 2017, 3:25 AM
javed.absar closed D35248: [ARM] Tidy up and organise better ARM.td. NFC. by committing rL307897: [ARM] Tidy up and organise better ARM.td. NFC..
Jul 13 2017, 3:25 AM
javed.absar updated the diff for D35248: [ARM] Tidy up and organise better ARM.td. NFC..
Jul 13 2017, 1:21 AM

Jul 12 2017

javed.absar added inline comments to D35229: [CodeGen] Add support for instruction clusters.
Jul 12 2017, 3:27 PM
javed.absar added a comment to D35248: [ARM] Tidy up and organise better ARM.td. NFC..

Thanks Florian.
Sure, will make the changes and wait till tomorrow before committing, in case Renato or Diana have further comments.

Jul 12 2017, 2:57 PM
javed.absar added a comment to D35248: [ARM] Tidy up and organise better ARM.td. NFC..

Ping! Renato, Diana, Florian ?

Jul 12 2017, 2:43 PM
javed.absar updated the diff for D35248: [ARM] Tidy up and organise better ARM.td. NFC..

Hi Florian:

Jul 12 2017, 9:27 AM
javed.absar added inline comments to D35293: AMD znver1 Initial Scheduler model.
Jul 12 2017, 1:40 AM

Jul 11 2017

javed.absar added a comment to D35248: [ARM] Tidy up and organise better ARM.td. NFC..

Thanks Florian. I will fix the indents where I missed out.

Jul 11 2017, 12:05 PM
javed.absar added a reviewer for D35248: [ARM] Tidy up and organise better ARM.td. NFC.: fhahn.
Jul 11 2017, 10:50 AM
javed.absar created D35248: [ARM] Tidy up and organise better ARM.td. NFC..
Jul 11 2017, 4:56 AM
javed.absar added inline comments to D35228: [TableGen] Add support for instruction clusters.
Jul 11 2017, 1:52 AM

Jul 10 2017

javed.absar created D35209: [ARM] Unify handling of M-Class system registers.
Jul 10 2017, 10:04 AM
javed.absar committed rL307531: [ARM] Tidy up ARMBaseRegisterInfo implementation. NFC.
[ARM] Tidy up ARMBaseRegisterInfo implementation. NFC
Jul 10 2017, 3:43 AM
javed.absar closed D35116: [ARM] Tidy up ARMBaseRegisterInfo implementation. NFC by committing rL307531: [ARM] Tidy up ARMBaseRegisterInfo implementation. NFC.
Jul 10 2017, 3:43 AM

Jul 7 2017

javed.absar added a comment to D35116: [ARM] Tidy up ARMBaseRegisterInfo implementation. NFC.

Good catch. Thanks. Will fix these and commit.

Jul 7 2017, 8:32 AM
javed.absar retitled D35116: [ARM] Tidy up ARMBaseRegisterInfo implementation. NFC from [ARM] Tidy up ARMBaseRegisterInfo implementation to [ARM] Tidy up ARMBaseRegisterInfo implementation. NFC.
Jul 7 2017, 5:22 AM
javed.absar added a comment to D35116: [ARM] Tidy up ARMBaseRegisterInfo implementation. NFC.

Thanks Florian. I will wait a bit for Renato/Diana to comment before committing, in case they have more comments/suggestions.

Jul 7 2017, 4:25 AM
javed.absar created D35116: [ARM] Tidy up ARMBaseRegisterInfo implementation. NFC.
Jul 7 2017, 3:54 AM