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javed.absar (Javed Absar)
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User Since
Mar 27 2015, 6:20 AM (238 w, 3 d)

Recent Activity

Wed, Oct 16

javed.absar updated the diff for D68453: TableGen: Allow 'a+b' in TableGen language.

updated based on review comments

Wed, Oct 16, 2:59 PM · Restricted Project
javed.absar added a comment to D68685: [RISCV] Scheduler description for Rocket Core.

Is there a forwarding mechanism in Rocket? If so, that can be added to make the model more accurate.

Wed, Oct 16, 12:23 AM · Restricted Project
javed.absar added a comment to D68685: [RISCV] Scheduler description for Rocket Core.

Hi Michael:

Wed, Oct 16, 12:23 AM · Restricted Project
javed.absar added a reviewer for D68685: [RISCV] Scheduler description for Rocket Core: javed.absar.
Wed, Oct 16, 12:00 AM · Restricted Project

Tue, Oct 15

javed.absar accepted D68808: Tag CFI-generated data structures with "#pragma clang section" attributes..
Tue, Oct 15, 2:23 PM · Restricted Project

Fri, Oct 11

javed.absar accepted D68806: Relro is missing from the original "#pragma clang section" implementation..
Fri, Oct 11, 5:45 AM · Restricted Project, Restricted Project
javed.absar added a comment to D68685: [RISCV] Scheduler description for Rocket Core.

@javedabsar (or @javed.absar) I seem to recall you have experience with schedulers. If you could give us a hand here that'd be great! :)

Fri, Oct 11, 3:22 AM · Restricted Project

Fri, Oct 4

javed.absar added a comment to D68453: TableGen: Allow 'a+b' in TableGen language.

How far down this road can we go? I would like to see infix operators in TableGen because I believe that it will make it easier to use. However, I'm concerned about just adding add as a special case. Of the other similar operators:

case ADD: Result = "!add"; break;
case MUL: Result = "!mul"; break;
case AND: Result = "!and"; break;
case OR: Result = "!or"; break;
case SHL: Result = "!shl"; break;
case SRA: Result = "!sra"; break;
case SRL: Result = "!srl"; break;
case EQ: Result = "!eq"; break;
case NE: Result = "!ne"; break;
case LE: Result = "!le"; break;
case LT: Result = "!lt"; break;
case GE: Result = "!ge"; break;
case GT: Result = "!gt"; break;

how many can we add as infix operators without ambiguities or other difficulties?

I have a half baked shunting-algorithm based infix-operator patch to work with cases you mention but that is kind of major work. I thought maybe, as !add is most commonly used, there maybe an appetite for a simple solution like here.

To be clear, I'm fine with taking an incremental approach here. It sounds like you've investigated this and there's no major technical impediment, it's just more complicated (and, thus, a more-complicated patch) to deal with all of the operators. Is that correct?

Fri, Oct 4, 11:25 PM · Restricted Project
javed.absar added a comment to D68453: TableGen: Allow 'a+b' in TableGen language.

How far down this road can we go? I would like to see infix operators in TableGen because I believe that it will make it easier to use. However, I'm concerned about just adding add as a special case. Of the other similar operators:

case ADD: Result = "!add"; break;
case MUL: Result = "!mul"; break;
case AND: Result = "!and"; break;
case OR: Result = "!or"; break;
case SHL: Result = "!shl"; break;
case SRA: Result = "!sra"; break;
case SRL: Result = "!srl"; break;
case EQ: Result = "!eq"; break;
case NE: Result = "!ne"; break;
case LE: Result = "!le"; break;
case LT: Result = "!lt"; break;
case GE: Result = "!ge"; break;
case GT: Result = "!gt"; break;

how many can we add as infix operators without ambiguities or other difficulties?

Fri, Oct 4, 3:53 PM · Restricted Project
javed.absar abandoned D62394: [ARM][CMSE] Add CMSE header & builtins.
Fri, Oct 4, 3:51 PM
javed.absar created D68453: TableGen: Allow 'a+b' in TableGen language.
Fri, Oct 4, 3:16 AM · Restricted Project

Sep 17 2019

javed.absar added a comment to D62394: [ARM][CMSE] Add CMSE header & builtins.

Maybe I'm doing something wrong tried to apply these patches but when trying to build code which uses cmse I get

Cannot select: intrinsic %llvm.arm.cmse.tt
fatal error: error in backend: Cannot select: intrinsic %llvm.arm.cmse.tt
clang-10: error: clang frontend command failed with exit code 70 (use -v to see invocation)

Built llvm with clang,compiler-rt,lld from master.

Sep 17 2019, 7:01 AM

Jun 21 2019

javed.absar added inline comments to D63628: AMD K10 (Barcelona) Initial Scheduler model.
Jun 21 2019, 1:39 AM · Restricted Project

Jun 7 2019

javed.absar accepted D62345: [MachineScheduler] checkResourceLimit boundary condition update.

LGTM. Sorry for the delay

Jun 7 2019, 1:48 AM · Restricted Project

May 24 2019

javed.absar created D62394: [ARM][CMSE] Add CMSE header & builtins.
May 24 2019, 7:49 AM
javed.absar added a comment to D62345: [MachineScheduler] checkResourceLimit boundary condition update.

Would this end up prioritising 'resourcelimited' too much? Looks like there can be performance differences between before and after this change - any numbers / thoughts on that?

May 24 2019, 6:06 AM · Restricted Project

May 21 2019

javed.absar committed rG603a2bac05a8: [ARM][CMSE] Add commandline option and feature macro (authored by javed.absar).
[ARM][CMSE] Add commandline option and feature macro
May 21 2019, 7:23 AM
javed.absar committed rL361261: [ARM][CMSE] Add commandline option and feature macro.
[ARM][CMSE] Add commandline option and feature macro
May 21 2019, 7:23 AM
javed.absar committed rC361261: [ARM][CMSE] Add commandline option and feature macro.
[ARM][CMSE] Add commandline option and feature macro
May 21 2019, 7:23 AM
javed.absar closed D59879: [ARM][CMSE] Add commandline option and feature macro.
May 21 2019, 7:22 AM · Restricted Project

May 16 2019

javed.absar updated the diff for D59879: [ARM][CMSE] Add commandline option and feature macro.

Updated based on review comments

May 16 2019, 7:04 AM · Restricted Project
javed.absar added inline comments to D59879: [ARM][CMSE] Add commandline option and feature macro.
May 16 2019, 6:54 AM · Restricted Project

May 14 2019

javed.absar committed rG7955e38f281a: [ARM][CMSE] Add cmse intrinsics for TT instructions (authored by javed.absar).
[ARM][CMSE] Add cmse intrinsics for TT instructions
May 14 2019, 9:14 AM
javed.absar committed rL360687: [ARM][CMSE] Add cmse intrinsics for TT instructions.
[ARM][CMSE] Add cmse intrinsics for TT instructions
May 14 2019, 9:12 AM
javed.absar closed D59888: [ARM][CMSE] Add cmse intrinsics for TT instructions.
May 14 2019, 9:11 AM · Restricted Project

Apr 30 2019

javed.absar added inline comments to D61262: [AArch64] Implement MC support for Scalable Vector Extension 2 (SVE2).
Apr 30 2019, 2:45 AM · Restricted Project

Apr 26 2019

javed.absar committed rG18b0c40bc5db: [AArch64] Add support for MTE intrinsics This provides intrinsics support for… (authored by javed.absar).
[AArch64] Add support for MTE intrinsics This provides intrinsics support for…
Apr 26 2019, 2:07 PM
javed.absar committed rL359348: [AArch64] Add support for MTE intrinsics.
[AArch64] Add support for MTE intrinsics
Apr 26 2019, 2:07 PM
javed.absar committed rC359348: [AArch64] Add support for MTE intrinsics.
[AArch64] Add support for MTE intrinsics
Apr 26 2019, 2:07 PM
javed.absar closed D60485: [AArch64] Add support for MTE intrinsics.
Apr 26 2019, 2:07 PM · Restricted Project

Apr 25 2019

javed.absar added inline comments to D60485: [AArch64] Add support for MTE intrinsics.
Apr 25 2019, 3:52 AM · Restricted Project

Apr 23 2019

javed.absar updated the diff for D60485: [AArch64] Add support for MTE intrinsics.

Hi Tim:
Have made the changes as suggested. Please have a look.

Apr 23 2019, 12:10 PM · Restricted Project
javed.absar committed rG1cdc3dbc5892: [AArch64] Add support for MTE intrinsics (authored by javed.absar).
[AArch64] Add support for MTE intrinsics
Apr 23 2019, 2:38 AM
javed.absar committed rL358963: [AArch64] Add support for MTE intrinsics.
[AArch64] Add support for MTE intrinsics
Apr 23 2019, 2:38 AM
javed.absar closed D60486: [AArch64] Add support for MTE intrinsics.
Apr 23 2019, 2:38 AM · Restricted Project

Apr 15 2019

javed.absar added a reviewer for D60485: [AArch64] Add support for MTE intrinsics: t.p.northover.
Apr 15 2019, 3:45 AM · Restricted Project
javed.absar added inline comments to D60485: [AArch64] Add support for MTE intrinsics.
Apr 15 2019, 3:41 AM · Restricted Project
javed.absar updated the diff for D60485: [AArch64] Add support for MTE intrinsics.

Tests merged as suggested.

Apr 15 2019, 2:39 AM · Restricted Project
javed.absar added a comment to D60486: [AArch64] Add support for MTE intrinsics.

Fixed as suggested

Apr 15 2019, 2:37 AM · Restricted Project
javed.absar updated the diff for D60486: [AArch64] Add support for MTE intrinsics.
Apr 15 2019, 2:37 AM · Restricted Project

Apr 12 2019

javed.absar accepted D60559: [TableGen] Include schedule model name in diagnostic..
Apr 12 2019, 5:39 AM · Restricted Project

Apr 11 2019

javed.absar added inline comments to D60559: [TableGen] Include schedule model name in diagnostic..
Apr 11 2019, 2:14 PM · Restricted Project

Apr 10 2019

javed.absar accepted D60367: [TableGen] Introduce !listsplat 'binary' operator.
Apr 10 2019, 10:46 AM · Restricted Project
javed.absar accepted D60212: [AArch64] Add lowering pattern for scalar fp16 facge and facgt.
Apr 10 2019, 12:15 AM · Restricted Project

Apr 9 2019

javed.absar added a comment to D60367: [TableGen] Introduce !listsplat 'binary' operator.

Thanks for this. Its good you show a use-case but probably the use case can be a separate commit.

Apr 9 2019, 2:34 PM · Restricted Project
javed.absar updated the summary of D60485: [AArch64] Add support for MTE intrinsics.
Apr 9 2019, 2:02 PM · Restricted Project
javed.absar created D60486: [AArch64] Add support for MTE intrinsics.
Apr 9 2019, 1:59 PM · Restricted Project
javed.absar updated the summary of D60485: [AArch64] Add support for MTE intrinsics.
Apr 9 2019, 1:47 PM · Restricted Project
javed.absar created D60485: [AArch64] Add support for MTE intrinsics.
Apr 9 2019, 1:47 PM · Restricted Project

Apr 3 2019

javed.absar added inline comments to D60212: [AArch64] Add lowering pattern for scalar fp16 facge and facgt.
Apr 3 2019, 10:06 PM · Restricted Project
javed.absar committed rG5820db93c925: [AArch64] Update v8.5a MTE LDG/STG instructions (authored by javed.absar).
[AArch64] Update v8.5a MTE LDG/STG instructions
Apr 3 2019, 7:12 AM
javed.absar committed rL357583: [AArch64] Update v8.5a MTE LDG/STG instructions.
[AArch64] Update v8.5a MTE LDG/STG instructions
Apr 3 2019, 7:12 AM
javed.absar closed D60188: [AArch64] Update v8.5a MTE instructions.
Apr 3 2019, 7:12 AM · Restricted Project
javed.absar created D60188: [AArch64] Update v8.5a MTE instructions.
Apr 3 2019, 2:44 AM · Restricted Project

Apr 1 2019

javed.absar accepted D60065: [AArch64] Add v8.5-a Memory Tagging STZGM instruction.
Apr 1 2019, 7:24 AM · Restricted Project
javed.absar accepted D60064: [AArch64] Add v8.5-a Memory Tagging STGM/LDGM instructions.
Apr 1 2019, 7:24 AM · Restricted Project
javed.absar accepted D60063: [AArch64] Add v8.5-a Memory Tagging GMID_EL1 register.

LGTM , except for a small nitpick.

Apr 1 2019, 7:22 AM · Restricted Project

Mar 28 2019

javed.absar added a reviewer for D59879: [ARM][CMSE] Add commandline option and feature macro: snidertm.
Mar 28 2019, 2:47 PM · Restricted Project

Mar 27 2019

javed.absar updated the summary of D59888: [ARM][CMSE] Add cmse intrinsics for TT instructions.
Mar 27 2019, 9:27 AM · Restricted Project
javed.absar updated the summary of D59888: [ARM][CMSE] Add cmse intrinsics for TT instructions.
Mar 27 2019, 9:27 AM · Restricted Project
javed.absar created D59888: [ARM][CMSE] Add cmse intrinsics for TT instructions.
Mar 27 2019, 9:27 AM · Restricted Project
javed.absar created D59879: [ARM][CMSE] Add commandline option and feature macro.
Mar 27 2019, 7:07 AM · Restricted Project

Mar 26 2019

javed.absar committed rGc85cb2fb5d75: [TableGen] Let list elements have a trailing comma (authored by javed.absar).
[TableGen] Let list elements have a trailing comma
Mar 26 2019, 4:17 AM
javed.absar committed rL356986: [TableGen] Let list elements have a trailing comma.
[TableGen] Let list elements have a trailing comma
Mar 26 2019, 4:16 AM
javed.absar closed D59247: [TableGen] Let list elements have a trailing comma.
Mar 26 2019, 4:16 AM · Restricted Project
javed.absar committed rG33888ff66b19: [TableGen] Give meaningful msg for def use in multiclass (authored by javed.absar).
[TableGen] Give meaningful msg for def use in multiclass
Mar 26 2019, 3:50 AM
javed.absar committed rL356985: [TableGen] Give meaningful msg for def use in multiclass.
[TableGen] Give meaningful msg for def use in multiclass
Mar 26 2019, 3:47 AM
javed.absar closed D59294: [TableGen] Give meaningful msg for def use in multiclass.
Mar 26 2019, 3:47 AM · Restricted Project

Mar 14 2019

javed.absar added a comment to D59247: [TableGen] Let list elements have a trailing comma.

ping!

Mar 14 2019, 4:38 AM · Restricted Project
javed.absar added a comment to D59294: [TableGen] Give meaningful msg for def use in multiclass.

ping!

Mar 14 2019, 4:38 AM · Restricted Project

Mar 13 2019

javed.absar created D59294: [TableGen] Give meaningful msg for def use in multiclass.
Mar 13 2019, 4:56 AM · Restricted Project

Mar 12 2019

javed.absar created D59247: [TableGen] Let list elements have a trailing comma.
Mar 12 2019, 4:28 AM · Restricted Project

Mar 5 2019

javed.absar committed rG34d3b80dbab7: TableGen: Allow lists to be concatenated through '#' (authored by javed.absar).
TableGen: Allow lists to be concatenated through '#'
Mar 5 2019, 9:16 AM
javed.absar committed rL355414: TableGen: Allow lists to be concatenated through '#'.
TableGen: Allow lists to be concatenated through '#'
Mar 5 2019, 9:15 AM
javed.absar closed D58895: [TableGen] Allow lists to be concatenated through '#'.
Mar 5 2019, 9:15 AM · Restricted Project

Jan 25 2019

javed.absar committed rL352212: [TblGen][NFC] Fix documentation formatting.
[TblGen][NFC] Fix documentation formatting
Jan 25 2019, 8:18 AM
javed.absar committed rL352185: [TblGen] Extend !if semantics through new feature !cond.
[TblGen] Extend !if semantics through new feature !cond
Jan 25 2019, 2:27 AM
javed.absar closed D55758: [TableGen] : Extend !if semantics through new language feature !ifs.
Jan 25 2019, 2:27 AM

Jan 24 2019

javed.absar added a comment to D55758: [TableGen] : Extend !if semantics through new language feature !ifs.

Ping!

Jan 24 2019, 9:10 AM

Jan 22 2019

javed.absar updated the diff for D55758: [TableGen] : Extend !if semantics through new language feature !ifs.

Added BNF grammer for !cond as suggested .

Jan 22 2019, 9:16 AM

Jan 16 2019

javed.absar added a comment to D55758: [TableGen] : Extend !if semantics through new language feature !ifs.

Hi all:
I have made the changes as requested. That is, removed explicit 'default' while sticking to overall syntax as before. I found that removing default in fact simplifies the implementation somewhat. Also, have split the tests to cleaner separate ones.

Jan 16 2019, 3:18 AM
javed.absar updated the diff for D55758: [TableGen] : Extend !if semantics through new language feature !ifs.
Jan 16 2019, 3:14 AM

Jan 3 2019

javed.absar added a comment to D55758: [TableGen] : Extend !if semantics through new language feature !ifs.

Hi Hal/Others:

I have changed the syntax from !ifs to '!cond' now, while retaining the others parts from original !ifs (instead of from LISP). Please let me know if changes are ok with you.

Thanks

Jan 3 2019, 1:38 AM

Dec 24 2018

javed.absar updated the diff for D55758: [TableGen] : Extend !if semantics through new language feature !ifs.

Changes based on review comments. The new operator is now called '!cond', and 'default' must be the last clause.

Dec 24 2018, 6:52 AM

Dec 21 2018

javed.absar added inline comments to D56003: [RFC] [CFE] Allocatable Global Register Variables for ARM.
Dec 21 2018, 9:25 AM
javed.absar added a comment to D56007: [AArch64] Add command-line option for Execution and Data Prediction Instructions.

LGTM but will wait for a while to allow others comment as well, if necessary.

Dec 21 2018, 8:41 AM

Dec 19 2018

javed.absar added a comment to D55758: [TableGen] : Extend !if semantics through new language feature !ifs.
Dec 19 2018, 2:27 AM

Dec 18 2018

javed.absar added reviewers for D55758: [TableGen] : Extend !if semantics through new language feature !ifs: tra, arsenm.
Dec 18 2018, 2:45 AM

Dec 17 2018

javed.absar added a reviewer for D55758: [TableGen] : Extend !if semantics through new language feature !ifs: simon_tatham.
Dec 17 2018, 5:41 AM
javed.absar added inline comments to D55758: [TableGen] : Extend !if semantics through new language feature !ifs.
Dec 17 2018, 5:37 AM
javed.absar updated the summary of D55758: [TableGen] : Extend !if semantics through new language feature !ifs.
Dec 17 2018, 1:55 AM
javed.absar created D55758: [TableGen] : Extend !if semantics through new language feature !ifs.
Dec 17 2018, 1:54 AM

Dec 10 2018

javed.absar accepted D55509: [NFC][AArch64] Remove duplicate Arch list in target parser tests..

LGTM

Dec 10 2018, 6:29 AM

Nov 9 2018

javed.absar accepted D54142: [ARM] Cortex-M4 schedule.

LGTM. Thanks for this.

Nov 9 2018, 5:53 AM · Restricted Project

Nov 6 2018

javed.absar added inline comments to D54142: [ARM] Cortex-M4 schedule.
Nov 6 2018, 3:46 AM · Restricted Project

Oct 30 2018

javed.absar accepted D53319: Add support for AArch64 UDF instruction.
Oct 30 2018, 3:39 AM

Oct 29 2018

javed.absar added a comment to D53319: Add support for AArch64 UDF instruction.

Could you add assembler/disassembler tests for udf ?

Oct 29 2018, 3:06 AM

Oct 16 2018

javed.absar added inline comments to D53319: Add support for AArch64 UDF instruction.
Oct 16 2018, 3:47 AM

Oct 12 2018

javed.absar accepted D52764: [Intrinsic] Add llvm.minimum and llvm.maximum instrinsic functions.
Oct 12 2018, 1:21 AM

Oct 10 2018

javed.absar added inline comments to D51160: Adjust MIScheduler to use ProcResource counts.
Oct 10 2018, 1:39 PM · Restricted Project