This patch adds the assembly/disassembly for the following instruction:
FP:
FMLA (multiple and indexed vector): Multi-vector floating-point fused multiply-add by indexed element. FMLS(multiple and indexed vector): Multi-vector floating-point fused multiply-subtract by indexed element. BFDOT (multiple and indexed vector): Multi-vector BFloat16 floating-point dot-product by indexed element. FDOT (multiple and indexed vector): Multi-vector half-precision floating-point dot-product by indexed element. BFVDOT: Multi-vector BFloat16 floating-point vertical dot-product by indexed element. FVDOT: Multi-vector half-precision floating-point vertical dot-product by indexed element.
INT:
SDOT (2-way, multiple and indexed vector): Multi-vector signed integer dot-product by indexed element. (4-way, multiple and indexed vector): Multi-vector signed integer dot-product by indexed element. SUDOT (multiple and indexed vector): Multi-vector signed by unsigned integer dot-product by indexed elements. SUVDOT: Multi-vector signed by unsigned integer vertical dot-product by indexed element. UDOT (2-way, multiple and indexed vector): Multi-vector unsigned integer dot-product by indexed element. (4-way, multiple and indexed vector): Multi-vector unsigned integer dot-product by indexed element. USDOT (multiple and indexed vector): Multi-vector unsigned by signed integer dot-product by indexed element. USVDOT: Multi-vector unsigned by signed integer vertical dot-product by indexed element.
For the multi-vec ternary indexed with 2 and 4 ZA single-vectors for
32 and 64 bits according to the instruction
The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09
Depends on:D135563
For consistency please can all the dot instructions have a suffix even when there's only a single variant of the instruction. Doing this makes it easier to know what the instruction does from the name alone. So for this case it'll be USVDOT_VG4_M4ZZI_BtoS.