User Details
- User Since
- Feb 4 2020, 3:58 AM (164 w, 4 d)
Thu, Mar 30
Wed, Mar 29
- Fix the test with wrong size of the input vector and remove the splat in the second test
- Add more tests to interleave store with streaming compatible function
Tue, Mar 28
Wed, Mar 22
Mon, Mar 20
-Paste all the tests for the predicate-as-counter in one file
- Remove extra space
- Allow the alias to be used only when sve2.1 or sme2 are enabled.
Fri, Mar 17
Mon, Mar 13
Thank you Matt. It LGTM!
Thu, Mar 9
- Remove old function header
Fri, Mar 3
Mar 1 2023
Feb 28 2023
- Address review comments
- Address review comments
Feb 27 2023
Feb 24 2023
Feb 15 2023
- Use in VisitVectorDeinterleave getVectorIdxConstant to the Index in VECTOR_EXTRACT
- Address nit in yhe test files
Feb 14 2023
Feb 13 2023
Fix LangRef for deinterleave and interleave arguments.
Fix extra space in sve-vector-deinterleave.ll
Thank you all for the suggestion.
I believe I have addressed all of them.
Carol
- Remove unwanted changes in LangRef for vector-reverse
- Remove .patch file
- Indent sve tests
- Address review comments
Feb 7 2023
The overloaded type size in the function for the examples in LangRef and in the test files were with the incorrect. The overloaded type size is showing as the smallest type size in the function. Problem is that there is only
LLVMHalfElementsVectorType to describe the dependencies between the type sizes.
So the overloaded type size needs to be the biggest type size in the function.
Feb 3 2023
Address review comments.
- Change the deinterleave intrinsic and ISD Node to return odd and even
- Add to the intrinsic names the stride 2:
experimental.vector.deinterleave to experimental.vector.deinterleave2 experimental.vector.interleave to experimental.vector.interleave2
Jan 27 2023
Paul,
Let me know if I understood correctly.
You are suggesting that:
Jan 26 2023
-Rebase
- Rebase
- Rebase
Jan 25 2023
Thank you @kmclaughlin for checking and making the changes.
I don't see any problems with this patch now.
So, LGTM!
Jan 24 2023
Thank you David,
IMHO it is LGTM patch.
I liked the changes you did in the tests to use attributes #1.
I am thinking in refactor the add tests to do the same, because some are for sme-f64f64 and some for sme-i16i64.
-Use only one set of foreach couple in IntrinsicsAArch64.td to build
VG4 and VG2 add/sub instructions
Hey Kerry,
Thank you for the patch. I made some comments.
Some are the comments you thankfully raised on my previous patches.
Thank you for that btw.
- Address comments in the test files
Jan 23 2023
- Rebase
Rebase
- Rebase
- Rebase
- Rebase
Thank you Sander for the patch!
IMHO it is ok to simplify the classes, as far as all the alias are still there.
I just would add the comments we had before on top of the multiclasses.
But besides that I see no problem.
Jan 20 2023
- update test
Thank you @kmclaughlin.
You are correct, I replaced now.
- Replace ZPR2 by ZPR2Mul2 in s SVE2p1_Cvt_VG2_Pat
-Add the missing test for sub intrinsic
Jan 19 2023
Thank you Kerry!
LGTM!
Jan 18 2023
Thank you Sander,
It would be nice if you could point in the commit message to the spec that introduces this.
I believe it is the 2022 release. Right?
Hey Sander,
I am not sure if this class is always used by movaz. In my search it looks it is used by them too.
I also looked at the sme2_mova_tile_or_array_to_vec_aliases, but it looks that one is fine and we don't need to change.
Thank you David!
IMHO it looks all fine in this patch.
Thank you Kerry.
IMHO It looks all fine in this patch. Even the use of VectorIndex<smth>_timm. That I asked in the previous patch(D141946) looks consistent in this one.