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[RISCV] Support interleaved load lowering
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Authored by luke957 on Jul 30 2021, 8:57 PM.

Details

Summary

Lower interleaved load to segment load intrinsic.

Diff Detail

Unit TestsFailed

TimeTest
120 msx64 debian > Polly.Support::dumpfunction.ll
Script: -- : 'RUN: at line 2'; /var/lib/buildkite-agent/builds/llvm-project/build/bin/opt -polly-process-unprofitable -polly-remarks-minimal -polly-use-llvm-names -polly-import-jscop-dir=/var/lib/buildkite-agent/builds/llvm-project/polly/test/Support -polly-codegen-verify -enable-new-pm=1 -O3 -polly -polly-position=before-vectorizer -polly-dump-before --disable-output /var/lib/buildkite-agent/builds/llvm-project/polly/test/Support/dumpfunction.ll

Event Timeline

luke957 created this revision.Jul 30 2021, 8:57 PM
luke957 requested review of this revision.Jul 30 2021, 8:57 PM
Herald added a project: Restricted Project. · View Herald TranscriptJul 30 2021, 8:57 PM

Don't you need to add the InterleavedAccess pass to RISCVTargetMachine?

llvm/lib/Target/RISCV/RISCVISelLowering.cpp
1001

These intrinsics only have SelectionDAG support for scalable vector types. And they take VL as an operand.

luke957 edited the summary of this revision. (Show Details)Aug 11 2021, 4:41 AM
luke957 added reviewers: craig.topper, frasercrmck.

Don't you need to add the InterleavedAccess pass to RISCVTargetMachine?

Yeah, we need to do this. I have updated the pacth.

craig.topper added inline comments.Aug 18 2021, 9:01 PM
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
1059

Please address these clang-format warnings

craig.topper added inline comments.Aug 18 2021, 9:02 PM
llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
6

Why are we only testing one factor?

luke957 added inline comments.Sat, Aug 28, 8:44 PM
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
1059

Fix format.

llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
6

Add test case for factor 3 and 4.

craig.topper added inline comments.Tue, Sep 7, 9:53 AM
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
971

Does this need to check if floating point elements are supported?

995

Please fix this clang-tidy warning

997

This is not the correct way to convert a fixed vector type to a scalable vector type. For large vectors this will create a type that maps to something larger than LMUL=8. We need to map fixed vector types to scalable vector types using the logic from RISCVTargetLowering::getContainerForFixedLengthVector which takes into account a user provided VLEN via -riscv-v-vector-bits-min command line option.

llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
8

Why is the VL 1? The vector type has 16 elements, the interleave factor is 2. So the VL should be 8.

craig.topper added inline comments.Tue, Sep 7, 9:55 AM
llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
17

Please make sure the tests can't be optimized to nothing. These shuffles aren't used so are allowed to be deleted.