Infer alignment of loads with unspecified alignment in IR/bitcode parsing.

[efriedma]

Summary

For IR generated by a compiler, this is really simple: you just take the datalayout from the beginning of the file, and apply it to all the IR later in the file. For optimization testcases that don't care about the datalayout, this is also really simple: we just use the default datalayout.

The complexity here comes from the fact that some LLVM tools allow overriding the datalayout: some tools have an explicit flag for this, some tools will infer a datalayout based on the code generation target. Supporting this properly required plumbing through a bunch of new machinery: we want to allow overriding the datalayout after the datalayout is parsed from the file, but before we use any information from it. Therefore, IR/bitcode parsing now has a callback to allow tools to compute the datalayout at the appropriate time.

Not sure if I covered all the LLVM tools that want to use the callback. (clang? lli? Misc IR manipulation tools like llvm-link?). But this is at least enough for all the LLVM regression tests, and IR without a datalayout is not something frontends should generate.

With this patch, we impose one other new restriction: all "target triple", "target datalayout", and "source_file" directives have to be at the beginning of the file. This should be true for all IR generated by LLVM, but hand-written IR tests sometimes stick them in weird places.

This change had some sort of weird effects for certain CodeGen regression tests: if the datalayout is overridden with a datalayout with a different program or stack address space, we now parse IR based on the overridden datalayout, instead of the one written in the file (or the default one, if none is specified). This broke a few AVR tests, and one AMDGPU test.

Outside the CodeGen tests I mentioned, the test changes are all just fixing CHECK lines and moving around datalayout lines in weird places.

Not sure if I should try to split this. The code changes are small enough, but the test changes are a bit large to review. I guess I could change some of the tests to explicitly specify alignment, and commit that separately?

Once this lands, it should be easy to rebase and land D77454, to completely eliminate loads with unspecified alignment from IR.

[mehdi_amini]

llvm/include/llvm/AsmParser/Parser.h

31

The type for the callback is strange to me, this allows basically any modification of the Module during the callback, can't we just pass an Optional<DataLayout> override_datalayout in the parsing functions?

llvm/tools/opt/opt.cpp

122

How is it related to the data layout thing?

[efriedma]

llvm/include/llvm/AsmParser/Parser.h

31

llc needs access to the target triple from the IR file to decide which datalayout to use. Hence the callback API: we need to decide the datalayout after we parse the triple, but before we parse any function definitions.

llvm/tools/opt/opt.cpp

122

Upgrading debug info encounters a similar sort of issue with the datalayout as computing the alignment: if we try to upgrade debug info with the wrong datalayout, we get the wrong result. llc was using the UpgradeDebugInfo boolean to delay upgrading debug info until after it computed the correct datalayout. With this patch, llc doesn't need that special case anymore.

Given that, there isn't really any legitimate use for disabling UpgradeDebugInfo anymore. So I decided it makes sense to split apart the API, so the normal entry points for IR parsing don't expose this weird edge case of intentionally creating invalid bitcode files. I added the entry point parseAssemblyFileWithIndexNoUpgradeDebugInfo, and I split the debug-upgrading part of "-disable-verify" into a separate option.

Maybe I should do something more minimal in this patch?

[dexonsmith]

llvm/tools/opt/opt.cpp

122

It would be great for @aprantl to review at least this part of the patch.

@efriedma, I'm curious if this refactoring would be easy/reasonable to split out and commit first?

[mehdi_amini]

llvm/include/llvm/AsmParser/Parser.h

31

In this case can you make it a callback that would be something like DataLayout callback(Triple&)?

[aprantl]

llvm/include/llvm/AsmParser/Parser.h

59–60

There is a stale doxygen comment here now.

llvm/tools/opt/opt.cpp

122

Given that, there isn't really any legitimate use for disabling UpgradeDebugInfo anymore.

IIRC I originally added this option for the sole reason of testing the upgrade behavior, as shown by the doxygen comment:

/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
///                         This option should only be set to false by llvm-as
///                         for use inside the LLVM testuite!

The intended behavior is that if you run llvm-as --disable-verify (something that should not be done outside of the testsuite) this flag would be set to false.

See https://reviews.llvm.org/D38184 for the original context.

[efriedma]

llvm/tools/opt/opt.cpp

122

I guess I could split out the change to add this flag into a separate patch. I could split out the actual change to set the alignment of LoadInst into a separate patch. I guess I could also split out the part of the IR parsing change that requires the datalayout at the beginning of the file. I don't think any of those changes help make the patch more comprehensible, but they would make it smaller.

I can't really split the IR parsing API rewrite in any reasonable way.

[efriedma]

Rebased. Changed the callback API per review comment.

[mehdi_amini]

llvm/include/llvm/AsmParser/Parser.h

31

Nit: function argument shouldn't take a string by copy, ideally should StringRef.

83–84

Can you update the doxygen? (same for the other functions)

[arichardson]

Thanks, this will be very useful for our out-of-tree CHERI changes. We have some tests where we would like to pass the datalayout on the command line using a lit substitution instead of hardcoding it in the test files. I can't remember exactly what problems were caused by setting the datalayout late, but I think it was related to errors due to function forward declarations being inserted in the wrong address space.

Just one general comment: I wonder if would make more sense to pass the Module* to the callback and let the tool perform any changes there? This would make it more flexible if we want to allow early overriding other aspects on the command line other than the datalayout.
Should also make the callbacks a bit shorter:
For example the llvm-as one could them be:

auto SetDataLayout = [](llvm::Module*) {
  if (!ClDataLayout.empty())
    M->setDataLayout(ClDataLayout);
};

llvm/include/llvm/AsmParser/Parser.h

44–45

This doc comment should be removed since the parameter is gone now.

[efriedma]

Address review comments.

[mehdi_amini]

In D78403#1994184, @arichardson wrote:

Just one general comment: I wonder if would make more sense to pass the Module* to the callback and let the tool perform any changes there?

This was the original revision, I'm against doing this: I think the contract should be left as narrow as possible to express the intent of the API here. This is to express that this is not a hook to "hack whatever you want there" kind of callback.

[mehdi_amini]

llvm/include/llvm/Bitcode/BitcodeReader.h

108

I think a better default is an empty function_ref instead of a lambda: I suspect you can write it this way DataLayoutCallbackTy DataLayoutCallback = {}

llvm/lib/Bitcode/Reader/BitcodeReader.cpp

3631

Are you making invalid bitcode that was valid before here?
I'd rather avoid doing this, can we check if (SeenFirstFunctionBody && DataLayoutCallback)?
(which also implies to not provide a callback from any tool when not needed (and make sure the default argument for the callback is everywhere an empty function_ref)

4847

Is there valid bitcode out-there that could be hit by this?

[efriedma]

llvm/include/llvm/Bitcode/BitcodeReader.h

108

I didn't realize function_ref was allowed to be null.

I guess that's simpler in some sense, but I'm not sure it's worthwhile; possibly-null values make the documentation more complicated. Not a big deal either way, though.

llvm/lib/Bitcode/Reader/BitcodeReader.cpp

3631

Yes, this is rejecting bitcode that LLVM currently accepts. No version of LLVM has ever emitted bitcode that violates this constraint, though; LLVM always emits the datalayout early. In theory, I guess if someone had a custom bitcode emitter that emitted bitcode in some really weird order, it could be an issue.

I'm not sure what we would do if we want to "handle" this; if we see a datalayout after we've already read IR instructions, we would have to go back and fix/reparse already parsed IR. I guess we could, but I'm not really enthusiastic about writing bitcode testcases by hand to test that codepath.

4847

No, it's illegal to load a value of unsized type. The verifier has an equivalent check; we're just moving that check earlier, so we can resolve the alignment before calling the LoadInst constructor.

[mehdi_amini]

LGTM, but it'd be nice to have another approval as well.

llvm/lib/Bitcode/Reader/BitcodeReader.cpp

3631

if we see a datalayout after we've already read IR instructions, we would have to go back and fix/reparse already parsed IR

This would already be an issue with the current parser though?
If you don't mind committing these two lines right now since it seems like a defensive measure in the reader that is valid to do independently of this patch (assuming I understand correctly here?)

[efriedma]

llvm/lib/Bitcode/Reader/BitcodeReader.cpp

3631

The current parser doesn't really query the datalayout. (Well, except in the cases where it does, for the program/stack address spaces. But that doesn't affect mainstream targets.)

Yes, sure, I can commit this separately.

[efriedma]

Rebase. Add missing handling for atomic loads (which doesn't really do anything on its own, but it's necessary for D77454).

[efriedma]

Rebased. Split off D79900

llvm/include/llvm/AsmParser/Parser.h

 //===-- Parser.h - Parser for LLVM IR text assembly files -------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 //  These classes are implemented by the lib/AsmParser library.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_ASMPARSER_PARSER_H
 #define LLVM_ASMPARSER_PARSER_H
 
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/StringRef.h"
 #include <memory>
 
 namespace llvm {
 
 class Constant;
 class LLVMContext;
 class MemoryBufferRef;
 class Module;
 class ModuleSummaryIndex;
 struct SlotMapping;
 class SMDiagnostic;
 class Type;
 
+typedef llvm::function_ref<Optional<std::string>(StringRef)>
+    DataLayoutCallbackTy;
+
 /// This function is a main interface to the LLVM Assembly Parser. It parses
 /// an ASCII file that (presumably) contains LLVM Assembly code. It returns a
 /// Module (intermediate representation) with the corresponding features. Note
 /// that this does not verify that the generated Module is valid, so you should
 /// run the verifier after parsing the file to check that it is okay.
 /// Parse LLVM Assembly from a file
 /// \param Filename The name of the file to parse
 /// \param Err Error result info.
 /// \param Context Context in which to allocate globals info.
 /// \param Slots The optional slot mapping that will be initialized during
 ///              parsing.
-/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
-///                         This option should only be set to false by llvm-as
-///                         for use inside the LLVM testuite!
-/// \param DataLayoutString Override datalayout in the llvm assembly.
-std::unique_ptr<Module>
-parseAssemblyFile(StringRef Filename, SMDiagnostic &Err, LLVMContext &Context,
-                  SlotMapping *Slots = nullptr, bool UpgradeDebugInfo = true,
-                  StringRef DataLayoutString = "");
+std::unique_ptr<Module> parseAssemblyFile(StringRef Filename, SMDiagnostic &Err,
+                                          LLVMContext &Context,
+                                          SlotMapping *Slots = nullptr);
 
 /// The function is a secondary interface to the LLVM Assembly Parser. It parses
 /// an ASCII string that (presumably) contains LLVM Assembly code. It returns a
 /// Module (intermediate representation) with the corresponding features. Note
 /// that this does not verify that the generated Module is valid, so you should
 /// run the verifier after parsing the file to check that it is okay.
 /// Parse LLVM Assembly from a string
 /// \param AsmString The string containing assembly
 /// \param Err Error result info.
 /// \param Context Context in which to allocate globals info.
 /// \param Slots The optional slot mapping that will be initialized during
 ///              parsing.
-/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
-///                         This option should only be set to false by llvm-as
-///                         for use inside the LLVM testuite!
-/// \param DataLayoutString Override datalayout in the llvm assembly.
 std::unique_ptr<Module> parseAssemblyString(StringRef AsmString,
                                             SMDiagnostic &Err,
                                             LLVMContext &Context,
-                                            SlotMapping *Slots = nullptr,
-                                            bool UpgradeDebugInfo = true,
-                                            StringRef DataLayoutString = "");
+                                            SlotMapping *Slots = nullptr);
 
 /// Holds the Module and ModuleSummaryIndex returned by the interfaces
 /// that parse both.
 struct ParsedModuleAndIndex {
   std::unique_ptr<Module> Mod;
   std::unique_ptr<ModuleSummaryIndex> Index;
 };
 
 /// This function is a main interface to the LLVM Assembly Parser. It parses
 /// an ASCII file that (presumably) contains LLVM Assembly code, including
 /// a module summary. It returns a Module (intermediate representation) and
 /// a ModuleSummaryIndex with the corresponding features. Note that this does
 /// not verify that the generated Module or Index are valid, so you should
 /// run the verifier after parsing the file to check that they are okay.
 /// Parse LLVM Assembly from a file
 /// \param Filename The name of the file to parse
 /// \param Err Error result info.
 /// \param Context Context in which to allocate globals info.
 /// \param Slots The optional slot mapping that will be initialized during
 ///              parsing.
-/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
-///                         This option should only be set to false by llvm-as
-///                         for use inside the LLVM testuite!
-/// \param DataLayoutString Override datalayout in the llvm assembly.
-ParsedModuleAndIndex
-parseAssemblyFileWithIndex(StringRef Filename, SMDiagnostic &Err,
-                           LLVMContext &Context, SlotMapping *Slots = nullptr,
-                           bool UpgradeDebugInfo = true,
-                           StringRef DataLayoutString = "");
+/// \param DataLayoutCallback Override datalayout in the llvm assembly.
+ParsedModuleAndIndex parseAssemblyFileWithIndex(
+    StringRef Filename, SMDiagnostic &Err, LLVMContext &Context,
+    SlotMapping *Slots = nullptr,
+    DataLayoutCallbackTy DataLayoutCallback = [](StringRef) { return None; });
+
+/// Only for use in llvm-as for testing; this does not produce a valid module.
+ParsedModuleAndIndex parseAssemblyFileWithIndexNoUpgradeDebugInfo(
+    StringRef Filename, SMDiagnostic &Err, LLVMContext &Context,
+    SlotMapping *Slots, DataLayoutCallbackTy DataLayoutCallback);
 
 /// This function is a main interface to the LLVM Assembly Parser. It parses
 /// an ASCII file that (presumably) contains LLVM Assembly code for a module
 /// summary. It returns a a ModuleSummaryIndex with the corresponding features.
 /// Note that this does not verify that the generated Index is valid, so you
 /// should run the verifier after parsing the file to check that it is okay.
 /// Parse LLVM Assembly Index from a file
 /// \param Filename The name of the file to parse
 /// \param Err Error result info.
 std::unique_ptr<ModuleSummaryIndex>
 parseSummaryIndexAssemblyFile(StringRef Filename, SMDiagnostic &Err);
 
 /// parseAssemblyFile and parseAssemblyString are wrappers around this function.
 /// Parse LLVM Assembly from a MemoryBuffer.
 /// \param F The MemoryBuffer containing assembly
 /// \param Err Error result info.
 /// \param Slots The optional slot mapping that will be initialized during
 ///              parsing.
-/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
-///                         This option should only be set to false by llvm-as
-///                         for use inside the LLVM testuite!
-/// \param DataLayoutString Override datalayout in the llvm assembly.
-std::unique_ptr<Module> parseAssembly(MemoryBufferRef F, SMDiagnostic &Err,
-                                      LLVMContext &Context,
-                                      SlotMapping *Slots = nullptr,
-                                      bool UpgradeDebugInfo = true,
-                                      StringRef DataLayoutString = "");
+/// \param DataLayoutCallback Override datalayout in the llvm assembly.
+std::unique_ptr<Module> parseAssembly(
+    MemoryBufferRef F, SMDiagnostic &Err, LLVMContext &Context,
+    DataLayoutCallbackTy DataLayoutCallback = [](StringRef) { return None; });
 
 /// Parse LLVM Assembly including the summary index from a MemoryBuffer.
 ///
 /// \param F The MemoryBuffer containing assembly with summary
 /// \param Err Error result info.
 /// \param Slots The optional slot mapping that will be initialized during
 ///              parsing.
-/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
-///                         This option should only be set to false by llvm-as
-///                         for use inside the LLVM testuite!
-/// \param DataLayoutString Override datalayout in the llvm assembly.
+/// \param DataLayoutCallback Override datalayout in the llvm assembly.
 ///
 /// parseAssemblyFileWithIndex is a wrapper around this function.
 ParsedModuleAndIndex parseAssemblyWithIndex(MemoryBufferRef F,
                                             SMDiagnostic &Err,
                                             LLVMContext &Context,
-                                            SlotMapping *Slots = nullptr,
-                                            bool UpgradeDebugInfo = true,
-                                            StringRef DataLayoutString = "");
+                                            SlotMapping *Slots = nullptr);
 
 /// Parse LLVM Assembly for summary index from a MemoryBuffer.
 ///
 /// \param F The MemoryBuffer containing assembly with summary
 /// \param Err Error result info.
 ///
 /// parseSummaryIndexAssemblyFile is a wrapper around this function.
 std::unique_ptr<ModuleSummaryIndex>
 parseSummaryIndexAssembly(MemoryBufferRef F, SMDiagnostic &Err);
 
 /// This function is the low-level interface to the LLVM Assembly Parser.
 /// This is kept as an independent function instead of being inlined into
 /// parseAssembly for the convenience of interactive users that want to add
 /// recently parsed bits to an existing module.
 ///
 /// \param F The MemoryBuffer containing assembly
 /// \param M The module to add data to.
 /// \param Index The index to add data to.
 /// \param Err Error result info.
 /// \param Slots The optional slot mapping that will be initialized during
 ///              parsing.
 /// \return true on error.
-/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
-///                         This option should only be set to false by llvm-as
-///                         for use inside the LLVM testuite!
-/// \param DataLayoutString Override datalayout in the llvm assembly.
-bool parseAssemblyInto(MemoryBufferRef F, Module *M, ModuleSummaryIndex *Index,
-                       SMDiagnostic &Err, SlotMapping *Slots = nullptr,
-                       bool UpgradeDebugInfo = true,
-                       StringRef DataLayoutString = "");
+/// \param DataLayoutCallback Override datalayout in the llvm assembly.
+bool parseAssemblyInto(
+    MemoryBufferRef F, Module *M, ModuleSummaryIndex *Index, SMDiagnostic &Err,
+    SlotMapping *Slots = nullptr,
+    DataLayoutCallbackTy DataLayoutCallback = [](StringRef) { return None; });
 
 /// Parse a type and a constant value in the given string.
 ///
 /// The constant value can be any LLVM constant, including a constant
 /// expression.
 ///
 /// \param Slots The optional slot mapping that will restore the parsing state
 /// of the module.

llvm/include/llvm/Bitcode/BitcodeReader.h

 #include <string>
 #include <system_error>
 #include <vector>
 namespace llvm {
 
 class LLVMContext;
 class Module;
 
+typedef llvm::function_ref<Optional<std::string>(StringRef)>
+    DataLayoutCallbackTy;
+
   // These functions are for converting Expected/Error values to
   // ErrorOr/std::error_code for compatibility with legacy clients. FIXME:
   // Remove these functions once no longer needed by the C and libLTO APIs.
 
   std::error_code errorToErrorCodeAndEmitErrors(LLVMContext &Ctx, Error Err);
 
   template <typename T>
   ErrorOr<T> expectedToErrorOrAndEmitErrors(LLVMContext &Ctx, Expected<T> Val) {
BitcodeModule(ArrayRef<uint8_t> Buffer, StringRef ModuleIdentifier,
                   uint64_t IdentificationBit, uint64_t ModuleBit)
         : Buffer(Buffer), ModuleIdentifier(ModuleIdentifier),
           IdentificationBit(IdentificationBit), ModuleBit(ModuleBit) {}
 
     // Calls the ctor.
     friend Expected<BitcodeFileContents>
     getBitcodeFileContents(MemoryBufferRef Buffer);
 
-    Expected<std::unique_ptr<Module>> getModuleImpl(LLVMContext &Context,
-                                                    bool MaterializeAll,
-                                                    bool ShouldLazyLoadMetadata,
-                                                    bool IsImporting);
+    Expected<std::unique_ptr<Module>>
+    getModuleImpl(LLVMContext &Context, bool MaterializeAll,
+                  bool ShouldLazyLoadMetadata, bool IsImporting,
+                  DataLayoutCallbackTy DataLayoutCallback);
 
   public:
     StringRef getBuffer() const {
       return StringRef((const char *)Buffer.begin(), Buffer.size());
     }
 
     StringRef getStrtab() const { return Strtab; }
 
     StringRef getModuleIdentifier() const { return ModuleIdentifier; }
 
     /// Read the bitcode module and prepare for lazy deserialization of function
     /// bodies. If ShouldLazyLoadMetadata is true, lazily load metadata as well.
     /// If IsImporting is true, this module is being parsed for ThinLTO
     /// importing into another module.
     Expected<std::unique_ptr<Module>> getLazyModule(LLVMContext &Context,
                                                     bool ShouldLazyLoadMetadata,
                                                     bool IsImporting);
 
     /// Read the entire bitcode module and return it.
-    Expected<std::unique_ptr<Module>> parseModule(LLVMContext &Context);
+    Expected<std::unique_ptr<Module>> parseModule(
+        LLVMContext &Context, DataLayoutCallbackTy DataLayoutCallback =
+                                  [](StringRef) { return None; });
 
     /// Returns information about the module to be used for LTO: whether to
     /// compile with ThinLTO, and whether it has a summary.
     Expected<BitcodeLTOInfo> getLTOInfo();
 
     /// Parse the specified bitcode buffer, returning the module summary index.
     Expected<std::unique_ptr<ModuleSummaryIndex>> getSummary();
 
typedef llvm::function_ref<Optional<std::string>(StringRef)>
   Expected<bool> isBitcodeContainingObjCCategory(MemoryBufferRef Buffer);
 
   /// Read the header of the specified bitcode buffer and extract just the
   /// producer string information. If successful, this returns a string. On
   /// error, this returns "".
   Expected<std::string> getBitcodeProducerString(MemoryBufferRef Buffer);
 
   /// Read the specified bitcode file, returning the module.
-  Expected<std::unique_ptr<Module>> parseBitcodeFile(MemoryBufferRef Buffer,
-                                                     LLVMContext &Context);
+  Expected<std::unique_ptr<Module>> parseBitcodeFile(
+      MemoryBufferRef Buffer, LLVMContext &Context,
+      DataLayoutCallbackTy DataLayoutCallback = [](StringRef) {
+        return None;
+      });
 
   /// Returns LTO information for the specified bitcode file.
   Expected<BitcodeLTOInfo> getBitcodeLTOInfo(MemoryBufferRef Buffer);
 
   /// Parse the specified bitcode buffer, returning the module summary index.
   Expected<std::unique_ptr<ModuleSummaryIndex>>
   getModuleSummaryIndex(MemoryBufferRef Buffer);
 

llvm/include/llvm/CodeGen/MIRParser/MIRParser.h

 namespace llvm {
 
 class Function;
 class MIRParserImpl;
 class MachineModuleInfo;
 class SMDiagnostic;
 class StringRef;
 
+typedef llvm::function_ref<Optional<std::string>(StringRef)>
+    DataLayoutCallbackTy;
+
 /// This class initializes machine functions by applying the state loaded from
 /// a MIR file.
 class MIRParser {
   std::unique_ptr<MIRParserImpl> Impl;
 
 public:
   MIRParser(std::unique_ptr<MIRParserImpl> Impl);
   MIRParser(const MIRParser &) = delete;
   ~MIRParser();
 
   /// Parses the optional LLVM IR module in the MIR file.
   ///
   /// A new, empty module is created if the LLVM IR isn't present.
   /// \returns nullptr if a parsing error occurred.
-  std::unique_ptr<Module> parseIRModule();
+  std::unique_ptr<Module> parseIRModule(
+      DataLayoutCallbackTy DataLayoutCallback = [](StringRef) { return None; });
 
   /// Parses MachineFunctions in the MIR file and add them to the given
   /// MachineModuleInfo \p MMI.
   ///
   /// \returns true if an error occurred.
   bool parseMachineFunctions(Module &M, MachineModuleInfo &MMI);
 };
 

llvm/include/llvm/IRReader/IRReader.h

 //===---- llvm/IRReader/IRReader.h - Reader for LLVM IR files ---*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file defines functions for reading LLVM IR. They support both
 // Bitcode and Assembly, automatically detecting the input format.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_IRREADER_IRREADER_H
 #define LLVM_IRREADER_IRREADER_H
 
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/StringRef.h"
 #include <memory>
 
 namespace llvm {
 
 class MemoryBuffer;
 class MemoryBufferRef;
 class Module;
 class SMDiagnostic;
 class LLVMContext;
 
+typedef llvm::function_ref<Optional<std::string>(StringRef)>
+    DataLayoutCallbackTy;
+
 /// If the given MemoryBuffer holds a bitcode image, return a Module
 /// for it which does lazy deserialization of function bodies.  Otherwise,
 /// attempt to parse it as LLVM Assembly and return a fully populated
 /// Module. The ShouldLazyLoadMetadata flag is passed down to the bitcode
 /// reader to optionally enable lazy metadata loading. This takes ownership
 /// of \p Buffer.
 std::unique_ptr<Module> getLazyIRModule(std::unique_ptr<MemoryBuffer> Buffer,
                                         SMDiagnostic &Err, LLVMContext &Context,
                                         bool ShouldLazyLoadMetadata = false);
 
 /// If the given file holds a bitcode image, return a Module
 /// for it which does lazy deserialization of function bodies.  Otherwise,
 /// attempt to parse it as LLVM Assembly and return a fully populated
 /// Module. The ShouldLazyLoadMetadata flag is passed down to the bitcode
 /// reader to optionally enable lazy metadata loading.
 std::unique_ptr<Module>
 getLazyIRFileModule(StringRef Filename, SMDiagnostic &Err, LLVMContext &Context,
                     bool ShouldLazyLoadMetadata = false);
 
 /// If the given MemoryBuffer holds a bitcode image, return a Module
 /// for it.  Otherwise, attempt to parse it as LLVM Assembly and return
 /// a Module for it.
-/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
-///                         This option should only be set to false by llvm-as
-///                         for use inside the LLVM testuite!
-/// \param DataLayoutString Override datalayout in the llvm assembly.
-std::unique_ptr<Module> parseIR(MemoryBufferRef Buffer, SMDiagnostic &Err,
-                                LLVMContext &Context,
-                                bool UpgradeDebugInfo = true,
-                                StringRef DataLayoutString = "");
+/// \param DataLayoutCallback Override datalayout in the llvm assembly.
+std::unique_ptr<Module> parseIR(
+    MemoryBufferRef Buffer, SMDiagnostic &Err, LLVMContext &Context,
+    DataLayoutCallbackTy DataLayoutCallback = [](StringRef) { return None; });
 
 /// If the given file holds a bitcode image, return a Module for it.
 /// Otherwise, attempt to parse it as LLVM Assembly and return a Module
 /// for it.
-/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
-///                         This option should only be set to false by llvm-as
-///                         for use inside the LLVM testuite!
-/// \param DataLayoutString Override datalayout in the llvm assembly.
-std::unique_ptr<Module> parseIRFile(StringRef Filename, SMDiagnostic &Err,
-                                    LLVMContext &Context,
-                                    bool UpgradeDebugInfo = true,
-                                    StringRef DataLayoutString = "");
+/// \param DataLayoutCallback Override datalayout in the llvm assembly.
+std::unique_ptr<Module> parseIRFile(
+    StringRef Filename, SMDiagnostic &Err, LLVMContext &Context,
+    DataLayoutCallbackTy DataLayoutCallback = [](StringRef) { return None; });
 }
 
 #endif

llvm/lib/AsmParser/LLParser.h

 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_LIB_ASMPARSER_LLPARSER_H
 #define LLVM_LIB_ASMPARSER_LLPARSER_H
 
 #include "LLLexer.h"
 #include "llvm/ADT/Optional.h"
 #include "llvm/ADT/StringMap.h"
+#include "llvm/AsmParser/Parser.h"
 #include "llvm/IR/Attributes.h"
 #include "llvm/IR/Instructions.h"
 #include "llvm/IR/ModuleSummaryIndex.h"
 #include "llvm/IR/Operator.h"
 #include "llvm/IR/Type.h"
 #include <map>
 
 namespace llvm {
private:
 
     // Map of module ID to path.
     std::map<unsigned, StringRef> ModuleIdMap;
 
     /// Only the llvm-as tool may set this to false to bypass
     /// UpgradeDebuginfo so it can generate broken bitcode.
     bool UpgradeDebugInfo;
 
-    /// DataLayout string to override that in LLVM assembly.
-    StringRef DataLayoutStr;
-
     std::string SourceFileName;
 
   public:
     LLParser(StringRef F, SourceMgr &SM, SMDiagnostic &Err, Module *M,
              ModuleSummaryIndex *Index, LLVMContext &Context,
-             SlotMapping *Slots = nullptr, bool UpgradeDebugInfo = true,
-             StringRef DataLayoutString = "")
+             SlotMapping *Slots = nullptr)
         : Context(Context), Lex(F, SM, Err, Context), M(M), Index(Index),
-          Slots(Slots), BlockAddressPFS(nullptr),
-          UpgradeDebugInfo(UpgradeDebugInfo), DataLayoutStr(DataLayoutString) {
-      if (!DataLayoutStr.empty())
-        M->setDataLayout(DataLayoutStr);
-    }
-    bool Run();
+          Slots(Slots), BlockAddressPFS(nullptr) {}
+    bool Run(
+        bool UpgradeDebugInfo,
+        DataLayoutCallbackTy DataLayoutCallback = [](Module *) {});
 
     bool parseStandaloneConstantValue(Constant *&C, const SlotMapping *Slots);
 
     bool parseTypeAtBeginning(Type *&Ty, unsigned &Read,
                               const SlotMapping *Slots);
 
     LLVMContext &getContext() { return Context; }
 
bool ParseIndexList(SmallVectorImpl<unsigned> &Indices) {
       if (ParseIndexList(Indices, AteExtraComma)) return true;
       if (AteExtraComma)
         return TokError("expected index");
       return false;
     }
 
     // Top-Level Entities
     bool ParseTopLevelEntities();
-    bool ValidateEndOfModule();
+    bool ValidateEndOfModule(bool UpgradeDebugInfo);
     bool ValidateEndOfIndex();
     bool ParseTargetDefinitions();
     bool ParseTargetDefinition();
     bool ParseModuleAsm();
     bool ParseSourceFileName();
     bool ParseDepLibs();        // FIXME: Remove in 4.0.
     bool ParseUnnamedType();
     bool ParseNamedType();

llvm/lib/AsmParser/LLParser.cpp

 static std::string getTypeString(Type *T) {
   std::string Result;
   raw_string_ostream Tmp(Result);
   Tmp << *T;
   return Tmp.str();
 }
 
 /// Run: module ::= toplevelentity*
-bool LLParser::Run() {
+bool LLParser::Run(bool UpgradeDebugInfo,
+                   DataLayoutCallbackTy DataLayoutCallback) {
   // Prime the lexer.
   Lex.Lex();
 
   if (Context.shouldDiscardValueNames())
     return Error(
         Lex.getLoc(),
         "Can't read textual IR with a Context that discards named Values");
 
   if (M) {
     if (ParseTargetDefinitions())
       return true;
+
+    if (auto LayoutOverride = DataLayoutCallback(M->getTargetTriple()))
+      M->setDataLayout(*LayoutOverride);
   }
 
-  return ParseTopLevelEntities() || ValidateEndOfModule() ||
+  return ParseTopLevelEntities() || ValidateEndOfModule(UpgradeDebugInfo) ||
          ValidateEndOfIndex();
 }
 
 bool LLParser::parseStandaloneConstantValue(Constant *&C,
                                             const SlotMapping *Slots) {
   restoreParsingState(Slots);
   Lex.Lex();
 
NamedTypes.insert(
         std::make_pair(I.getKey(), std::make_pair(I.second, LocTy())));
   for (const auto &I : Slots->Types)
     NumberedTypes.insert(
         std::make_pair(I.first, std::make_pair(I.second, LocTy())));
 }
 
 /// ValidateEndOfModule - Do final validity and sanity checks at the end of the
 /// module.
-bool LLParser::ValidateEndOfModule() {
+bool LLParser::ValidateEndOfModule(bool UpgradeDebugInfo) {
   if (!M)
     return false;
   // Handle any function attribute group forward references.
   for (const auto &RAG : ForwardRefAttrGroups) {
     Value *V = RAG.first;
     const std::vector<unsigned> &Attrs = RAG.second;
     AttrBuilder B;
 
if (ParseToken(lltok::equal, "expected '=' after target triple") ||
       return true;
     M->setTargetTriple(Str);
     return false;
   case lltok::kw_datalayout:
     Lex.Lex();
     if (ParseToken(lltok::equal, "expected '=' after target datalayout") ||
         ParseStringConstant(Str))
       return true;
-    if (DataLayoutStr.empty())
-      M->setDataLayout(Str);
     return false;
   }
 }
 
 /// toplevelentity
 ///   ::= 'source_filename' '=' STRINGCONSTANT
 bool LLParser::ParseSourceFileName() {
   assert(Lex.getKind() == lltok::kw_source_filename);
if (isAtomic && !Alignment)
     return Error(Loc, "atomic load must have explicit non-zero alignment");
   if (Ordering == AtomicOrdering::Release ||
       Ordering == AtomicOrdering::AcquireRelease)
     return Error(Loc, "atomic load cannot use Release ordering");
 
   if (Ty != cast<PointerType>(Val->getType())->getElementType())
     return Error(ExplicitTypeLoc,
                  "explicit pointee type doesn't match operand's pointee type");
-
-  Inst = new LoadInst(Ty, Val, "", isVolatile, Alignment, Ordering, SSID);
+  if (!Alignment && !Ty->isSized())
+    return Error(ExplicitTypeLoc, "loading unsized types is not allowed");
+  if (!Alignment)
+    Alignment = M->getDataLayout().getABITypeAlign(Ty);
+  Inst = new LoadInst(Ty, Val, "", isVolatile, *Alignment, Ordering, SSID);
   return AteExtraComma ? InstExtraComma : InstNormal;
 }
 
 /// ParseStore
 
 ///   ::= 'store' 'volatile'? TypeAndValue ',' TypeAndValue (',' 'align' i32)?
 ///   ::= 'store' 'atomic' 'volatile'? TypeAndValue ',' TypeAndValue
 ///       'singlethread'? AtomicOrdering (',' 'align' i32)?

llvm/lib/AsmParser/Parser.cpp

 #include "llvm/IR/ModuleSummaryIndex.h"
 #include "llvm/Support/MemoryBuffer.h"
 #include "llvm/Support/SourceMgr.h"
 #include <cstring>
 #include <system_error>
 
 using namespace llvm;
 
-bool llvm::parseAssemblyInto(MemoryBufferRef F, Module *M,
+static bool parseAssemblyInto(MemoryBufferRef F, Module *M,
                               ModuleSummaryIndex *Index, SMDiagnostic &Err,
                               SlotMapping *Slots, bool UpgradeDebugInfo,
-                             StringRef DataLayoutString) {
+                              DataLayoutCallbackTy DataLayoutCallback) {
   SourceMgr SM;
   std::unique_ptr<MemoryBuffer> Buf = MemoryBuffer::getMemBuffer(F);
   SM.AddNewSourceBuffer(std::move(Buf), SMLoc());
 
   LLVMContext Context;
   return LLParser(F.getBuffer(), SM, Err, M, Index,
-                  M ? M->getContext() : Context, Slots, UpgradeDebugInfo,
-                  DataLayoutString)
-      .Run();
+                  M ? M->getContext() : Context, Slots)
+      .Run(UpgradeDebugInfo, DataLayoutCallback);
+}
+
+bool llvm::parseAssemblyInto(MemoryBufferRef F, Module *M,
+                             ModuleSummaryIndex *Index, SMDiagnostic &Err,
+                             SlotMapping *Slots,
+                             DataLayoutCallbackTy DataLayoutCallback) {
+  return ::parseAssemblyInto(F, M, Index, Err, Slots,
+                             /*UpgradeDebugInfo*/ true, DataLayoutCallback);
 }
 
 std::unique_ptr<Module>
 llvm::parseAssembly(MemoryBufferRef F, SMDiagnostic &Err, LLVMContext &Context,
-                    SlotMapping *Slots, bool UpgradeDebugInfo,
-                    StringRef DataLayoutString) {
+                    SlotMapping *Slots,
+                    DataLayoutCallbackTy DataLayoutCallback) {
   std::unique_ptr<Module> M =
       std::make_unique<Module>(F.getBufferIdentifier(), Context);
 
-  if (parseAssemblyInto(F, M.get(), nullptr, Err, Slots, UpgradeDebugInfo,
-                        DataLayoutString))
+  if (parseAssemblyInto(F, M.get(), nullptr, Err, Slots, DataLayoutCallback))
     return nullptr;
 
   return M;
 }
 
-std::unique_ptr<Module>
-llvm::parseAssemblyFile(StringRef Filename, SMDiagnostic &Err,
-                        LLVMContext &Context, SlotMapping *Slots,
-                        bool UpgradeDebugInfo, StringRef DataLayoutString) {
+std::unique_ptr<Module> llvm::parseAssemblyFile(StringRef Filename,
+                                                SMDiagnostic &Err,
+                                                LLVMContext &Context,
+                                                SlotMapping *Slots) {
   ErrorOr<std::unique_ptr<MemoryBuffer>> FileOrErr =
       MemoryBuffer::getFileOrSTDIN(Filename);
   if (std::error_code EC = FileOrErr.getError()) {
     Err = SMDiagnostic(Filename, SourceMgr::DK_Error,
                        "Could not open input file: " + EC.message());
     return nullptr;
   }
 
-  return parseAssembly(FileOrErr.get()->getMemBufferRef(), Err, Context, Slots,
-                       UpgradeDebugInfo, DataLayoutString);
+  return parseAssembly(FileOrErr.get()->getMemBufferRef(), Err, Context, Slots);
 }
 
-ParsedModuleAndIndex llvm::parseAssemblyWithIndex(
-    MemoryBufferRef F, SMDiagnostic &Err, LLVMContext &Context,
-    SlotMapping *Slots, bool UpgradeDebugInfo, StringRef DataLayoutString) {
+static ParsedModuleAndIndex
+parseAssemblyWithIndex(MemoryBufferRef F, SMDiagnostic &Err,
+                       LLVMContext &Context, SlotMapping *Slots,
+                       bool UpgradeDebugInfo,
+                       DataLayoutCallbackTy DataLayoutCallback) {
   std::unique_ptr<Module> M =
       std::make_unique<Module>(F.getBufferIdentifier(), Context);
   std::unique_ptr<ModuleSummaryIndex> Index =
       std::make_unique<ModuleSummaryIndex>(/*HaveGVs=*/true);
 
   if (parseAssemblyInto(F, M.get(), Index.get(), Err, Slots, UpgradeDebugInfo,
-                        DataLayoutString))
+                        DataLayoutCallback))
     return {nullptr, nullptr};
 
   return {std::move(M), std::move(Index)};
 }
 
-ParsedModuleAndIndex llvm::parseAssemblyFileWithIndex(
-    StringRef Filename, SMDiagnostic &Err, LLVMContext &Context,
-    SlotMapping *Slots, bool UpgradeDebugInfo, StringRef DataLayoutString) {
+ParsedModuleAndIndex llvm::parseAssemblyWithIndex(MemoryBufferRef F,
+                                                  SMDiagnostic &Err,
+                                                  LLVMContext &Context,
+                                                  SlotMapping *Slots) {
+  return ::parseAssemblyWithIndex(F, Err, Context, Slots,
+                                  /*UpgradeDebugInfo*/ true,
+                                  [](StringRef) { return None; });
+}
+
+static ParsedModuleAndIndex
+parseAssemblyFileWithIndex(StringRef Filename, SMDiagnostic &Err,
+                           LLVMContext &Context, SlotMapping *Slots,
+                           bool UpgradeDebugInfo,
+                           DataLayoutCallbackTy DataLayoutCallback) {
   ErrorOr<std::unique_ptr<MemoryBuffer>> FileOrErr =
       MemoryBuffer::getFileOrSTDIN(Filename);
   if (std::error_code EC = FileOrErr.getError()) {
     Err = SMDiagnostic(Filename, SourceMgr::DK_Error,
                        "Could not open input file: " + EC.message());
     return {nullptr, nullptr};
   }
 
   return parseAssemblyWithIndex(FileOrErr.get()->getMemBufferRef(), Err,
                                 Context, Slots, UpgradeDebugInfo,
-                                DataLayoutString);
+                                DataLayoutCallback);
 }
 
-std::unique_ptr<Module>
-llvm::parseAssemblyString(StringRef AsmString, SMDiagnostic &Err,
+ParsedModuleAndIndex
+llvm::parseAssemblyFileWithIndex(StringRef Filename, SMDiagnostic &Err,
                                  LLVMContext &Context, SlotMapping *Slots,
-                          bool UpgradeDebugInfo, StringRef DataLayoutString) {
+                                 DataLayoutCallbackTy DataLayoutCallback) {
+  return ::parseAssemblyFileWithIndex(Filename, Err, Context, Slots,
+                                      /*UpgradeDebugInfo*/ true,
+                                      DataLayoutCallback);
+}
+
+ParsedModuleAndIndex llvm::parseAssemblyFileWithIndexNoUpgradeDebugInfo(
+    StringRef Filename, SMDiagnostic &Err, LLVMContext &Context,
+    SlotMapping *Slots, DataLayoutCallbackTy DataLayoutCallback) {
+  return ::parseAssemblyFileWithIndex(Filename, Err, Context, Slots,
+                                      /*UpgradeDebugInfo*/ false,
+                                      DataLayoutCallback);
+}
+
+std::unique_ptr<Module> llvm::parseAssemblyString(StringRef AsmString,
+                                                  SMDiagnostic &Err,
+                                                  LLVMContext &Context,
+                                                  SlotMapping *Slots) {
   MemoryBufferRef F(AsmString, "<string>");
-  return parseAssembly(F, Err, Context, Slots, UpgradeDebugInfo,
-                       DataLayoutString);
+  return parseAssembly(F, Err, Context, Slots);
 }
 
 static bool parseSummaryIndexAssemblyInto(MemoryBufferRef F,
                                           ModuleSummaryIndex &Index,
                                           SMDiagnostic &Err) {
   SourceMgr SM;
   std::unique_ptr<MemoryBuffer> Buf = MemoryBuffer::getMemBuffer(F);
   SM.AddNewSourceBuffer(std::move(Buf), SMLoc());
 
   // The parser holds a reference to a context that is unused when parsing the
   // index, but we need to initialize it.
   LLVMContext unusedContext;
-  return LLParser(F.getBuffer(), SM, Err, nullptr, &Index, unusedContext).Run();
+  return LLParser(F.getBuffer(), SM, Err, nullptr, &Index, unusedContext)
+      .Run(true, [](StringRef) { return None; });
 }
 
 std::unique_ptr<ModuleSummaryIndex>
 llvm::parseSummaryIndexAssembly(MemoryBufferRef F, SMDiagnostic &Err) {
   std::unique_ptr<ModuleSummaryIndex> Index =
       std::make_unique<ModuleSummaryIndex>(/*HaveGVs=*/false);
 
   if (parseSummaryIndexAssemblyInto(F, *Index, Err))

llvm/lib/Bitcode/Reader/BitcodeReader.cpp

public:
   Error materializeForwardReferencedFunctions();
 
   Error materialize(GlobalValue *GV) override;
   Error materializeModule() override;
   std::vector<StructType *> getIdentifiedStructTypes() const override;
 
   /// Main interface to parsing a bitcode buffer.
   /// \returns true if an error occurred.
-  Error parseBitcodeInto(Module *M, bool ShouldLazyLoadMetadata = false,
-                         bool IsImporting = false);
+  Error parseBitcodeInto(
+      Module *M, bool ShouldLazyLoadMetadata = false, bool IsImporting = false,
+      DataLayoutCallbackTy DataLayoutCallback = [](std::string) {
+        return None;
+      });
 
   static uint64_t decodeSignRotatedValue(uint64_t V);
 
   /// Materialize any deferred Metadata block.
   Error materializeMetadata() override;
 
   void setStripDebugInfo() override;
 
private:
   /// argument's pointee type.
   void propagateByValTypes(CallBase *CB, ArrayRef<Type *> ArgsFullTys);
 
   /// Converts alignment exponent (i.e. power of two (or zero)) to the
   /// corresponding alignment to use. If alignment is too large, returns
   /// a corresponding error code.
   Error parseAlignmentValue(uint64_t Exponent, MaybeAlign &Alignment);
   Error parseAttrKind(uint64_t Code, Attribute::AttrKind *Kind);
-  Error parseModule(uint64_t ResumeBit, bool ShouldLazyLoadMetadata = false);
+  Error parseModule(
+      uint64_t ResumeBit, bool ShouldLazyLoadMetadata = false,
+      DataLayoutCallbackTy DataLayoutCallback = [](StringRef) { return None; });
 
   Error parseComdatRecord(ArrayRef<uint64_t> Record);
   Error parseGlobalVarRecord(ArrayRef<uint64_t> Record);
   Error parseFunctionRecord(ArrayRef<uint64_t> Record);
   Error parseGlobalIndirectSymbolRecord(unsigned BitCode,
                                         ArrayRef<uint64_t> Record);
 
   Error parseAttributeBlock();
Error BitcodeReader::parseGlobalIndirectSymbolRecord(
   assert(NewGA->getType() == flattenPointerTypes(FullTy) &&
          "Incorrect fully structured type provided for GlobalIndirectSymbol");
   ValueList.push_back(NewGA, FullTy);
   IndirectSymbolInits.push_back(std::make_pair(NewGA, Val));
   return Error::success();
 }
 
 Error BitcodeReader::parseModule(uint64_t ResumeBit,
-                                 bool ShouldLazyLoadMetadata) {
+                                 bool ShouldLazyLoadMetadata,
+                                 DataLayoutCallbackTy DataLayoutCallback) {
   if (ResumeBit) {
     if (Error JumpFailed = Stream.JumpToBit(ResumeBit))
       return JumpFailed;
   } else if (Error Err = Stream.EnterSubBlock(bitc::MODULE_BLOCK_ID))
     return Err;
 
   SmallVector<uint64_t, 64> Record;
 
   // Parts of bitcode parsing depend on the datalayout.  Make sure we
   // finalize the datalayout before we run any of that code.
   bool ResolvedDataLayout = false;
   auto ResolveDataLayout = [&] {
     if (ResolvedDataLayout)
       return;
 
     // datalayout and triple can't be parsed after this point.
     ResolvedDataLayout = true;
 
     // Upgrade data layout string.
     std::string DL = llvm::UpgradeDataLayoutString(
         TheModule->getDataLayoutStr(), TheModule->getTargetTriple());
     TheModule->setDataLayout(DL);
+
+    if (auto LayoutOverride =
+            DataLayoutCallback(TheModule->getTargetTriple()))
+      TheModule->setDataLayout(*LayoutOverride);
   };
 
   // Read all the records for this module.
   while (true) {
     Expected<llvm::BitstreamEntry> MaybeEntry = Stream.advance();
     if (!MaybeEntry)
       return MaybeEntry.takeError();
     llvm::BitstreamEntry Entry = MaybeEntry.get();
case bitc::MODULE_CODE_TRIPLE: {  // TRIPLE: [strchr x N]
       std::string S;
       if (convertToString(Record, 0, S))
         return error("Invalid record");
       TheModule->setTargetTriple(S);
       break;
     }
     case bitc::MODULE_CODE_DATALAYOUT: {  // DATALAYOUT: [strchr x N]
       if (ResolvedDataLayout)
         return error("datalayout too late in module");
       std::string S;
       if (convertToString(Record, 0, S))
         return error("Invalid record");
       TheModule->setDataLayout(S);
       break;
     }
     case bitc::MODULE_CODE_ASM: {  // ASM: [strchr x N]
       std::string S;
case bitc::MODULE_CODE_SOURCE_FILENAME:
       TheModule->setSourceFileName(ValueName);
       break;
     }
     Record.clear();
   }
 }
 
 Error BitcodeReader::parseBitcodeInto(Module *M, bool ShouldLazyLoadMetadata,
-                                      bool IsImporting) {
+                                      bool IsImporting,
+                                      DataLayoutCallbackTy DataLayoutCallback) {
   TheModule = M;
   MDLoader = MetadataLoader(Stream, *M, ValueList, IsImporting,
                             [&](unsigned ID) { return getTypeByID(ID); });
-  return parseModule(0, ShouldLazyLoadMetadata);
+  return parseModule(0, ShouldLazyLoadMetadata, DataLayoutCallback);
 }
 
 Error BitcodeReader::typeCheckLoadStoreInst(Type *ValType, Type *PtrType) {
   if (!isa<PointerType>(PtrType))
     return error("Load/Store operand is not a pointer type");
   Type *ElemType = cast<PointerType>(PtrType)->getElementType();
 
   if (ValType && ValType != ElemType)
case bitc::FUNC_CODE_INST_LOAD: { // LOAD: [opty, op, align, vol]
         std::tie(FullTy, Ty) = getPointerElementTypes(FullTy);
 
       if (Error Err = typeCheckLoadStoreInst(Ty, Op->getType()))
         return Err;
 
       MaybeAlign Align;
       if (Error Err = parseAlignmentValue(Record[OpNum], Align))
         return Err;
-      I = new LoadInst(Ty, Op, "", Record[OpNum + 1], Align);
+      if (!Align && !Ty->isSized())
+        return error("load of unsized type");
+      if (!Align)
+        Align = TheModule->getDataLayout().getABITypeAlign(Ty);
+      I = new LoadInst(Ty, Op, "", Record[OpNum + 1], *Align);
       InstructionList.push_back(I);
       break;
     }
     case bitc::FUNC_CODE_INST_LOADATOMIC: {
        // LOADATOMIC: [opty, op, align, vol, ordering, ssid]
       unsigned OpNum = 0;
       Value *Op;
       if (getValueTypePair(Record, OpNum, NextValueNo, Op, &FullTy) ||
case bitc::FUNC_CODE_INST_LOADATOMIC: {
         return error("Invalid record");
       if (Ordering != AtomicOrdering::NotAtomic && Record[OpNum] == 0)
         return error("Invalid record");
       SyncScope::ID SSID = getDecodedSyncScopeID(Record[OpNum + 3]);
 
       MaybeAlign Align;
       if (Error Err = parseAlignmentValue(Record[OpNum], Align))
         return Err;
-      I = new LoadInst(Ty, Op, "", Record[OpNum + 1], Align, Ordering, SSID);
+      if (!Align)
+        return error("Alignment missing from atomic load");
+      I = new LoadInst(Ty, Op, "", Record[OpNum + 1], *Align, Ordering, SSID);
       InstructionList.push_back(I);
       break;
     }
     case bitc::FUNC_CODE_INST_STORE:
     case bitc::FUNC_CODE_INST_STORE_OLD: { // STORE2:[ptrty, ptr, val, align, vol]
       unsigned OpNum = 0;
       Value *Val, *Ptr;
       Type *FullTy;

 /// This isn't always used in a lazy context.  In particular, it's also used by
 /// \a parseModule().  If this is truly lazy, then we need to eagerly pull
 /// in forward-referenced functions from block address references.
 ///
 /// \param[in] MaterializeAll Set to \c true if we should materialize
 /// everything.
 Expected<std::unique_ptr<Module>>
 BitcodeModule::getModuleImpl(LLVMContext &Context, bool MaterializeAll,
-                             bool ShouldLazyLoadMetadata, bool IsImporting) {
+                             bool ShouldLazyLoadMetadata, bool IsImporting,
+                             DataLayoutCallbackTy DataLayoutCallback) {
   BitstreamCursor Stream(Buffer);
 
   std::string ProducerIdentification;
   if (IdentificationBit != -1ull) {
     if (Error JumpFailed = Stream.JumpToBit(IdentificationBit))
       return std::move(JumpFailed);
     Expected<std::string> ProducerIdentificationOrErr =
         readIdentificationBlock(Stream);
     if (!ProducerIdentificationOrErr)
       return ProducerIdentificationOrErr.takeError();
 
     ProducerIdentification = *ProducerIdentificationOrErr;
   }
 
   if (Error JumpFailed = Stream.JumpToBit(ModuleBit))
     return std::move(JumpFailed);
   auto *R = new BitcodeReader(std::move(Stream), Strtab, ProducerIdentification,
                               Context);
 
   std::unique_ptr<Module> M =
       std::make_unique<Module>(ModuleIdentifier, Context);
   M->setMaterializer(R);
 
   // Delay parsing Metadata if ShouldLazyLoadMetadata is true.
-  if (Error Err =
-          R->parseBitcodeInto(M.get(), ShouldLazyLoadMetadata, IsImporting))
+  if (Error Err = R->parseBitcodeInto(M.get(), ShouldLazyLoadMetadata,
+                                      IsImporting, DataLayoutCallback))
     return std::move(Err);
 
   if (MaterializeAll) {
     // Read in the entire module, and destroy the BitcodeReader.
     if (Error Err = M->materializeAll())
       return std::move(Err);
   } else {
     // Resolve forward references from blockaddresses.
     if (Error Err = R->materializeForwardReferencedFunctions())
       return std::move(Err);
   }
   return std::move(M);
 }
 
 Expected<std::unique_ptr<Module>>
 BitcodeModule::getLazyModule(LLVMContext &Context, bool ShouldLazyLoadMetadata,
                              bool IsImporting) {
-  return getModuleImpl(Context, false, ShouldLazyLoadMetadata, IsImporting);
+  return getModuleImpl(Context, false, ShouldLazyLoadMetadata, IsImporting,
+                       [](StringRef) { return None; });
 }
 
 // Parse the specified bitcode buffer and merge the index into CombinedIndex.
 // We don't use ModuleIdentifier here because the client may need to control the
 // module path used in the combined summary (e.g. when reading summaries for
 // regular LTO modules).
 Error BitcodeModule::readSummary(ModuleSummaryIndex &CombinedIndex,
                                  StringRef ModulePath, uint64_t ModuleId) {
Expected<std::unique_ptr<Module>> llvm::getOwningLazyBitcodeModule(
   auto MOrErr = getLazyBitcodeModule(*Buffer, Context, ShouldLazyLoadMetadata,
                                      IsImporting);
   if (MOrErr)
     (*MOrErr)->setOwnedMemoryBuffer(std::move(Buffer));
   return MOrErr;
 }
 
 Expected<std::unique_ptr<Module>>
-BitcodeModule::parseModule(LLVMContext &Context) {
-  return getModuleImpl(Context, true, false, false);
+BitcodeModule::parseModule(LLVMContext &Context,
+                           DataLayoutCallbackTy DataLayoutCallback) {
+  return getModuleImpl(Context, true, false, false, DataLayoutCallback);
   // TODO: Restore the use-lists to the in-memory state when the bitcode was
   // written.  We must defer until the Module has been fully materialized.
 }
 
-Expected<std::unique_ptr<Module>> llvm::parseBitcodeFile(MemoryBufferRef Buffer,
-                                                         LLVMContext &Context) {
+Expected<std::unique_ptr<Module>>
+llvm::parseBitcodeFile(MemoryBufferRef Buffer, LLVMContext &Context,
+                       DataLayoutCallbackTy DataLayoutCallback) {
   Expected<BitcodeModule> BM = getSingleModule(Buffer);
   if (!BM)
     return BM.takeError();
 
-  return BM->parseModule(Context);
+  return BM->parseModule(Context, DataLayoutCallback);
 }
 
 Expected<std::string> llvm::getBitcodeTargetTriple(MemoryBufferRef Buffer) {
   Expected<BitstreamCursor> StreamOrErr = initStream(Buffer);
   if (!StreamOrErr)
     return StreamOrErr.takeError();
 
   return readTriple(*StreamOrErr);

llvm/lib/CodeGen/MIRParser/MIRParser.cpp

public:
   ///
   /// Always returns true.
   bool error(const SMDiagnostic &Error, SMRange SourceRange);
 
   /// Try to parse the optional LLVM module and the machine functions in the MIR
   /// file.
   ///
   /// Return null if an error occurred.
-  std::unique_ptr<Module> parseIRModule();
+  std::unique_ptr<Module>
+  parseIRModule(DataLayoutCallbackTy DataLayoutCallback);
 
   /// Create an empty function with the given name.
   Function *createDummyFunction(StringRef Name, Module &M);
 
   bool parseMachineFunctions(Module &M, MachineModuleInfo &MMI);
 
   /// Parse the machine function in the current YAML document.
   ///
case SourceMgr::DK_Note:
     break;
   case SourceMgr::DK_Remark:
     llvm_unreachable("remark unexpected");
     break;
   }
   Context.diagnose(DiagnosticInfoMIRParser(Kind, Diag));
 }
 
-std::unique_ptr<Module> MIRParserImpl::parseIRModule() {
+std::unique_ptr<Module>
+MIRParserImpl::parseIRModule(DataLayoutCallbackTy DataLayoutCallback) {
   if (!In.setCurrentDocument()) {
     if (In.error())
       return nullptr;
     // Create an empty module when the MIR file is empty.
     NoMIRDocuments = true;
-    return std::make_unique<Module>(Filename, Context);
+    auto M = std::make_unique<Module>(Filename, Context);
+    if (auto LayoutOverride = DataLayoutCallback(M->getTargetTriple()))
+      M->setDataLayout(*LayoutOverride);
+    return M;
   }
 
   std::unique_ptr<Module> M;
   // Parse the block scalar manually so that we can return unique pointer
   // without having to go trough YAML traits.
   if (const auto *BSN =
           dyn_cast_or_null<yaml::BlockScalarNode>(In.getCurrentNode())) {
     SMDiagnostic Error;
     M = parseAssembly(MemoryBufferRef(BSN->getValue(), Filename), Error,
-                      Context, &IRSlots, /*UpgradeDebugInfo=*/false);
+                      Context, &IRSlots, DataLayoutCallback);
     if (!M) {
       reportDiagnostic(diagFromBlockStringDiag(Error, BSN->getSourceRange()));
       return nullptr;
     }
     In.nextDocument();
     if (!In.setCurrentDocument())
       NoMIRDocuments = true;
   } else {
     // Create an new, empty module.
     M = std::make_unique<Module>(Filename, Context);
+    if (auto LayoutOverride = DataLayoutCallback(M->getTargetTriple()))
+      M->setDataLayout(*LayoutOverride);
     NoLLVMIR = true;
   }
   return M;
 }
 
 bool MIRParserImpl::parseMachineFunctions(Module &M, MachineModuleInfo &MMI) {
   if (NoMIRDocuments)
     return false;
return SMDiagnostic(SM, Loc, Filename, Line, Column, Error.getKind(),
                       Error.getFixIts());
 }
 
 MIRParser::MIRParser(std::unique_ptr<MIRParserImpl> Impl)
     : Impl(std::move(Impl)) {}
 
 MIRParser::~MIRParser() {}
 
-std::unique_ptr<Module> MIRParser::parseIRModule() {
-  return Impl->parseIRModule();
+std::unique_ptr<Module>
+MIRParser::parseIRModule(DataLayoutCallbackTy DataLayoutCallback) {
+  return Impl->parseIRModule(DataLayoutCallback);
 }
 
 bool MIRParser::parseMachineFunctions(Module &M, MachineModuleInfo &MMI) {
   return Impl->parseMachineFunctions(M, MMI);
 }
 
 std::unique_ptr<MIRParser> llvm::createMIRParserFromFile(
     StringRef Filename, SMDiagnostic &Error, LLVMContext &Context,

llvm/lib/IRReader/IRReader.cpp

std::unique_ptr<Module> llvm::getLazyIRFileModule(StringRef Filename,
   }
 
   return getLazyIRModule(std::move(FileOrErr.get()), Err, Context,
                          ShouldLazyLoadMetadata);
 }
 
 std::unique_ptr<Module> llvm::parseIR(MemoryBufferRef Buffer, SMDiagnostic &Err,
                                       LLVMContext &Context,
-                                      bool UpgradeDebugInfo,
-                                      StringRef DataLayoutString) {
+                                      DataLayoutCallbackTy DataLayoutCallback) {
   NamedRegionTimer T(TimeIRParsingName, TimeIRParsingDescription,
                      TimeIRParsingGroupName, TimeIRParsingGroupDescription,
                      TimePassesIsEnabled);
   if (isBitcode((const unsigned char *)Buffer.getBufferStart(),
                 (const unsigned char *)Buffer.getBufferEnd())) {
     Expected<std::unique_ptr<Module>> ModuleOrErr =
-        parseBitcodeFile(Buffer, Context);
+        parseBitcodeFile(Buffer, Context, DataLayoutCallback);
     if (Error E = ModuleOrErr.takeError()) {
       handleAllErrors(std::move(E), [&](ErrorInfoBase &EIB) {
         Err = SMDiagnostic(Buffer.getBufferIdentifier(), SourceMgr::DK_Error,
                            EIB.message());
       });
       return nullptr;
     }
-    if (!DataLayoutString.empty())
-      ModuleOrErr.get()->setDataLayout(DataLayoutString);
     return std::move(ModuleOrErr.get());
   }
 
-  return parseAssembly(Buffer, Err, Context, nullptr, UpgradeDebugInfo,
-                       DataLayoutString);
+  return parseAssembly(Buffer, Err, Context, nullptr, DataLayoutCallback);
 }
 
-std::unique_ptr<Module> llvm::parseIRFile(StringRef Filename, SMDiagnostic &Err,
-                                          LLVMContext &Context,
-                                          bool UpgradeDebugInfo,
-                                          StringRef DataLayoutString) {
+std::unique_ptr<Module>
+llvm::parseIRFile(StringRef Filename, SMDiagnostic &Err, LLVMContext &Context,
+                  DataLayoutCallbackTy DataLayoutCallback) {
   ErrorOr<std::unique_ptr<MemoryBuffer>> FileOrErr =
       MemoryBuffer::getFileOrSTDIN(Filename);
   if (std::error_code EC = FileOrErr.getError()) {
     Err = SMDiagnostic(Filename, SourceMgr::DK_Error,
                        "Could not open input file: " + EC.message());
     return nullptr;
   }
 
   return parseIR(FileOrErr.get()->getMemBufferRef(), Err, Context,
-                 UpgradeDebugInfo, DataLayoutString);
+                 DataLayoutCallback);
 }
 
 //===----------------------------------------------------------------------===//
 // C API.
 //===----------------------------------------------------------------------===//
 
 LLVMBool LLVMParseIRInContext(LLVMContextRef ContextRef,
                               LLVMMemoryBufferRef MemBuf, LLVMModuleRef *OutM,

llvm/test/Analysis/BasicAA/featuretest.ll

 ; USE_ASSUME-NEXT:    [[ARRAY22_SUB:%.*]] = getelementptr inbounds [200 x i32], [200 x i32]* [[ARRAY22]], i64 0, i64 0
 ; USE_ASSUME-NEXT:    [[ARRAY11_SUB:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[ARRAY11]], i64 0, i64 0
 ; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAY11_SUB]], i32 4) ]
 ; USE_ASSUME-NEXT:    call void @external(i32* nonnull [[ARRAY11_SUB]])
 ; USE_ASSUME-NEXT:    call void @external(i32* nonnull [[ARRAY22_SUB]])
 ; USE_ASSUME-NEXT:    [[POINTER:%.*]] = getelementptr [100 x i32], [100 x i32]* [[ARRAY11]], i64 0, i64 [[A:%.*]]
 ; USE_ASSUME-NEXT:    [[POINTER2:%.*]] = getelementptr [200 x i32], [200 x i32]* [[ARRAY22]], i64 0, i64 [[B:%.*]]
 ; USE_ASSUME-NEXT:    store i32 7, i32* [[POINTER2]], align 4
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[POINTER]], i64 4), "nonnull"(i32* [[POINTER]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[POINTER]], i64 4), "nonnull"(i32* [[POINTER]]), "align"(i32* [[POINTER]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %Array1 = alloca i32, i32 100
   %Array2 = alloca i32, i32 200
   call void @llvm.assume(i1 true) ["align"(i32* %Array1, i32 4)]
 
   call void @external(i32* %Array1)
   call void @external(i32* %Array2)

 ;
 ; USE_ASSUME-LABEL: @constant_array_index_test(
 ; USE_ASSUME-NEXT:    [[ARRAY1:%.*]] = alloca [100 x i32], align 4
 ; USE_ASSUME-NEXT:    [[ARRAY1_SUB:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[ARRAY1]], i64 0, i64 0
 ; USE_ASSUME-NEXT:    call void @external(i32* nonnull [[ARRAY1_SUB]])
 ; USE_ASSUME-NEXT:    [[P1:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[ARRAY1]], i64 0, i64 7
 ; USE_ASSUME-NEXT:    [[P2:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[ARRAY1]], i64 0, i64 6
 ; USE_ASSUME-NEXT:    store i32 1, i32* [[P2]], align 4
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P1]], i64 4), "nonnull"(i32* [[P1]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P1]], i64 4), "nonnull"(i32* [[P1]]), "align"(i32* [[P1]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %Array = alloca i32, i32 100
   call void @external(i32* %Array)
 
   %P1 = getelementptr i32, i32* %Array, i64 7
   %P2 = getelementptr i32, i32* %Array, i64 6
 

 ; NO_ASSUME-LABEL: @gep_distance_test(
 ; NO_ASSUME-NEXT:    [[B:%.*]] = getelementptr i32, i32* [[A:%.*]], i64 2
 ; NO_ASSUME-NEXT:    store i32 7, i32* [[B]], align 4
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: @gep_distance_test(
 ; USE_ASSUME-NEXT:    [[B:%.*]] = getelementptr i32, i32* [[A:%.*]], i64 2
 ; USE_ASSUME-NEXT:    store i32 7, i32* [[B]], align 4
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[A]], i64 4), "nonnull"(i32* [[A]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[A]], i64 4), "nonnull"(i32* [[A]]), "align"(i32* [[A]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %REMOVEu = load i32, i32* %A
   %B = getelementptr i32, i32* %A, i64 2  ; Cannot alias A
   store i32 7, i32* %B
   %REMOVEv = load i32, i32* %A
   %r = sub i32 %REMOVEu, %REMOVEv
   ret i32 %r
 }
 
 ; Test that if two pointers are spaced out by a constant offset, that they
 ; cannot alias, even if there is a variable offset between them...
 define i32 @gep_distance_test2({i32,i32}* %A, i64 %distance) {
 ; NO_ASSUME-LABEL: @gep_distance_test2(
 ; NO_ASSUME-NEXT:    [[B:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* [[A:%.*]], i64 [[DISTANCE:%.*]], i32 1
 ; NO_ASSUME-NEXT:    store i32 7, i32* [[B]], align 4
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: @gep_distance_test2(
 ; USE_ASSUME-NEXT:    [[A1:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* [[A:%.*]], i64 0, i32 0
 ; USE_ASSUME-NEXT:    [[B:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* [[A]], i64 [[DISTANCE:%.*]], i32 1
 ; USE_ASSUME-NEXT:    store i32 7, i32* [[B]], align 4
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[A1]], i64 4), "nonnull"(i32* [[A1]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[A1]], i64 4), "nonnull"(i32* [[A1]]), "align"(i32* [[A1]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %A1 = getelementptr {i32,i32}, {i32,i32}* %A, i64 0, i32 0
   %REMOVEu = load i32, i32* %A1
   %B = getelementptr {i32,i32}, {i32,i32}* %A, i64 %distance, i32 1
   store i32 7, i32* %B    ; B cannot alias A, it's at least 4 bytes away
   %REMOVEv = load i32, i32* %A1
   %r = sub i32 %REMOVEu, %REMOVEv
   ret i32 %r
 }
 
 ; Test that we can do funny pointer things and that distance calc will still
 ; work.
 define i32 @gep_distance_test3(i32 * %A) {
 ; NO_ASSUME-LABEL: @gep_distance_test3(
 ; NO_ASSUME-NEXT:    [[C1:%.*]] = getelementptr i32, i32* [[A:%.*]], i64 1
 ; NO_ASSUME-NEXT:    [[C:%.*]] = bitcast i32* [[C1]] to i8*
 ; NO_ASSUME-NEXT:    store i8 42, i8* [[C]], align 1
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: @gep_distance_test3(
 ; USE_ASSUME-NEXT:    [[C1:%.*]] = getelementptr i32, i32* [[A:%.*]], i64 1
 ; USE_ASSUME-NEXT:    [[C:%.*]] = bitcast i32* [[C1]] to i8*
 ; USE_ASSUME-NEXT:    store i8 42, i8* [[C]], align 1
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[A]], i64 4), "nonnull"(i32* [[A]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[A]], i64 4), "nonnull"(i32* [[A]]), "align"(i32* [[A]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %X = load i32, i32* %A
   %B = bitcast i32* %A to i8*
   %C = getelementptr i8, i8* %B, i64 4
   store i8 42, i8* %C
   %Y = load i32, i32* %A
   %R = sub i32 %X, %Y
   ret i32 %R
 }
 
 ; Test that we can disambiguate globals reached through constantexpr geps
 define i32 @constexpr_test() {
 ; NO_ASSUME-LABEL: @constexpr_test(
 ; NO_ASSUME-NEXT:    [[X:%.*]] = alloca i32, align 4
 ; NO_ASSUME-NEXT:    call void @external(i32* nonnull [[X]])
 ; NO_ASSUME-NEXT:    store i32 5, i32* getelementptr inbounds ({ i32 }, { i32 }* @Global, i64 0, i32 0), align 4
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: @constexpr_test(
 ; USE_ASSUME-NEXT:    [[X:%.*]] = alloca i32, align 4
 ; USE_ASSUME-NEXT:    call void @external(i32* nonnull [[X]])
 ; USE_ASSUME-NEXT:    store i32 5, i32* getelementptr inbounds ({ i32 }, { i32 }* @Global, i64 0, i32 0), align 4
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[X]], i64 4), "nonnull"(i32* [[X]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[X]], i64 4), "nonnull"(i32* [[X]]), "align"(i32* [[X]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %X = alloca i32
   call void @external(i32* %X)
 
   %Y = load i32, i32* %X
   store i32 5, i32* getelementptr ({ i32 }, { i32 }* @Global, i64 0, i32 0)
   %REMOVE = load i32, i32* %X

llvm/test/Analysis/MemoryDependenceAnalysis/InvariantLoad.ll

exit:
   ret i8 %res
 }
 
 ; Check that first two loads are not optimized out while the one marked with
 ; invariant.load reuses %res1
 define i8 @test2(i1 %cmp, i8 *%p) {
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES1:%.*]] = load i8, i8* [[P:%.*]]
+; CHECK-NEXT:    [[RES1:%.*]] = load i8, i8* [[P:%.*]], align 1
 ; CHECK-NEXT:    call void @foo(i8* [[P]])
 ; CHECK-NEXT:    br i1 [[CMP:%.*]], label [[B2:%.*]], label [[B1:%.*]]
 ; CHECK:       b1:
 ; CHECK-NEXT:    [[RES2:%.*]] = load i8, i8* [[P]]
 ; CHECK-NEXT:    [[RES3:%.*]] = add i8 [[RES1]], [[RES2]]
 ; CHECK-NEXT:    br label [[ALIVE:%.*]]
 ; CHECK:       b2:
 ; CHECK-NEXT:    [[RES_DEAD:%.*]] = add i8 [[RES1]], [[RES1]]

 }
 
 ; This is essentially the same test case as the above one but with %b1 and %b2
 ; swapped in "br i1 %cmp, label %b1, label %b2" instruction. That helps us to
 ; ensure that results doesn't depend on visiting order.
 define i8 @test3(i1 %cmp, i8 *%p) {
 ; CHECK-LABEL: @test3(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES1:%.*]] = load i8, i8* [[P:%.*]]
+; CHECK-NEXT:    [[RES1:%.*]] = load i8, i8* [[P:%.*]], align 1
 ; CHECK-NEXT:    call void @foo(i8* [[P]])
 ; CHECK-NEXT:    br i1 [[CMP:%.*]], label [[B1:%.*]], label [[B2:%.*]]
 ; CHECK:       b1:
 ; CHECK-NEXT:    [[RES2:%.*]] = load i8, i8* [[P]]
 ; CHECK-NEXT:    [[RES3:%.*]] = add i8 [[RES1]], [[RES2]]
 ; CHECK-NEXT:    br label [[ALIVE:%.*]]
 ; CHECK:       b2:
 ; CHECK-NEXT:    [[RES_DEAD:%.*]] = add i8 [[RES1]], [[RES1]]

llvm/test/Analysis/MemorySSA/invariant-groups.ll

; CHECK-NEXT: call void @clobber8(i8* %ptr)
   call void @clobber8(i8* %ptr)
 ; CHECK: 6 = MemoryDef(5)
 ; CHECK-NEXT: call void @use(i8* %ptr2)
   call void @use(i8* %ptr2)
 ; CHECK: 7 = MemoryDef(6)
 ; CHECK-NEXT: call void @use(i8* %ptr3)
   call void @use(i8* %ptr3)
 ; CHECK: MemoryUse(7)
-; CHECK-NEXT: %v = load i8, i8* %ptr3, !invariant.group !0
+; CHECK-NEXT: %v = load i8, i8* %ptr3, align 1, !invariant.group !0
   %v = load i8, i8* %ptr3, !invariant.group !0
   ret i8 %v
 }
 
 
 declare i8* @llvm.launder.invariant.group.p0i8(i8*)
 declare void @clobber(i32*)
 declare void @clobber8(i8*)
 declare void @use(i8* readonly)
 
 !0 = !{!"group1"}

llvm/test/Analysis/MustExecute/loop-header.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -disable-output -print-mustexecute %s 2>&1 | FileCheck %s
 
 define i1 @header_with_icf(i32* noalias %p, i32 %high) {
 ; CHECK-LABEL: @header_with_icf(
 ; CHECK-LABEL:       loop:
 ; CHECK:         %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] ; (mustexec in: loop)
-; CHECK:          %v = load i32, i32* %p ; (mustexec in: loop)
+; CHECK:          %v = load i32, i32* %p, align 4 ; (mustexec in: loop)
 ; CHECK:          call void @maythrow_and_use(i32 %v) ; (mustexec in: loop)
 ; CHECK-NOT: mustexec
 
 entry:
   br label %loop
 
 loop:
   %iv = phi i32 [0, %entry], [%iv.next, %loop]
   %v = load i32, i32* %p
   call void @maythrow_and_use(i32 %v)
   %iv.next = add nsw nuw i32 %iv, 1
   %exit.test = icmp slt i32 %iv, %high
   br i1 %exit.test, label %exit, label %loop
 
 exit:
   ret i1 false
 }
 
 define i1 @split_header(i32* noalias %p, i32 %high) {
 ; CHECK-LABEL: @split_header(
 ; CHECK-LABEL:       loop:
 ; CHECK:          %iv = phi i32 [ 0, %entry ], [ %iv.next, %next ]  ; (mustexec in: loop)
-; CHECK:          %v = load i32, i32* %p ; (mustexec in: loop)
+; CHECK:          %v = load i32, i32* %p, align 4 ; (mustexec in: loop)
 ; CHECK:          br label %next ; (mustexec in: loop)
 ; CHECK-NOT: mustexec
 entry:
   br label %loop
 
 loop:
   %iv = phi i32 [0, %entry], [%iv.next, %next]
   %v = load i32, i32* %p

 ; FIXME: everything in inner loop header should be must execute
 ; for outer as well
 define i1 @nested(i32* noalias %p, i32 %high) {
 ; CHECK-LABEL: @nested
 ; CHECK-LABEL: loop:                                             ; preds = %next
 ; CHECK:         %iv = phi i32 [ 0, %entry ], [ %iv.next, %next ] ; (mustexec in: loop)
 ; CHECK:         br label %inner_loop ; (mustexec in: loop)
 ; CHECK-LABEL: inner_loop:
-; CHECK:         %v = load i32, i32* %p ; (mustexec in: inner_loop)
+; CHECK:         %v = load i32, i32* %p, align 4  ; (mustexec in: inner_loop)
 ; CHECK:         %inner.test = icmp eq i32 %v, 0  ; (mustexec in: inner_loop)
 ; CHECK:         br i1 %inner.test, label %inner_loop, label %next  ; (mustexec in: inner_loop)
 ; CHECK-NOT: mustexec
 
 entry:
   br label %loop
 
 loop:

 }
 
 define i1 @nested_no_throw(i32* noalias %p, i32 %high) {
 ; CHECK-LABEL: @nested_no_throw
 ; CHECK-LABEL: loop:                                             ; preds = %next
 ; CHECK:         %iv = phi i32 [ 0, %entry ], [ %iv.next, %next ] ; (mustexec in: loop)
 ; CHECK:         br label %inner_loop ; (mustexec in: loop)
 ; CHECK-LABEL: inner_loop:
-; CHECK:         %v = load i32, i32* %p ; (mustexec in 2 loops: inner_loop, loop)
+; CHECK:         %v = load i32, i32* %p, align 4  ; (mustexec in 2 loops: inner_loop, loop)
 ; CHECK:         %inner.test = icmp eq i32 %v, 0  ; (mustexec in 2 loops: inner_loop, loop)
 ; CHECK:         br i1 %inner.test, label %inner_loop, label %next  ; (mustexec in 2 loops: inner_loop, loop)
 ; CHECK-LABEL: next:
 ; CHECK:         %iv.next = add nuw nsw i32 %iv, 1 ; (mustexec in: loop)
 ; CHECK:         %exit.test = icmp slt i32 %iv, %high ; (mustexec in: loop)
 ; CHECK:         br i1 %exit.test, label %exit, label %loop ; (mustexec in: loop)
 
 entry:

 ; and there's no implicit control flow in the loop, all must execute
 ; FIXME: handled by loop safety info, test it
 define i1 @nothrow_loop(i32* noalias %p, i32 %high) {
 ; CHECK-LABEL: @nothrow_loop(
 ; CHECK-LABEL:  loop:
 ; CHECK:         %iv = phi i32 [ 0, %entry ], [ %iv.next, %next ] ; (mustexec in: loop)
 ; CHECK:          br label %next ; (mustexec in: loop)
 ; CHECK-LABEL: next:
-; CHECK:          %v = load i32, i32* %p ; (mustexec in: loop)
+; CHECK:          %v = load i32, i32* %p, align 4 ; (mustexec in: loop)
 ; CHECK:          %iv.next = add nuw nsw i32 %iv, 1 ; (mustexec in: loop)
 ; CHECK:          %exit.test = icmp slt i32 %iv, %high ; (mustexec in: loop)
 ; CHECK:          br i1 %exit.test, label %exit, label %loop ; (mustexec in: loop)
 ; CHECK-NOT: mustexec
 
 entry:
   br label %loop
 

llvm/test/Analysis/ScalarEvolution/no-wrap-add-exprs.ll

 ; RUN: opt -S -analyze -scalar-evolution < %s | FileCheck %s
 
 !0 = !{i8 0, i8 127}
 
 define void @f0(i8* %len_addr) {
 ; CHECK-LABEL: Classifying expressions for: @f0
  entry:
   %len = load i8, i8* %len_addr, !range !0
   %len_norange = load i8, i8* %len_addr
-; CHECK:  %len = load i8, i8* %len_addr, !range !0
+; CHECK:  %len = load i8, i8* %len_addr, align 1, !range !0
 ; CHECK-NEXT:  -->  %len U: [0,127) S: [0,127)
 ; CHECK:  %len_norange = load i8, i8* %len_addr
 ; CHECK-NEXT:  -->  %len_norange U: full-set S: full-set
 
   %t0 = add i8 %len, 1
   %t1 = add i8 %len, 2
 ; CHECK:  %t0 = add i8 %len, 1
 ; CHECK-NEXT:  -->  (1 + %len)<nuw><nsw> U: [1,-128) S: [1,-128)
; CHECK-NEXT:  -->  (-2 + %len_norange) U: full-set S: full-set
   ret void
 }
 
 define void @f1(i8* %len_addr) {
 ; CHECK-LABEL: Classifying expressions for: @f1
  entry:
   %len = load i8, i8* %len_addr, !range !0
   %len_norange = load i8, i8* %len_addr
-; CHECK:  %len = load i8, i8* %len_addr, !range !0
+; CHECK:  %len = load i8, i8* %len_addr, align 1, !range !0
 ; CHECK-NEXT:  -->  %len U: [0,127) S: [0,127)
 ; CHECK:  %len_norange = load i8, i8* %len_addr
 ; CHECK-NEXT:  -->  %len_norange U: full-set S: full-set
 
   %t0 = add i8 %len, -1
   %t1 = add i8 %len, -2
 ; CHECK:  %t0 = add i8 %len, -1
 ; CHECK-NEXT:  -->  (-1 + %len)<nsw> U: [-1,126) S: [-1,126)
; CHECK-NEXT:  -->  (sext i8 (2 + %len_norange) to i16) U: [-128,128) S: [-128,128)
   ret void
 }
 
 define void @f2(i8* %len_addr) {
 ; CHECK-LABEL: Classifying expressions for: @f2
  entry:
   %len = load i8, i8* %len_addr, !range !0
   %len_norange = load i8, i8* %len_addr
-; CHECK:  %len = load i8, i8* %len_addr, !range !0
+; CHECK:  %len = load i8, i8* %len_addr, align 1, !range !0
 ; CHECK-NEXT:  -->  %len U: [0,127) S: [0,127)
 ; CHECK:  %len_norange = load i8, i8* %len_addr
 ; CHECK-NEXT:  -->  %len_norange U: full-set S: full-set
 
   %t0 = add i8 %len, 1
   %t1 = add i8 %len, 2
 ; CHECK:  %t0 = add i8 %len, 1
 ; CHECK-NEXT:  -->  (1 + %len)<nuw><nsw>

llvm/test/Analysis/TypeBasedAliasAnalysis/sink.ll

 ; RUN: opt -tbaa -sink -S < %s | FileCheck %s
 
 ; CHECK: a:
-; CHECK:   %f = load float, float* %p, !tbaa [[TAGA:!.*]]
+; CHECK:   %f = load float, float* %p, align 4, !tbaa [[TAGA:!.*]]
 ; CHECK:   store float %f, float* %q
 
 define void @foo(float* %p, i1 %c, float* %q, float* %r) {
   %f = load float, float* %p, !tbaa !0
   store float 0.0, float* %r, !tbaa !1
   br i1 %c, label %a, label %b
 a:
   store float %f, float* %q

llvm/test/Analysis/ValueTracking/deref-bitcast-of-gep.ll

 leave:
   ret void
 }
 
 define void @f_2(i8* align 4 dereferenceable_or_null(1024) %ptr) {
 ; CHECK-LABEL: @f_2(
 ; CHECK-NOT: load
 ; CHECK:  call void @use(i32 0)
-; CHECK-NEXT:  %val = load i32, i32* %ptr.i32, !invariant.load !0
+; CHECK-NEXT:  %val = load i32, i32* %ptr.i32, align 4, !invariant.load !0
 ; CHECK-NEXT:  call void @use(i32 %val)
 
 entry:
   ;; Can't hoist, since the alignment does not work out -- (<4 byte
   ;; aligned> + 30) is not necessarily 4 byte aligned.
 
   %ptr.gep = getelementptr i8, i8* %ptr, i32 30
   %ptr.i32 = bitcast i8* %ptr.gep to i32*

llvm/test/Bitcode/memInstructions.3.2.ll

; CHECK-NEXT: %res2 = load volatile i8, i8* %ptr1
   %res2 = load volatile i8, i8* %ptr1
 
 ; CHECK-NEXT: %res3 = load i8, i8* %ptr1, align 1
   %res3 = load i8, i8* %ptr1, align 1
 
 ; CHECK-NEXT: %res4 = load volatile i8, i8* %ptr1, align 1
   %res4 = load volatile i8, i8* %ptr1, align 1
 
-; CHECK-NEXT: %res5 = load i8, i8* %ptr1, !nontemporal !0
+; CHECK-NEXT: %res5 = load i8, i8* %ptr1, align 1, !nontemporal !0
   %res5 = load i8, i8* %ptr1, !nontemporal !0
 
-; CHECK-NEXT: %res6 = load volatile i8, i8* %ptr1, !nontemporal !0
+; CHECK-NEXT: %res6 = load volatile i8, i8* %ptr1, align 1, !nontemporal !0
   %res6 = load volatile i8, i8* %ptr1, !nontemporal !0
 
 ; CHECK-NEXT: %res7 = load i8, i8* %ptr1, align 1, !nontemporal !0
   %res7 = load i8, i8* %ptr1, align 1, !nontemporal !0
 
 ; CHECK-NEXT: %res8 = load volatile i8, i8* %ptr1, align 1, !nontemporal !0
   %res8 = load volatile i8, i8* %ptr1, align 1, !nontemporal !0
 
-; CHECK-NEXT: %res9 = load i8, i8* %ptr1, !invariant.load !1
+; CHECK-NEXT: %res9 = load i8, i8* %ptr1, align 1, !invariant.load !1
   %res9 = load i8, i8* %ptr1, !invariant.load !1
 
-; CHECK-NEXT: %res10 = load volatile i8, i8* %ptr1, !invariant.load !1
+; CHECK-NEXT: %res10 = load volatile i8, i8* %ptr1, align 1, !invariant.load !1
   %res10 = load volatile i8, i8* %ptr1, !invariant.load !1
 
 ; CHECK-NEXT: %res11 = load i8, i8* %ptr1, align 1, !invariant.load !1
   %res11 = load i8, i8* %ptr1, align 1, !invariant.load !1
 
 ; CHECK-NEXT: %res12 = load volatile i8, i8* %ptr1, align 1, !invariant.load !1
   %res12 = load volatile i8, i8* %ptr1, align 1, !invariant.load !1
 

llvm/test/CodeGen/AArch64/falkor-hwpf.ll

 ; RUN: opt < %s -S -falkor-hwpf-fix -mtriple aarch64 -mcpu=falkor | FileCheck %s
 ; RUN: opt < %s -S -falkor-hwpf-fix -mtriple aarch64 -mcpu=cortex-a57 | FileCheck %s --check-prefix=NOHWPF
 
 ; Check that strided access metadata is added to loads in inner loops when compiling for Falkor.
 
 ; CHECK-LABEL: @hwpf1(
-; CHECK: load i32, i32* %gep, !falkor.strided.access !0
-; CHECK: load i32, i32* %gep2, !falkor.strided.access !0
+; CHECK: load i32, i32* %gep, align 4, !falkor.strided.access !0
+; CHECK: load i32, i32* %gep2, align 4, !falkor.strided.access !0
 
 ; NOHWPF-LABEL: @hwpf1(
-; NOHWPF: load i32, i32* %gep{{$}}
-; NOHWPF: load i32, i32* %gep2{{$}}
+; NOHWPF: load i32, i32* %gep, align 4{{$}}
+; NOHWPF: load i32, i32* %gep2, align 4{{$}}
 define void @hwpf1(i32* %p, i32* %p2) {
 entry:
   br label %loop
 
 loop:
   %iv = phi i32 [ 0, %entry ], [ %inc, %loop ]
 
   %gep = getelementptr inbounds i32, i32* %p, i32 %iv
   %load = load i32, i32* %gep
 
   %gep2 = getelementptr inbounds i32, i32* %p2, i32 %iv
   %load2 = load i32, i32* %gep2
 
   %inc = add i32 %iv, 1
   %exitcnd = icmp uge i32 %inc, 1024
   br i1 %exitcnd, label %exit, label %loop
 
 exit:
   ret void
 }
 
 ; Check that outer loop strided load isn't marked.
 ; CHECK-LABEL: @hwpf2(
-; CHECK: load i32, i32* %gep, !falkor.strided.access !0
-; CHECK: load i32, i32* %gep2{{$}}
+; CHECK: load i32, i32* %gep, align 4, !falkor.strided.access !0
+; CHECK: load i32, i32* %gep2, align 4{{$}}
 
 ; NOHWPF-LABEL: @hwpf2(
-; NOHWPF: load i32, i32* %gep{{$}}
-; NOHWPF: load i32, i32* %gep2{{$}}
+; NOHWPF: load i32, i32* %gep, align 4{{$}}
+; NOHWPF: load i32, i32* %gep2, align 4{{$}}
 define void @hwpf2(i32* %p) {
 entry:
   br label %loop1
 
 loop1:
   %iv1 = phi i32 [ 0, %entry ], [ %inc1, %loop1.latch ]
   %outer.sum = phi i32 [ 0, %entry ], [ %sum, %loop1.latch ]
   br label %loop2.header

 
 exit:
   ret void
 }
 
 
 ; Check that non-strided load isn't marked.
 ; CHECK-LABEL: @hwpf3(
-; CHECK: load i32, i32* %gep, !falkor.strided.access !0
-; CHECK: load i32, i32* %gep2{{$}}
+; CHECK: load i32, i32* %gep, align 4, !falkor.strided.access !0
+; CHECK: load i32, i32* %gep2, align 4{{$}}
 
 ; NOHWPF-LABEL: @hwpf3(
-; NOHWPF: load i32, i32* %gep{{$}}
-; NOHWPF: load i32, i32* %gep2{{$}}
+; NOHWPF: load i32, i32* %gep, align 4{{$}}
+; NOHWPF: load i32, i32* %gep2, align 4{{$}}
 define void @hwpf3(i32* %p, i32* %p2) {
 entry:
   br label %loop
 
 loop:
   %iv = phi i32 [ 0, %entry ], [ %inc, %loop ]
 
   %gep = getelementptr inbounds i32, i32* %p, i32 %iv

llvm/test/CodeGen/AMDGPU/invalid-alloca.ll

 ; RUN: not llvm-as -data-layout=A5 < %s 2>&1 | FileCheck -check-prefixes=COMMON,AS %s
 ; RUN: not llc -mtriple amdgcn-amd-amdhsa < %s 2>&1 | FileCheck -check-prefixes=COMMON,LLC %s
-; RUN: llvm-as < %s | not llc -mtriple amdgcn-amd-amdhsa 2>&1 | FileCheck -check-prefixes=COMMON,LLC %s
+; RUN: llvm-as < %s | not llc -mtriple amdgcn-amd-amdhsa 2>&1 | FileCheck -check-prefixes=MISMATCH %s
 ; RUN: not opt -data-layout=A5 -S < %s 2>&1 | FileCheck -check-prefixes=COMMON,LLC %s
-; RUN: llvm-as < %s | not opt -data-layout=A5 2>&1 | FileCheck -check-prefixes=COMMON,LLC %s
+; RUN: llvm-as < %s | not opt -data-layout=A5 2>&1 | FileCheck -check-prefixes=MISMATCH %s
 
 ; AS: assembly parsed, but does not verify as correct!
 ; COMMON: Allocation instruction pointer not in the stack address space!
 ; COMMON:  %tmp = alloca i32
+; MISMATCH: Explicit load/store type does not match pointee type of pointer operand
 ; LLC: error: input module is broken!
 
 define amdgpu_kernel void @test() {
   %tmp = alloca i32
+  %tmp2 = alloca i32*
+  store i32* %tmp, i32** %tmp2
   ret void
 }
 

llvm/test/CodeGen/ARM/ParallelDSP/squaring.ll

 define i32 @accumulate_square_a0(i16* %a, i16* %b, i32 %acc) {
 ; CHECK-LABEL: @accumulate_square_a0(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[ADDR_A_1:%.*]] = getelementptr i16, i16* [[A:%.*]], i32 1
 ; CHECK-NEXT:    [[ADDR_B_1:%.*]] = getelementptr i16, i16* [[B:%.*]], i32 1
 ; CHECK-NEXT:    [[LD_A_0:%.*]] = load i16, i16* [[A]]
 ; CHECK-NEXT:    [[SEXT_A_0:%.*]] = sext i16 [[LD_A_0]] to i32
 ; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i16* [[ADDR_A_1]] to i32*
-; CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
+; CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 2
 ; CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 ; CHECK-NEXT:    [[TMP3:%.*]] = sext i16 [[TMP2]] to i32
 ; CHECK-NEXT:    [[TMP4:%.*]] = bitcast i16* [[ADDR_B_1]] to i32*
-; CHECK-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
+; CHECK-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 2
 ; CHECK-NEXT:    [[TMP6:%.*]] = trunc i32 [[TMP5]] to i16
 ; CHECK-NEXT:    [[TMP7:%.*]] = sext i16 [[TMP6]] to i32
 ; CHECK-NEXT:    [[MUL_0:%.*]] = mul i32 [[SEXT_A_0]], [[SEXT_A_0]]
 ; CHECK-NEXT:    [[TMP8:%.*]] = add i32 [[MUL_0]], [[ACC:%.*]]
 ; CHECK-NEXT:    [[MUL_1:%.*]] = mul i32 [[TMP3]], [[TMP7]]
 ; CHECK-NEXT:    [[TMP9:%.*]] = add i32 [[MUL_1]], [[TMP8]]
 ; CHECK-NEXT:    [[TMP10:%.*]] = call i32 @llvm.arm.smlad(i32 [[TMP1]], i32 [[TMP5]], i32 [[TMP9]])
 ; CHECK-NEXT:    ret i32 [[TMP10]]
entry:
   %res = add i32 %add.2, %acc
   ret i32 %res
 }
 
 define i32 @accumulate_square_a2(i16* %a, i16* %b, i32 %acc) {
 ; CHECK-LABEL: @accumulate_square_a2(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i16* [[A:%.*]] to i32*
-; CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
+; CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 2
 ; CHECK-NEXT:    [[TMP2:%.*]] = lshr i32 [[TMP1]], 16
 ; CHECK-NEXT:    [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16
 ; CHECK-NEXT:    [[TMP4:%.*]] = sext i16 [[TMP3]] to i32
 ; CHECK-NEXT:    [[TMP5:%.*]] = bitcast i16* [[B:%.*]] to i32*
-; CHECK-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
+; CHECK-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 2
 ; CHECK-NEXT:    [[TMP7:%.*]] = lshr i32 [[TMP6]], 16
 ; CHECK-NEXT:    [[TMP8:%.*]] = trunc i32 [[TMP7]] to i16
 ; CHECK-NEXT:    [[TMP9:%.*]] = sext i16 [[TMP8]] to i32
 ; CHECK-NEXT:    [[MUL_1:%.*]] = mul i32 [[TMP4]], [[TMP9]]
 ; CHECK-NEXT:    [[ADDR_A_2:%.*]] = getelementptr i16, i16* [[A]], i32 2
 ; CHECK-NEXT:    [[ADDR_B_2:%.*]] = getelementptr i16, i16* [[B]], i32 2
 ; CHECK-NEXT:    [[LD_A_2:%.*]] = load i16, i16* [[ADDR_A_2]]
 ; CHECK-NEXT:    [[LD_B_2:%.*]] = load i16, i16* [[ADDR_B_2]]

llvm/test/CodeGen/AVR/call.ll

 ; CHECK: pop r29
 ; CHECK: pop r28
   %p = alloca [8 x i16]
   %arraydecay = getelementptr inbounds [8 x i16], [8 x i16]* %p, i16 0, i16 0
   call void @foo64_3(i64 723685415333071112, i64 723685415333071112, i64 723685415333071112, i8 88, i16* %arraydecay)
   ret void
 }
 
-define i32 @icall(i32 (i32)* %foo) {
+define i32 @icall(i32 (i32) addrspace(1)* %foo) {
 ; CHECK-LABEL: icall:
 ; CHECK: movw r30, r24
 ; CHECK: ldi r22, 147
 ; CHECK: ldi r23, 248
 ; CHECK: ldi r24, 214
 ; CHECK: ldi r25, 198
 ; CHECK: icall
 ; CHECK: subi r22, 251

llvm/test/CodeGen/AVR/icall-func-pointer-correct-addr-space.ll

 ; RUN: llc -mattr=lpm,lpmw < %s -march=avr | FileCheck %s
 
-@callbackPtr = common global void (i16)* null, align 8
+@callbackPtr = common global void (i16) addrspace(1)* null, align 8
 @myValuePtr = common global i16* null, align 8
 
 @externalConstant = external global i16, align 2
 
 declare void @externalFunction(i16 signext)
 declare void @bar(i8 signext, void (i16)*, i16*)
 
 ; CHECK-LABEL: loadCallbackPtr
 define void @loadCallbackPtr() {
 entry:
   ; CHECK:      ldi     r{{[0-9]+}}, pm_lo8(externalFunction)
   ; CHECK-NEXT: ldi     r{{[0-9]+}}, pm_hi8(externalFunction)
-  store void (i16)* @externalFunction, void (i16)** @callbackPtr, align 8
+  store void (i16) addrspace(1)* @externalFunction, void (i16) addrspace(1)** @callbackPtr, align 8
   ret void
 }
 
 ; CHECK-LABEL: loadValuePtr
 define void @loadValuePtr() {
 entry:
   ; CHECK:      ldi     r{{[0-9]+}}, lo8(externalConstant)
   ; CHECK-NEXT: ldi     r{{[0-9]+}}, hi8(externalConstant)
   store i16* @externalConstant, i16** @myValuePtr, align 8
   ret void
 }

llvm/test/CodeGen/AVR/rust-avr-bug-37.ll

 ; RUN: llc < %s -march=avr | FileCheck %s
 
 %"fmt::Formatter" = type { i32, { i8*, void (i8*)** } }
 
 @str.1b = external constant [0 x i8]
 
-define void @"TryFromIntError::Debug"(%"fmt::Formatter"* dereferenceable(32)) unnamed_addr #0 personality i32 (...)* @rust_eh_personality {
+define void @"TryFromIntError::Debug"(%"fmt::Formatter"* dereferenceable(32)) unnamed_addr #0 personality i32 (...) addrspace(1)* @rust_eh_personality {
 ; CHECK-LABEL: "TryFromIntError::Debug"
 start:
   %builder = alloca i8, align 8
   %1 = getelementptr inbounds %"fmt::Formatter", %"fmt::Formatter"* %0, i16 0, i32 1
   %2 = bitcast { i8*, void (i8*)** }* %1 to {}**
   %3 = load {}*, {}** %2, align 2
   %4 = getelementptr inbounds %"fmt::Formatter", %"fmt::Formatter"* %0, i16 0, i32 1, i32 1
   %5 = load void (i8*)**, void (i8*)*** %4, align 2
   %6 = getelementptr inbounds void (i8*)*, void (i8*)** %5, i16 3
-  %7 = bitcast void (i8*)** %6 to i8 ({}*, i8*, i16)**
-  %8 = load i8 ({}*, i8*, i16)*, i8 ({}*, i8*, i16)** %7, align 2
+  %7 = bitcast void (i8*)** %6 to i8 ({}*, i8*, i16) addrspace(1)**
+  %8 = load i8 ({}*, i8*, i16) addrspace(1)*, i8 ({}*, i8*, i16) addrspace(1)** %7, align 2
   %9 = tail call i8 %8({}* nonnull %3, i8* noalias nonnull readonly getelementptr inbounds ([0 x i8], [0 x i8]* @str.1b, i16 0, i16 0), i16 15)
   unreachable
 }
 
 declare i32 @rust_eh_personality(...) unnamed_addr
 
-attributes #0 = { uwtable }
+attributes #0 = { uwtable }
 

llvm/test/CodeGen/AVR/rust-avr-bug-95.ll

 ; RUN: llc < %s -march=avr | FileCheck %s
 
 %"fmt::Formatter.1.77.153.229.305.381.1673" = type { [0 x i8], i32, [0 x i8], i32, [0 x i8], i8, [0 x i8], %"option::Option<usize>.0.76.152.228.304.380.1672", [0 x i8], %"option::Option<usize>.0.76.152.228.304.380.1672", [0 x i8], { {}*, {}* }, [0 x i8], { i8*, i8* }, [0 x i8], { [0 x { i8*, i8* }]*, i16 }, [0 x i8] }
 %"option::Option<usize>.0.76.152.228.304.380.1672" = type { [0 x i8], i8, [2 x i8] }
 
 @str.4S = external constant [5 x i8]
 
 ; Function Attrs: uwtable
-define void @"_ZN65_$LT$lib..str..Chars$LT$$u27$a$GT$$u20$as$u20$lib..fmt..Debug$GT$3fmt17h76a537e22649f739E"(%"fmt::Formatter.1.77.153.229.305.381.1673"* dereferenceable(27) %__arg_0) unnamed_addr #0 personality i32 (...)* @rust_eh_personality {
+define void @"_ZN65_$LT$lib..str..Chars$LT$$u27$a$GT$$u20$as$u20$lib..fmt..Debug$GT$3fmt17h76a537e22649f739E"(%"fmt::Formatter.1.77.153.229.305.381.1673"* dereferenceable(27) %__arg_0) unnamed_addr #0 personality i32 (...) addrspace(1)* @rust_eh_personality {
 ; CHECK-LABEL: "_ZN65_$LT$lib..str..Chars$LT$$u27$a$GT$$u20$as$u20$lib..fmt..Debug$GT$3fmt17h76a537e22649f739E"
 start:
   %0 = getelementptr inbounds %"fmt::Formatter.1.77.153.229.305.381.1673", %"fmt::Formatter.1.77.153.229.305.381.1673"* %__arg_0, i16 0, i32 11, i32 0
   %1 = load {}*, {}** %0, align 1, !noalias !0, !nonnull !9
   %2 = getelementptr inbounds %"fmt::Formatter.1.77.153.229.305.381.1673", %"fmt::Formatter.1.77.153.229.305.381.1673"* %__arg_0, i16 0, i32 11, i32 1
-  %3 = bitcast {}** %2 to i1 ({}*, [0 x i8]*, i16)***
-  %4 = load i1 ({}*, [0 x i8]*, i16)**, i1 ({}*, [0 x i8]*, i16)*** %3, align 1, !noalias !0, !nonnull !9
-  %5 = getelementptr inbounds i1 ({}*, [0 x i8]*, i16)*, i1 ({}*, [0 x i8]*, i16)** %4, i16 3
-  %6 = load i1 ({}*, [0 x i8]*, i16)*, i1 ({}*, [0 x i8]*, i16)** %5, align 1, !invariant.load !9, !noalias !0, !nonnull !9
+  %3 = bitcast {}** %2 to i1 ({}*, [0 x i8]*, i16) addrspace(1)***
+  %4 = load i1 ({}*, [0 x i8]*, i16) addrspace(1)**, i1 ({}*, [0 x i8]*, i16) addrspace(1)*** %3, align 1, !noalias !0, !nonnull !9
+  %5 = getelementptr inbounds i1 ({}*, [0 x i8]*, i16) addrspace(1)*, i1 ({}*, [0 x i8]*, i16) addrspace(1)** %4, i16 3
+  %6 = load i1 ({}*, [0 x i8]*, i16) addrspace(1)*, i1 ({}*, [0 x i8]*, i16) addrspace(1)** %5, align 1, !invariant.load !9, !noalias !0, !nonnull !9
   %7 = tail call zeroext i1 %6({}* nonnull %1, [0 x i8]* noalias nonnull readonly bitcast ([5 x i8]* @str.4S to [0 x i8]*), i16 5), !noalias !10
   unreachable
 }
 
 declare i32 @rust_eh_personality(...) unnamed_addr
 
 attributes #0 = { uwtable }
 
 !0 = !{!1, !3, !5, !6, !8}
 !1 = distinct !{!1, !2, !"_ZN3lib3fmt9Formatter9write_str17ha1a9656fc66ccbe5E: %data.0"}
 !2 = distinct !{!2, !"_ZN3lib3fmt9Formatter9write_str17ha1a9656fc66ccbe5E"}
 !3 = distinct !{!3, !4, !"_ZN3lib3fmt8builders16debug_struct_new17h352a1de8f89c2bc3E: argument 0"}
 !4 = distinct !{!4, !"_ZN3lib3fmt8builders16debug_struct_new17h352a1de8f89c2bc3E"}
 !5 = distinct !{!5, !4, !"_ZN3lib3fmt8builders16debug_struct_new17h352a1de8f89c2bc3E: %name.0"}
 !6 = distinct !{!6, !7, !"_ZN3lib3fmt9Formatter12debug_struct17ha1ff79f633171b68E: argument 0"}
 !7 = distinct !{!7, !"_ZN3lib3fmt9Formatter12debug_struct17ha1ff79f633171b68E"}
 !8 = distinct !{!8, !7, !"_ZN3lib3fmt9Formatter12debug_struct17ha1ff79f633171b68E: %name.0"}
 !9 = !{}
-!10 = !{!3, !6}
+!10 = !{!3, !6}
 

llvm/test/Feature/md_on_instruction.ll

 ; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s
 
 define i32 @foo() nounwind ssp {
 entry:
   ; CHECK: %retval = alloca i32
   ; CHECK: store i32 42, i32* %retval, !md !0
   ; CHECK: br label %0, !md !1
   %retval = alloca i32
   store i32 42, i32* %retval, !md !0
   br label %0, !md !1
 
 ; <label:0>
-  ; CHECK: %1 = load i32, i32* %retval, !md !2
+  ; CHECK: %1 = load i32, i32* %retval, align 4, !md !2
   ; CHECK: ret i32 %1, !md !3
   %1 = load i32, i32* %retval, !md !2
   ret i32 %1, !md !3
 }
 
 ; CHECK: !0 = !{}
 ; CHECK: !1 = distinct !{}
 ; CHECK: !2 = !{!0}
 ; CHECK: !3 = !{!4}
 ; CHECK: !4 = !{!0, !2}
 !0 = !{}
 !1 = distinct !{}
 !2 = !{!0}
 !3 = !{!4}
 !4 = !{!0, !2}

llvm/test/LTO/X86/strip-debug-info.ll

 ; RUN: llvm-as -disable-verify %s -o %t.bc
 ; ---- Full LTO ---------------------------------------------
 ; RUN: llvm-lto \
 ; RUN:     -exported-symbol foo -exported-symbol _foo \
 ; RUN:     -o %t.o %t.bc 2>&1 | \
 ; RUN:     FileCheck %s -allow-empty -check-prefix=CHECK-WARN
 ; RUN: llvm-nm %t.o | FileCheck %s 
 ; ---- Thin LTO (codegen only) ------------------------------
 ; RUN: llvm-lto -thinlto -thinlto-action=codegen \
 ; RUN:     %t.bc -disable-verify 2>&1 | \
 ; RUN:     FileCheck %s -allow-empty -check-prefix=CHECK-WARN
 ; ---- Thin LTO (optimize, strip main file) -----------------
-; RUN: opt -disable-verify -module-summary %s -o %t.bc
-; RUN: opt -disable-verify -module-summary %S/Inputs/strip-debug-info-bar.ll \
+; RUN: opt -disable-verify -disable-upgrade-debug-info -module-summary %s -o %t.bc
+; RUN: opt -disable-verify -disable-upgrade-debug-info -module-summary %S/Inputs/strip-debug-info-bar.ll \
 ; RUN:     -o %t2.bc
 ; RUN: llvm-lto -thinlto -thinlto-action=run \
 ; RUN:     %t.bc -disable-verify 2>&1 | \
 ; RUN:     FileCheck %s -allow-empty -check-prefix=CHECK-WARN
 ; ---- Thin LTO (optimize, strip imported file) -------------
-; RUN: opt -disable-verify -strip-debug -module-summary %t.bc -o %t-stripped.bc
+; RUN: opt -module-summary %t.bc -o %t-stripped.bc
 ; RUN: llvm-lto -thinlto-action=thinlink -o %t.index.bc %t-stripped.bc %t2.bc
 ; RUN: llvm-lto -thinlto -thinlto-action=import \
 ; RUN:     -thinlto-index=%t.index.bc \
 ; RUN:     -exported-symbol foo -exported-symbol _foo \
 ; RUN:     %t-stripped.bc -disable-verify 2>&1 | \
 ; RUN:     FileCheck %s -allow-empty -check-prefix=CHECK-WARN
 
 ; CHECK-ERR: Broken module found, compilation aborted

llvm/test/Transforms/Attributor/ArgumentPromotion/control-flow.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
 ; RUN: opt -attributor -attributor-manifest-internal  -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
 ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal  -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
 ; RUN: opt -attributor-cgscc -attributor-manifest-internal  -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
 ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal  -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
 
 ; Don't promote around control flow.
 define internal i32 @callee(i1 %C, i32* %P) {
 ; CHECK-LABEL: define {{[^@]+}}@callee
 ; CHECK-SAME: (i1 [[C:%.*]], i32* nocapture nofree readonly [[P:%.*]])
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
 ; CHECK:       T:
 ; CHECK-NEXT:    ret i32 17
 ; CHECK:       F:
-; CHECK-NEXT:    [[X:%.*]] = load i32, i32* [[P]], align 1
+; CHECK-NEXT:    [[X:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    ret i32 [[X]]
 ;
 entry:
   br i1 %C, label %T, label %F
 
 T:
   ret i32 17
 

llvm/test/Transforms/CodeGenPrepare/X86/invariant.group.ll

 ; RUN: opt -codegenprepare -S -mtriple=x86_64 < %s | FileCheck %s
 
 @tmp = global i8 0
 
 ; CHECK-LABEL: define void @foo() {
 define void @foo() {
 enter:
   ; CHECK-NOT: !invariant.group
   ; CHECK-NOT: @llvm.launder.invariant.group.p0i8(
-  ; CHECK: %val = load i8, i8* @tmp{{$}}
+  ; CHECK: %val = load i8, i8* @tmp, align 1{{$}}
   %val = load i8, i8* @tmp, !invariant.group !0
   %ptr = call i8* @llvm.launder.invariant.group.p0i8(i8* @tmp)
   
   ; CHECK: store i8 42, i8* @tmp{{$}}
   store i8 42, i8* %ptr, !invariant.group !0
   
   ret void
 }
 ; CHECK-LABEL: }
 
 ; CHECK-LABEL: define void @foo2() {
 define void @foo2() {
 enter:
   ; CHECK-NOT: !invariant.group
   ; CHECK-NOT: @llvm.strip.invariant.group.p0i8(
-  ; CHECK: %val = load i8, i8* @tmp{{$}}
+  ; CHECK: %val = load i8, i8* @tmp, align 1{{$}}
   %val = load i8, i8* @tmp, !invariant.group !0
   %ptr = call i8* @llvm.strip.invariant.group.p0i8(i8* @tmp)
 
   ; CHECK: store i8 42, i8* @tmp{{$}}
   store i8 42, i8* %ptr, !invariant.group !0
 
   ret void
 }
 ; CHECK-LABEL: }
 
 
 declare i8* @llvm.launder.invariant.group.p0i8(i8*)
 declare i8* @llvm.strip.invariant.group.p0i8(i8*)
 !0 = !{}

llvm/test/Transforms/CorrelatedValuePropagation/non-null.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -correlated-propagation -S | FileCheck %s
 
 define void @test1(i8* %ptr) {
 ; CHECK-LABEL: @test1(
-; CHECK-NEXT:    [[A:%.*]] = load i8, i8* [[PTR:%.*]]
+; CHECK-NEXT:    [[A:%.*]] = load i8, i8* [[PTR:%.*]], align 1
 ; CHECK-NEXT:    br label [[BB:%.*]]
 ; CHECK:       bb:
 ; CHECK-NEXT:    ret void
 ;
   %A = load i8, i8* %ptr
   br label %bb
 bb:
   icmp ne i8* %ptr, null
   ret void
 }
 
 define void @test1_no_null_opt(i8* %ptr) #0 {
 ; CHECK-LABEL: @test1_no_null_opt(
-; CHECK-NEXT:    [[A:%.*]] = load i8, i8* [[PTR:%.*]]
+; CHECK-NEXT:    [[A:%.*]] = load i8, i8* [[PTR:%.*]], align 1
 ; CHECK-NEXT:    br label [[BB:%.*]]
 ; CHECK:       bb:
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i8* [[PTR]], null
 ; CHECK-NEXT:    ret void
 ;
   %A = load i8, i8* %ptr
   br label %bb
 bb:

 define void @test12(i8* %arg1, i8** %arg2) {
 ; CHECK-LABEL: @test12(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[IS_NULL:%.*]] = icmp eq i8* [[ARG1:%.*]], null
 ; CHECK-NEXT:    br i1 [[IS_NULL]], label [[NULL:%.*]], label [[NON_NULL:%.*]]
 ; CHECK:       non_null:
 ; CHECK-NEXT:    br label [[MERGE:%.*]]
 ; CHECK:       null:
-; CHECK-NEXT:    [[ANOTHER_ARG:%.*]] = load i8*, i8** [[ARG2:%.*]], !nonnull !0
+; CHECK-NEXT:    [[ANOTHER_ARG:%.*]] = load i8*, i8** [[ARG2:%.*]], align 8, !nonnull !0
 ; CHECK-NEXT:    br label [[MERGE]]
 ; CHECK:       merge:
 ; CHECK-NEXT:    [[MERGED_ARG:%.*]] = phi i8* [ [[ANOTHER_ARG]], [[NULL]] ], [ [[ARG1]], [[NON_NULL]] ]
 ; CHECK-NEXT:    call void @test12_helper(i8* nonnull [[MERGED_ARG]])
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %is_null = icmp eq i8* %arg1, null

llvm/test/Transforms/CorrelatedValuePropagation/phi-common-val.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -correlated-propagation -S | FileCheck %s
 ; RUN: opt < %s -passes="correlated-propagation" -S | FileCheck %s
 
 define i8* @simplify_phi_common_value_op0(i8* %ptr, i32* %b) {
 ; CHECK-LABEL: @simplify_phi_common_value_op0(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[ISNULL:%.*]] = icmp eq i8* [[PTR:%.*]], null
 ; CHECK-NEXT:    br i1 [[ISNULL]], label [[RETURN:%.*]], label [[ELSE:%.*]]
 ; CHECK:       else:
-; CHECK-NEXT:    [[LB:%.*]] = load i32, i32* [[B:%.*]]
+; CHECK-NEXT:    [[LB:%.*]] = load i32, i32* [[B:%.*]], align 4
 ; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[LB]], 1
 ; CHECK-NEXT:    store i32 [[ADD]], i32* [[B]]
 ; CHECK-NEXT:    br label [[RETURN]]
 ; CHECK:       return:
 ; CHECK-NEXT:    ret i8* [[PTR]]
 ;
 entry:
   %isnull = icmp eq i8* %ptr, null

 }
 
 define i8* @simplify_phi_common_value_op1(i8* %ptr, i32* %b) {
 ; CHECK-LABEL: @simplify_phi_common_value_op1(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[ISNULL:%.*]] = icmp eq i8* [[PTR:%.*]], null
 ; CHECK-NEXT:    br i1 [[ISNULL]], label [[RETURN:%.*]], label [[ELSE:%.*]]
 ; CHECK:       else:
-; CHECK-NEXT:    [[LB:%.*]] = load i32, i32* [[B:%.*]]
+; CHECK-NEXT:    [[LB:%.*]] = load i32, i32* [[B:%.*]], align 4
 ; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[LB]], 1
 ; CHECK-NEXT:    store i32 [[ADD]], i32* [[B]]
 ; CHECK-NEXT:    br label [[RETURN]]
 ; CHECK:       return:
 ; CHECK-NEXT:    ret i8* [[PTR]]
 ;
 entry:
   %isnull = icmp eq i8* %ptr, null

 ; CHECK-LABEL: @simplify_phi_multiple_constants(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[IS0:%.*]] = icmp eq i8 [[X:%.*]], 0
 ; CHECK-NEXT:    br i1 [[IS0]], label [[RETURN:%.*]], label [[ELSE1:%.*]]
 ; CHECK:       else1:
 ; CHECK-NEXT:    [[IS42:%.*]] = icmp eq i8 [[X]], 42
 ; CHECK-NEXT:    br i1 [[IS42]], label [[RETURN]], label [[ELSE2:%.*]]
 ; CHECK:       else2:
-; CHECK-NEXT:    [[LB:%.*]] = load i32, i32* [[B:%.*]]
+; CHECK-NEXT:    [[LB:%.*]] = load i32, i32* [[B:%.*]], align 4
 ; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[LB]], 1
 ; CHECK-NEXT:    store i32 [[ADD]], i32* [[B]]
 ; CHECK-NEXT:    br label [[RETURN]]
 ; CHECK:       return:
 ; CHECK-NEXT:    ret i8 [[X]]
 ;
 entry:
   %is0 = icmp eq i8 %x, 0

 
 define i8* @simplify_phi_common_value_from_instruction(i8* %ptr_op, i32* %b, i32 %i) {
 ; CHECK-LABEL: @simplify_phi_common_value_from_instruction(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[PTR:%.*]] = getelementptr i8, i8* [[PTR_OP:%.*]], i32 [[I:%.*]]
 ; CHECK-NEXT:    [[ISNULL:%.*]] = icmp eq i8* [[PTR]], null
 ; CHECK-NEXT:    br i1 [[ISNULL]], label [[RETURN:%.*]], label [[ELSE:%.*]]
 ; CHECK:       else:
-; CHECK-NEXT:    [[LB:%.*]] = load i32, i32* [[B:%.*]]
+; CHECK-NEXT:    [[LB:%.*]] = load i32, i32* [[B:%.*]], align 4
 ; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[LB]], 1
 ; CHECK-NEXT:    store i32 [[ADD]], i32* [[B]]
 ; CHECK-NEXT:    br label [[RETURN]]
 ; CHECK:       return:
 ; CHECK-NEXT:    ret i8* [[PTR]]
 ;
 entry:
   %ptr = getelementptr i8, i8* %ptr_op, i32 %i

llvm/test/Transforms/CorrelatedValuePropagation/range.ll

sw.default:
   %cmp8 = icmp eq i32 %c, 8
   %or = or i1 %cmp5, %cmp6
   %or2 = or i1 %cmp7, %cmp8
   ret i1 false
 }
 
 define i1 @test8(i64* %p) {
 ; CHECK-LABEL: @test8(
-; CHECK-NEXT:    [[A:%.*]] = load i64, i64* [[P:%.*]], !range !0
+; CHECK-NEXT:    [[A:%.*]] = load i64, i64* [[P:%.*]], align 4, !range !0
 ; CHECK-NEXT:    [[RES:%.*]] = icmp eq i64 [[A]], 0
 ; CHECK-NEXT:    ret i1 false
 ;
   %a = load i64, i64* %p, !range !{i64 4, i64 255}
   %res = icmp eq i64 %a, 0
   ret i1 %res
 }
 
 define i1 @test9(i64* %p) {
 ; CHECK-LABEL: @test9(
-; CHECK-NEXT:    [[A:%.*]] = load i64, i64* [[P:%.*]], !range !1
+; CHECK-NEXT:    [[A:%.*]] = load i64, i64* [[P:%.*]], align 4, !range !1
 ; CHECK-NEXT:    [[RES:%.*]] = icmp eq i64 [[A]], 0
 ; CHECK-NEXT:    ret i1 true
 ;
   %a = load i64, i64* %p, !range !{i64 0, i64 1}
   %res = icmp eq i64 %a, 0
   ret i1 %res
 }
 
 define i1 @test10(i64* %p) {
 ; CHECK-LABEL: @test10(
-; CHECK-NEXT:    [[A:%.*]] = load i64, i64* [[P:%.*]], !range !2
+; CHECK-NEXT:    [[A:%.*]] = load i64, i64* [[P:%.*]], align 4, !range !2
 ; CHECK-NEXT:    [[RES:%.*]] = icmp eq i64 [[A]], 0
 ; CHECK-NEXT:    ret i1 false
 ;
   %a = load i64, i64* %p, !range !{i64 4, i64 8, i64 15, i64 20}
   %res = icmp eq i64 %a, 0
   ret i1 %res
 }
 
 @g = external global i32
 
 define i1 @test11() {
 ; CHECK-LABEL: @test11(
-; CHECK-NEXT:    [[POSITIVE:%.*]] = load i32, i32* @g, !range !3
+; CHECK-NEXT:    [[POSITIVE:%.*]] = load i32, i32* @g, align 4, !range !3
 ; CHECK-NEXT:    [[ADD:%.*]] = add nuw nsw i32 [[POSITIVE]], 1
 ; CHECK-NEXT:    [[TEST:%.*]] = icmp sgt i32 [[ADD]], 0
 ; CHECK-NEXT:    br label [[NEXT:%.*]]
 ; CHECK:       next:
 ; CHECK-NEXT:    ret i1 true
 ;
   %positive = load i32, i32* @g, !range !{i32 1, i32 2048}
   %add = add i32 %positive, 1

 
 else:
   ret i1 false
 }
 
 @limit = external global i32
 define i1 @test15(i32 %a) {
 ; CHECK-LABEL: @test15(
-; CHECK-NEXT:    [[LIMIT:%.*]] = load i32, i32* @limit, !range !4
+; CHECK-NEXT:    [[LIMIT:%.*]] = load i32, i32* @limit, align 4, !range !4
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[A:%.*]], [[LIMIT]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[THEN:%.*]], label [[ELSE:%.*]]
 ; CHECK:       then:
 ; CHECK-NEXT:    ret i1 false
 ; CHECK:       else:
 ; CHECK-NEXT:    ret i1 false
 ;
   %limit = load i32, i32* @limit, !range !{i32 0, i32 256}

llvm/test/Transforms/DCE/basic-preservation.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -dce -S --enable-knowledge-retention < %s | FileCheck %s
 
 define void @test(i32* %P) {
 ; CHECK-LABEL: @test(
-; CHECK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P:%.*]], i64 4), "nonnull"(i32* [[P]]) ]
+; CHECK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P:%.*]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
 ; CHECK-NEXT:    ret void
 ;
   %a = load i32, i32* %P
   ret void
 }

llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-simple.ll

bb3:
   ret void
 }
 
 
 define void @test7(i32* noalias %P, i32* noalias %Q) {
 ; CHECK-LABEL: @test7(
 ; CHECK-NEXT:    br i1 true, label [[BB1:%.*]], label [[BB2:%.*]]
 ; CHECK:       bb1:
-; CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* [[P:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* [[P:%.*]], align 4
 ; CHECK-NEXT:    br label [[BB3:%.*]]
 ; CHECK:       bb2:
 ; CHECK-NEXT:    br label [[BB3]]
 ; CHECK:       bb3:
 ; CHECK-NEXT:    store i32 0, i32* [[Q:%.*]]
 ; CHECK-NEXT:    store i32 0, i32* [[P]]
 ; CHECK-NEXT:    ret void
 ;
bb3:
   store i32 0, i32* %P
   ret void
 }
 
 define i32 @test22(i32* %P, i32* noalias %Q, i32* %R) {
 ; CHECK-LABEL: @test22(
 ; CHECK-NEXT:    store i32 2, i32* [[P:%.*]]
 ; CHECK-NEXT:    store i32 3, i32* [[Q:%.*]]
-; CHECK-NEXT:    [[L:%.*]] = load i32, i32* [[R:%.*]]
+; CHECK-NEXT:    [[L:%.*]] = load i32, i32* [[R:%.*]], align 4
 ; CHECK-NEXT:    ret i32 [[L]]
 ;
   store i32 1, i32* %Q
   store i32 2, i32* %P
   store i32 3, i32* %Q
   %l = load i32, i32* %R
   ret i32 %l
 }

 ; Make sure that we check the uses of `store i32 1, i32* %P.1 which does not
 ; alias %P. Note that uses point to the *first* def that may alias.
 define void @overlapping_read(i32* %P) {
 ; CHECK-LABEL: @overlapping_read(
 ; CHECK-NEXT:    store i32 0, i32* [[P:%.*]]
 ; CHECK-NEXT:    [[P_1:%.*]] = getelementptr i32, i32* [[P]], i32 1
 ; CHECK-NEXT:    store i32 1, i32* [[P_1]]
 ; CHECK-NEXT:    [[P_64:%.*]] = bitcast i32* [[P]] to i64*
-; CHECK-NEXT:    [[LV:%.*]] = load i64, i64* [[P_64]]
+; CHECK-NEXT:    [[LV:%.*]] = load i64, i64* [[P_64]], align 8
 ; CHECK-NEXT:    br i1 true, label [[BB1:%.*]], label [[BB2:%.*]]
 ; CHECK:       bb1:
 ; CHECK-NEXT:    br label [[BB3:%.*]]
 ; CHECK:       bb2:
 ; CHECK-NEXT:    br label [[BB3]]
 ; CHECK:       bb3:
 ; CHECK-NEXT:    store i32 2, i32* [[P]]
 ; CHECK-NEXT:    ret void

llvm/test/Transforms/DeadStoreElimination/MSSA/simple-preservation.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -aa-pipeline=basic-aa -passes=dse -enable-dse-memoryssa -enable-knowledge-retention -S | FileCheck %s
 
 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
 
 define void @test1(i32* %Q, i32* %P) {
 ; CHECK-LABEL: @test1(
-; CHECK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[Q:%.*]], i64 4), "nonnull"(i32* [[Q]]) ]
+; CHECK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[Q:%.*]], i64 4), "nonnull"(i32* [[Q]]), "align"(i32* [[Q]], i64 4) ]
 ; CHECK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P:%.*]], i64 4), "nonnull"(i32* [[P]]) ]
 ; CHECK-NEXT:    store i32 0, i32* [[P]]
 ; CHECK-NEXT:    ret void
 ;
   %DEAD = load i32, i32* %Q
   store i32 %DEAD, i32* %P
   store i32 0, i32* %P
   ret void
 }

llvm/test/Transforms/DeadStoreElimination/MSSA/simple.ll

;
   store i32 %g_value, i32* %g_addr, align 4
   %tmp3 = load i32, i32* @g, align 4
   ret i32 %tmp3
 }
 
 
 define void @test4(i32* %Q) {
 ; CHECK-LABEL: @test4(
-; CHECK-NEXT:    [[A:%.*]] = load i32, i32* [[Q:%.*]]
+; CHECK-NEXT:    [[A:%.*]] = load i32, i32* [[Q:%.*]], align 4
 ; CHECK-NEXT:    store volatile i32 [[A]], i32* [[Q]]
 ; CHECK-NEXT:    ret void
 ;
   %a = load i32, i32* %Q
   store volatile i32 %a, i32* %Q
   ret void
 }
 

llvm/test/Transforms/DeadStoreElimination/simple.ll

;
   store i32 %g_value, i32* %g_addr, align 4
   %tmp3 = load i32, i32* @g, align 4
   ret i32 %tmp3
 }
 
 
 define void @test4(i32* %Q) {
 ; CHECK-LABEL: @test4(
-; CHECK-NEXT:    [[A:%.*]] = load i32, i32* [[Q:%.*]]
+; CHECK-NEXT:    [[A:%.*]] = load i32, i32* [[Q:%.*]], align 4
 ; CHECK-NEXT:    store volatile i32 [[A]], i32* [[Q]]
 ; CHECK-NEXT:    ret void
 ;
   %a = load i32, i32* %Q
   store volatile i32 %a, i32* %Q
   ret void
 }
 
 define void @test5(i32* %Q) {
 ; CHECK-LABEL: @test5(
-; CHECK-NEXT:    [[A:%.*]] = load volatile i32, i32* [[Q:%.*]]
+; CHECK-NEXT:    [[A:%.*]] = load volatile i32, i32* [[Q:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %a = load volatile i32, i32* %Q
   store i32 %a, i32* %Q
   ret void
 }
 
 ; Should delete store of 10 even though memset is a may-store to P (P and Q may

llvm/test/Transforms/EarlyCSE/guards.ll

 ; NO_ASSUME-LABEL: @test0(
 ; NO_ASSUME-NEXT:    store i32 40, i32* [[PTR:%.*]]
 ; NO_ASSUME-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[COND:%.*]]) [ "deopt"() ]
 ; NO_ASSUME-NEXT:    ret i32 40
 ;
 ; USE_ASSUME-LABEL: @test0(
 ; USE_ASSUME-NEXT:    store i32 40, i32* [[PTR:%.*]]
 ; USE_ASSUME-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[COND:%.*]]) [ "deopt"() ]
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 40
 ;
 
   store i32 40, i32* %ptr
   call void(i1,...) @llvm.experimental.guard(i1 %cond) [ "deopt"() ]
   %rval = load i32, i32* %ptr
   ret i32 %rval
 }
 
 define i32 @test1(i32* %val, i1 %cond) {
 ; We can CSE loads over a guard, since it does not clobber memory
 ; NO_ASSUME-LABEL: @test1(
-; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[VAL:%.*]]
+; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[VAL:%.*]], align 4
 ; NO_ASSUME-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[COND:%.*]]) [ "deopt"() ]
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: @test1(
-; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[VAL:%.*]]
+; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[VAL:%.*]], align 4
 ; USE_ASSUME-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[COND:%.*]]) [ "deopt"() ]
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[VAL]], i64 4), "nonnull"(i32* [[VAL]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[VAL]], i64 4), "nonnull"(i32* [[VAL]]), "align"(i32* [[VAL]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
 
   %val0 = load i32, i32* %val
   call void(i1,...) @llvm.experimental.guard(i1 %cond) [ "deopt"() ]
   %val1 = load i32, i32* %val
   %rval = sub i32 %val0, %val1
   ret i32 %rval
;
   %cond2 = icmp slt i32 %val, 40
   %rval = sext i1 %cond2 to i32
   ret i32 %rval
 }
 
 define i32 @test3.unhandled(i32 %val) {
 ; After a guard has executed the condition it was guarding is known to
 ; be true.
-
 ; CHECK-LABEL: @test3.unhandled(
-; CHECK-NEXT:  %cond0 = icmp slt i32 %val, 40
-; CHECK-NEXT:  call void (i1, ...) @llvm.experimental.guard(i1 %cond0) [ "deopt"() ]
-; CHECK-NEXT:  %cond1 = icmp sge i32 %val, 40
-; CHECK-NEXT:  call void (i1, ...) @llvm.experimental.guard(i1 %cond1) [ "deopt"() ]
-; CHECK-NEXT:  ret i32 0
+; CHECK-NEXT:    [[COND0:%.*]] = icmp slt i32 [[VAL:%.*]], 40
+; CHECK-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[COND0]]) [ "deopt"() ]
+; CHECK-NEXT:    [[COND1:%.*]] = icmp sge i32 [[VAL]], 40
+; CHECK-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[COND1]]) [ "deopt"() ]
+; CHECK-NEXT:    ret i32 0
+;
 
 ; Demonstrates a case we do not yet handle (it is legal to fold %cond2
 ; to false)
   %cond0 = icmp slt i32 %val, 40
   call void(i1,...) @llvm.experimental.guard(i1 %cond0) [ "deopt"() ]
   %cond1 = icmp sge i32 %val, 40
   call void(i1,...) @llvm.experimental.guard(i1 %cond1) [ "deopt"() ]
   ret i32 0

llvm/test/Transforms/EarlyCSE/invariant-loads.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -S -early-cse < %s | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
 ; RUN: opt -S -basicaa -early-cse-memssa < %s | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
 ; RUN: opt -S -basicaa -early-cse-memssa --enable-knowledge-retention < %s | FileCheck %s --check-prefixes=CHECK,USE_ASSUME
 
 declare void @clobber_and_use(i32)
 
 define void @f_0(i32* %ptr) {
 ; NO_ASSUME-LABEL: @f_0(
-; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], !invariant.load !0
+; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @f_0(
-; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], !invariant.load !0
+; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; USE_ASSUME-NEXT:    ret void
 ;
 
   %val0 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val0)
   %val1 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val1)
   %val2 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val2)
   ret void
 }
 
 define void @f_1(i32* %ptr) {
 ; We can forward invariant loads to non-invariant loads.
 ; NO_ASSUME-LABEL: @f_1(
-; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], !invariant.load !0
+; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @f_1(
-; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], !invariant.load !0
+; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; USE_ASSUME-NEXT:    ret void
 ;
 
   %val0 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val0)
   %val1 = load i32, i32* %ptr
   call void @clobber_and_use(i32 %val1)
   ret void
 }
 
 define void @f_2(i32* %ptr) {
 ; We can forward a non-invariant load into an invariant load.
 ; NO_ASSUME-LABEL: @f_2(
-; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]]
+; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @f_2(
-; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]]
+; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; USE_ASSUME-NEXT:    ret void
 ;
 
   %val0 = load i32, i32* %ptr
   call void @clobber_and_use(i32 %val0)
   %val1 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val1)
   ret void
 }
 
 define void @f_3(i1 %cond, i32* %ptr) {
 ; NO_ASSUME-LABEL: @f_3(
-; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], !invariant.load !0
+; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    br i1 [[COND:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
 ; NO_ASSUME:       left:
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    ret void
 ; NO_ASSUME:       right:
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @f_3(
-; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], !invariant.load !0
+; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; USE_ASSUME-NEXT:    br i1 [[COND:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
 ; USE_ASSUME:       left:
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; USE_ASSUME-NEXT:    ret void
 ; USE_ASSUME:       right:
 ; USE_ASSUME-NEXT:    ret void
 ;
   %val0 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val0)
   br i1 %cond, label %left, label %right

 }
 
 define void @f_4(i1 %cond, i32* %ptr) {
 ; Negative test -- can't forward %val0 to %va1 because that'll break
 ; def-dominates-use.
 ; CHECK-LABEL: @f_4(
 ; CHECK-NEXT:    br i1 [[COND:%.*]], label [[LEFT:%.*]], label [[MERGE:%.*]]
 ; CHECK:       left:
-; CHECK-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], !invariant.load !0
+; CHECK-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
 ; CHECK-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; CHECK-NEXT:    br label [[MERGE]]
 ; CHECK:       merge:
-; CHECK-NEXT:    [[VAL1:%.*]] = load i32, i32* [[PTR]]
+; CHECK-NEXT:    [[VAL1:%.*]] = load i32, i32* [[PTR]], align 4
 ; CHECK-NEXT:    call void @clobber_and_use(i32 [[VAL1]])
 ; CHECK-NEXT:    ret void
 ;
   br i1 %cond, label %left, label %merge
 
 left:
 
   %val0 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val0)
   br label %merge
 
 merge:
 
   %val1 = load i32, i32* %ptr
   call void @clobber_and_use(i32 %val1)
   ret void
 }
 
 ; By assumption, the call can't change contents of p
 ; LangRef is a bit unclear about whether the store is reachable, so
 ; for the moment we chose to be conservative and just assume it's valid
 ; to restore the same unchanging value.
 define void @test_dse1(i32* %p) {
 ; NO_ASSUME-LABEL: @test_dse1(
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], !invariant.load !0
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4, !invariant.load !0
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @test_dse1(
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], !invariant.load !0
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4, !invariant.load !0
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]) ]
 ; USE_ASSUME-NEXT:    ret void
 ;
   %v1 = load i32, i32* %p, !invariant.load !{}
   call void @clobber_and_use(i32 %v1)
   store i32 %v1, i32* %p
   ret void
 }
 
 ; By assumption, v1 must equal v2 (TODO)
 define void @test_false_negative_dse2(i32* %p, i32 %v2) {
 ; CHECK-LABEL: @test_false_negative_dse2(
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], !invariant.load !0
+; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4, !invariant.load !0
 ; CHECK-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; CHECK-NEXT:    store i32 [[V2:%.*]], i32* [[P]]
 ; CHECK-NEXT:    ret void
 ;
   %v1 = load i32, i32* %p, !invariant.load !{}
   call void @clobber_and_use(i32 %v1)
   store i32 %v2, i32* %p
   ret void
 }
 
 ; If we remove the load, we still start an invariant scope since
 ; it lets us remove later loads not explicitly marked invariant
 define void @test_scope_start_without_load(i32* %p) {
 ; NO_ASSUME-LABEL: @test_scope_start_without_load(
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]]
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4
 ; NO_ASSUME-NEXT:    [[ADD:%.*]] = add i32 [[V1]], [[V1]]
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[ADD]])
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @test_scope_start_without_load(
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]]
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]) ]
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    [[ADD:%.*]] = add i32 [[V1]], [[V1]]
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[ADD]])
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; USE_ASSUME-NEXT:    ret void
 ;
   %v1 = load i32, i32* %p
   %v2 = load i32, i32* %p, !invariant.load !{}
   %add = add i32 %v1, %v2
   call void @clobber_and_use(i32 %add)
   %v3 = load i32, i32* %p
   call void @clobber_and_use(i32 %v3)
   ret void
 }
 
 ; If we already have an invariant scope, don't want to start a new one
 ; with a potentially greater generation.  This hides the earlier invariant
 ; load
 define void @test_scope_restart(i32* %p) {
 ; NO_ASSUME-LABEL: @test_scope_restart(
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], !invariant.load !0
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4, !invariant.load !0
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; NO_ASSUME-NEXT:    [[ADD:%.*]] = add i32 [[V1]], [[V1]]
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[ADD]])
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @test_scope_restart(
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], !invariant.load !0
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4, !invariant.load !0
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    [[ADD:%.*]] = add i32 [[V1]], [[V1]]
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[ADD]])
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; USE_ASSUME-NEXT:    ret void
 ;
   %v1 = load i32, i32* %p, !invariant.load !{}
   call void @clobber_and_use(i32 %v1)
   %v2 = load i32, i32* %p, !invariant.load !{}
   %add = add i32 %v1, %v2
   call void @clobber_and_use(i32 %add)
   %v3 = load i32, i32* %p
   call void @clobber_and_use(i32 %v3)
   ret void
 }

llvm/test/Transforms/EarlyCSE/invariant.start.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature
 ; RUN: opt < %s -S -early-cse | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
 ; RUN: opt < %s -S -early-cse --enable-knowledge-retention | FileCheck %s --check-prefixes=CHECK,USE_ASSUME
 ; RUN: opt < %s -S -passes=early-cse | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
 
 declare {}* @llvm.invariant.start.p0i8(i64, i8* nocapture) nounwind readonly
 declare void @llvm.invariant.end.p0i8({}*, i64, i8* nocapture) nounwind
 
 ; Check that we do load-load forwarding over invariant.start, since it does not
 ; clobber memory
 define i8 @test_bypass1(i8 *%P) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_bypass1
 ; NO_ASSUME-SAME: (i8* [[P:%.*]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i8, i8* [[P]]
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i8, i8* [[P]], align 1
 ; NO_ASSUME-NEXT:    [[I:%.*]] = call {}* @llvm.invariant.start.p0i8(i64 1, i8* [[P]])
 ; NO_ASSUME-NEXT:    ret i8 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_bypass1
 ; USE_ASSUME-SAME: (i8* [[P:%.*]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i8, i8* [[P]]
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i8, i8* [[P]], align 1
 ; USE_ASSUME-NEXT:    [[I:%.*]] = call {}* @llvm.invariant.start.p0i8(i64 1, i8* [[P]])
 ; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[P]], i64 1), "nonnull"(i8* [[P]]) ]
 ; USE_ASSUME-NEXT:    ret i8 0
 ;
 
   %V1 = load i8, i8* %P
   %i = call {}* @llvm.invariant.start.p0i8(i64 1, i8* %P)
   %V2 = load i8, i8* %P

 declare void @clobber()
 declare {}* @llvm.invariant.start.p0i32(i64 %size, i32* nocapture %ptr)
 declare void @llvm.invariant.end.p0i32({}*, i64, i32* nocapture) nounwind
 
 define i32 @test_before_load(i32* %p) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_before_load
 ; NO_ASSUME-SAME: (i32* [[P:%.*]])
 ; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_before_load
 ; USE_ASSUME-SAME: (i32* [[P:%.*]])
 ; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_before_clobber(i32* %p) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_before_clobber
 ; NO_ASSUME-SAME: (i32* [[P:%.*]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_before_clobber
 ; USE_ASSUME-SAME: (i32* [[P:%.*]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %v1 = load i32, i32* %p
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_duplicate_scope(i32* %p) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_duplicate_scope
 ; NO_ASSUME-SAME: (i32* [[P:%.*]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    [[TMP2:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_duplicate_scope
 ; USE_ASSUME-SAME: (i32* [[P:%.*]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; USE_ASSUME-NEXT:    call void @clobber()
 ; USE_ASSUME-NEXT:    [[TMP2:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %v1 = load i32, i32* %p
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @clobber()
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_unanalzyable_load(i32* %p) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_unanalzyable_load
 ; NO_ASSUME-SAME: (i32* [[P:%.*]])
 ; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; NO_ASSUME-NEXT:    call void @clobber()
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_unanalzyable_load
 ; USE_ASSUME-SAME: (i32* [[P:%.*]])
 ; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @clobber()
   %v1 = load i32, i32* %p
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_negative_after_clobber(i32* %p) {
 ; CHECK-LABEL: define {{[^@]+}}@test_negative_after_clobber
 ; CHECK-SAME: (i32* [[P:%.*]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    call void @clobber()
 ; CHECK-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   %v1 = load i32, i32* %p
   call void @clobber()
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_merge(i32* %p, i1 %cnd) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_merge
 ; NO_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; NO_ASSUME-NEXT:    br i1 [[CND]], label [[MERGE:%.*]], label [[TAKEN:%.*]]
 ; NO_ASSUME:       taken:
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    br label [[MERGE]]
 ; NO_ASSUME:       merge:
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_merge
 ; USE_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; USE_ASSUME-NEXT:    br i1 [[CND]], label [[MERGE:%.*]], label [[TAKEN:%.*]]
 ; USE_ASSUME:       taken:
 ; USE_ASSUME-NEXT:    call void @clobber()
 ; USE_ASSUME-NEXT:    br label [[MERGE]]
 ; USE_ASSUME:       merge:
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %v1 = load i32, i32* %p
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   br i1 %cnd, label %merge, label %taken
 
 taken:
   call void @clobber()
   br label %merge
 merge:
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_negative_after_mergeclobber(i32* %p, i1 %cnd) {
 ; CHECK-LABEL: define {{[^@]+}}@test_negative_after_mergeclobber
 ; CHECK-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    br i1 [[CND]], label [[MERGE:%.*]], label [[TAKEN:%.*]]
 ; CHECK:       taken:
 ; CHECK-NEXT:    call void @clobber()
 ; CHECK-NEXT:    br label [[MERGE]]
 ; CHECK:       merge:
 ; CHECK-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   %v1 = load i32, i32* %p
   br i1 %cnd, label %merge, label %taken
 
 taken:
   call void @clobber()
   br label %merge
 merge:
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 ; In theory, this version could work, but earlycse is incapable of
 ; merging facts along distinct paths.
 define i32 @test_false_negative_merge(i32* %p, i1 %cnd) {
 ; CHECK-LABEL: define {{[^@]+}}@test_false_negative_merge
 ; CHECK-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    br i1 [[CND]], label [[MERGE:%.*]], label [[TAKEN:%.*]]
 ; CHECK:       taken:
 ; CHECK-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; CHECK-NEXT:    call void @clobber()
 ; CHECK-NEXT:    br label [[MERGE]]
 ; CHECK:       merge:
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   %v1 = load i32, i32* %p
   br i1 %cnd, label %merge, label %taken
 
 taken:
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @clobber()
   br label %merge
 merge:
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_merge_unanalyzable_load(i32* %p, i1 %cnd) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_merge_unanalyzable_load
 ; NO_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
 ; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; NO_ASSUME-NEXT:    call void @clobber()
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; NO_ASSUME-NEXT:    br i1 [[CND]], label [[MERGE:%.*]], label [[TAKEN:%.*]]
 ; NO_ASSUME:       taken:
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    br label [[MERGE]]
 ; NO_ASSUME:       merge:
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_merge_unanalyzable_load
 ; USE_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
 ; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; USE_ASSUME-NEXT:    br i1 [[CND]], label [[MERGE:%.*]], label [[TAKEN:%.*]]
 ; USE_ASSUME:       taken:
 ; USE_ASSUME-NEXT:    call void @clobber()
 ; USE_ASSUME-NEXT:    br label [[MERGE]]
 ; USE_ASSUME:       merge:
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @clobber()
   %v1 = load i32, i32* %p
   br i1 %cnd, label %merge, label %taken
 
 taken:
   call void @clobber()
   br label %merge
 merge:
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define void @test_dse_before_load(i32* %p, i1 %cnd) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_dse_before_load
 ; NO_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
 ; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_dse_before_load
 ; USE_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
 ; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; USE_ASSUME-NEXT:    call void @clobber()
 ; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]) ]
 ; USE_ASSUME-NEXT:    ret void
 ;
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   store i32 %v1, i32* %p
   ret void
 }
 
 define void @test_dse_after_load(i32* %p, i1 %cnd) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_dse_after_load
 ; NO_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_dse_after_load
 ; USE_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; USE_ASSUME-NEXT:    call void @clobber()
 ; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]) ]
 ; USE_ASSUME-NEXT:    ret void
 ;
   %v1 = load i32, i32* %p
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @clobber()
   store i32 %v1, i32* %p
   ret void
 }
 
 
 ; In this case, we have a false negative since MemoryLocation is implicitly
 ; typed due to the user of a Value to represent the address.  Note that other
 ; passes will canonicalize away the bitcasts in this example.
 define i32 @test_false_negative_types(i32* %p) {
 ; CHECK-LABEL: define {{[^@]+}}@test_false_negative_types
 ; CHECK-SAME: (i32* [[P:%.*]])
 ; CHECK-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    call void @clobber()
 ; CHECK-NEXT:    [[PF:%.*]] = bitcast i32* [[P]] to float*
-; CHECK-NEXT:    [[V2F:%.*]] = load float, float* [[PF]]
+; CHECK-NEXT:    [[V2F:%.*]] = load float, float* [[PF]], align 4
 ; CHECK-NEXT:    [[V2:%.*]] = bitcast float [[V2F]] to i32
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   %pf = bitcast i32* %p to float*
   %v2f = load float, float* %pf
   %v2 = bitcast float %v2f to i32
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_negative_size1(i32* %p) {
 ; CHECK-LABEL: define {{[^@]+}}@test_negative_size1
 ; CHECK-SAME: (i32* [[P:%.*]])
 ; CHECK-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 3, i32* [[P]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    call void @clobber()
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   call {}* @llvm.invariant.start.p0i32(i64 3, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_negative_size2(i32* %p) {
 ; CHECK-LABEL: define {{[^@]+}}@test_negative_size2
 ; CHECK-SAME: (i32* [[P:%.*]])
 ; CHECK-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 0, i32* [[P]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    call void @clobber()
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   call {}* @llvm.invariant.start.p0i32(i64 0, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_negative_scope(i32* %p) {
 ; CHECK-LABEL: define {{[^@]+}}@test_negative_scope
 ; CHECK-SAME: (i32* [[P:%.*]])
 ; CHECK-NEXT:    [[SCOPE:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
 ; CHECK-NEXT:    call void @llvm.invariant.end.p0i32({}* [[SCOPE]], i64 4, i32* [[P]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    call void @clobber()
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   %scope = call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @llvm.invariant.end.p0i32({}* %scope, i64 4, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_false_negative_scope(i32* %p) {
 ; CHECK-LABEL: define {{[^@]+}}@test_false_negative_scope
 ; CHECK-SAME: (i32* [[P:%.*]])
 ; CHECK-NEXT:    [[SCOPE:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    call void @clobber()
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]]
+; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:    call void @llvm.invariant.end.p0i32({}* [[SCOPE]], i64 4, i32* [[P]])
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   %scope = call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   %v2 = load i32, i32* %p
   call void @llvm.invariant.end.p0i32({}* %scope, i64 4, i32* %p)
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 ; Invariant load defact starts an invariant.start scope of the appropriate size
 define i32 @test_invariant_load_scope(i32* %p) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_invariant_load_scope
 ; NO_ASSUME-SAME: (i32* [[P:%.*]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], !invariant.load !0
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4, !invariant.load !0
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_invariant_load_scope
 ; USE_ASSUME-SAME: (i32* [[P:%.*]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], !invariant.load !0
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4, !invariant.load !0
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %v1 = load i32, i32* %p, !invariant.load !{}
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }

llvm/test/Transforms/GVN/PRE/invariant-load.ll

entry:
   %v2 = load i32, i32* %p, !invariant.load !0
   %res = sub i32 %v1, %v2
   ret i32 %res
 }
 
 define i32 @test8(i1 %cnd, i32* %p) {
 ; CHECK-LABEL: test8
 ; CHECK: @bar
-; CHECK: load i32, i32* %p2, !invariant.load
+; CHECK: load i32, i32* %p2, align 4, !invariant.load
 ; CHECK: br label %merge
 entry:
   %v1 = load i32, i32* %p, !invariant.load !0
   br i1 %cnd, label %taken, label %merge
 taken:
   %p2 = call i32* (...) @bar(i32* %p)
   br label %merge
 merge:
   %p3 = phi i32* [%p, %entry], [%p2, %taken]
   %v2 = load i32, i32* %p3, !invariant.load !0
   %res = sub i32 %v1, %v2
   ret i32 %res
 }
 
 !0 = !{ }
 

llvm/test/Transforms/GVN/PRE/load-metadata.ll

 ; RUN: opt -S -gvn < %s | FileCheck %s
 
 define i32 @test1(i32* %p, i1 %C) {
 ; CHECK-LABEL: @test1(
 block1:
   br i1 %C, label %block2, label %block3
 
 block2:
  br label %block4
 ; CHECK: block2:
-; CHECK-NEXT: load i32, i32* %p, !range !0, !invariant.group !1
+; CHECK-NEXT: load i32, i32* %p, align 4, !range !0, !invariant.group !1
 
 block3:
   store i32 0, i32* %p
   br label %block4
 
 block4:
   %PRE = load i32, i32* %p, !range !0, !invariant.group !1
   ret i32 %PRE
 }
 
 
 !0 = !{i32 40, i32 100}
 !1 = !{!"magic ptr"}

llvm/test/Transforms/GVN/PRE/phi-translate.ll

 ; RUN: opt -basicaa -gvn -S < %s | FileCheck %s
 
 target datalayout = "e-p:64:64:64"
 
 ; CHECK-LABEL: @foo(
 ; CHECK: entry.end_crit_edge:
 ; CHECK: %[[INDEX:[a-z0-9.]+]] = sext i32 %x to i64{{.*}} !dbg [[ZERO_LOC:![0-9]+]]
 ; CHECK: %[[ADDRESS:[a-z0-9.]+]] = getelementptr [100 x i32], [100 x i32]* @G, i64 0, i64 %[[INDEX]]{{.*}} !dbg [[ZERO_LOC]]
-; CHECK:   %n.pre = load i32, i32* %[[ADDRESS]], !dbg [[N_LOC:![0-9]+]]
+; CHECK:   %n.pre = load i32, i32* %[[ADDRESS]], align 4, !dbg [[N_LOC:![0-9]+]]
 ; CHECK: br label %end
 ; CHECK: then:
 ; CHECK:   store i32 %z
 ; CHECK: end:
 ; CHECK:   %n = phi i32 [ %n.pre, %entry.end_crit_edge ], [ %z, %then ], !dbg [[N_LOC]]
 ; CHECK:   ret i32 %n
 
 ; CHECK-DAG: [[N_LOC]] = !DILocation(line: 47, column: 1, scope: !{{.*}})

llvm/test/Transforms/GVN/PRE/volatile.ll

 }
 
 ; If an encountered instruction is both volatile and ordered,
 ; we need to use the strictest ordering of either.  In this
 ; case, the ordering prevents forwarding.
 define i32 @test4(i32* noalias nocapture %p, i32* noalias nocapture %q) {
 ; CHECK-LABEL: @test4(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[X:%.*]] = load i32, i32* [[P:%.*]]
+; CHECK-NEXT:    [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
 ; CHECK-NEXT:    [[TMP0:%.*]] = load atomic volatile i32, i32* [[Q:%.*]] seq_cst, align 4
 ; CHECK-NEXT:    [[Y:%.*]] = load atomic i32, i32* [[P]] seq_cst, align 4
 ; CHECK-NEXT:    [[ADD:%.*]] = sub i32 [[Y]], [[X]]
 ; CHECK-NEXT:    ret i32 [[ADD]]
 ;
 entry:
   %x = load i32, i32* %p
   load atomic volatile i32, i32* %q seq_cst, align 4
exit:
   ret i32 %add
 }
 
 ; Another volatile PRE case - two paths through a loop
 ; load in preheader, one path read only, one not
 define i32 @test8(i1 %b, i1 %c, i32* noalias %p, i32* noalias %q) {
 ; CHECK-LABEL: @test8(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[Y1:%.*]] = load i32, i32* [[P:%.*]]
+; CHECK-NEXT:    [[Y1:%.*]] = load i32, i32* [[P:%.*]], align 4
 ; CHECK-NEXT:    call void @use(i32 [[Y1]])
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
 ; CHECK-NEXT:    [[Y:%.*]] = phi i32 [ [[Y_PRE:%.*]], [[SKIP_HEADER_CRIT_EDGE:%.*]] ], [ [[Y]], [[HEADER]] ], [ [[Y1]], [[ENTRY:%.*]] ]
-; CHECK-NEXT:    [[X:%.*]] = load volatile i32, i32* [[Q:%.*]]
+; CHECK-NEXT:    [[X:%.*]] = load volatile i32, i32* [[Q:%.*]], align 4
 ; CHECK-NEXT:    call void @use(i32 [[Y]])
 ; CHECK-NEXT:    br i1 [[B:%.*]], label [[SKIP:%.*]], label [[HEADER]]
 ; CHECK:       skip:
 ; CHECK-NEXT:    call void @clobber(i32* [[P]], i32* [[Q]])
 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[SKIP_HEADER_CRIT_EDGE]], label [[EXIT:%.*]]
 ; CHECK:       skip.header_crit_edge:
 ; CHECK-NEXT:    [[Y_PRE]] = load i32, i32* [[P]]
 ; CHECK-NEXT:    br label [[HEADER]]

llvm/test/Transforms/GVN/invariant.group.ll

 }
 
 ; CHECK-LABEL:define void @loadCombine() {
 define void @loadCombine() {
 enter:
   %ptr = alloca i8
   store i8 42, i8* %ptr
   call void @foo(i8* %ptr)
-; CHECK: %[[A:.*]] = load i8, i8* %ptr, !invariant.group
+; CHECK: %[[A:.*]] = load i8, i8* %ptr, align 1, !invariant.group
   %a = load i8, i8* %ptr, !invariant.group !0
 ; CHECK-NOT: load
   %b = load i8, i8* %ptr, !invariant.group !0
 ; CHECK: call void @bar(i8 %[[A]])
   call void @bar(i8 %a)
 ; CHECK: call void @bar(i8 %[[A]])
   call void @bar(i8 %b)
   ret void
 }
 
 ; CHECK-LABEL: define void @loadCombine1() {
 define void @loadCombine1() {
 enter:
   %ptr = alloca i8
   store i8 42, i8* %ptr
   call void @foo(i8* %ptr)
-; CHECK: %[[D:.*]] = load i8, i8* %ptr, !invariant.group
+; CHECK: %[[D:.*]] = load i8, i8* %ptr, align 1, !invariant.group
   %c = load i8, i8* %ptr
 ; CHECK-NOT: load
   %d = load i8, i8* %ptr, !invariant.group !0
 ; CHECK: call void @bar(i8 %[[D]])
   call void @bar(i8 %c)
 ; CHECK: call void @bar(i8 %[[D]])
   call void @bar(i8 %d)
   ret void
 }
 
 ; CHECK-LABEL: define void @loadCombine2() {    
 define void @loadCombine2() {
 enter:
   %ptr = alloca i8
   store i8 42, i8* %ptr
   call void @foo(i8* %ptr)
-; CHECK: %[[E:.*]] = load i8, i8* %ptr, !invariant.group
+; CHECK: %[[E:.*]] = load i8, i8* %ptr, align 1, !invariant.group
   %e = load i8, i8* %ptr, !invariant.group !0
 ; CHECK-NOT: load
   %f = load i8, i8* %ptr
 ; CHECK: call void @bar(i8 %[[E]])
   call void @bar(i8 %e)
 ; CHECK: call void @bar(i8 %[[E]])
   call void @bar(i8 %f)
   ret void
 }
 
 ; CHECK-LABEL: define void @loadCombine3() {
 define void @loadCombine3() {
 enter:
   %ptr = alloca i8
   store i8 42, i8* %ptr
   call void @foo(i8* %ptr)
-; CHECK: %[[E:.*]] = load i8, i8* %ptr, !invariant.group
+; CHECK: %[[E:.*]] = load i8, i8* %ptr, align 1, !invariant.group
   %e = load i8, i8* %ptr, !invariant.group !0
 ; CHECK-NOT: load
   %f = load i8, i8* %ptr, !invariant.group !0
 ; CHECK: call void @bar(i8 %[[E]])
   call void @bar(i8 %e)
 ; CHECK: call void @bar(i8 %[[E]])
   call void @bar(i8 %f)
   ret void
_Z1gR1A.exit:                                     ; preds = %0, %5
   ret void
 }
 
 ; Check if no optimizations are performed with global pointers.
 ; FIXME: we could do the optimizations if we would check if dependency comes
 ; from the same function.
 ; CHECK-LABEL: define void @testGlobal() {
 define void @testGlobal() {
-; CHECK:  %a = load i8, i8* @unknownPtr, !invariant.group !0
+; CHECK:  %a = load i8, i8* @unknownPtr, align 1, !invariant.group !0
    %a = load i8, i8* @unknownPtr, !invariant.group !0
    call void @foo2(i8* @unknownPtr, i8 %a)
-; CHECK:  %1 = load i8, i8* @unknownPtr, !invariant.group !0
+; CHECK:  %1 = load i8, i8* @unknownPtr, align 1, !invariant.group !0
    %1 = load i8, i8* @unknownPtr, !invariant.group !0
    call void @bar(i8 %1)
 
    %b0 = bitcast i8* @unknownPtr to i1*
    call void @fooBit(i1* %b0, i1 1)
 ; Adding regex because of canonicalization of bitcasts
 ; CHECK: %2 = load i1, i1* {{.*}}, !invariant.group !0
    %2 = load i1, i1* %b0, !invariant.group !0
    call void @fooBit(i1* %b0, i1 %2)
 ; CHECK:  %3 = load i1, i1* {{.*}}, !invariant.group !0
    %3 = load i1, i1* %b0, !invariant.group !0
    call void @fooBit(i1* %b0, i1 %3)
    ret void
 }
 ; And in the case it is not global
 ; CHECK-LABEL: define void @testNotGlobal() {
 define void @testNotGlobal() {
    %a = alloca i8
    call void @foo(i8* %a)
-; CHECK:  %b = load i8, i8* %a, !invariant.group !0
+; CHECK:  %b = load i8, i8* %a, align 1, !invariant.group !0
    %b = load i8, i8* %a, !invariant.group !0
    call void @foo2(i8* %a, i8 %b)
 
    %1 = load i8, i8* %a, !invariant.group !0
 ; CHECK: call void @bar(i8 %b)
    call void @bar(i8 %1)
 
    %b0 = bitcast i8* %a to i1*

 
 declare i8* @llvm.launder.invariant.group.p0i8(i8*)
 declare i8* @llvm.strip.invariant.group.p0i8(i8*)
 
 
 declare void @llvm.assume(i1 %cmp.vtables)
 
 
-!0 = !{}
+!0 = !{}
 

llvm/test/Transforms/GVN/noalias.ll

 ; RUN: opt -scoped-noalias -basicaa -gvn -S < %s | FileCheck %s
 
 define i32 @test1(i32* %p, i32* %q) {
 ; CHECK-LABEL: @test1(i32* %p, i32* %q)
 ; CHECK: load i32, i32* %p
 ; CHECK-NOT: noalias
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !noalias !0
   %b = load i32, i32* %p
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test2(i32* %p, i32* %q) {
 ; CHECK-LABEL: @test2(i32* %p, i32* %q)
-; CHECK: load i32, i32* %p, !alias.scope !0
+; CHECK: load i32, i32* %p, align 4, !alias.scope !0
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !alias.scope !0
   %b = load i32, i32* %p, !alias.scope !0
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 ; FIXME: In this case we can do better than intersecting the scopes, and can
 ; concatenate them instead. Both loads are in the same basic block, the first
 ; makes the second safe to speculatively execute, and there are no calls that may
 ; throw in between.
 define i32 @test3(i32* %p, i32* %q) {
 ; CHECK-LABEL: @test3(i32* %p, i32* %q)
-; CHECK: load i32, i32* %p, !alias.scope !1
+; CHECK: load i32, i32* %p, align 4, !alias.scope !1
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !alias.scope !1
   %b = load i32, i32* %p, !alias.scope !2
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 declare i32 @foo(i32*) readonly
 
 !0 = !{!0}
 !1 = !{!1}
 !2 = !{!0, !1}
 

llvm/test/Transforms/GVN/range.ll

 ; RUN: opt -basicaa -gvn -S < %s | FileCheck %s
 
 define i32 @test1(i32* %p) {
 ; CHECK-LABEL: @test1(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE0:[0-9]+]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE0:[0-9]+]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !0
   %b = load i32, i32* %p, !range !0
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test2(i32* %p) {
 ; CHECK-LABEL: @test2(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE0]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE0]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !0
   %b = load i32, i32* %p
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test3(i32* %p) {
 ; CHECK-LABEL: @test3(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE0]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE0]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !0
   %b = load i32, i32* %p, !range !1
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test4(i32* %p) {
 ; CHECK-LABEL: @test4(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE0]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE0]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !0
   %b = load i32, i32* %p, !range !2
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test5(i32* %p) {
 ; CHECK-LABEL: @test5(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE3:[0-9]+]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE3:[0-9]+]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !3
   %b = load i32, i32* %p, !range !4
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test6(i32* %p) {
 ; CHECK-LABEL: @test6(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE5:[0-9]+]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE5:[0-9]+]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !5
   %b = load i32, i32* %p, !range !6
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test7(i32* %p) {
 ; CHECK-LABEL: @test7(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE7:[0-9]+]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE7:[0-9]+]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !7
   %b = load i32, i32* %p, !range !8
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test8(i32* %p) {
 ; CHECK-LABEL: @test8(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE9:[0-9]+]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE9:[0-9]+]]
 ; CHECK-NOT: range
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !9
   %b = load i32, i32* %p, !range !10
   %c = add i32 %a, %b
   ret i32 %c
 }
 

llvm/test/Transforms/IRCE/pre_post_loops.ll

exit:
   ret void
 }
 
 ; Iterate from SINT_MAX to 0, check that the pre-loop is generated.
 define void @test_02(i32* %arr, i32* %a_len_ptr) {
 
 ; CHECK:      test_02(
 ; CHECK:      entry:
-; CHECK-NEXT:   %len = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:   %len = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECH-NEXT:    br i1 true, label %loop.preloop.preheader
 ; CHECK:      mainloop:
 ; CHECK-NEXT:   br label %loop
 ; CHECK:      loop:
 ; CHECK-NEXT:   %idx = phi i32 [ %idx.preloop.copy, %mainloop ], [ %idx.next, %in.bounds ]
 ; CHECK-NEXT:   %idx.next = add i32 %idx, -1
 ; CHECK-NEXT:   %abc = icmp slt i32 %idx, %len
 ; CHECK-NEXT:   br i1 true, label %in.bounds

llvm/test/Transforms/IRCE/range_intersect_miscompile.ll

 ; Same as test_04, but range guarantees that %n is positive. So we can safely
 ; intersect ranges (with insertion of postloop).
 
 define void @test_05(i32* %p) {
 
 ; CHECK-LABEL: test_05
 ; CHECK-NOT:     preloop
 ; CHECK:         entry:
-; CHECK-NEXT:      %n = load i32, i32* %p, !range !
+; CHECK-NEXT:      %n = load i32, i32* %p, align 4, !range !
 ; CHECK-NEXT:      [[CMP_1:%[^ ]+]] = icmp ugt i32 %n, 2
 ; CHECK-NEXT:      %exit.mainloop.at = select i1 [[CMP_1]], i32 %n, i32 2
 ; CHECK-NEXT:      [[CMP_2:%[^ ]+]] = icmp ult i32 2, %exit.mainloop.at
 ; CHECK-NEXT:      br i1 [[CMP_2]], label %loop_header.preheader, label %main.pseudo.exit
 ; CHECK:         range_check_block:                                ; preds = %inner_loop
 ; CHECK-NEXT:      %range_check = icmp slt i32 %iv, %n
 ; CHECK-NEXT:      br i1 true, label %loop_latch, label %deopt.loopexit2
 ; CHECK:         loop_latch:                                       ; preds = %range_check_block

llvm/test/Transforms/IRCE/ranges_of_different_types.ll

 ; %len = SINT_MAX
 ; %exit.mainloop.at = 101
 
 define void @test_01(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK-LABEL: test_01(
 ; CHECK-NOT:     preloop
 ; CHECK:         entry:
-; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:      [[SUB1:%[^ ]+]] = add nsw i32 %len, -13
 ; CHECK-NEXT:      [[CMP1:%[^ ]+]] = icmp slt i32 [[SUB1]], 101
 ; CHECK-NEXT:      [[SMAX:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 101
 ; CHECK-NEXT:      [[CMP2:%[^ ]+]] = icmp sgt i32 [[SMAX]], 0
 ; CHECK-NEXT:      %exit.mainloop.at = select i1 [[CMP2]], i32 [[SMAX]], i32 0
 ; CHECK-NEXT:      [[GOTO_LOOP:%[^ ]+]] = icmp slt i32 0, %exit.mainloop.at
 ; CHECK-NEXT:      br i1 [[GOTO_LOOP]], label %loop.preheader, label %main.pseudo.exit
 ; CHECK:         loop

 ; %exit.mainloop.at = 101
 ; %len = SINT_MAX
 ; %exit.mainloop.at = 101
 
 define void @test_02(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK-LABEL: test_02(
 ; CHECK:         entry:
-; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:      [[LEN_MINUS_SMAX:%[^ ]+]] = add nuw nsw i32 %len, -2147483647
 ; CHECK-NEXT:      [[CMP1:%[^ ]+]] = icmp sgt i32 [[LEN_MINUS_SMAX]], -13
 ; CHECK-NEXT:      [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[LEN_MINUS_SMAX]], i32 -13
 ; CHECK-NEXT:      [[SUB1:%[^ ]+]] = sub i32 %len, [[SMAX1]]
 ; CHECK-NEXT:      [[CMP2:%[^ ]+]] = icmp slt i32 [[SUB1]], 101
 ; CHECK-NEXT:      %exit.mainloop.at = select i1 [[CMP2]], i32 [[SUB1]], i32 101
 ; CHECK-NEXT:      br i1 true, label %loop.preloop.preheader
 ; CHECK:         loop.preloop:

 ; %len = SINT_MAX
 ; %exit.mainloop.at = 101
 
 define void @test_03(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK-LABEL: test_03(
 ; CHECK-NOT:     preloop
 ; CHECK:         entry:
-; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:      [[CMP1:%[^ ]+]] = icmp slt i32 %len, 13
 ; CHECK-NEXT:      [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 %len, i32 13
 ; CHECK-NEXT:      [[SUB3:%[^ ]+]] = sub i32 %len, [[SMAX1]]
 ; CHECK-NEXT:      [[CMP2:%[^ ]+]] = icmp ult i32 [[SUB3]], 101
 ; CHECK-NEXT:      %exit.mainloop.at = select i1 [[CMP2]], i32 [[SUB3]], i32 101
 ; CHECK-NEXT:      [[CMP3:%[^ ]+]] = icmp ult i32 0, %exit.mainloop.at
 ; CHECK-NEXT:      br i1 [[CMP3]], label %loop.preheader, label %main.pseudo.exit
 ; CHECK:         postloop:

 ; %exit.mainloop.at = 101
 ; %len = SINT_MAX
 ; %exit.mainloop.at = 101
 
 define void @test_04(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK-LABEL: test_04(
 ; CHECK:         entry:
-; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:      [[SUB1:%[^ ]+]] = add nuw i32 %len, 13
 ; CHECK-NEXT:      [[CMP1:%[^ ]+]] = icmp ult i32 [[SUB1]], 101
 ; CHECK-NEXT:      %exit.mainloop.at = select i1 [[CMP1]], i32 [[SUB1]], i32 101
 ; CHECK-NEXT:      br i1 true, label %loop.preloop.preheader
 ; CHECK:         in.bounds.preloop:
 ; CHECK-NEXT:      %addr.preloop = getelementptr i32, i32* %arr, i32 %idx.preloop
 ; CHECK-NEXT:      store i32 0, i32* %addr.preloop
 ; CHECK-NEXT:      %next.preloop = icmp ult i32 %idx.next.preloop, 101

 }
 
 ; Signed latch, signed RC, positive offset. Same as test_01.
 define void @test_05(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK-LABEL: test_05(
 ; CHECK-NOT:     preloop
 ; CHECK:         entry:
-; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:      [[SUB1:%[^ ]+]] = add nsw i32 %len, -13
 ; CHECK-NEXT:      [[CMP1:%[^ ]+]] = icmp slt i32 [[SUB1]], 101
 ; CHECK-NEXT:      [[SMAX:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 101
 ; CHECK-NEXT:      [[CMP2:%[^ ]+]] = icmp sgt i32 [[SMAX]], 0
 ; CHECK-NEXT:      %exit.mainloop.at = select i1 [[CMP2]], i32 [[SMAX]], i32 0
 ; CHECK-NEXT:      [[GOTO_LOOP:%[^ ]+]] = icmp slt i32 0, %exit.mainloop.at
 ; CHECK-NEXT:      br i1 [[GOTO_LOOP]], label %loop.preheader, label %main.pseudo.exit
 ; CHECK:         loop
exit:
   ret void
 }
 
 ; Signed latch, signed RC, negative offset. Same as test_02.
 define void @test_06(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK-LABEL: test_06(
 ; CHECK:         entry:
-; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:      [[LEN_MINUS_SMAX:%[^ ]+]] = add nuw nsw i32 %len, -2147483647
 ; CHECK-NEXT:      [[CMP1:%[^ ]+]] = icmp sgt i32 [[LEN_MINUS_SMAX]], -13
 ; CHECK-NEXT:      [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[LEN_MINUS_SMAX]], i32 -13
 ; CHECK-NEXT:      [[SUB1:%[^ ]+]] = sub i32 %len, [[SMAX1]]
 ; CHECK-NEXT:      [[CMP2:%[^ ]+]] = icmp slt i32 [[SUB1]], 101
 ; CHECK-NEXT:      %exit.mainloop.at = select i1 [[CMP2]], i32 [[SUB1]], i32 101
 ; CHECK-NEXT:      br i1 true, label %loop.preloop.preheader
 ; CHECK:         in.bounds.preloop:

 }
 
 ; Unsigned latch, Unsigned RC, negative offset. Same as test_03.
 define void @test_07(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK-LABEL: test_07(
 ; CHECK-NOT:     preloop
 ; CHECK:         entry:
-; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:      [[CMP1:%[^ ]+]] = icmp slt i32 %len, 13
 ; CHECK-NEXT:      [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 %len, i32 13
 ; CHECK-NEXT:      [[SUB3:%[^ ]+]] = sub i32 %len, [[SMAX1]]
 ; CHECK-NEXT:      [[CMP2:%[^ ]+]] = icmp ult i32 [[SUB3]], 101
 ; CHECK-NEXT:      %exit.mainloop.at = select i1 [[CMP2]], i32 [[SUB3]], i32 101
 ; CHECK-NEXT:      [[CMP3:%[^ ]+]] = icmp ult i32 0, %exit.mainloop.at
 ; CHECK-NEXT:      br i1 [[CMP3]], label %loop.preheader, label %main.pseudo.exit
 ; CHECK:         loop
exit:
   ret void
 }
 
 ; Unsigned latch, Unsigned RC, negative offset. Same as test_04.
 define void @test_08(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK-LABEL: test_08(
 ; CHECK:         entry:
-; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:      %len = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:      [[SUB1:%[^ ]+]] = add nuw i32 %len, 13
 ; CHECK-NEXT:      [[CMP1:%[^ ]+]] = icmp ult i32 [[SUB1]], 101
 ; CHECK-NEXT:      %exit.mainloop.at = select i1 [[CMP1]], i32 [[SUB1]], i32 101
 ; CHECK-NEXT:      br i1 true, label %loop.preloop.preheader
 ; CHECK:         in.bounds.preloop:
 ; CHECK-NEXT:      %addr.preloop = getelementptr i32, i32* %arr, i32 %idx.preloop
 ; CHECK-NEXT:      store i32 0, i32* %addr.preloop
 ; CHECK-NEXT:      %next.preloop = icmp ult i32 %idx.next.preloop, 101

llvm/test/Transforms/IRCE/unsigned_comparisons_ugt.ll

 ; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -S < %s 2>&1 | FileCheck %s
 ; RUN: opt -verify-loop-info -irce-print-changed-loops -passes='require<branch-prob>,irce' -S < %s 2>&1 | FileCheck %s
 
 ; CHECK: irce: in function test_01: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
 ; CHECK: irce: in function test_02: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
 ; CHECK: irce: in function test_03: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
 ; CHECK: irce: in function test_04: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
 ; CHECK-NOT: irce: in function test_05: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
 ; CHECK: irce: in function test_06: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
 
 ; UGT condition for increasing loop.
 define void @test_01(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK: test_01(
 ; CHECK:        entry:
-; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:     [[COND:%[^ ]+]] = icmp ult i32 0, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 [[COND]], label %loop.preheader, label %main.pseudo.exit
 ; CHECK:        loop:
 ; CHECK-NEXT:     %idx = phi i32 [ %idx.next, %in.bounds ], [ 0, %loop.preheader ]
 ; CHECK-NEXT:     %idx.next = add nuw nsw i32 %idx, 1
 ; CHECK-NEXT:     %abc = icmp ult i32 %idx, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 true, label %in.bounds, label %out.of.bounds.loopexit1
 ; CHECK-NOT:    loop.preloop:
exit:
   ret void
 }
 
 ; UGT condition for decreasing loop.
 define void @test_02(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK: test_02(
 ; CHECK:        entry:
-; CHECK-NEXT:     %len = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:     %len = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:     [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1
 ; CHECK-NEXT:     [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1
 ; CHECK-NEXT:     %exit.preloop.at = add nsw i32 [[UMIN]], -1
 ; CHECK-NEXT:     [[COND2:%[^ ]+]] = icmp ugt i32 100, %exit.preloop.at
 ; CHECK-NEXT:     br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit
 ; CHECK:        mainloop:
 ; CHECK-NEXT:     br label %loop
 ; CHECK:        loop:
exit:
   ret void
 }
 
 ; Check SINT_MAX + 1, test is similar to test_01.
 define void @test_03(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK: test_03(
 ; CHECK:        entry:
-; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:     [[COND:%[^ ]+]] = icmp ult i32 0, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 [[COND]], label %loop.preheader, label %main.pseudo.exit
 ; CHECK:        loop:
 ; CHECK-NEXT:     %idx = phi i32 [ %idx.next, %in.bounds ], [ 0, %loop.preheader ]
 ; CHECK-NEXT:     %idx.next = add nuw nsw i32 %idx, 1
 ; CHECK-NEXT:     %abc = icmp ult i32 %idx, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 true, label %in.bounds, label %out.of.bounds.loopexit1
 ; CHECK-NOT:    loop.preloop:
exit:
   ret void
 }
 
 ; Check SINT_MAX + 1, test is similar to test_02.
 define void @test_04(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK: test_04(
 ; CHECK:        entry:
-; CHECK-NEXT:     %len = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:     %len = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:     [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1
 ; CHECK-NEXT:     [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1
 ; CHECK-NEXT:     %exit.preloop.at = add nsw i32 [[UMIN]], -1
 ; CHECK-NEXT:     [[COND2:%[^ ]+]] = icmp ugt i32 -2147483648, %exit.preloop.at
 ; CHECK-NEXT:     br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit
 ; CHECK:        mainloop:
 ; CHECK-NEXT:     br label %loop
 ; CHECK:        loop:

llvm/test/Transforms/IRCE/unsigned_comparisons_ult.ll

 ; CHECK: irce: in function test_08: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
 ; CHECK-NOT: irce: in function test_09: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
 
 ; ULT condition for increasing loop.
 define void @test_01(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK:      test_01
 ; CHECK:        entry:
-; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:     [[COND:%[^ ]+]] = icmp ult i32 0, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 [[COND]], label %loop.preheader, label %main.pseudo.exit
 ; CHECK:        loop:
 ; CHECK-NEXT:     %idx = phi i32 [ %idx.next, %in.bounds ], [ 0, %loop.preheader ]
 ; CHECK-NEXT:     %idx.next = add nuw nsw i32 %idx, 1
 ; CHECK-NEXT:     %abc = icmp ult i32 %idx, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 true, label %in.bounds, label %out.of.bounds.loopexit1
 ; CHECK-NOT:    loop.preloop:
exit:
   ret void
 }
 
 ; ULT condition for decreasing loops.
 define void @test_02(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK: test_02(
 ; CHECK:        entry:
-; CHECK-NEXT:     %len = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:     %len = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:     [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1
 ; CHECK-NEXT:     [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1
 ; CHECK-NEXT:     %exit.preloop.at = add nsw i32 [[UMIN]], -1
 ; CHECK-NEXT:     [[COND2:%[^ ]+]] = icmp ugt i32 100, %exit.preloop.at
 ; CHECK-NEXT:     br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit
 ; CHECK:        mainloop:
 ; CHECK-NEXT:     br label %loop
 ; CHECK:        loop:
exit:
   ret void
 }
 
 ; Check SINT_MAX.
 define void @test_03(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK:      test_03
 ; CHECK:        entry:
-; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:     [[COND:%[^ ]+]] = icmp ult i32 0, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 [[COND]], label %loop.preheader, label %main.pseudo.exit
 ; CHECK:        loop:
 ; CHECK-NEXT:     %idx = phi i32 [ %idx.next, %in.bounds ], [ 0, %loop.preheader ]
 ; CHECK-NEXT:     %idx.next = add nuw nsw i32 %idx, 1
 ; CHECK-NEXT:     %abc = icmp ult i32 %idx, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 true, label %in.bounds, label %out.of.bounds.loopexit1
 ; CHECK-NOT:    loop.preloop:
exit:
   ret void
 }
 
 ; Check SINT_MAX + 1, test is similar to test_01.
 define void @test_04(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK:      test_04
 ; CHECK:        entry:
-; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:     [[COND:%[^ ]+]] = icmp ult i32 0, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 [[COND]], label %loop.preheader, label %main.pseudo.exit
 ; CHECK:        loop:
 ; CHECK-NEXT:     %idx = phi i32 [ %idx.next, %in.bounds ], [ 0, %loop.preheader ]
 ; CHECK-NEXT:     %idx.next = add nuw nsw i32 %idx, 1
 ; CHECK-NEXT:     %abc = icmp ult i32 %idx, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 true, label %in.bounds, label %out.of.bounds.loopexit1
 ; CHECK-NOT:    loop.preloop:

 exit:
   ret void
 }
 
 ; Check SINT_MAX + 1, test is similar to test_02.
 define void @test_05(i32* %arr, i32* %a_len_ptr) #0 {
 ; CHECK: test_05(
 ; CHECK:        entry:
-; CHECK-NEXT:     %len = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:     %len = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:     [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1
 ; CHECK-NEXT:     [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1
 ; CHECK-NEXT:     %exit.preloop.at = add nsw i32 [[UMIN]], -1
 ; CHECK-NEXT:     [[COND2:%[^ ]+]] = icmp ugt i32 -2147483648, %exit.preloop.at
 ; CHECK-NEXT:     br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit
 ; CHECK:        mainloop:
 ; CHECK-NEXT:     br label %loop
 ; CHECK:        loop:
exit:
   ret void
 }
 
 ; Increasing loop, UINT_MAX. Positive test.
 define void @test_06(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK:      test_06
 ; CHECK:        entry:
-; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:     [[COND:%[^ ]+]] = icmp ult i32 0, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 [[COND]], label %loop.preheader, label %main.pseudo.exit
 ; CHECK:        loop:
 ; CHECK-NEXT:     %idx = phi i32 [ %idx.next, %in.bounds ], [ 0, %loop.preheader ]
 ; CHECK-NEXT:     %idx.next = add nuw nsw i32 %idx, 1
 ; CHECK-NEXT:     %abc = icmp ult i32 %idx, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 true, label %in.bounds, label %out.of.bounds.loopexit1
 ; CHECK-NOT:    loop.preloop:

 ; Unsigned walking through signed border is allowed.
 ; Iteration space [0; UINT_MAX - 99), the fact that SINT_MAX is within this
 ; range does not prevent us from performing IRCE.
 
 define void @test_08(i32* %arr, i32* %a_len_ptr) #0 {
 
 ; CHECK:      test_08
 ; CHECK:        entry:
-; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, !range !0
+; CHECK-NEXT:     %exit.mainloop.at = load i32, i32* %a_len_ptr, align 4, !range !0
 ; CHECK-NEXT:     [[COND:%[^ ]+]] = icmp ult i32 0, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 [[COND]], label %loop.preheader, label %main.pseudo.exit
 ; CHECK:        loop:
 ; CHECK-NEXT:     %idx = phi i32 [ %idx.next, %in.bounds ], [ 0, %loop.preheader ]
 ; CHECK-NEXT:     %idx.next = add i32 %idx, 1
 ; CHECK-NEXT:     %abc = icmp ult i32 %idx, %exit.mainloop.at
 ; CHECK-NEXT:     br i1 true, label %in.bounds, label %out.of.bounds.loopexit1
 ; CHECK-NOT:    loop.preloop:

llvm/test/Transforms/InterleavedAccess/ARM/interleaved-accesses.ll

;
   %interleaved.vec = shufflevector <8 x i32> %s0, <8 x i32> %s1, <16 x i32> <i32 0, i32 4, i32 8, i32 undef, i32 undef, i32 5, i32 9, i32 13, i32 2, i32 6, i32 10, i32 14, i32 3, i32 7, i32 11, i32 15>
   store <16 x i32> %interleaved.vec, <16 x i32>* %ptr, align 4
   ret void
 }
 
 define void @load_address_space(<8 x i32> addrspace(1)* %ptr) {
 ; CHECK-NEON-LABEL: @load_address_space(
 ; CHECK-NEON-NEXT:    [[TMP1:%.*]] = bitcast <8 x i32> addrspace(1)* [[PTR:%.*]] to i8 addrspace(1)*
-; CHECK-NEON-NEXT:    [[VLDN:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld3.v2i32.p1i8(i8 addrspace(1)* [[TMP1]], i32 0)
+; CHECK-NEON-NEXT:    [[VLDN:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld3.v2i32.p1i8(i8 addrspace(1)* [[TMP1]], i32 32)
 ; CHECK-NEON-NEXT:    [[TMP2:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLDN]], 2
 ; CHECK-NEON-NEXT:    [[TMP3:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLDN]], 1
 ; CHECK-NEON-NEXT:    [[TMP4:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[VLDN]], 0
 ; CHECK-NEON-NEXT:    ret void
 ;
 ; CHECK-MVE-LABEL: @load_address_space(
-; CHECK-MVE-NEXT:    [[INTERLEAVED_VEC:%.*]] = load <8 x i32>, <8 x i32> addrspace(1)* [[PTR:%.*]]
+; CHECK-MVE-NEXT:    [[INTERLEAVED_VEC:%.*]] = load <8 x i32>, <8 x i32> addrspace(1)* [[PTR:%.*]], align 32
 ; CHECK-MVE-NEXT:    [[V0:%.*]] = shufflevector <8 x i32> [[INTERLEAVED_VEC]], <8 x i32> undef, <2 x i32> <i32 0, i32 3>
 ; CHECK-MVE-NEXT:    [[V1:%.*]] = shufflevector <8 x i32> [[INTERLEAVED_VEC]], <8 x i32> undef, <2 x i32> <i32 1, i32 4>
 ; CHECK-MVE-NEXT:    [[V2:%.*]] = shufflevector <8 x i32> [[INTERLEAVED_VEC]], <8 x i32> undef, <2 x i32> <i32 2, i32 5>
 ; CHECK-MVE-NEXT:    ret void
 ;
 ; CHECK-NONE-LABEL: @load_address_space(
-; CHECK-NONE-NEXT:    [[INTERLEAVED_VEC:%.*]] = load <8 x i32>, <8 x i32> addrspace(1)* [[PTR:%.*]]
+; CHECK-NONE-NEXT:    [[INTERLEAVED_VEC:%.*]] = load <8 x i32>, <8 x i32> addrspace(1)* [[PTR:%.*]], align 32
 ; CHECK-NONE-NEXT:    [[V0:%.*]] = shufflevector <8 x i32> [[INTERLEAVED_VEC]], <8 x i32> undef, <2 x i32> <i32 0, i32 3>
 ; CHECK-NONE-NEXT:    [[V1:%.*]] = shufflevector <8 x i32> [[INTERLEAVED_VEC]], <8 x i32> undef, <2 x i32> <i32 1, i32 4>
 ; CHECK-NONE-NEXT:    [[V2:%.*]] = shufflevector <8 x i32> [[INTERLEAVED_VEC]], <8 x i32> undef, <2 x i32> <i32 2, i32 5>
 ; CHECK-NONE-NEXT:    ret void
 ;
   %interleaved.vec = load <8 x i32>, <8 x i32> addrspace(1)* %ptr
   %v0 = shufflevector <8 x i32> %interleaved.vec, <8 x i32> undef, <2 x i32> <i32 0, i32 3>
   %v1 = shufflevector <8 x i32> %interleaved.vec, <8 x i32> undef, <2 x i32> <i32 1, i32 4>

llvm/test/Transforms/JumpThreading/combine-metadata.ll

 ; CHECK-LABEL: ret1:
 ; CHECK-NEXT: %[[p1:.*]] = load i32*, i32** %ptr
 ; CHECK-NOT: !nonnull
 ; CHECK-NEXT: store i32 1, i32* %[[p1]]
 ; CHECK-NEXT: tail call void @use(i32* null)
 ; CHECK-NEXT: ret void
 
 ; CHECK-LABEL: ret2:
-; CHECK-NEXT: %[[p2:.*]] = load i32*, i32** %ptr, !nonnull !0
+; CHECK-NEXT: %[[p2:.*]] = load i32*, i32** %ptr, align 4, !nonnull !0
 ; CHECK: tail call void @use(i32* %[[p2]])
 ; CHECK-NEXT: ret void
 define void @test1(i32** %ptr, i1 %c) {
   br i1 %c, label %d1, label %d2
 
 d1:
   %p1 = load i32*, i32** %ptr, !nonnull !0
   br label %d3
ret2:
   tail call void @use(i32* %pm) nounwind
   ret void
 }
 
 ; Check that we propagate nonnull to dominated loads, when we find an available
 ; loaded value.
 ; CHECK-LABEL: @test2(
 ; CHECK-LABEL: d3.thread:
-; CHECK-NEXT: %[[p1:.*]] = load i32*, i32** %ptr, !nonnull !0
+; CHECK-NEXT: %[[p1:.*]] = load i32*, i32** %ptr, align 4, !nonnull !0
 ; CHECK-NEXT: store i32 1, i32* %[[p1]]
 ; CHECK-NEXT: br label %ret1
 
 ; CHECK-LABEL: d3:
 ; CHECK-NEXT: %[[p_cmp:.*]] = load i32*, i32** %ptr
-; CHECK-NEXT: %[[p2:.*]] = load i32*, i32** %ptr, !nonnull !0
+; CHECK-NEXT: %[[p2:.*]] = load i32*, i32** %ptr, align 4, !nonnull !0
 ; CHECK-NEXT: store i32 1, i32* %[[p2]]
 ; CHECK-NEXT: icmp eq i32* %[[p_cmp]], null
 define void @test2(i32** %ptr, i1 %c) {
   br i1 %c, label %d1, label %d2
 
 d1:
   %p1 = load i32*, i32** %ptr
   br label %d3

llvm/test/Transforms/JumpThreading/thread-loads.ll

bb3:
   ret i32 %res.0
 }
 
 ; Make sure we merge the aliasing metadata. We keep the range metadata for the
 ; first load, as it dominates the second load. Hence we can eliminate the
 ; branch.
 define void @test8(i32*, i32*, i32*) {
 ; CHECK-LABEL: @test8(
-; CHECK: %a = load i32, i32* %0, !range ![[RANGE4:[0-9]+]]
+; CHECK: %a = load i32, i32* %0, align 4, !range ![[RANGE4:[0-9]+]]
 ; CHECK-NEXT: store i32 %a
 ; CHECK-NEXT: %xxx = tail call i32 (...) @f1()
 ; CHECK-NEXT: ret void
   %a = load i32, i32* %0, !tbaa !0, !range !4, !alias.scope !9, !noalias !10
   %b = load i32, i32* %0, !range !5
   store i32 %a, i32* %1
   %c = icmp eq i32 %b, 8
   br i1 %c, label %ret1, label %ret2

 ; Make sure we merge/PRE aliasing metadata correctly.  That means that
 ; we need to remove metadata from the existing load, and add appropriate
 ; metadata to the newly inserted load.
 define void @test9(i32*, i32*, i32*, i1 %c) {
 ; CHECK-LABEL: @test9(
   br i1 %c, label %d1, label %d2
 
 ; CHECK: d1:
-; CHECK-NEXT: %a = load i32, i32* %0{{$}}
+; CHECK-NEXT: %a = load i32, i32* %0, align 4{{$}}
 d1:
   %a = load i32, i32* %0, !range !4, !alias.scope !9, !noalias !10
   br label %d3
 
 ; CHECK: d2:
 ; CHECK-NEXT: %xxxx = tail call i32 (...) @f1()
-; CHECK-NEXT: %b.pr = load i32, i32* %0, !tbaa !0{{$}}
+; CHECK-NEXT: %b.pr = load i32, i32* %0, align 4, !tbaa !0{{$}}
 d2:
   %xxxx = tail call i32 (...) @f1() nounwind
   br label %d3
 
 d3:
   %p = phi i32 [ 1, %d2 ], [ %a, %d1 ]
   %b = load i32, i32* %0, !tbaa !0
   store i32 %p, i32* %1

llvm/test/Transforms/LICM/guards.ll

 ; Hoist guard. Cannot hoist load because of aliasing.
 define void @test3(i1 %cond, i32* %ptr) {
 ; CHECK-LABEL: @test3(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[COND:%.*]]) [ "deopt"(i32 0) ]
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
 ; CHECK-NEXT:    [[X:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[X_INC:%.*]], [[LOOP]] ]
-; CHECK-NEXT:    [[VAL:%.*]] = load i32, i32* [[PTR:%.*]]
+; CHECK-NEXT:    [[VAL:%.*]] = load i32, i32* [[PTR:%.*]], align 4
 ; CHECK-NEXT:    store i32 0, i32* [[PTR]]
 ; CHECK-NEXT:    [[X_INC]] = add i32 [[X]], [[VAL]]
 ; CHECK-NEXT:    br label [[LOOP]]
 ;
 
 entry:
   br label %loop
 

llvm/test/Transforms/LICM/hoist-deref-load.ll

 
 define void @test11(i32* noalias %a, i32* %b, i32** dereferenceable(8) %cptr, i32 %n) #0 {
 ; CHECK-LABEL: @test11(
 entry:
   %cmp11 = icmp sgt i32 %n, 0
   br i1 %cmp11, label %for.body, label %for.end
 
 ; CHECK: for.body.preheader:
-; CHECK:  %c = load i32*, i32** %cptr, !dereferenceable !0
+; CHECK:  %c = load i32*, i32** %cptr, align 8, !dereferenceable !0
 ; CHECK:  %d = load i32, i32* %c, align 4
 
 
 for.body:                                         ; preds = %entry, %for.inc
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
   %0 = load i32, i32* %arrayidx, align 4
   %cmp1 = icmp sgt i32 %0, 0

llvm/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll

for.body:                                         ; preds = %bb.nph, %for.body
   %indvar.next = add i64 %indvar, 1
   %exitcond = icmp eq i64 %indvar.next, %Size
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
-;; memcpy.atomic formation rejection (atomic store, normal load w/ no align)
+;; memcpy.atomic formation (atomic store, normal load w/ no align)
 define void @test2b(i64 %Size) nounwind ssp {
 ; CHECK-LABEL: @test2b(
-; CHECK-NOT: call void @llvm.memcpy.element.unordered.atomic
-; CHECK: store
+; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %Dest, i8* align 1 %Base, i64 %Size, i32 1)
+; CHECK-NOT: store
 ; CHECK: ret void
 bb.nph:
   %Base = alloca i8, i32 10000
   %Dest = alloca i8, i32 10000
   br label %for.body
 
 for.body:                                         ; preds = %bb.nph, %for.body
   %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ]

llvm/test/Transforms/LoopUnroll/unroll-header-exiting-with-phis.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -S -loop-unroll -unroll-allow-partial | FileCheck %s
 
 ; The phi which acts as input to func should not be undef. It should
 ; have its loop-carried value (the load in for.cond) replaced accordingly
 ; after unrolling the loop.
 
 define i16 @full_unroll(i16* %A) {
 ; CHECK-LABEL: @full_unroll(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[FOR_COND:%.*]]
 ; CHECK:       for.cond:
-; CHECK-NEXT:    [[TMP2:%.*]] = load i16, i16* [[A:%.*]]
+; CHECK-NEXT:    [[TMP2:%.*]] = load i16, i16* [[A:%.*]], align 2
 ; CHECK-NEXT:    br label [[FOR_COND_CLEANUP3:%.*]]
 ; CHECK:       for.cond.cleanup:
 ; CHECK-NEXT:    [[DOTLCSSA10_LCSSA:%.*]] = phi i16 [ [[TMP2_2:%.*]], [[FOR_COND_CLEANUP3_2:%.*]] ]
 ; CHECK-NEXT:    [[TMP3:%.*]] = call i16 @func(i16 [[DOTLCSSA10_LCSSA]])
 ; CHECK-NEXT:    ret i16 0
 ; CHECK:       for.cond.cleanup3:
 ; CHECK-NEXT:    [[PTR_1:%.*]] = getelementptr inbounds i16, i16* [[A]], i64 1
-; CHECK-NEXT:    [[TMP2_1:%.*]] = load i16, i16* [[PTR_1]]
+; CHECK-NEXT:    [[TMP2_1:%.*]] = load i16, i16* [[PTR_1]], align 2
 ; CHECK-NEXT:    br label [[FOR_COND_CLEANUP3_1:%.*]]
 ; CHECK:       for.cond.cleanup3.1:
 ; CHECK-NEXT:    [[PTR_2:%.*]] = getelementptr inbounds i16, i16* [[A]], i64 2
-; CHECK-NEXT:    [[TMP2_2]] = load i16, i16* [[PTR_2]]
+; CHECK-NEXT:    [[TMP2_2]] = load i16, i16* [[PTR_2]], align 2
 ; CHECK-NEXT:    br label [[FOR_COND_CLEANUP3_2]]
 ; CHECK:       for.cond.cleanup3.2:
 ; CHECK-NEXT:    [[PTR_3:%.*]] = getelementptr inbounds i16, i16* [[A]], i64 3
-; CHECK-NEXT:    [[TMP2_3:%.*]] = load i16, i16* [[PTR_3]]
+; CHECK-NEXT:    [[TMP2_3:%.*]] = load i16, i16* [[PTR_3]], align 2
 ; CHECK-NEXT:    br i1 false, label [[FOR_COND_CLEANUP3_3:%.*]], label [[FOR_COND_CLEANUP:%.*]]
 ; CHECK:       for.cond.cleanup3.3:
 ; CHECK-NEXT:    unreachable
 ;
 entry:
   br label %for.cond
 
 for.cond:                                         ; preds = %for.cond.cleanup3, %entry

 
 define i16 @partial_unroll(i16* %A) {
 ; CHECK-LABEL: @partial_unroll(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[FOR_COND:%.*]]
 ; CHECK:       for.cond:
 ; CHECK-NEXT:    [[I_0:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC9_2:%.*]], [[FOR_COND_CLEANUP3_2:%.*]] ]
 ; CHECK-NEXT:    [[PTR:%.*]] = getelementptr inbounds i16, i16* [[A:%.*]], i64 [[I_0]]
-; CHECK-NEXT:    [[TMP2:%.*]] = load i16, i16* [[PTR]]
+; CHECK-NEXT:    [[TMP2:%.*]] = load i16, i16* [[PTR]], align 2
 ; CHECK-NEXT:    br label [[FOR_COND_CLEANUP3:%.*]]
 ; CHECK:       for.cond.cleanup:
 ; CHECK-NEXT:    [[DOTLCSSA10_LCSSA:%.*]] = phi i16 [ [[TMP2_1:%.*]], [[FOR_COND_CLEANUP3_1:%.*]] ]
 ; CHECK-NEXT:    [[TMP3:%.*]] = call i16 @func(i16 [[DOTLCSSA10_LCSSA]])
 ; CHECK-NEXT:    ret i16 0
 ; CHECK:       for.cond.cleanup3:
 ; CHECK-NEXT:    [[INC9:%.*]] = add nuw nsw i64 [[I_0]], 1
 ; CHECK-NEXT:    [[PTR_1:%.*]] = getelementptr inbounds i16, i16* [[A]], i64 [[INC9]]
-; CHECK-NEXT:    [[TMP2_1]] = load i16, i16* [[PTR_1]]
+; CHECK-NEXT:    [[TMP2_1]] = load i16, i16* [[PTR_1]], align 2
 ; CHECK-NEXT:    br label [[FOR_COND_CLEANUP3_1]]
 ; CHECK:       for.cond.cleanup3.1:
 ; CHECK-NEXT:    [[INC9_1:%.*]] = add nuw nsw i64 [[INC9]], 1
 ; CHECK-NEXT:    [[PTR_2:%.*]] = getelementptr inbounds i16, i16* [[A]], i64 [[INC9_1]]
-; CHECK-NEXT:    [[TMP2_2:%.*]] = load i16, i16* [[PTR_2]]
+; CHECK-NEXT:    [[TMP2_2:%.*]] = load i16, i16* [[PTR_2]], align 2
 ; CHECK-NEXT:    [[CMP_2:%.*]] = icmp ult i64 [[INC9_1]], 200
 ; CHECK-NEXT:    br i1 [[CMP_2]], label [[FOR_COND_CLEANUP3_2]], label [[FOR_COND_CLEANUP:%.*]]
 ; CHECK:       for.cond.cleanup3.2:
 ; CHECK-NEXT:    [[INC9_2]] = add nuw nsw i64 [[INC9_1]], 1
 ; CHECK-NEXT:    br label [[FOR_COND]]
 ;
 entry:
   br label %for.cond

llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s  -loop-vectorize -force-vector-width=4 -S | FileCheck %s
 
 ; The function finds the smallest value from a float vector.
 ; Check if vectorization is enabled by instruction flag `fcmp nnan`.
 
 define float @minloop(float* nocapture readonly %arg) {
 ; CHECK-LABEL: @minloop(
 ; CHECK-NEXT:  top:
-; CHECK-NEXT:    [[T:%.*]] = load float, float* [[ARG:%.*]]
+; CHECK-NEXT:    [[T:%.*]] = load float, float* [[ARG:%.*]], align 4
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
 ; CHECK-NEXT:    [[T1:%.*]] = phi i64 [ [[T7:%.*]], [[LOOP]] ], [ 1, [[TOP:%.*]] ]
 ; CHECK-NEXT:    [[T2:%.*]] = phi float [ [[T6:%.*]], [[LOOP]] ], [ [[T]], [[TOP]] ]
 ; CHECK-NEXT:    [[T3:%.*]] = getelementptr float, float* [[ARG]], i64 [[T1]]
 ; CHECK-NEXT:    [[T4:%.*]] = load float, float* [[T3]], align 4
 ; CHECK-NEXT:    [[T5:%.*]] = fcmp nnan olt float [[T2]], [[T4]]
 ; CHECK-NEXT:    [[T6]] = select i1 [[T5]], float [[T2]], float [[T4]]
out:                                              ; preds = %loop
   ret float %t6
 }
 
 ; Check if vectorization is still enabled by function attribute.
 
 define float @minloopattr(float* nocapture readonly %arg) #0 {
 ; CHECK-LABEL: @minloopattr(
 ; CHECK-NEXT:  top:
-; CHECK-NEXT:    [[T:%.*]] = load float, float* [[ARG:%.*]]
+; CHECK-NEXT:    [[T:%.*]] = load float, float* [[ARG:%.*]], align 4
 ; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
 ; CHECK:       vector.ph:
 ; CHECK-NEXT:    [[MINMAX_IDENT_SPLATINSERT:%.*]] = insertelement <4 x float> undef, float [[T]], i32 0
 ; CHECK-NEXT:    [[MINMAX_IDENT_SPLAT:%.*]] = shufflevector <4 x float> [[MINMAX_IDENT_SPLATINSERT]], <4 x float> undef, <4 x i32> zeroinitializer
 ; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
 ; CHECK:       vector.body:
 ; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
 ; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x float> [ [[MINMAX_IDENT_SPLAT]], [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ]
out:                                              ; preds = %loop
   ret float %t6
 }
 
 ; Check if vectorization is prevented without the flag or attribute.
 
 define float @minloopnovec(float* nocapture readonly %arg) {
 ; CHECK-LABEL: @minloopnovec(
 ; CHECK-NEXT:  top:
-; CHECK-NEXT:    [[T:%.*]] = load float, float* [[ARG:%.*]]
+; CHECK-NEXT:    [[T:%.*]] = load float, float* [[ARG:%.*]], align 4
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
 ; CHECK-NEXT:    [[T1:%.*]] = phi i64 [ [[T7:%.*]], [[LOOP]] ], [ 1, [[TOP:%.*]] ]
 ; CHECK-NEXT:    [[T2:%.*]] = phi float [ [[T6:%.*]], [[LOOP]] ], [ [[T]], [[TOP]] ]
 ; CHECK-NEXT:    [[T3:%.*]] = getelementptr float, float* [[ARG]], i64 [[T1]]
 ; CHECK-NEXT:    [[T4:%.*]] = load float, float* [[T3]], align 4
 ; CHECK-NEXT:    [[T5:%.*]] = fcmp olt float [[T2]], [[T4]]
 ; CHECK-NEXT:    [[T6]] = select i1 [[T5]], float [[T2]], float [[T4]]

llvm/test/Transforms/LoopVectorize/multiple-strides-vectorization.ll

 ; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
 ; CHECK:       vector.body:
 ; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
 ; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 0
 ; CHECK-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.s* [[OBJ]], i64 0, i32 0, i64 [[TMP2]]
 ; CHECK-NEXT:    [[TMP4:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i32 0
 ; CHECK-NEXT:    [[TMP5:%.*]] = bitcast i32* [[TMP4]] to <4 x i32>*
 ; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP5]], align 4, !alias.scope !0
-; CHECK-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP1]], !alias.scope !3
-; CHECK-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP1]], !alias.scope !3
-; CHECK-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP1]], !alias.scope !3
-; CHECK-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP1]], !alias.scope !3
+; CHECK-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4, !alias.scope !3
+; CHECK-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP1]], align 4, !alias.scope !3
+; CHECK-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP1]], align 4, !alias.scope !3
+; CHECK-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP1]], align 4, !alias.scope !3
 ; CHECK-NEXT:    [[TMP10:%.*]] = insertelement <4 x i32> undef, i32 [[TMP6]], i32 0
 ; CHECK-NEXT:    [[TMP11:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP7]], i32 1
 ; CHECK-NEXT:    [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP8]], i32 2
 ; CHECK-NEXT:    [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP9]], i32 3
 ; CHECK-NEXT:    [[TMP14:%.*]] = add nsw <4 x i32> [[TMP13]], [[WIDE_LOAD]]
 ; CHECK-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.s* [[OBJ]], i64 0, i32 2, i64 [[I]], i64 [[TMP2]]
 ; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i32, i32* [[TMP15]], i32 0
 ; CHECK-NEXT:    [[TMP17:%.*]] = bitcast i32* [[TMP16]] to <4 x i32>*

 ; CHECK-NEXT:    ret void
 ; CHECK:       .outer:
 ; CHECK-NEXT:    [[I_NEXT]] = add nuw nsw i64 [[I]], 1
 ; CHECK-NEXT:    [[EXITCOND_OUTER:%.*]] = icmp eq i64 [[I_NEXT]], 32
 ; CHECK-NEXT:    br i1 [[EXITCOND_OUTER]], label [[DOTEXIT:%.*]], label [[DOTOUTER_PREHEADER]]
 ; CHECK:       .inner:
 ; CHECK-NEXT:    [[J:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[J_NEXT:%.*]], [[DOTINNER]] ]
 ; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.s* [[OBJ]], i64 0, i32 0, i64 [[J]]
-; CHECK-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]]
-; CHECK-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP1]]
+; CHECK-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
+; CHECK-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP1]], align 4
 ; CHECK-NEXT:    [[TMP24:%.*]] = add nsw i32 [[TMP23]], [[TMP22]]
 ; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.s* [[OBJ]], i64 0, i32 2, i64 [[I]], i64 [[J]]
-; CHECK-NEXT:    [[TMP26:%.*]] = load i32, i32* [[TMP25]]
+; CHECK-NEXT:    [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
 ; CHECK-NEXT:    [[TMP27:%.*]] = add nsw i32 [[TMP24]], [[TMP26]]
 ; CHECK-NEXT:    store i32 [[TMP27]], i32* [[TMP25]]
 ; CHECK-NEXT:    [[J_NEXT]] = add nuw nsw i64 [[J]], 1
 ; CHECK-NEXT:    [[EXITCOND_INNER:%.*]] = icmp eq i64 [[J_NEXT]], [[Z]]
 ; CHECK-NEXT:    br i1 [[EXITCOND_INNER]], label [[DOTOUTER]], label [[DOTINNER]], !llvm.loop !10
 ;
   br label %.outer.preheader
 

llvm/test/Transforms/MemCpyOpt/load-store-to-memcpy.ll

;
   %val = load %T, %T* %a, align 8
   store %T %val, %T* %b, align 16
   ret void
 }
 
 ; memcpy(%d, %a) should not be generated since store2 may-aliases load %a.
 define void @f(%T* %a, %T* %b, %T* %c, %T* %d) {
 ; CHECK-LABEL: @f(
-; CHECK-NEXT:    [[VAL:%.*]] = load %T, %T* %a, !alias.scope !0
-; CHECK-NEXT:    store %T { i8 23, i32 23 }, %T* %b, !alias.scope !3
-; CHECK-NEXT:    store %T { i8 44, i32 44 }, %T* %c, !alias.scope !6, !noalias !3
-; CHECK-NEXT:    store %T [[VAL]], %T* %d, !alias.scope !9, !noalias !12
+; CHECK-NEXT:    [[VAL:%.*]] = load [[T:%.*]], %T* [[A:%.*]], align 4, !alias.scope !0
+; CHECK-NEXT:    store [[T]] { i8 23, i32 23 }, %T* [[B:%.*]], !alias.scope !3
+; CHECK-NEXT:    store [[T]] { i8 44, i32 44 }, %T* [[C:%.*]], !alias.scope !6, !noalias !3
+; CHECK-NEXT:    store [[T]] %val, %T* [[D:%.*]], !alias.scope !9, !noalias !12
 ; CHECK-NEXT:    ret void
 ;
   %val = load %T, %T* %a, !alias.scope !{!10}
 
   ; store1 may-aliases the load
   store %T { i8 23, i32 23 }, %T* %b, !alias.scope !{!11}
 
   ; store2 may-aliases the load and store3

llvm/test/Transforms/MergeFunc/ranges-multiple.ll

; CHECK-NEXT:  ret i1 %out
   %v1 = load i8, i8* %0
   %v2 = load i8, i8* %1
   %out = icmp eq i8 %v1, %v2
   ret i1 %out
 }
 
 define i1 @cmp_different_range(i8*, i8*) {
 ; CHECK-LABEL: @cmp_different_range
-; CHECK-NEXT:  %v1 = load i8, i8* %0, !range !1
-; CHECK-NEXT:  %v2 = load i8, i8* %1, !range !1
+; CHECK-NEXT:  %v1 = load i8, i8* %0, align 1, !range !1
+; CHECK-NEXT:  %v2 = load i8, i8* %1, align 1, !range !1
 ; CHECK-NEXT:  %out = icmp eq i8 %v1, %v2
 ; CHECK-NEXT:  ret i1 %out
   %v1 = load i8, i8* %0, !range !1
   %v2 = load i8, i8* %1, !range !1
   %out = icmp eq i8 %v1, %v2
   ret i1 %out
 }
 

llvm/test/Transforms/MergeFunc/ranges.ll

; CHECK-NEXT:  ret i1 %out
   %v1 = load i8, i8* %0
   %v2 = load i8, i8* %1
   %out = icmp eq i8 %v1, %v2
   ret i1 %out
 }
 
 define i1 @cmp_different_range(i8*, i8*) {
 ; CHECK-LABEL: @cmp_different_range
-; CHECK-NEXT:  %v1 = load i8, i8* %0, !range !1
-; CHECK-NEXT:  %v2 = load i8, i8* %1, !range !1
+; CHECK-NEXT:  %v1 = load i8, i8* %0, align 1, !range !1
+; CHECK-NEXT:  %v2 = load i8, i8* %1, align 1, !range !1
 ; CHECK-NEXT:  %out = icmp eq i8 %v1, %v2
 ; CHECK-NEXT:  ret i1 %out
   %v1 = load i8, i8* %0, !range !1
   %v2 = load i8, i8* %1, !range !1
   %out = icmp eq i8 %v1, %v2
   ret i1 %out
 }
 

llvm/test/Transforms/NewGVN/metadata-nonnull.ll

-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-
 ; RUN: opt %s -newgvn -S | FileCheck %s
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 define i8* @test1(i8** %v0, i8** %v1) {
 ; CHECK-LABEL: @test1(
 ; CHECK-NEXT:  top:
-; CHECK-NEXT:    [[V2:%.*]] = load i8*, i8** [[V0:%[a-z0-9]+]], !nonnull !0
+; CHECK-NEXT:    [[V2:%.*]] = load i8*, i8** [[V0:%[a-z0-9]+]], align 8, !nonnull !0
 ; CHECK-NEXT:    store i8* [[V2]], i8** [[V1:%.*]]
 ; CHECK-NEXT:    ret i8* [[V2]]
 ;
 top:
   %v2 = load i8*, i8** %v0, !nonnull !0
   store i8* %v2, i8** %v1
   %v3 = load i8*, i8** %v1
   ret i8* %v3

 bb2:
   %v3 = load i8*, i8** %v0, !nonnull !0
   ret i8* %v3
 }
 
 define i8* @test5(i8** %v0) {
 ; CHECK-LABEL: @test5(
 ; CHECK-NEXT:  top:
-; CHECK-NEXT:    [[V1:%.*]] = load i8*, i8** [[V0:%[a-z0-9]+]], !nonnull !0
+; CHECK-NEXT:    [[V1:%.*]] = load i8*, i8** [[V0:%[a-z0-9]+]], align 8, !nonnull !0
 ; CHECK-NEXT:    call void @use1(i8* [[V1]])
 ; CHECK-NEXT:    br i1 undef, label [[BB1:%.*]], label [[BB2:%.*]]
 ; CHECK:       bb1:
 ; CHECK-NEXT:    ret i8* [[V1]]
 ; CHECK:       bb2:
 ; CHECK-NEXT:    ret i8* [[V1]]
 ;
 top:
bb2:
   ret i8* %v3
 }
 
 define i8* @test6(i8** %v0, i8** %v1) {
 ; CHECK-LABEL: @test6(
 ; CHECK-NEXT:  top:
 ; CHECK-NEXT:    br i1 undef, label [[BB1:%.*]], label [[BB2:%.*]]
 ; CHECK:       bb1:
-; CHECK-NEXT:    [[V2:%.*]] = load i8*, i8** [[V0:%[a-z0-9]+]], !nonnull !0
+; CHECK-NEXT:    [[V2:%.*]] = load i8*, i8** [[V0:%[a-z0-9]+]], align 8, !nonnull !0
 ; CHECK-NEXT:    store i8* [[V2]], i8** [[V1:%.*]]
 ; CHECK-NEXT:    ret i8* [[V2]]
 ; CHECK:       bb2:
 ; CHECK-NEXT:    [[V4:%.*]] = load i8*, i8** [[V0]]
 ; CHECK-NOT:     !nonnull
 ; CHECK-NEXT:    store i8* [[V4]], i8** [[V1]]
 ; CHECK-NOT:     !nonnull
 ; CHECK-NEXT:    ret i8* [[V4]]
bb2:
   ret i8* %v5
 }
 
 declare void @use2(i8* %a)
 
 define i8* @test7(i8** %v0) {
 ; CHECK-LABEL: @test7(
 ; CHECK-NEXT:  top:
-; CHECK-NEXT:    [[V1:%.*]] = load i8*, i8** [[V0:%[a-z0-9]+]], !nonnull !0
+; CHECK-NEXT:    [[V1:%.*]] = load i8*, i8** [[V0:%[a-z0-9]+]], align 8, !nonnull !0
 ; CHECK-NEXT:    call void @use2(i8* [[V1]])
 ; CHECK-NEXT:    br i1 undef, label [[BB1:%.*]], label [[BB2:%.*]]
 ; CHECK:       bb1:
 ; CHECK-NEXT:    [[V2:%.*]] = load i8*, i8** [[V0]]
 ; CHECK-NOT:     !nonnull
 ; CHECK-NEXT:    ret i8* [[V2]]
 ; CHECK:       bb2:
 ; CHECK-NEXT:    [[V3:%.*]] = load i8*, i8** [[V0]]

llvm/test/Transforms/NewGVN/noalias.ll

 ; RUN: opt -scoped-noalias -basicaa -newgvn -S < %s | FileCheck %s
 
 define i32 @test1(i32* %p, i32* %q) {
 ; CHECK-LABEL: @test1(i32* %p, i32* %q)
 ; CHECK: load i32, i32* %p
 ; CHECK-NOT: noalias
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !noalias !0
   %b = load i32, i32* %p
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test2(i32* %p, i32* %q) {
 ; CHECK-LABEL: @test2(i32* %p, i32* %q)
-; CHECK: load i32, i32* %p, !alias.scope !0
+; CHECK: load i32, i32* %p, align 4, !alias.scope !0
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !alias.scope !0
   %b = load i32, i32* %p, !alias.scope !0
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 ; FIXME: In this case we can do better than intersecting the scopes, and can
 ; concatenate them instead. Both loads are in the same basic block, the first
 ; makes the second safe to speculatively execute, and there are no calls that may
 ; throw in between.
 define i32 @test3(i32* %p, i32* %q) {
 ; CHECK-LABEL: @test3(i32* %p, i32* %q)
-; CHECK: load i32, i32* %p, !alias.scope !1
+; CHECK: load i32, i32* %p, align 4, !alias.scope !1
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !alias.scope !1
   %b = load i32, i32* %p, !alias.scope !2
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 declare i32 @foo(i32*) readonly
 
 !0 = !{!0}
 !1 = !{!1}
 !2 = !{!0, !1}
 

llvm/test/Transforms/NewGVN/pr33204.ll

 ; CHECK-NEXT:  bb:
 ; CHECK-NEXT:    br label [[BB2:%.*]]
 ; CHECK:       bb1:
 ; CHECK-NEXT:    br label [[BB2]]
 ; CHECK:       bb2:
 ; CHECK-NEXT:    [[TMP:%.*]] = phi i32 [ 0, [[BB1:%.*]] ], [ [[ARG:%.*]], [[BB:%.*]] ]
 ; CHECK-NEXT:    br label [[BB6:%.*]]
 ; CHECK:       bb3:
-; CHECK-NEXT:    [[TMP4:%.*]] = load i32, i32* @global, !h !0
+; CHECK-NEXT:    [[TMP4:%.*]] = load i32, i32* @global, align 4, !h !0
 ; CHECK-NEXT:    unreachable
 ; CHECK:       bb6:
 ; CHECK-NEXT:    store i32 [[TMP]], i32* @global.1, !h !0
 ; CHECK-NEXT:    br i1 undef, label [[BB7:%.*]], label [[BB1]]
 ; CHECK:       bb7:
 ; CHECK-NEXT:    br i1 undef, label [[BB10:%.*]], label [[BB8:%.*]]
 ; CHECK:       bb8:
 ; CHECK-NEXT:    br i1 false, label [[BB9:%.*]], label [[BB3:%.*]]

llvm/test/Transforms/NewGVN/pr33367.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -newgvn -S %s | FileCheck %s
 ; Verify that we don't accidentally delete intrinsics that aren't SSA copies
 %DS_struct = type { [32 x i64*], i8, [32 x i16] }
 %MNR_struct = type { i64, i64, %DS_struct* }
 
 declare i64 @llvm.x86.bmi.bextr.64(i64, i64) #3
 
 define %MNR_struct @f000316011717_2(%DS_struct* %pDS, [64 x i64]* %pCG) #2 {
 ; CHECK-LABEL: @f000316011717_2(
 ; CHECK-NEXT:  Entry:
 ; CHECK-NEXT:    [[RESTART:%.*]] = alloca [[MNR_STRUCT:%.*]]
 ; CHECK-NEXT:    [[PCARRY:%.*]] = getelementptr [[DS_STRUCT:%.*]], %DS_struct* [[PDS:%.*]], i32 0, i32 1
 ; CHECK-NEXT:    [[PBRBASE:%.*]] = getelementptr [[DS_STRUCT]], %DS_struct* [[PDS]], i32 0, i32 0
 ; CHECK-NEXT:    [[PBASE:%.*]] = getelementptr [32 x i64*], [32 x i64*]* [[PBRBASE]], i64 0, i64 0
-; CHECK-NEXT:    [[BASE:%.*]] = load i64*, i64** [[PBASE]], !tbaa !14
+; CHECK-NEXT:    [[BASE:%.*]] = load i64*, i64** [[PBASE]], align 8, !tbaa !14
 ; CHECK-NEXT:    [[ABSADDR:%.*]] = getelementptr i64, i64* [[BASE]], i64 9
 ; CHECK-NEXT:    [[EXTARGET:%.*]] = load i64, i64* [[ABSADDR]], align 8, !tbaa !4
 ; CHECK-NEXT:    [[TEMPLATE:%.*]] = icmp eq i64 [[EXTARGET]], 8593987412
 ; CHECK-NEXT:    br i1 [[TEMPLATE]], label %"BB3.000316011731#1", label [[BB2_000316011731_5:%.*]]
 ; CHECK:       "BB3.000316011731#1":
 ; CHECK-NEXT:    [[PBASE8:%.*]] = getelementptr [32 x i64*], [32 x i64*]* [[PBRBASE]], i64 0, i64 29
-; CHECK-NEXT:    [[BASE9:%.*]] = load i64*, i64** [[PBASE8]], !tbaa !14
+; CHECK-NEXT:    [[BASE9:%.*]] = load i64*, i64** [[PBASE8]], align 8, !tbaa !14
 ; CHECK-NEXT:    [[ABSADDR1:%.*]] = getelementptr i64, i64* [[BASE9]], i64 7
 ; CHECK-NEXT:    [[RMEM:%.*]] = load i64, i64* [[ABSADDR1]], align 8, !tbaa !4
 ; CHECK-NEXT:    [[PWT:%.*]] = getelementptr [[DS_STRUCT]], %DS_struct* [[PDS]], i32 0, i32 2
 ; CHECK-NEXT:    [[PWTE:%.*]] = getelementptr [32 x i16], [32 x i16]* [[PWT]], i64 0, i64 8593987412
 ; CHECK-NEXT:    [[SHIFTS:%.*]] = load i16, i16* [[PWTE]], align 2, !tbaa !18, !invariant.load !20
 ; CHECK-NEXT:    [[SLOWJ:%.*]] = icmp eq i16 [[SHIFTS]], 0
 ; CHECK-NEXT:    br i1 [[SLOWJ]], label [[BB2_000316011731_5]], label %"BB3.000316011731#1.1"
 ; CHECK:       BB2.000316011731.5:
 ; CHECK-NEXT:    [[EXTARGET1:%.*]] = and i64 [[EXTARGET]], 137438953471
 ; CHECK-NEXT:    switch i64 [[EXTARGET1]], label [[EXIT:%.*]] [
 ; CHECK-NEXT:    ]
 ; CHECK:       "BB3.000316011731#1.1":
 ; CHECK-NEXT:    [[SHIFTS1:%.*]] = zext i16 [[SHIFTS]] to i64
 ; CHECK-NEXT:    [[VAL:%.*]] = call i64 @llvm.x86.bmi.bextr.64(i64 [[RMEM]], i64 [[SHIFTS1]])
 ; CHECK-NEXT:    [[PREG:%.*]] = getelementptr [64 x i64], [64 x i64]* [[PCG:%.*]], i64 0, i64 12
 ; CHECK-NEXT:    store i64 [[VAL]], i64* [[PREG]], align 32, !tbaa !10
 ; CHECK-NEXT:    [[PREG2:%.*]] = getelementptr [64 x i64], [64 x i64]* [[PCG]], i64 0, i64 14
 ; CHECK-NEXT:    [[REG:%.*]] = load i64, i64* [[PREG2]], align 16, !tbaa !12
-; CHECK-NEXT:    [[BASE2:%.*]] = load i64*, i64** [[PBASE8]], !tbaa !14
+; CHECK-NEXT:    [[BASE2:%.*]] = load i64*, i64** [[PBASE8]], align 8, !tbaa !14
 ; CHECK-NEXT:    [[ABSADDR2:%.*]] = getelementptr i64, i64* [[BASE2]], i64 [[REG]]
 ; CHECK-NEXT:    [[RMEM2:%.*]] = load i64, i64* [[ABSADDR2]], align 8, !tbaa !1
 ; CHECK-NEXT:    [[PREG7:%.*]] = getelementptr [64 x i64], [64 x i64]* [[PCG]], i64 0, i64 9
 ; CHECK-NEXT:    store i64 [[RMEM2]], i64* [[PREG7]], align 8, !tbaa !8
 ; CHECK-NEXT:    [[ADD2C279:%.*]] = add i64 [[RMEM2]], [[VAL]]
 ; CHECK-NEXT:    [[CCHK:%.*]] = icmp sge i64 [[ADD2C279]], 0
 ; CHECK-NEXT:    [[CFL:%.*]] = zext i1 [[CCHK]] to i8
 ; CHECK-NEXT:    store i8 [[CFL]], i8* [[PCARRY]], align 1, !tbaa !16
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       Exit:
-; CHECK-NEXT:    [[RESTART378:%.*]] = load [[MNR_STRUCT]], %MNR_struct* [[RESTART]]
+; CHECK-NEXT:    [[RESTART378:%.*]] = load [[MNR_STRUCT]], %MNR_struct* [[RESTART]], align 8
 ; CHECK-NEXT:    ret [[MNR_STRUCT]] %restart378
 ;
 Entry:
   %restart = alloca %MNR_struct
   %pCarry = getelementptr %DS_struct, %DS_struct* %pDS, i32 0, i32 1
   %pBRBase = getelementptr  %DS_struct, %DS_struct* %pDS, i32 0, i32 0
   %pbase = getelementptr  [32 x i64*], [32 x i64*]* %pBRBase, i64 0, i64 0
   %base = load i64*, i64** %pbase, !tbaa !142

llvm/test/Transforms/NewGVN/range.ll

 ; RUN: opt -basicaa -newgvn -S < %s | FileCheck %s
 
 define i32 @test1(i32* %p) {
 ; CHECK-LABEL: @test1(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE0:[0-9]+]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE0:[0-9]+]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !0
   %b = load i32, i32* %p, !range !0
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test2(i32* %p) {
 ; CHECK-LABEL: @test2(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE0]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE0]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !0
   %b = load i32, i32* %p
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test3(i32* %p) {
 ; CHECK-LABEL: @test3(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE0]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE0]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !0
   %b = load i32, i32* %p, !range !1
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test4(i32* %p) {
 ; CHECK-LABEL: @test4(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE0]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE0]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !0
   %b = load i32, i32* %p, !range !2
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test5(i32* %p) {
 ; CHECK-LABEL: @test5(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE3:[0-9]+]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE3:[0-9]+]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !3
   %b = load i32, i32* %p, !range !4
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test6(i32* %p) {
 ; CHECK-LABEL: @test6(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE5:[0-9]+]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE5:[0-9]+]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !5
   %b = load i32, i32* %p, !range !6
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test7(i32* %p) {
 ; CHECK-LABEL: @test7(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE7:[0-9]+]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE7:[0-9]+]]
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !7
   %b = load i32, i32* %p, !range !8
   %c = add i32 %a, %b
   ret i32 %c
 }
 
 define i32 @test8(i32* %p) {
 ; CHECK-LABEL: @test8(i32* %p)
-; CHECK: %a = load i32, i32* %p, !range ![[RANGE9:[0-9]+]]
+; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE9:[0-9]+]]
 ; CHECK-NOT: range
 ; CHECK: %c = add i32 %a, %a
   %a = load i32, i32* %p, !range !9
   %b = load i32, i32* %p, !range !10
   %c = add i32 %a, %b
   ret i32 %c
 }
 

llvm/test/Transforms/Reassociate/keep-debug-loc.ll

; CHECK-NOT: or i16
   %inlinable_call = call i16 @fn1(), !dbg !7
   %dbgless_instruction = or i16 %inlinable_call, 0
   store i16 %dbgless_instruction, i16* undef, align 1
   unreachable
 }
 
 define void @fn3() !dbg !8 {
 ; CHECK-LABEL: @fn3
-; CHECK: load i16, i16* undef, !dbg ![[LOC2:[0-9]+]]
+; CHECK: load i16, i16* undef, align 2, !dbg ![[LOC2:[0-9]+]]
 ; CHECK-NOT: or i16
   %instruction = load i16, i16* undef, !dbg !9
   %dbgless_instruction = or i16 %instruction, 0
   store i16 %dbgless_instruction, i16* undef, align 1
   unreachable
 }
 
 ; CHECK: ![[LOC1]] = !DILocation(line: 7

llvm/test/Transforms/RewriteStatepointsForGC/deref-pointers.ll

 entry:
   %a = call noalias i8 addrspace(1)* @some_function()
   call void @foo() [ "deopt"(i32 0, i32 -1, i32 0, i32 0, i32 0) ]
   ret i8 addrspace(1)* %a
 }
 
 define i8 @test_md(i8 addrspace(1)* %ptr) gc "statepoint-example" {
 ; CHECK-LABEL: @test_md(
-; CHECK: %tmp = load i8, i8 addrspace(1)* %ptr, !tbaa [[TAG_old:!.*]]
+; CHECK: %tmp = load i8, i8 addrspace(1)* %ptr, align 1, !tbaa [[TAG_old:!.*]]
 entry:
   %tmp = load i8, i8 addrspace(1)* %ptr, !tbaa !0
   call void @foo() [ "deopt"(i32 0, i32 -1, i32 0, i32 0, i32 0) ]
   ret i8 %tmp
 }
 
 ; Same as test_md() above, but with new-format TBAA metadata.
 define i8 @test_md_new(i8 addrspace(1)* %ptr) gc "statepoint-example" {
 ; CHECK-LABEL: @test_md_new(
-; CHECK: %tmp = load i8, i8 addrspace(1)* %ptr, !tbaa [[TAG_new:!.*]]
+; CHECK: %tmp = load i8, i8 addrspace(1)* %ptr, align 1, !tbaa [[TAG_new:!.*]]
 entry:
   %tmp = load i8, i8 addrspace(1)* %ptr, !tbaa !4
   call void @foo() [ "deopt"(i32 0, i32 -1, i32 0, i32 0, i32 0) ]
   ret i8 %tmp
 }
 
 define i8 addrspace(1)* @test_decl_only_attribute(i8 addrspace(1)* %ptr) gc "statepoint-example" {
 ; CHECK-LABEL: @test_decl_only_attribute(

llvm/test/Transforms/SCCP/conditions-ranges.ll

 false:
   ret void
 }
 
 ; Test with 2 unrelated nested conditions.
 define void @f7_nested_conds(i32* %a, i32 %b) {
 ; CHECK-LABEL: @f7_nested_conds(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[A_V:%.*]] = load i32, i32* [[A:%.*]]
+; CHECK-NEXT:    [[A_V:%.*]] = load i32, i32* [[A:%.*]], align 4
 ; CHECK-NEXT:    [[C_1:%.*]] = icmp ne i32 [[A_V]], 0
 ; CHECK-NEXT:    br i1 [[C_1]], label [[TRUE:%.*]], label [[FALSE:%.*]]
 ; CHECK:       false:
 ; CHECK-NEXT:    br i1 true, label [[TRUE_2:%.*]], label [[TRUE]]
 ; CHECK:       true.2:
 ; CHECK-NEXT:    call void @use(i1 true)
 ; CHECK-NEXT:    ret void
 ; CHECK:       true:

llvm/test/Transforms/SLPVectorizer/X86/schedule_budget.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -basicaa -slp-vectorizer -S  -slp-schedule-budget=16 -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s
 
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.9.0"
 
 ; Test if the budget for the scheduling region size works.
 ; We test with a reduced budget of 16 which should prevent vectorizing the loads.
 
 declare void @unknown()
 
 define void @test(float * %a, float * %b, float * %c, float * %d) {
 ; CHECK-LABEL: @test(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[L0:%.*]] = load float, float* [[A:%.*]]
+; CHECK-NEXT:    [[L0:%.*]] = load float, float* [[A:%.*]], align 4
 ; CHECK-NEXT:    [[A1:%.*]] = getelementptr inbounds float, float* [[A]], i64 1
-; CHECK-NEXT:    [[L1:%.*]] = load float, float* [[A1]]
+; CHECK-NEXT:    [[L1:%.*]] = load float, float* [[A1]], align 4
 ; CHECK-NEXT:    [[A2:%.*]] = getelementptr inbounds float, float* [[A]], i64 2
-; CHECK-NEXT:    [[L2:%.*]] = load float, float* [[A2]]
+; CHECK-NEXT:    [[L2:%.*]] = load float, float* [[A2]], align 4
 ; CHECK-NEXT:    [[A3:%.*]] = getelementptr inbounds float, float* [[A]], i64 3
-; CHECK-NEXT:    [[L3:%.*]] = load float, float* [[A3]]
+; CHECK-NEXT:    [[L3:%.*]] = load float, float* [[A3]], align 4
 ; CHECK-NEXT:    call void @unknown()
 ; CHECK-NEXT:    call void @unknown()
 ; CHECK-NEXT:    call void @unknown()
 ; CHECK-NEXT:    call void @unknown()
 ; CHECK-NEXT:    call void @unknown()
 ; CHECK-NEXT:    call void @unknown()
 ; CHECK-NEXT:    call void @unknown()
 ; CHECK-NEXT:    call void @unknown()

llvm/test/Transforms/SROA/basictest.ll

 ; CHECK-LABEL: @test8(
 entry:
   %new = alloca %S2
 ; CHECK-NOT: alloca
 
   %s2.next.ptr = getelementptr %S2, %S2* %s2, i64 0, i32 1
   %s2.next = load %S2*, %S2** %s2.next.ptr, !tbaa !0
 ; CHECK:      %[[gep:.*]] = getelementptr %S2, %S2* %s2, i64 0, i32 1
-; CHECK-NEXT: %[[next:.*]] = load %S2*, %S2** %[[gep]], !tbaa [[TAG_0]]
+; CHECK-NEXT: %[[next:.*]] = load %S2*, %S2** %[[gep]], align 8, !tbaa [[TAG_0]]
 
   %s2.next.s1.ptr = getelementptr %S2, %S2* %s2.next, i64 0, i32 0
   %s2.next.s1 = load %S1*, %S1** %s2.next.s1.ptr, !tbaa !3
   %new.s1.ptr = getelementptr %S2, %S2* %new, i64 0, i32 0
   store %S1* %s2.next.s1, %S1** %new.s1.ptr, !tbaa !5
   %s2.next.next.ptr = getelementptr %S2, %S2* %s2.next, i64 0, i32 1
   %s2.next.next = load %S2*, %S2** %s2.next.next.ptr, !tbaa !7
   %new.next.ptr = getelementptr %S2, %S2* %new, i64 0, i32 1
   store %S2* %s2.next.next, %S2** %new.next.ptr, !tbaa !9
 ; CHECK-NEXT: %[[gep:.*]] = getelementptr %S2, %S2* %[[next]], i64 0, i32 0
-; CHECK-NEXT: %[[next_s1:.*]] = load %S1*, %S1** %[[gep]], !tbaa [[TAG_3]]
+; CHECK-NEXT: %[[next_s1:.*]] = load %S1*, %S1** %[[gep]], align 8, !tbaa [[TAG_3]]
 ; CHECK-NEXT: %[[gep:.*]] = getelementptr %S2, %S2* %[[next]], i64 0, i32 1
-; CHECK-NEXT: %[[next_next:.*]] = load %S2*, %S2** %[[gep]], !tbaa [[TAG_7]]
+; CHECK-NEXT: %[[next_next:.*]] = load %S2*, %S2** %[[gep]], align 8, !tbaa [[TAG_7]]
 
   %new.s1 = load %S1*, %S1** %new.s1.ptr
   %result1 = insertvalue %S2 undef, %S1* %new.s1, 0
 ; CHECK-NEXT: %[[result1:.*]] = insertvalue %S2 undef, %S1* %[[next_s1]], 0
   %new.next = load %S2*, %S2** %new.next.ptr
   %result2 = insertvalue %S2 %result1, %S2* %new.next, 1
 ; CHECK-NEXT: %[[result2:.*]] = insertvalue %S2 %[[result1]], %S2* %[[next_next]], 1
   ret %S2 %result2

llvm/test/Transforms/SeparateConstOffsetFromGEP/test-add-sub-separation.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -S -separate-const-offset-from-gep < %s | FileCheck %s
 
 define void @matchingExtensions(i32* %ap, i32* %bp, i64* %result) {
 ; CHECK-LABEL: @matchingExtensions(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[A:%.*]] = load i32, i32* [[AP:%.*]]
-; CHECK-NEXT:    [[B:%.*]] = load i32, i32* [[BP:%.*]]
+; CHECK-NEXT:    [[A:%.*]] = load i32, i32* [[AP:%.*]], align 4
+; CHECK-NEXT:    [[B:%.*]] = load i32, i32* [[BP:%.*]], align 4
 ; CHECK-NEXT:    [[EB:%.*]] = sext i32 [[B]] to i64
 ; CHECK-NEXT:    [[SUBAB:%.*]] = sub nsw i32 [[A]], [[B]]
 ; CHECK-NEXT:    [[EA:%.*]] = sext i32 [[A]] to i64
 ; CHECK-NEXT:    [[ADDEAEB:%.*]] = add nsw i64 [[EA]], [[EB]]
 ; CHECK-NEXT:    [[EXTSUB:%.*]] = sext i32 [[SUBAB]] to i64
 ; CHECK-NEXT:    [[IDX:%.*]] = getelementptr i32, i32* [[AP]], i64 [[EXTSUB]]
 ; CHECK-NEXT:    store i64 [[ADDEAEB]], i64* [[RESULT:%.*]]
 ; CHECK-NEXT:    store i32 [[SUBAB]], i32* [[IDX]]

llvm/test/Transforms/SimplifyCFG/hoist-with-range.ll

 ; RUN: opt < %s -simplifycfg -S | FileCheck %s
 
 define void @foo(i1 %c, i8* %p) {
 ; CHECK: if:
-; CHECK-NEXT: load i8, i8* %p, !range !0
+; CHECK-NEXT: load i8, i8* %p, align 1, !range !0
 ; CHECK: !0 = !{i8 0, i8 1, i8 3, i8 5}
 if:
   br i1 %c, label %then, label %else
 then:
   %t = load i8, i8* %p, !range !0
   br label %out
 else:
   %e = load i8, i8* %p, !range !1
   br label %out
 out:
   ret void
 }
 
 !0 = !{ i8 0, i8 1 }
 !1 = !{ i8 3, i8 5 }

llvm/test/Transforms/Util/assume-builder.ll

 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP8]], i64 4), "nonnull"(i32* [[TMP8]]), "align"(i32* [[TMP8]], i64 4) ]
 ; BASIC-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
 ; BASIC-NEXT:    [[TMP10:%.*]] = trunc i32 [[TMP9]] to i8
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8** [[TMP6]], i64 8), "nonnull"(i8** [[TMP6]]), "align"(i8** [[TMP6]], i64 8) ]
 ; BASIC-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]], align 8
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[TMP11]], i64 1), "nonnull"(i8* [[TMP11]]) ]
 ; BASIC-NEXT:    store i8 [[TMP10]], i8* [[TMP11]], align 1
 ; BASIC-NEXT:    [[TMP12:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
-; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "nonnull"(%struct.S** [[TMP4]]) ]
-; BASIC-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]]
+; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "nonnull"(%struct.S** [[TMP4]]), "align"(%struct.S** [[TMP4]], i64 8) ]
+; BASIC-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; BASIC-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
 ; BASIC-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "nonnull"(%struct.S** [[TMP4]]), "align"(%struct.S** [[TMP4]], i64 8) ]
 ; BASIC-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; BASIC-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP16]], i32 0, i32 0
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP17]], i64 4), "nonnull"(i32* [[TMP17]]), "align"(i32* [[TMP17]], i64 8) ]
 ; BASIC-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 8
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "nonnull"(%struct.S** [[TMP4]]), "align"(%struct.S** [[TMP4]], i64 8) ]

 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP8]], i64 4), "nonnull"(i32* [[TMP8]]), "align"(i32* [[TMP8]], i64 4) ]
 ; ALL-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
 ; ALL-NEXT:    [[TMP10:%.*]] = trunc i32 [[TMP9]] to i8
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8** [[TMP6]], i64 8), "nonnull"(i8** [[TMP6]]), "align"(i8** [[TMP6]], i64 8) ]
 ; ALL-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]], align 8
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[TMP11]], i64 1), "nonnull"(i8* [[TMP11]]) ]
 ; ALL-NEXT:    store i8 [[TMP10]], i8* [[TMP11]], align 1
 ; ALL-NEXT:    [[TMP12:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
-; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "nonnull"(%struct.S** [[TMP4]]) ]
-; ALL-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]]
+; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "nonnull"(%struct.S** [[TMP4]]), "align"(%struct.S** [[TMP4]], i64 8) ]
+; ALL-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; ALL-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
 ; ALL-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "nonnull"(%struct.S** [[TMP4]]), "align"(%struct.S** [[TMP4]], i64 8) ]
 ; ALL-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; ALL-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP16]], i32 0, i32 0
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP17]], i64 4), "nonnull"(i32* [[TMP17]]), "align"(i32* [[TMP17]], i64 8) ]
 ; ALL-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 8
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "nonnull"(%struct.S** [[TMP4]]), "align"(%struct.S** [[TMP4]], i64 8) ]

 ; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP8]], i64 4), "nonnull"(i32* [[TMP8]]), "align"(i32* [[TMP8]], i64 4) ]
 ; WITH-AC-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
 ; WITH-AC-NEXT:    [[TMP10:%.*]] = trunc i32 [[TMP9]] to i8
 ; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "align"(i8** [[TMP6]], i64 8) ]
 ; WITH-AC-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]], align 8
 ; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[TMP11]], i64 1), "nonnull"(i8* [[TMP11]]) ]
 ; WITH-AC-NEXT:    store i8 [[TMP10]], i8* [[TMP11]], align 1
 ; WITH-AC-NEXT:    [[TMP12:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
-; WITH-AC-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]]
+; WITH-AC-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; WITH-AC-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
 ; WITH-AC-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; WITH-AC-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; WITH-AC-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP16]], i32 0, i32 0
 ; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP17]], i64 4), "nonnull"(i32* [[TMP17]]), "align"(i32* [[TMP17]], i64 8) ]
 ; WITH-AC-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 8
 ; WITH-AC-NEXT:    [[TMP19:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; WITH-AC-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP19]], i32 0, i32 1

 ; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP8]], i64 4), "nonnull"(i32* [[TMP8]]), "align"(i32* [[TMP8]], i64 4) ]
 ; CROSS-BLOCK-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
 ; CROSS-BLOCK-NEXT:    [[TMP10:%.*]] = trunc i32 [[TMP9]] to i8
 ; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "align"(i8** [[TMP6]], i64 8) ]
 ; CROSS-BLOCK-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]], align 8
 ; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[TMP11]], i64 1), "nonnull"(i8* [[TMP11]]) ]
 ; CROSS-BLOCK-NEXT:    store i8 [[TMP10]], i8* [[TMP11]], align 1
 ; CROSS-BLOCK-NEXT:    [[TMP12:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
-; CROSS-BLOCK-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]]
+; CROSS-BLOCK-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; CROSS-BLOCK-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
 ; CROSS-BLOCK-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; CROSS-BLOCK-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; CROSS-BLOCK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP16]], i32 0, i32 0
 ; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP17]], i64 4), "nonnull"(i32* [[TMP17]]), "align"(i32* [[TMP17]], i64 8) ]
 ; CROSS-BLOCK-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 8
 ; CROSS-BLOCK-NEXT:    [[TMP19:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; CROSS-BLOCK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP19]], i32 0, i32 1

 ; FULL-SIMPLIFY-NEXT:    store i32* [[TMP1]], i32** [[TMP5]], align 8
 ; FULL-SIMPLIFY-NEXT:    store i8* [[TMP2]], i8** [[TMP6]]
 ; FULL-SIMPLIFY-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[TMP5]], align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
 ; FULL-SIMPLIFY-NEXT:    [[TMP10:%.*]] = trunc i32 [[TMP9]] to i8
 ; FULL-SIMPLIFY-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]], align 8
 ; FULL-SIMPLIFY-NEXT:    store i8 [[TMP10]], i8* [[TMP11]], align 1
 ; FULL-SIMPLIFY-NEXT:    [[TMP12:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
-; FULL-SIMPLIFY-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]]
+; FULL-SIMPLIFY-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
 ; FULL-SIMPLIFY-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; FULL-SIMPLIFY-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP16]], i32 0, i32 0
 ; FULL-SIMPLIFY-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP19:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP19]], i32 0, i32 1
 ; FULL-SIMPLIFY-NEXT:    [[TMP21:%.*]] = load i8, i8* [[TMP20]], align 4

 ; BASIC-NEXT:    store i32* [[TMP1]], i32** [[TMP5]], align 8
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8** [[TMP6]], i64 8), "align"(i8** [[TMP6]], i64 8) ]
 ; BASIC-NEXT:    store i8* [[TMP2]], i8** [[TMP6]], align 8
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32** [[TMP5]], i64 8), "align"(i32** [[TMP5]], i64 8) ]
 ; BASIC-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[TMP5]], align 8
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP8]], i64 4), "align"(i32* [[TMP8]], i64 4) ]
 ; BASIC-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
 ; BASIC-NEXT:    [[TMP10:%.*]] = trunc i32 [[TMP9]] to i8
-; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8** [[TMP6]], i64 8) ]
-; BASIC-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]]
+; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8** [[TMP6]], i64 8), "align"(i8** [[TMP6]], i64 8) ]
+; BASIC-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]], align 8
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[TMP11]], i64 1) ]
 ; BASIC-NEXT:    store i8 [[TMP10]], i8* [[TMP11]], align 1
 ; BASIC-NEXT:    [[TMP12:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "align"(%struct.S** [[TMP4]], i64 32) ]
 ; BASIC-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 32
 ; BASIC-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
 ; BASIC-NEXT:    call void @may_throw()
 ; BASIC-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "align"(%struct.S** [[TMP4]], i64 8) ]
 ; BASIC-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; BASIC-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP16]], i32 0, i32 0
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP17]], i64 4), "align"(i32* [[TMP17]], i64 8) ]
 ; BASIC-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 8
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "align"(%struct.S** [[TMP4]], i64 8) ]
 ; BASIC-NEXT:    [[TMP19:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; BASIC-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP19]], i32 0, i32 1
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[TMP20]], i64 1), "align"(i8* [[TMP20]], i64 4) ]
 ; BASIC-NEXT:    [[TMP21:%.*]] = load i8, i8* [[TMP20]], align 4
 ; BASIC-NEXT:    [[TMP22:%.*]] = sext i8 [[TMP21]] to i32
 ; BASIC-NEXT:    [[TMP23:%.*]] = add nsw i32 [[TMP18]], [[TMP22]]
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "align"(%struct.S** [[TMP4]], i64 8) ]
 ; BASIC-NEXT:    [[TMP24:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; BASIC-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP24]], i32 0, i32 2
-; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32** [[TMP25]], i64 8) ]
-; BASIC-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[TMP25]]
+; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32** [[TMP25]], i64 8), "align"(i32** [[TMP25]], i64 8) ]
+; BASIC-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[TMP25]], align 8
 ; BASIC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP26]], i64 4), "align"(i32* [[TMP26]], i64 4) ]
 ; BASIC-NEXT:    [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
 ; BASIC-NEXT:    [[TMP28:%.*]] = add nsw i32 [[TMP23]], [[TMP27]]
 ; BASIC-NEXT:    ret i32 [[TMP28]]
 ;
 ; ALL-LABEL: define {{[^@]+}}@test3
 ; ALL-SAME: (%struct.S* [[TMP0:%.*]], i32* [[TMP1:%.*]], i8* [[TMP2:%.*]]) #4
 ; ALL-NEXT:    [[TMP4:%.*]] = alloca %struct.S*, align 8
 ; ALL-NEXT:    [[TMP5:%.*]] = alloca i32*, align 8
 ; ALL-NEXT:    [[TMP6:%.*]] = alloca i8*, align 8
 ; ALL-NEXT:    [[TMP7:%.*]] = alloca [[STRUCT_S:%.*]], align 8
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "align"(%struct.S** [[TMP4]], i64 8) ]
 ; ALL-NEXT:    store %struct.S* [[TMP0]], %struct.S** [[TMP4]], align 8
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32** [[TMP5]], i64 8), "align"(i32** [[TMP5]], i64 8) ]
 ; ALL-NEXT:    store i32* [[TMP1]], i32** [[TMP5]], align 8
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8** [[TMP6]], i64 8), "align"(i8** [[TMP6]], i64 8) ]
 ; ALL-NEXT:    store i8* [[TMP2]], i8** [[TMP6]], align 8
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32** [[TMP5]], i64 8), "align"(i32** [[TMP5]], i64 8) ]
 ; ALL-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[TMP5]], align 8
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP8]], i64 4), "align"(i32* [[TMP8]], i64 4) ]
 ; ALL-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
 ; ALL-NEXT:    [[TMP10:%.*]] = trunc i32 [[TMP9]] to i8
-; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8** [[TMP6]], i64 8) ]
-; ALL-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]]
+; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8** [[TMP6]], i64 8), "align"(i8** [[TMP6]], i64 8) ]
+; ALL-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]], align 8
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[TMP11]], i64 1) ]
 ; ALL-NEXT:    store i8 [[TMP10]], i8* [[TMP11]], align 1
 ; ALL-NEXT:    [[TMP12:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "align"(%struct.S** [[TMP4]], i64 32) ]
 ; ALL-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 32
 ; ALL-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
 ; ALL-NEXT:    call void @may_throw()
 ; ALL-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "align"(%struct.S** [[TMP4]], i64 8) ]
 ; ALL-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; ALL-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP16]], i32 0, i32 0
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP17]], i64 4), "align"(i32* [[TMP17]], i64 8) ]
 ; ALL-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 8
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "align"(%struct.S** [[TMP4]], i64 8) ]
 ; ALL-NEXT:    [[TMP19:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; ALL-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP19]], i32 0, i32 1
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[TMP20]], i64 1), "align"(i8* [[TMP20]], i64 4) ]
 ; ALL-NEXT:    [[TMP21:%.*]] = load i8, i8* [[TMP20]], align 4
 ; ALL-NEXT:    [[TMP22:%.*]] = sext i8 [[TMP21]] to i32
 ; ALL-NEXT:    [[TMP23:%.*]] = add nsw i32 [[TMP18]], [[TMP22]]
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "align"(%struct.S** [[TMP4]], i64 8) ]
 ; ALL-NEXT:    [[TMP24:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; ALL-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP24]], i32 0, i32 2
-; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32** [[TMP25]], i64 8) ]
-; ALL-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[TMP25]]
+; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32** [[TMP25]], i64 8), "align"(i32** [[TMP25]], i64 8) ]
+; ALL-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[TMP25]], align 8
 ; ALL-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP26]], i64 4), "align"(i32* [[TMP26]], i64 4) ]
 ; ALL-NEXT:    [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
 ; ALL-NEXT:    [[TMP28:%.*]] = add nsw i32 [[TMP23]], [[TMP27]]
 ; ALL-NEXT:    ret i32 [[TMP28]]
 ;
 ; WITH-AC-LABEL: define {{[^@]+}}@test3
 ; WITH-AC-SAME: (%struct.S* [[TMP0:%.*]], i32* [[TMP1:%.*]], i8* [[TMP2:%.*]]) #4
 ; WITH-AC-NEXT:    [[TMP4:%.*]] = alloca %struct.S*, align 8
 ; WITH-AC-NEXT:    [[TMP5:%.*]] = alloca i32*, align 8
 ; WITH-AC-NEXT:    [[TMP6:%.*]] = alloca i8*, align 8
 ; WITH-AC-NEXT:    [[TMP7:%.*]] = alloca [[STRUCT_S:%.*]], align 8
 ; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "align"(%struct.S** [[TMP4]], i64 32) ]
 ; WITH-AC-NEXT:    store %struct.S* [[TMP0]], %struct.S** [[TMP4]], align 8
 ; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32** [[TMP5]], i64 8), "align"(i32** [[TMP5]], i64 8) ]
 ; WITH-AC-NEXT:    store i32* [[TMP1]], i32** [[TMP5]], align 8
 ; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8** [[TMP6]], i64 8), "align"(i8** [[TMP6]], i64 8) ]
 ; WITH-AC-NEXT:    store i8* [[TMP2]], i8** [[TMP6]], align 8
 ; WITH-AC-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[TMP5]], align 8
 ; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP8]], i64 4), "align"(i32* [[TMP8]], i64 4) ]
 ; WITH-AC-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
 ; WITH-AC-NEXT:    [[TMP10:%.*]] = trunc i32 [[TMP9]] to i8
-; WITH-AC-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]]
+; WITH-AC-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]], align 8
 ; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[TMP11]], i64 1) ]
 ; WITH-AC-NEXT:    store i8 [[TMP10]], i8* [[TMP11]], align 1
 ; WITH-AC-NEXT:    [[TMP12:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; WITH-AC-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 32
 ; WITH-AC-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
 ; WITH-AC-NEXT:    call void @may_throw()
 ; WITH-AC-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; WITH-AC-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; WITH-AC-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP16]], i32 0, i32 0
 ; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP17]], i64 4), "align"(i32* [[TMP17]], i64 8) ]
 ; WITH-AC-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 8
 ; WITH-AC-NEXT:    [[TMP19:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; WITH-AC-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP19]], i32 0, i32 1
 ; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[TMP20]], i64 1), "align"(i8* [[TMP20]], i64 4) ]
 ; WITH-AC-NEXT:    [[TMP21:%.*]] = load i8, i8* [[TMP20]], align 4
 ; WITH-AC-NEXT:    [[TMP22:%.*]] = sext i8 [[TMP21]] to i32
 ; WITH-AC-NEXT:    [[TMP23:%.*]] = add nsw i32 [[TMP18]], [[TMP22]]
 ; WITH-AC-NEXT:    [[TMP24:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; WITH-AC-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP24]], i32 0, i32 2
-; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32** [[TMP25]], i64 8) ]
-; WITH-AC-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[TMP25]]
+; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32** [[TMP25]], i64 8), "align"(i32** [[TMP25]], i64 8) ]
+; WITH-AC-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[TMP25]], align 8
 ; WITH-AC-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP26]], i64 4), "align"(i32* [[TMP26]], i64 4) ]
 ; WITH-AC-NEXT:    [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
 ; WITH-AC-NEXT:    [[TMP28:%.*]] = add nsw i32 [[TMP23]], [[TMP27]]
 ; WITH-AC-NEXT:    ret i32 [[TMP28]]
 ;
 ; CROSS-BLOCK-LABEL: define {{[^@]+}}@test3
 ; CROSS-BLOCK-SAME: (%struct.S* [[TMP0:%.*]], i32* [[TMP1:%.*]], i8* [[TMP2:%.*]]) #4
 ; CROSS-BLOCK-NEXT:    [[TMP4:%.*]] = alloca %struct.S*, align 8
 ; CROSS-BLOCK-NEXT:    [[TMP5:%.*]] = alloca i32*, align 8
 ; CROSS-BLOCK-NEXT:    [[TMP6:%.*]] = alloca i8*, align 8
 ; CROSS-BLOCK-NEXT:    [[TMP7:%.*]] = alloca [[STRUCT_S:%.*]], align 8
 ; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "align"(%struct.S** [[TMP4]], i64 32) ]
 ; CROSS-BLOCK-NEXT:    store %struct.S* [[TMP0]], %struct.S** [[TMP4]], align 8
 ; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32** [[TMP5]], i64 8), "align"(i32** [[TMP5]], i64 8) ]
 ; CROSS-BLOCK-NEXT:    store i32* [[TMP1]], i32** [[TMP5]], align 8
 ; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8** [[TMP6]], i64 8), "align"(i8** [[TMP6]], i64 8) ]
 ; CROSS-BLOCK-NEXT:    store i8* [[TMP2]], i8** [[TMP6]], align 8
 ; CROSS-BLOCK-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[TMP5]], align 8
 ; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP8]], i64 4), "align"(i32* [[TMP8]], i64 4) ]
 ; CROSS-BLOCK-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
 ; CROSS-BLOCK-NEXT:    [[TMP10:%.*]] = trunc i32 [[TMP9]] to i8
-; CROSS-BLOCK-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]]
+; CROSS-BLOCK-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]], align 8
 ; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[TMP11]], i64 1) ]
 ; CROSS-BLOCK-NEXT:    store i8 [[TMP10]], i8* [[TMP11]], align 1
 ; CROSS-BLOCK-NEXT:    [[TMP12:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; CROSS-BLOCK-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 32
 ; CROSS-BLOCK-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
 ; CROSS-BLOCK-NEXT:    call void @may_throw()
 ; CROSS-BLOCK-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; CROSS-BLOCK-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; CROSS-BLOCK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP16]], i32 0, i32 0
 ; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP17]], i64 4), "align"(i32* [[TMP17]], i64 8) ]
 ; CROSS-BLOCK-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 8
 ; CROSS-BLOCK-NEXT:    [[TMP19:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; CROSS-BLOCK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP19]], i32 0, i32 1
 ; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[TMP20]], i64 1), "align"(i8* [[TMP20]], i64 4) ]
 ; CROSS-BLOCK-NEXT:    [[TMP21:%.*]] = load i8, i8* [[TMP20]], align 4
 ; CROSS-BLOCK-NEXT:    [[TMP22:%.*]] = sext i8 [[TMP21]] to i32
 ; CROSS-BLOCK-NEXT:    [[TMP23:%.*]] = add nsw i32 [[TMP18]], [[TMP22]]
 ; CROSS-BLOCK-NEXT:    [[TMP24:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; CROSS-BLOCK-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP24]], i32 0, i32 2
-; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32** [[TMP25]], i64 8) ]
-; CROSS-BLOCK-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[TMP25]]
+; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32** [[TMP25]], i64 8), "align"(i32** [[TMP25]], i64 8) ]
+; CROSS-BLOCK-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[TMP25]], align 8
 ; CROSS-BLOCK-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP26]], i64 4), "align"(i32* [[TMP26]], i64 4) ]
 ; CROSS-BLOCK-NEXT:    [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
 ; CROSS-BLOCK-NEXT:    [[TMP28:%.*]] = add nsw i32 [[TMP23]], [[TMP27]]
 ; CROSS-BLOCK-NEXT:    ret i32 [[TMP28]]
 ;
 ; FULL-SIMPLIFY-LABEL: define {{[^@]+}}@test3
 ; FULL-SIMPLIFY-SAME: (%struct.S* [[TMP0:%.*]], i32* [[TMP1:%.*]], i8* [[TMP2:%.*]]) #4
 ; FULL-SIMPLIFY-NEXT:    [[TMP4:%.*]] = alloca %struct.S*, align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP5:%.*]] = alloca i32*, align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP6:%.*]] = alloca i8*, align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP7:%.*]] = alloca [[STRUCT_S:%.*]], align 8
 ; FULL-SIMPLIFY-NEXT:    store %struct.S* [[TMP0]], %struct.S** [[TMP4]], align 8
 ; FULL-SIMPLIFY-NEXT:    store i32* [[TMP1]], i32** [[TMP5]], align 8
 ; FULL-SIMPLIFY-NEXT:    store i8* [[TMP2]], i8** [[TMP6]], align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[TMP5]], align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
 ; FULL-SIMPLIFY-NEXT:    [[TMP10:%.*]] = trunc i32 [[TMP9]] to i8
-; FULL-SIMPLIFY-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]]
+; FULL-SIMPLIFY-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP6]], align 8
 ; FULL-SIMPLIFY-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(%struct.S** [[TMP4]], i64 8), "align"(%struct.S** [[TMP4]], i64 32), "dereferenceable"(i32** [[TMP5]], i64 8), "align"(i32** [[TMP5]], i64 8), "dereferenceable"(i8** [[TMP6]], i64 8), "align"(i8** [[TMP6]], i64 8), "dereferenceable"(i32* [[TMP8]], i64 4), "align"(i32* [[TMP8]], i64 4), "dereferenceable"(i8* [[TMP11]], i64 1) ]
 ; FULL-SIMPLIFY-NEXT:    store i8 [[TMP10]], i8* [[TMP11]], align 1
 ; FULL-SIMPLIFY-NEXT:    [[TMP12:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; FULL-SIMPLIFY-NEXT:    [[TMP13:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 32
 ; FULL-SIMPLIFY-NEXT:    [[TMP14:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
 ; FULL-SIMPLIFY-NEXT:    call void @may_throw()
 ; FULL-SIMPLIFY-NEXT:    [[TMP15:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
 ; FULL-SIMPLIFY-NEXT:    [[TMP16:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP16]], i32 0, i32 0
 ; FULL-SIMPLIFY-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP19:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP19]], i32 0, i32 1
 ; FULL-SIMPLIFY-NEXT:    [[TMP21:%.*]] = load i8, i8* [[TMP20]], align 4
 ; FULL-SIMPLIFY-NEXT:    [[TMP22:%.*]] = sext i8 [[TMP21]] to i32
 ; FULL-SIMPLIFY-NEXT:    [[TMP23:%.*]] = add nsw i32 [[TMP18]], [[TMP22]]
 ; FULL-SIMPLIFY-NEXT:    [[TMP24:%.*]] = load %struct.S*, %struct.S** [[TMP4]], align 8
 ; FULL-SIMPLIFY-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP24]], i32 0, i32 2
-; FULL-SIMPLIFY-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[TMP25]]
-; FULL-SIMPLIFY-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP17]], i64 4), "align"(i32* [[TMP17]], i64 8), "dereferenceable"(i8* [[TMP20]], i64 1), "align"(i8* [[TMP20]], i64 4), "dereferenceable"(i32** [[TMP25]], i64 8), "dereferenceable"(i32* [[TMP26]], i64 4), "align"(i32* [[TMP26]], i64 4) ]
+; FULL-SIMPLIFY-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[TMP25]], align 8
+; FULL-SIMPLIFY-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[TMP17]], i64 4), "align"(i32* [[TMP17]], i64 8), "dereferenceable"(i8* [[TMP20]], i64 1), "align"(i8* [[TMP20]], i64 4), "dereferenceable"(i32** [[TMP25]], i64 8), "align"(i32** [[TMP25]], i64 8), "dereferenceable"(i32* [[TMP26]], i64 4), "align"(i32* [[TMP26]], i64 4) ]
 ; FULL-SIMPLIFY-NEXT:    [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
 ; FULL-SIMPLIFY-NEXT:    [[TMP28:%.*]] = add nsw i32 [[TMP23]], [[TMP27]]
 ; FULL-SIMPLIFY-NEXT:    ret i32 [[TMP28]]
 ;
   %4 = alloca %struct.S*, align 8
   %5 = alloca i32*, align 8
   %6 = alloca i8*, align 8
   %7 = alloca %struct.S, align 8

llvm/test/Verifier/unsized-types-alloca.ll

+; RUN: not opt -verify < %s 2>&1 | FileCheck %s
+
+%X = type opaque
+
+define void @f_2() {
+  %t = alloca %X
+  ret void
+; CHECK: Cannot allocate unsized type
+; CHECK-NEXT:  %t = alloca %X
+}

llvm/test/Verifier/unsized-types-load.ll

+; RUN: not opt -verify < %s 2>&1 | FileCheck %s
+
+%X = type opaque
+
+define void @f_0(%X* %ptr) {
+  %t = load %X, %X* %ptr
+  ret void
+; CHECK: loading unsized types is not allowed
+; CHECK-NEXT:  %t = load %X, %X* %ptr
+}

llvm/test/Verifier/unsized-types-store.ll

+; RUN: not opt -verify < %s 2>&1 | FileCheck %s
+
+%X = type opaque
+
+define void @f_1(%X %val, %X* %ptr) {
+  store %X %val, %X* %ptr
+  ret void
+; CHECK: storing unsized types is not allowed
+; CHECK-NEXT:  store %X %val, %X* %ptr
+}

llvm/test/Verifier/unsized-types.ll

-; RUN: not opt -verify < %s 2>&1 | FileCheck %s
-
-%X = type opaque
-
-define void @f_0(%X* %ptr) {
-  %t = load %X, %X* %ptr
-  ret void
-; CHECK: loading unsized types is not allowed
-; CHECK-NEXT:  %t = load %X, %X* %ptr
-}
-
-define void @f_1(%X %val, %X* %ptr) {
-  store %X %val, %X* %ptr
-  ret void
-; CHECK: storing unsized types is not allowed
-; CHECK-NEXT:  store %X %val, %X* %ptr
-}
-
-define void @f_2() {
-  %t = alloca %X
-  ret void
-; CHECK: Cannot allocate unsized type
-; CHECK-NEXT:  %t = alloca %X
-}

llvm/tools/llc/llc.cpp

static int compileModule(char **argv, LLVMContext &Context) {
   auto setMIRFunctionAttributes = [&CPUStr, &FeaturesStr](Function &F) {
     codegen::setFunctionAttributes(CPUStr, FeaturesStr, F);
   };
 
   auto MAttrs = codegen::getMAttrs();
   bool SkipModule = codegen::getMCPU() == "help" ||
                     (!MAttrs.empty() && MAttrs.front() == "help");
 
+  CodeGenOpt::Level OLvl = CodeGenOpt::Default;
+  switch (OptLevel) {
+  default:
+    WithColor::error(errs(), argv[0]) << "invalid optimization level.\n";
+    return 1;
+  case ' ': break;
+  case '0': OLvl = CodeGenOpt::None; break;
+  case '1': OLvl = CodeGenOpt::Less; break;
+  case '2': OLvl = CodeGenOpt::Default; break;
+  case '3': OLvl = CodeGenOpt::Aggressive; break;
+  }
+
+  TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  Options.DisableIntegratedAS = NoIntegratedAssembler;
+  Options.MCOptions.ShowMCEncoding = ShowMCEncoding;
+  Options.MCOptions.MCUseDwarfDirectory = EnableDwarfDirectory;
+  Options.MCOptions.AsmVerbose = AsmVerbose;
+  Options.MCOptions.PreserveAsmComments = PreserveComments;
+  Options.MCOptions.IASSearchPaths = IncludeDirs;
+  Options.MCOptions.SplitDwarfFile = SplitDwarfFile;
+
+  Optional<Reloc::Model> RM = codegen::getExplicitRelocModel();
+
+  const Target *TheTarget = nullptr;
+  std::unique_ptr<TargetMachine> Target;
+
   // If user just wants to list available options, skip module loading
   if (!SkipModule) {
+    auto SetDataLayout =
+        [&](StringRef DataLayoutTargetTriple) -> Optional<std::string> {
+      // If we are supposed to override the target triple, do so now.
+      std::string IRTargetTriple = DataLayoutTargetTriple.str();
+      if (!TargetTriple.empty())
+        IRTargetTriple = Triple::normalize(TargetTriple);
+      TheTriple = Triple(IRTargetTriple);
+      if (TheTriple.getTriple().empty())
+        TheTriple.setTriple(sys::getDefaultTargetTriple());
+
+      std::string Error;
+      TheTarget =
+          TargetRegistry::lookupTarget(codegen::getMArch(), TheTriple, Error);
+      if (!TheTarget) {
+        WithColor::error(errs(), argv[0]) << Error;
+        exit(1);
+      }
+
+      // On AIX, setting the relocation model to anything other than PIC is
+      // considered a user error.
+      if (TheTriple.isOSAIX() && RM.hasValue() && *RM != Reloc::PIC_) {
+        WithColor::error(errs(), argv[0])
+            << "invalid relocation model, AIX only supports PIC.\n";
+        exit(1);
+      }
+
+      Target = std::unique_ptr<TargetMachine>(TheTarget->createTargetMachine(
+          TheTriple.getTriple(), CPUStr, FeaturesStr, Options, RM,
+          codegen::getExplicitCodeModel(), OLvl));
+      assert(Target && "Could not allocate target machine!");
+
+      return Target->createDataLayout().getStringRepresentation();
+    };
     if (InputLanguage == "mir" ||
         (InputLanguage == "" && StringRef(InputFilename).endswith(".mir"))) {
       MIR = createMIRParserFromFile(InputFilename, Err, Context,
                                     setMIRFunctionAttributes);
       if (MIR)
-        M = MIR->parseIRModule();
-    } else
-      M = parseIRFile(InputFilename, Err, Context, false);
+        M = MIR->parseIRModule(SetDataLayout);
+    } else {
+      M = parseIRFile(InputFilename, Err, Context, SetDataLayout);
+    }
     if (!M) {
       Err.print(argv[0], WithColor::error(errs(), argv[0]));
       return 1;
     }
-
-    // If we are supposed to override the target triple, do so now.
     if (!TargetTriple.empty())
       M->setTargetTriple(Triple::normalize(TargetTriple));
-    TheTriple = Triple(M->getTargetTriple());
   } else {
     TheTriple = Triple(Triple::normalize(TargetTriple));
-  }
-
     if (TheTriple.getTriple().empty())
       TheTriple.setTriple(sys::getDefaultTargetTriple());
 
     // Get the target specific parser.
     std::string Error;
-  const Target *TheTarget =
+    TheTarget =
         TargetRegistry::lookupTarget(codegen::getMArch(), TheTriple, Error);
     if (!TheTarget) {
       WithColor::error(errs(), argv[0]) << Error;
       return 1;
     }
 
-  CodeGenOpt::Level OLvl = CodeGenOpt::Default;
-  switch (OptLevel) {
-  default:
-    WithColor::error(errs(), argv[0]) << "invalid optimization level.\n";
-    return 1;
-  case ' ': break;
-  case '0': OLvl = CodeGenOpt::None; break;
-  case '1': OLvl = CodeGenOpt::Less; break;
-  case '2': OLvl = CodeGenOpt::Default; break;
-  case '3': OLvl = CodeGenOpt::Aggressive; break;
-  }
-
-  TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
-  Options.DisableIntegratedAS = NoIntegratedAssembler;
-  Options.MCOptions.ShowMCEncoding = ShowMCEncoding;
-  Options.MCOptions.MCUseDwarfDirectory = EnableDwarfDirectory;
-  Options.MCOptions.AsmVerbose = AsmVerbose;
-  Options.MCOptions.PreserveAsmComments = PreserveComments;
-  Options.MCOptions.IASSearchPaths = IncludeDirs;
-  Options.MCOptions.SplitDwarfFile = SplitDwarfFile;
-
-  // On AIX, setting the relocation model to anything other than PIC is considered
-  // a user error.
-  Optional<Reloc::Model> RM = codegen::getExplicitRelocModel();
+    // On AIX, setting the relocation model to anything other than PIC is
+    // considered a user error.
     if (TheTriple.isOSAIX() && RM.hasValue() && *RM != Reloc::PIC_) {
       WithColor::error(errs(), argv[0])
           << "invalid relocation model, AIX only supports PIC.\n";
       return 1;
     }
 
-  std::unique_ptr<TargetMachine> Target(TheTarget->createTargetMachine(
+    Target = std::unique_ptr<TargetMachine>(TheTarget->createTargetMachine(
         TheTriple.getTriple(), CPUStr, FeaturesStr, Options, RM,
         codegen::getExplicitCodeModel(), OLvl));
-
     assert(Target && "Could not allocate target machine!");
 
     // If we don't have a module then just exit now. We do this down
     // here since the CPU/Feature help is underneath the target machine
     // creation.
-  if (SkipModule)
     return 0;
+  }
 
   assert(M && "Should have exited if we didn't have a module!");
   if (codegen::getFloatABIForCalls() != FloatABI::Default)
     Options.FloatABIType = codegen::getFloatABIForCalls();
 
   // Figure out where we are going to send the output.
   std::unique_ptr<ToolOutputFile> Out =
       GetOutputStream(TheTarget->getName(), TheTriple.getOS(), argv[0]);
static int compileModule(char **argv, LLVMContext &Context) {
   // Add an appropriate TargetLibraryInfo pass for the module's triple.
   TargetLibraryInfoImpl TLII(Triple(M->getTargetTriple()));
 
   // The -disable-simplify-libcalls flag actually disables all builtin optzns.
   if (DisableSimplifyLibCalls)
     TLII.disableAllFunctions();
   PM.add(new TargetLibraryInfoWrapperPass(TLII));
 
-  // Add the target data from the target machine, if it exists, or the module.
-  M->setDataLayout(Target->createDataLayout());
-
-  // This needs to be done after setting datalayout since it calls verifier
-  // to check debug info whereas verifier relies on correct datalayout.
-  UpgradeDebugInfo(*M);
-
   // Verify module immediately to catch problems before doInitialization() is
   // called on any passes.
   if (!NoVerify && verifyModule(*M, &errs())) {
     std::string Prefix =
         (Twine(argv[0]) + Twine(": ") + Twine(InputFilename)).str();
     WithColor::error(errs(), Prefix) << "input module is broken!\n";
     return 1;
   }

llvm/tools/llvm-as/llvm-as.cpp

 int main(int argc, char **argv) {
   InitLLVM X(argc, argv);
   LLVMContext Context;
   cl::HideUnrelatedOptions(AsCat);
   cl::ParseCommandLineOptions(argc, argv, "llvm .ll -> .bc assembler\n");
 
   // Parse the file now...
   SMDiagnostic Err;
-  auto ModuleAndIndex = parseAssemblyFileWithIndex(
-      InputFilename, Err, Context, nullptr, !DisableVerify, ClDataLayout);
+  auto SetDataLayout = [](StringRef) -> Optional<std::string> {
+    if (ClDataLayout.empty())
+      return None;
+    return ClDataLayout;
+  };
+  ParsedModuleAndIndex ModuleAndIndex;
+  if (DisableVerify) {
+    ModuleAndIndex = parseAssemblyFileWithIndexNoUpgradeDebugInfo(
+        InputFilename, Err, Context, nullptr, SetDataLayout);
+  } else {
+    ModuleAndIndex = parseAssemblyFileWithIndex(InputFilename, Err, Context,
+                                                nullptr, SetDataLayout);
+  }
   std::unique_ptr<Module> M = std::move(ModuleAndIndex.Mod);
   if (!M.get()) {
     Err.print(argv[0], errs());
     return 1;
   }
   std::unique_ptr<ModuleSummaryIndex> Index = std::move(ModuleAndIndex.Index);
 
   if (!DisableVerify) {

llvm/tools/opt/opt.cpp

 #include "PassPrinters.h"
 #include "llvm/ADT/Triple.h"
 #include "llvm/Analysis/CallGraph.h"
 #include "llvm/Analysis/CallGraphSCCPass.h"
 #include "llvm/Analysis/LoopPass.h"
 #include "llvm/Analysis/RegionPass.h"
 #include "llvm/Analysis/TargetLibraryInfo.h"
 #include "llvm/Analysis/TargetTransformInfo.h"
+#include "llvm/AsmParser/Parser.h"
 #include "llvm/Bitcode/BitcodeWriterPass.h"
 #include "llvm/CodeGen/CommandFlags.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
 #include "llvm/Config/llvm-config.h"
 #include "llvm/IR/DataLayout.h"
 #include "llvm/IR/DebugInfo.h"
 #include "llvm/IR/IRPrintingPasses.h"
 #include "llvm/IR/LLVMContext.h"

 static cl::opt<std::string> ThinLinkBitcodeFile(
     "thin-link-bitcode-file", cl::value_desc("filename"),
     cl::desc(
         "A file in which to write minimized bitcode for the thin link only"));
 
 static cl::opt<bool>
 NoVerify("disable-verify", cl::desc("Do not run the verifier"), cl::Hidden);
 
-static cl::opt<bool>
-VerifyEach("verify-each", cl::desc("Verify after each transform"));
+static cl::opt<bool> NoUpgradeDebugInfo("disable-upgrade-debug-info",
+                                        cl::desc("Generate invalid output"),
+                                        cl::ReallyHidden);
+
+static cl::opt<bool> VerifyEach("verify-each",
+                                cl::desc("Verify after each transform"));
 
 static cl::opt<bool>
     DisableDITypeMap("disable-debug-info-type-map",
                      cl::desc("Don't use a uniquing type map for debug info"));
 
 static cl::opt<bool>
 StripDebug("strip-debug",
            cl::desc("Strip debugger symbol info from translation unit"));
Expected<std::unique_ptr<ToolOutputFile>> RemarksFileOrErr =
                                    RemarksHotnessThreshold);
   if (Error E = RemarksFileOrErr.takeError()) {
     errs() << toString(std::move(E)) << '\n';
     return 1;
   }
   std::unique_ptr<ToolOutputFile> RemarksFile = std::move(*RemarksFileOrErr);
 
   // Load the input module...
-  std::unique_ptr<Module> M =
-      parseIRFile(InputFilename, Err, Context, !NoVerify, ClDataLayout);
+  auto SetDataLayout = [](StringRef) -> Optional<std::string> {
+    if (ClDataLayout.empty())
+      return None;
+    return ClDataLayout;
+  };
+  std::unique_ptr<Module> M;
+  if (NoUpgradeDebugInfo)
+    M = parseAssemblyFileWithIndexNoUpgradeDebugInfo(
+            InputFilename, Err, Context, nullptr, SetDataLayout)
+            .Mod;
+  else
+    M = parseIRFile(InputFilename, Err, Context, SetDataLayout);
 
   if (!M) {
     Err.print(argv[0], errs());
     return 1;
   }
 
   // Strip debug info before running the verifier.
   if (StripDebug)

mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp

 OwningModuleRef translateLLVMIRToModule(llvm::SourceMgr &sourceMgr,
                                         MLIRContext *context) {
   LLVMDialect *dialect = context->getRegisteredDialect<LLVMDialect>();
   assert(dialect && "Could not find LLVMDialect?");
 
   llvm::SMDiagnostic err;
   std::unique_ptr<llvm::Module> llvmModule =
       llvm::parseIR(*sourceMgr.getMemoryBuffer(sourceMgr.getMainFileID()), err,
-                    dialect->getLLVMContext(),
-                    /*UpgradeDebugInfo=*/true,
-                    /*DataLayoutString=*/"");
+                    dialect->getLLVMContext());
   if (!llvmModule) {
     std::string errStr;
     llvm::raw_string_ostream errStream(errStr);
     err.print(/*ProgName=*/"", errStream);
     emitError(UnknownLoc::get(context)) << errStream.str();
     return {};
   }
   return translateLLVMIRToModule(std::move(llvmModule), context);

polly/test/ForwardOpTree/forward_hoisted.ll

 ; CHECK:     Statements with forwarded operand trees: 1
 ; CHECK: }
 
 ; CHECK:      After statements {
 ; CHECK-NEXT:     Stmt_bodyA
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0] -> MemRef_val2[] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val1 = load double, double* %B
+; CHECK-NEXT:                   %val1 = load double, double* %B, align 8
 ; CHECK-NEXT:                   %val2 = fadd double %val1, 2.100000e+01
 ; CHECK-NEXT:                 }
 ; CHECK-NEXT:     Stmt_bodyB
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyB[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:             Instructions {
 ; CHECK-NEXT:                   %val2 = fadd double %val1, 2.100000e+01
 ; CHECK-NEXT:                   store double %val2, double* %A
 ; CHECK-NEXT:                 }
 ; CHECK-NEXT: }

polly/test/ForwardOpTree/forward_into_region_redundant_use.ll

 ; CHECK-NEXT:     Stmt_next
 ; CHECK-NEXT:             ReadAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [p] -> { Stmt_next[] -> MemRef_A[0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [p] -> { Stmt_next[] -> MemRef_fcmp[] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [p] -> { Stmt_next[] -> MemRef_val[] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val = load float, float* %A
+; CHECK-NEXT:                   %val = load float, float* %A, align 4
 ; CHECK-NEXT:                   %fcmp = fcmp oeq float %val, 4.100000e+01
 ; CHECK-NEXT:             }
 ; CHECK-NEXT:     Stmt_nonaffine__TO__end
 ; CHECK-NEXT:             ReadAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 ;
 ; CHECK-NEXT:            new: [p] -> { Stmt_nonaffine__TO__end[] -> MemRef_A[0] };
 ; CHECK-NEXT:             MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [p] -> { Stmt_nonaffine__TO__end[] -> MemRef_A[0] };
 ; CHECK-NEXT:             MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [p] -> { Stmt_nonaffine__TO__end[] -> MemRef_A[0] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val = load float, float* %A
-; CHECK-NEXT:                   %val = load float, float* %A
+; CHECK-NEXT:                   %val = load float, float* %A, align 4
+; CHECK-NEXT:                   %val = load float, float* %A, align 4
 ; CHECK-NEXT:                   %fcmp = fcmp oeq float %val, 4.100000e+01
 ; CHECK-NEXT:             }
 ; CHECK-NEXT: }

polly/test/ForwardOpTree/forward_load.ll

 
 ; CHECK:      Stmt_bodyB
 ; CHECK-NEXT:         ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             ;
 ; CHECK-NEXT:        new: [n] -> { Stmt_bodyB[i0] -> MemRef_B[i0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyB[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:         Instructions {
-; CHECK-NEXT:               %val = load double, double* %B_idx
+; CHECK-NEXT:               %val = load double, double* %B_idx, align 8
 ; CHECK-NEXT:               store double %val, double* %A_idx
 ; CHECK-NEXT:         }

polly/test/ForwardOpTree/forward_load_differentarray.ll

 
 ; CHECK-NEXT: After statements {
 ; CHECK-NEXT:     Stmt_bodyA
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0] -> MemRef_B[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0] -> MemRef_val[] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val = load double, double* %B_idx
+; CHECK-NEXT:                   %val = load double, double* %B_idx, align 8
 ; CHECK-NEXT:             }
 ; CHECK-NEXT:     Stmt_bodyB
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 ;
 ; CHECK-NEXT:            new: [n] -> { Stmt_bodyB[i0] -> MemRef_B[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyB[i0] -> MemRef_B[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyB[i0] -> MemRef_C[i0] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val = load double, double* %B_idx
+; CHECK-NEXT:                   %val = load double, double* %B_idx, align 8
 ; CHECK-NEXT:                   store double 0.000000e+00, double* %B_idx
 ; CHECK-NEXT:                   store double %val, double* %C_idx
 ; CHECK-NEXT:             }
 ; CHECK-NEXT:     Stmt_bodyC
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 ;
 ; CHECK-NEXT:            new: [n] -> { Stmt_bodyC[i0] -> MemRef_C[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyC[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val = load double, double* %B_idx
+; CHECK-NEXT:                   %val = load double, double* %B_idx, align 8
 ; CHECK-NEXT:                   store double %val, double* %A_idx
 ; CHECK-NEXT:             }
 ; CHECK-NEXT: }

polly/test/ForwardOpTree/forward_load_double_write.ll

 ; CHECK-NEXT:         ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             ;
 ; CHECK-NEXT:        new: [n] -> { Stmt_bodyB[i0] -> MemRef_B[i0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyB[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyB[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:         Instructions {
-; CHECK-NEXT:               %val = load double, double* %B_idx
+; CHECK-NEXT:               %val = load double, double* %B_idx, align 8
 ; CHECK-NEXT:               store double %val, double* %A_idx
 ; CHECK-NEXT:               store double %val, double* %A_idx
 ; CHECK-NEXT:         }

polly/test/ForwardOpTree/forward_load_fromloop.ll

 
 ; CHECK:      After statements {
 ; CHECK-NEXT:     Stmt_bodyA
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0, i1] -> MemRef_B[i1] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0, i1] -> MemRef_val[] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val = load double, double* %B_idx
+; CHECK-NEXT:                   %val = load double, double* %B_idx, align 8
 ; CHECK-NEXT:                   %i.cmp = icmp slt i32 %i, %n
 ; CHECK-NEXT:             }
 ; CHECK-NEXT:     Stmt_bodyB
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 ;
 ; CHECK-NEXT:            new: [n] -> { Stmt_bodyB[i0] -> MemRef_B[n] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyB[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val = load double, double* %B_idx
+; CHECK-NEXT:                   %val = load double, double* %B_idx, align 8
 ; CHECK-NEXT:                   store double %val, double* %A_idx
 ; CHECK-NEXT:             }
 ; CHECK-NEXT: }

polly/test/ForwardOpTree/forward_load_indirect.ll

 
 ; CHECK:      After statements {
 ; CHECK-NEXT:     Stmt_bodyA
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0] -> MemRef_B[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0] -> MemRef_add[] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val = load double, double* %B_idx
+; CHECK-NEXT:                   %val = load double, double* %B_idx, align 8
 ; CHECK-NEXT:                   %add = fadd double %val, 4.200000e+01
 ; CHECK-NEXT:             }
 ; CHECK-NEXT:     Stmt_bodyB
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 ;
 ; CHECK-NEXT:            new: [n] -> { Stmt_bodyB[i0] -> MemRef_B[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyB[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val = load double, double* %B_idx
+; CHECK-NEXT:                   %val = load double, double* %B_idx, align 8
 ; CHECK-NEXT:                   %add = fadd double %val, 4.200000e+01
 ; CHECK-NEXT:                   store double %add, double* %A_idx
 ; CHECK-NEXT:             }
 ; CHECK-NEXT: }

polly/test/ForwardOpTree/forward_load_memset_before.ll

 
 ; CHECK-NEXT: After statements {
 ; CHECK:          Stmt_bodyB
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyB[i0] -> MemRef_B[o0] : 8i0 <= o0 <= 7 + 8i0 };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyB[i0] -> MemRef_val[] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val = load double, double* %B_idx
+; CHECK-NEXT:                   %val = load double, double* %B_idx, align 8
 ; CHECK-NEXT:             }
 ; CHECK-NEXT:     Stmt_bodyC
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 ;
 ; CHECK-NEXT:            new: [n] -> { Stmt_bodyC[i0] -> MemRef_B[8i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyC[i0] -> MemRef_A[o0] : 8i0 <= o0 <= 7 + 8i0 };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val = load double, double* %B_idx
+; CHECK-NEXT:                   %val = load double, double* %B_idx, align 8
 ; CHECK-NEXT:                   store double %val, double* %A_idx
 ; CHECK-NEXT:             }
 ; CHECK-NEXT: }

polly/test/ForwardOpTree/forward_load_tripleuse.ll

 ; CHECK-NEXT:     Stmt_bodyA
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0] -> MemRef_val1[] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0] -> MemRef_val2[] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val1 = load double, double* %A_idx
+; CHECK-NEXT:                   %val1 = load double, double* %A_idx, align 8
 ; CHECK-NEXT:                   %val2 = fadd double %val1, %val1
 ; CHECK-NEXT:             }
 ; CHECK-NEXT:     Stmt_bodyB
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 ;
 ; CHECK-NEXT:            new: [n] -> { Stmt_bodyB[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyB[i0] -> MemRef_B[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyB[i0] -> MemRef_C[i0] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val1 = load double, double* %A_idx
-; CHECK-NEXT:                   %val1 = load double, double* %A_idx
+; CHECK-NEXT:                   %val1 = load double, double* %A_idx, align 8
+; CHECK-NEXT:                   %val1 = load double, double* %A_idx, align 8
 ; CHECK-NEXT:                   %val2 = fadd double %val1, %val1
-; CHECK-NEXT:                   %val1 = load double, double* %A_idx
+; CHECK-NEXT:                   %val1 = load double, double* %A_idx, align 8
 ; CHECK-NEXT:                   store double %val1, double* %B_idx
 ; CHECK-NEXT:                   store double %val2, double* %C_idx
 ; CHECK-NEXT:             }
 ; CHECK-NEXT: }
 
 
 define void @func2(i32 %n, double* noalias nonnull %A, double* noalias nonnull %B, double* noalias nonnull %C) {
 entry:

 ; CHECK-NEXT:     Stmt_bodyA
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0] -> MemRef_val2[] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0] -> MemRef_val1[] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val1 = load double, double* %A_idx
+; CHECK-NEXT:                   %val1 = load double, double* %A_idx, align 8
 ; CHECK-NEXT:                   %val2 = fadd double %val1, %val1
 ; CHECK-NEXT:             }
 ; CHECK-NEXT:     Stmt_bodyB
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 ;
 ; CHECK-NEXT:            new: [n] -> { Stmt_bodyB[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyB[i0] -> MemRef_B[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyB[i0] -> MemRef_C[i0] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val1 = load double, double* %A_idx
-; CHECK-NEXT:                   %val1 = load double, double* %A_idx
-; CHECK-NEXT:                   %val1 = load double, double* %A_idx
+; CHECK-NEXT:                   %val1 = load double, double* %A_idx, align 8
+; CHECK-NEXT:                   %val1 = load double, double* %A_idx, align 8
+; CHECK-NEXT:                   %val1 = load double, double* %A_idx, align 8
 ; CHECK-NEXT:                   %val2 = fadd double %val1, %val1
 ; CHECK-NEXT:                   store double %val2, double* %B_idx
 ; CHECK-NEXT:                   store double %val1, double* %C_idx
 ; CHECK-NEXT:             }
 ; CHECK-NEXT: }

polly/test/ForwardOpTree/forward_load_unrelatedunusual.ll

 
 ; CHECK:      Stmt_bodyB
 ; CHECK-NEXT:         ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             ;
 ; CHECK-NEXT:        new: [n] -> { Stmt_bodyB[i0] -> MemRef_B[i0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyB[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:         Instructions {
-; CHECK-NEXT:               %val = load double, double* %B_idx
+; CHECK-NEXT:               %val = load double, double* %B_idx, align 8
 ; CHECK-NEXT:               store double %val, double* %A_idx
 ; CHECK-NEXT:         }

polly/test/ForwardOpTree/forward_phi_load.ll

 
 ; CHECK-NEXT: After statements {
 ; CHECK-NEXT:     Stmt_bodyA
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0] -> MemRef_B[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyA[i0] -> MemRef_phi__phi[] };
 ; CHECK-NEXT:             Instructions {
-; CHECK-NEXT:                   %val = load double, double* %B_idx
+; CHECK-NEXT:                   %val = load double, double* %B_idx, align 8
 ; CHECK-NEXT:             }
 ; CHECK-NEXT:     Stmt_bodyB
 ; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyB[i0] -> MemRef_phi__phi[] };
 ; CHECK-NEXT:            new: [n] -> { Stmt_bodyB[i0] -> MemRef_B[i0] };
 ; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:                 [n] -> { Stmt_bodyB[i0] -> MemRef_phi[] };
 ; CHECK-NEXT:             Instructions {

polly/test/ScopInfo/granularity_scalar-indep.ll

 ; CHECK-NEXT:             [n] -> { Stmt_body[i0] : 0 <= i0 < n };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [n] -> { Stmt_body[i0] -> [i0, 0] };
 ; CHECK-NEXT:         ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_body[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_body[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:         Instructions {
-; CHECK-NEXT:               %valA = load double, double* %A
+; CHECK-NEXT:               %valA = load double, double* %A, align 8
 ; CHECK-NEXT:               store double %valA, double* %A
 ; CHECK-NEXT:         }
 ; CHECK-NEXT:     Stmt_body_b
 ; CHECK-NEXT:         Domain :=
 ; CHECK-NEXT:             [n] -> { Stmt_body_b[i0] : 0 <= i0 < n };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [n] -> { Stmt_body_b[i0] -> [i0, 1] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_body_b[i0] -> MemRef_B[0] };
 ; CHECK-NEXT:         Instructions {
 ; CHECK-NEXT:               %valB = fadd double 2.100000e+01, 2.100000e+01
 ; CHECK-NEXT:               store double %valB, double* %B
 ; CHECK-NEXT:         }
 ; CHECK-NEXT: }

polly/test/ScopInfo/granularity_scalar-indep_epilogue.ll

 ; CHECK-NEXT:             [n] -> { Stmt_bodyA[i0] : 0 <= i0 < n };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA[i0] -> [i0, 0] };
 ; CHECK-NEXT:         ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:         Instructions {
-; CHECK-NEXT:             %valA = load double, double* %A
+; CHECK-NEXT:             %valA = load double, double* %A, align 8
 ; CHECK-NEXT:             store double %valA, double* %A
 ; CHECK-NEXT:         }
 ; CHECK-NEXT:     Stmt_bodyA_last
 ; CHECK-NEXT:         Domain :=
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA_last[i0] : 0 <= i0 < n };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA_last[i0] -> [i0, 1] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA_last[i0] -> MemRef_phi__phi[] };
 ; CHECK-NEXT:         Instructions {
 ; CHECK-NEXT:         }
 ; CHECK-NEXT: }

polly/test/ScopInfo/granularity_scalar-indep_epilogue_last.ll

 ; CHECK-NEXT:             [n] -> { Stmt_bodyA[i0] -> [i0, 0] };
 ; CHECK-NEXT:         ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA[i0] -> MemRef_phi__phi[] };
 ; CHECK-NEXT:         Instructions {
-; CHECK-NEXT:               %valA = load double, double* %A
+; CHECK-NEXT:               %valA = load double, double* %A, align 8
 ; CHECK-NEXT:               store double %valA, double* %A
 ; CHECK-NEXT:         }
 ; CHECK-NEXT:     Stmt_bodyA_b
 ; CHECK-NEXT:         Domain :=
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA_b[i0] : 0 <= i0 < n };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA_b[i0] -> [i0, 1] };
 ; CHECK-NEXT:         ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA_b[i0] -> MemRef_B[0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA_b[i0] -> MemRef_B[0] };
 ; CHECK-NEXT:         Instructions {
-; CHECK-NEXT:               %valB = load double, double* %B
+; CHECK-NEXT:               %valB = load double, double* %B, align 8
 ; CHECK-NEXT:               store double %valB, double* %B
 ; CHECK-NEXT:         }
 ; CHECK-NEXT: }

polly/test/ScopInfo/granularity_scalar-indep_noepilogue.ll

 ; CHECK-NEXT:             [n] -> { Stmt_bodyA[i0] -> [i0] };
 ; CHECK-NEXT:         ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:             [n] -> { Stmt_bodyA[i0] -> MemRef_phi__phi[] };
 ; CHECK-NEXT:         Instructions {
-; CHECK-NEXT:               %valA = load double, double* %A
+; CHECK-NEXT:               %valA = load double, double* %A, align 8
 ; CHECK-NEXT:               store double %valA, double* %A
 ; CHECK-NEXT:         }
 ; CHECK-NEXT: }

polly/test/ScopInfo/granularity_scalar-indep_ordered-2.ll

 ; CHECK-NEXT:             [n] -> { Stmt_body[i0] : 0 <= i0 < n };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [n] -> { Stmt_body[i0] -> [i0, 0] };
 ; CHECK-NEXT:         ReadAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_body[i0] -> MemRef_X[0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_body[i0] -> MemRef_Y[0] };
 ; CHECK-NEXT:         Instructions {
-; CHECK-NEXT:               %valX = load double, double* %X
+; CHECK-NEXT:               %valX = load double, double* %X, align 8
 ; CHECK-NEXT:               store double %valX, double* %Y
 ; CHECK-NEXT:         }
 ; CHECK-NEXT:   Stmt_body_b
 ; CHECK-NEXT:         Domain :=
 ; CHECK-NEXT:             [n] -> { Stmt_body_b[i0] : 0 <= i0 < n };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [n] -> { Stmt_body_b[i0] -> [i0, 1] };
 ; CHECK-NEXT:         ReadAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_body_b[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:         ReadAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_body_b[i0] -> MemRef_B[0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_body_b[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [n] -> { Stmt_body_b[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:         Instructions {
-; CHECK-NEXT:               %valA = load double, double* %A
-; CHECK-NEXT:               %valB = load double, double* %B
+; CHECK-NEXT:               %valA = load double, double* %A, align 8
+; CHECK-NEXT:               %valB = load double, double* %B, align 8
 ; CHECK-NEXT:               store double %valA, double* %A
 ; CHECK-NEXT:               store double %valB, double* %A
 ; CHECK-NEXT:         }
 ; CHECK-NEXT: }

polly/test/ScopInfo/granularity_scalar-indep_ordered.ll

 ; CHECK-NEXT:              [n] -> { Stmt_body[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:          ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:              [n] -> { Stmt_body[i0] -> MemRef_B[0] };
 ; CHECK-NEXT:          MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:              [n] -> { Stmt_body[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:          MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:              [n] -> { Stmt_body[i0] -> MemRef_A[0] };
 ; CHECK-NEXT:          Instructions {
-; CHECK-NEXT:                %valA = load double, double* %A
-; CHECK-NEXT:                %valB = load double, double* %B
+; CHECK-NEXT:                %valA = load double, double* %A, align 8
+; CHECK-NEXT:                %valB = load double, double* %B, align 8
 ; CHECK-NEXT:                store double %valA, double* %A
 ; CHECK-NEXT:                store double %valB, double* %A
 ; CHECK-NEXT:          }
 ; CHECK-NEXT: }