chandlerc (Chandler Carruth)Administrator
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Jul 7 2012, 2:54 PM (318 w, 4 d)
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Recent Activity

Today

chandlerc updated the diff for D50837: [x86/SLH] Teach SLH to harden against the "ret2spec" attack by implementing the proposed mitigation technique described in the original design document..

Include a minor update to the documentation to make it clear that this
component is now implemented, and only jumptables remain unhandled (but can be
handled with retpolines).

Thu, Aug 16, 3:25 AM
chandlerc created D50837: [x86/SLH] Teach SLH to harden against the "ret2spec" attack by implementing the proposed mitigation technique described in the original design document..
Thu, Aug 16, 3:19 AM
chandlerc added a dependent revision for D50833: [x86/MIR] Implement support for pre- and post-instruction symbols, as well as MIR parsing support for `MCSymbol` `MachineOperand`s.: D50837: [x86/SLH] Teach SLH to harden against the "ret2spec" attack by implementing the proposed mitigation technique described in the original design document..
Thu, Aug 16, 3:19 AM
chandlerc updated the diff for D50833: [x86/MIR] Implement support for pre- and post-instruction symbols, as well as MIR parsing support for `MCSymbol` `MachineOperand`s..

Update this to be the complete implementation of pre- and post-instruction
symbol emission.

Thu, Aug 16, 2:22 AM
chandlerc created D50833: [x86/MIR] Implement support for pre- and post-instruction symbols, as well as MIR parsing support for `MCSymbol` `MachineOperand`s..
Thu, Aug 16, 1:13 AM

Yesterday

chandlerc committed rL339836: [x86] Actually initialize the SLH pass with the x86 backend and use.
[x86] Actually initialize the SLH pass with the x86 backend and use
Wed, Aug 15, 6:23 PM
chandlerc added a comment to D50701: [MI] Change the array of `MachineMemOperand` pointers to be a generically extensible collection of extra info attached to a `MachineInstr`..
In D50701#1201714, @rnk wrote:

I'm happy with this, but I assume you want to respond to @bogner's comment.

Wed, Aug 15, 5:36 PM
chandlerc updated the diff for D50701: [MI] Change the array of `MachineMemOperand` pointers to be a generically extensible collection of extra info attached to a `MachineInstr`..

Try to improve comments.

Wed, Aug 15, 5:36 PM
chandlerc added a comment to D50701: [MI] Change the array of `MachineMemOperand` pointers to be a generically extensible collection of extra info attached to a `MachineInstr`..

Now using API suggested by Reid.

Wed, Aug 15, 1:03 AM
chandlerc updated the diff for D50701: [MI] Change the array of `MachineMemOperand` pointers to be a generically extensible collection of extra info attached to a `MachineInstr`..

Switch to API suggested in review.

Wed, Aug 15, 1:02 AM

Tue, Aug 14

chandlerc updated the diff for D50701: [MI] Change the array of `MachineMemOperand` pointers to be a generically extensible collection of extra info attached to a `MachineInstr`..

Try to shrink the code of the ExtraInfo class a bit and add some helpful comments about how all of these moving pieces interact.

Tue, Aug 14, 11:05 PM
chandlerc added inline comments to D50701: [MI] Change the array of `MachineMemOperand` pointers to be a generically extensible collection of extra info attached to a `MachineInstr`..
Tue, Aug 14, 7:46 PM
chandlerc committed rL339748: [SDAG] Update the AVR backend for the SelectionDAG API changes in.
[SDAG] Update the AVR backend for the SelectionDAG API changes in
Tue, Aug 14, 6:23 PM
chandlerc updated the diff for D50701: [MI] Change the array of `MachineMemOperand` pointers to be a generically extensible collection of extra info attached to a `MachineInstr`..

Update to remove UB from PointerSumType after consulting with Richard Smith.
This should also make the patterns used more likely to work with our supported
compilers.

Tue, Aug 14, 6:06 PM
chandlerc committed rL339740: [SDAG] Remove the reliance on MI's allocation strategy for.
[SDAG] Remove the reliance on MI's allocation strategy for
Tue, Aug 14, 4:31 PM
chandlerc closed D50680: [SDAG] Remove the reliance on MI's allocation strategy for `MachineMemOperand` pointers attached to `MachineSDNodes` and instead have the `SelectionDAG` fully manage the memory for this array..
Tue, Aug 14, 4:31 PM
chandlerc added a comment to D50680: [SDAG] Remove the reliance on MI's allocation strategy for `MachineMemOperand` pointers attached to `MachineSDNodes` and instead have the `SelectionDAG` fully manage the memory for this array..

Thanks all. Think I have everything so landing. Give a shout if anything else jumps out.

Tue, Aug 14, 4:24 PM
chandlerc created D50701: [MI] Change the array of `MachineMemOperand` pointers to be a generically extensible collection of extra info attached to a `MachineInstr`..
Tue, Aug 14, 4:53 AM
chandlerc added a dependent revision for D50680: [SDAG] Remove the reliance on MI's allocation strategy for `MachineMemOperand` pointers attached to `MachineSDNodes` and instead have the `SelectionDAG` fully manage the memory for this array.: D50701: [MI] Change the array of `MachineMemOperand` pointers to be a generically extensible collection of extra info attached to a `MachineInstr`..
Tue, Aug 14, 4:53 AM

Mon, Aug 13

chandlerc added a comment to D50680: [SDAG] Remove the reliance on MI's allocation strategy for `MachineMemOperand` pointers attached to `MachineSDNodes` and instead have the `SelectionDAG` fully manage the memory for this array..

I think all done.

Mon, Aug 13, 7:27 PM
chandlerc updated the diff for D50680: [SDAG] Remove the reliance on MI's allocation strategy for `MachineMemOperand` pointers attached to `MachineSDNodes` and instead have the `SelectionDAG` fully manage the memory for this array..

Address review feedback.

Mon, Aug 13, 7:27 PM
chandlerc added inline comments to D50680: [SDAG] Remove the reliance on MI's allocation strategy for `MachineMemOperand` pointers attached to `MachineSDNodes` and instead have the `SelectionDAG` fully manage the memory for this array..
Mon, Aug 13, 5:43 PM
chandlerc added inline comments to D50680: [SDAG] Remove the reliance on MI's allocation strategy for `MachineMemOperand` pointers attached to `MachineSDNodes` and instead have the `SelectionDAG` fully manage the memory for this array..
Mon, Aug 13, 5:36 PM
chandlerc updated the diff for D50680: [SDAG] Remove the reliance on MI's allocation strategy for `MachineMemOperand` pointers attached to `MachineSDNodes` and instead have the `SelectionDAG` fully manage the memory for this array..

Update to include the optimization where we store a single MMO inline to avoid
allocation. Almost nothing changed, all tests continue to pass.

Mon, Aug 13, 5:16 PM
chandlerc added a comment to D50680: [SDAG] Remove the reliance on MI's allocation strategy for `MachineMemOperand` pointers attached to `MachineSDNodes` and instead have the `SelectionDAG` fully manage the memory for this array..

Doh, this doesn't have the change to do the clever optimization mentioned in the change description. I'll update it with that momentarily. But that will be just a tiny implementation detail, so probably fin eto start reviewing.

Mon, Aug 13, 4:51 PM
chandlerc added a comment to D50678: [InlineAsm] Update the min-legal-vector-width function attribute based on inputs and outputs to inline assembly.

This makes sense to me, but definitely wait for someone more familiar w/ Clang's IR gen to review...

Mon, Aug 13, 4:49 PM
chandlerc created D50680: [SDAG] Remove the reliance on MI's allocation strategy for `MachineMemOperand` pointers attached to `MachineSDNodes` and instead have the `SelectionDAG` fully manage the memory for this array..
Mon, Aug 13, 4:47 PM

Mon, Aug 6

chandlerc committed rL339001: [docs] Continue working around broken Sphinx parsing of LLVM code blocks.
[docs] Continue working around broken Sphinx parsing of LLVM code blocks
Mon, Aug 6, 3:20 AM
chandlerc committed rL338998: [docs] Remove the `dso_local` tag from these functions..
[docs] Remove the `dso_local` tag from these functions.
Mon, Aug 6, 3:04 AM
chandlerc committed rL338997: [docs] Stop trying to parse the ThinLTO summary IR fragments with the.
[docs] Stop trying to parse the ThinLTO summary IR fragments with the
Mon, Aug 6, 2:47 AM

Sun, Aug 5

chandlerc committed rL338983: [docs] Switch debug info metadata blocks to use `text` instead of `llvm`.
[docs] Switch debug info metadata blocks to use `text` instead of `llvm`
Sun, Aug 5, 8:36 PM
chandlerc committed rL338982: [docs] Correct the basic syntax structure of the DISubrange example..
[docs] Correct the basic syntax structure of the DISubrange example.
Sun, Aug 5, 7:30 PM
chandlerc committed rL338981: [docs] Remove an example that isn't well formed LLVM IR and trips up the.
[docs] Remove an example that isn't well formed LLVM IR and trips up the
Sun, Aug 5, 7:02 PM
chandlerc committed rL338980: [docs] Fix an LLVM-syntax code block to actually be valid LLVM synatx..
[docs] Fix an LLVM-syntax code block to actually be valid LLVM synatx.
Sun, Aug 5, 6:41 PM
chandlerc committed rC338979: [docs] Don't use the `asm` syntax highlighting (which our docs builder.
[docs] Don't use the `asm` syntax highlighting (which our docs builder
Sun, Aug 5, 6:30 PM
chandlerc committed rL338979: [docs] Don't use the `asm` syntax highlighting (which our docs builder.
[docs] Don't use the `asm` syntax highlighting (which our docs builder
Sun, Aug 5, 6:29 PM
chandlerc committed rL338978: [docs] Turn of `nasm` highlighting for a code block..
[docs] Turn of `nasm` highlighting for a code block.
Sun, Aug 5, 6:20 PM
chandlerc committed rL338977: [docs] Reinstate r337730 - Add support for Markdown documentation in.
[docs] Reinstate r337730 - Add support for Markdown documentation in
Sun, Aug 5, 5:39 PM

Sat, Aug 4

chandlerc added inline comments to D50055: Update the coding standard about NFC changes and whitespace.
Sat, Aug 4, 8:34 PM
chandlerc committed rL338955: [ADT] Add an early-increment iterator-like type and range adaptor..
[ADT] Add an early-increment iterator-like type and range adaptor.
Sat, Aug 4, 1:18 AM
chandlerc closed D49956: [ADT] Add an early-increment iterator and range adaptor..
Sat, Aug 4, 1:18 AM
chandlerc accepted D50055: Update the coding standard about NFC changes and whitespace.

This looks really good to me and seems like a nice clarification of historical practice. =D Thanks so much for driving an actual documentation update for folks that simply would never know about these practices otherwise, I think it will help folks a lot.

Sat, Aug 4, 12:24 AM

Wed, Aug 1

chandlerc added inline comments to D50055: Update the coding standard about NFC changes and whitespace.
Wed, Aug 1, 2:49 PM

Tue, Jul 31

chandlerc committed rL338481: [x86] Fix a really subtle miscompile due to a somewhat glaring bug in.
[x86] Fix a really subtle miscompile due to a somewhat glaring bug in
Tue, Jul 31, 8:02 PM
chandlerc committed rL338480: [x86/slh] Add unwind info to several tests to make it more obvious that.
[x86/slh] Add unwind info to several tests to make it more obvious that
Tue, Jul 31, 8:01 PM
chandlerc added inline comments to D50055: Update the coding standard about NFC changes and whitespace.
Tue, Jul 31, 2:37 PM

Mon, Jul 30

chandlerc added a comment to D49956: [ADT] Add an early-increment iterator and range adaptor..

We have many, many for loops still using iterators for this....

Mon, Jul 30, 8:08 PM

Sat, Jul 28

chandlerc committed rC338209: Revert r337456: [CodeGen] Disable aggressive structor optimizations at -O0….
Revert r337456: [CodeGen] Disable aggressive structor optimizations at -O0…
Sat, Jul 28, 8:06 PM
chandlerc committed rL338209: Revert r337456: [CodeGen] Disable aggressive structor optimizations at -O0….
Revert r337456: [CodeGen] Disable aggressive structor optimizations at -O0…
Sat, Jul 28, 8:05 PM
chandlerc updated the diff for D49956: [ADT] Add an early-increment iterator and range adaptor..

Now with correct usage of the ABI breaking checks macro and fixing a silly
compile error.

Sat, Jul 28, 5:16 PM
chandlerc updated the diff for D49956: [ADT] Add an early-increment iterator and range adaptor..

Update with actual documentation (instead of it being missing or talking about
the wrong thing) and a more direct implementation strategy.

Sat, Jul 28, 4:26 PM
chandlerc created D49956: [ADT] Add an early-increment iterator and range adaptor..
Sat, Jul 28, 2:55 AM

Fri, Jul 27

chandlerc accepted D49944: [Dominators] Make applyUpdate's documentation less confusing [NFC].

LGTM! Thanks for the improved comment. Hopefully at least helps future me when I get confused reading it again.

Fri, Jul 27, 5:51 PM
chandlerc added a comment to D49925: [SimpleLoopUnswitch] Fix DT updates for trivial branch unswitching..

@chandlerc FYI, all existing uses of the 'raw' api (DT.insert/deleteEdge, DT.applyUpdates) are going to be replaced with the new unified API after branching to 8.0. @NutshellySima is working on this.
The plan is also to hide insert/deleteEdge completely, so that we won't have bugs like this in the future.

Fri, Jul 27, 2:37 PM
chandlerc accepted D49925: [SimpleLoopUnswitch] Fix DT updates for trivial branch unswitching..

LGTM, but *please* update the comments in the update API to make this clear. I specifically thought there was no difference here after reading the comments, so I think they need to make this way more clear.

Fri, Jul 27, 2:08 PM
chandlerc accepted D49843: [CMake] Followup for r337366: Only export LLVM_LINK_LLVM_DYLIB it it's set to ON.

After thinking more about it, this seems like the only sensible course.

Fri, Jul 27, 12:00 AM

Thu, Jul 26

chandlerc committed rL338016: [x86/SLH] Extract the logic to trace predicate state through calls to.
[x86/SLH] Extract the logic to trace predicate state through calls to
Thu, Jul 26, 2:43 AM

Wed, Jul 25

chandlerc planned changes to D49787: [x86/SLH] Significantly optimize the interprocedural hardening strategy..
Wed, Jul 25, 5:14 AM
chandlerc added a comment to D49787: [x86/SLH] Significantly optimize the interprocedural hardening strategy..

Before anyone gets too excited about the performance improvements here, I should mention that I am working on implementing another component of the high level SLH design that I'm worried will completely defeat all of these improvements. Maybe even hold off reviewing, as this whole thing may not be relevant. =/ Sorry for the noise.

Wed, Jul 25, 5:14 AM
chandlerc created D49787: [x86/SLH] Significantly optimize the interprocedural hardening strategy..
Wed, Jul 25, 5:02 AM
chandlerc committed rL337895: [x86/SLH] Sink the return hardening into the main block-walk + hardening.
[x86/SLH] Sink the return hardening into the main block-walk + hardening
Wed, Jul 25, 2:19 AM
chandlerc committed rL337894: [x86/SLH] Improve name and comments for the main hardening function..
[x86/SLH] Improve name and comments for the main hardening function.
Wed, Jul 25, 2:00 AM

Tue, Jul 24

chandlerc committed rL337878: [x86/SLH] Teach the x86 speculative load hardening pass to harden.
[x86/SLH] Teach the x86 speculative load hardening pass to harden
Tue, Jul 24, 6:51 PM
chandlerc closed D49663: [x86/SLH] Teach the x86 speculative load hardening pass to harden against v1.2 BCBS attacks directly..
Tue, Jul 24, 6:51 PM
chandlerc added a comment to D49663: [x86/SLH] Teach the x86 speculative load hardening pass to harden against v1.2 BCBS attacks directly..

All done and submitting! Thanks!

Tue, Jul 24, 6:32 PM
chandlerc committed rL337845: [x86] Teach the x86 backend that it can fold between TCRETURNm* and TCRETURNr*….
[x86] Teach the x86 backend that it can fold between TCRETURNm* and TCRETURNr*…
Tue, Jul 24, 12:05 PM
chandlerc closed D49717: [x86] Teach the x86 backend that it can fold between TCRETURNm* and TCRETURNr* and fix latent bugs with register class updates..
Tue, Jul 24, 12:04 PM
chandlerc accepted D49162: [Inliner] Teach inliner to merge 'min-legal-vector-width' function attribute.

LGTM

Tue, Jul 24, 10:58 AM
chandlerc added inline comments to D49717: [x86] Teach the x86 backend that it can fold between TCRETURNm* and TCRETURNr* and fix latent bugs with register class updates..
Tue, Jul 24, 10:57 AM
chandlerc updated the diff for D49663: [x86/SLH] Teach the x86 speculative load hardening pass to harden against v1.2 BCBS attacks directly..

Confirmed that this does-the-right-thing with retpolines (as they get
a different instruction).

Tue, Jul 24, 6:16 AM
chandlerc updated the diff for D49663: [x86/SLH] Teach the x86 speculative load hardening pass to harden against v1.2 BCBS attacks directly..

Rebase on top of the cleaned up folding patch, and now without any copy/paste
code smells. We just call out to the generic low-level register hardening
routine.

Tue, Jul 24, 6:01 AM
chandlerc committed rL337825: [x86/SLH] Extract the core register hardening logic to a low-level.
[x86/SLH] Extract the core register hardening logic to a low-level
Tue, Jul 24, 5:44 AM
chandlerc committed rL337822: [x86/SLH] Tidy up a comment, using doxygen structure and wording it to.
[x86/SLH] Tidy up a comment, using doxygen structure and wording it to
Tue, Jul 24, 5:19 AM
chandlerc updated the diff for D49717: [x86] Teach the x86 backend that it can fold between TCRETURNm* and TCRETURNr* and fix latent bugs with register class updates..

Use NewMI.getDesc() rather than looking it up in TII again. Thanks to Craig for the suggestion.

Tue, Jul 24, 4:54 AM

Mon, Jul 23

chandlerc added inline comments to D49717: [x86] Teach the x86 backend that it can fold between TCRETURNm* and TCRETURNr* and fix latent bugs with register class updates..
Mon, Jul 23, 8:42 PM
chandlerc updated the diff for D49663: [x86/SLH] Teach the x86 speculative load hardening pass to harden against v1.2 BCBS attacks directly..

Split the TCRETURN folding into https://reviews.llvm.org/D49717 to make the
messy situation there more clear.

Mon, Jul 23, 8:40 PM
chandlerc added inline comments to D49663: [x86/SLH] Teach the x86 speculative load hardening pass to harden against v1.2 BCBS attacks directly..
Mon, Jul 23, 8:40 PM
chandlerc created D49717: [x86] Teach the x86 backend that it can fold between TCRETURNm* and TCRETURNr* and fix latent bugs with register class updates..
Mon, Jul 23, 8:35 PM
chandlerc committed rL337806: [x86] Clean up and convert test to use generated CHECK lines..
[x86] Clean up and convert test to use generated CHECK lines.
Mon, Jul 23, 8:18 PM
chandlerc committed rL337805: [x86] Update the CHECK lines of this test to use the latest patterns.
[x86] Update the CHECK lines of this test to use the latest patterns
Mon, Jul 23, 8:07 PM
chandlerc committed rL337785: [x86/SLH] Simplify the code for hardening a loaded value. NFC..
[x86/SLH] Simplify the code for hardening a loaded value. NFC.
Mon, Jul 23, 5:35 PM
chandlerc committed rL337781: [x86/SLH] Remove complex SHRX-based post-load hardening..
[x86/SLH] Remove complex SHRX-based post-load hardening.
Mon, Jul 23, 5:22 PM
chandlerc added inline comments to D49162: [Inliner] Teach inliner to merge 'min-legal-vector-width' function attribute.
Mon, Jul 23, 5:12 PM
chandlerc added inline comments to D49162: [Inliner] Teach inliner to merge 'min-legal-vector-width' function attribute.
Mon, Jul 23, 4:27 PM
chandlerc created D49663: [x86/SLH] Teach the x86 speculative load hardening pass to harden against v1.2 BCBS attacks directly..
Mon, Jul 23, 4:46 AM
chandlerc committed rL337673: [x86/SLH] Fix a bug where we would harden tail calls twice -- once as.
[x86/SLH] Fix a bug where we would harden tail calls twice -- once as
Mon, Jul 23, 12:56 AM
chandlerc committed rL337672: [x86/SLH] Add a test covering indirect forms of control flow. NFC..
[x86/SLH] Add a test covering indirect forms of control flow. NFC.
Mon, Jul 23, 12:52 AM

Sun, Jul 22

chandlerc committed rL337667: [x86/SLH] Rename and comment the main hardening function. NFC..
[x86/SLH] Rename and comment the main hardening function. NFC.
Sun, Jul 22, 9:03 PM
chandlerc closed D49583: [x86/SLH] Rename and comment the main hardening function. NFC..
Sun, Jul 22, 9:03 PM
chandlerc created D49655: [x86/SLH] Negative result (not planned for submission): Introduce an alternative way of embedding and extracting the predicate state in the stack pointer..
Sun, Jul 22, 8:53 PM

Thu, Jul 19

chandlerc created D49583: [x86/SLH] Rename and comment the main hardening function. NFC..
Thu, Jul 19, 6:05 PM
chandlerc added inline comments to D44910: [docs] Add Markdown support to Sphinx.
Thu, Jul 19, 4:55 PM
chandlerc committed rL337510: [x86/SLH] Clean up helper naming for return instruction handling and.
[x86/SLH] Clean up helper naming for return instruction handling and
Thu, Jul 19, 4:51 PM
chandlerc closed D49571: [x86/SLH] Clean up helper naming for return instruction handling and remove dead declaration of a call instruction handling helper..
Thu, Jul 19, 4:51 PM
chandlerc created D49571: [x86/SLH] Clean up helper naming for return instruction handling and remove dead declaration of a call instruction handling helper..
Thu, Jul 19, 3:10 PM
chandlerc committed rL337446: [x86/SLH] Major refactoring of SLH implementaiton. There are two big.
[x86/SLH] Major refactoring of SLH implementaiton. There are two big
Thu, Jul 19, 4:19 AM
chandlerc closed D49427: [x86/SLH] Major refactoring of SLH implementaiton. There are two big changes that are intertwined here:.
Thu, Jul 19, 4:19 AM

Wed, Jul 18

chandlerc added a comment to D49519: [RegisterCoalescer] Delay live interval update work until the rematerialization for all the uses from the same def is done.

Nice approach!

Wed, Jul 18, 4:43 PM
chandlerc added a comment to D44910: [docs] Add Markdown support to Sphinx.

(Feel free to commandeer back if someone else wants to land this)

Wed, Jul 18, 7:23 AM
chandlerc updated the diff for D44910: [docs] Add Markdown support to Sphinx.

Updated to reflect the new .md file in the tree.

Wed, Jul 18, 7:23 AM