[OHOS] Add support for OpenHarmony

[kpdev42]

Summary

Add support for OpenHarmony OS

General OpenHarmony OS discussion on discourse thread "[RFC] Add support for OpenHarmony OS"
https://discourse.llvm.org/t/rfc-add-support-for-openharmony-os/66656

[kpdev42]

Remove tls-related changes
Add link to dicourse thread

[kpdev42]

Ping) Any thoughts, questions?

[kpdev42]

Ping

[kpdev42]

ping

[DavidSpickett]

Please include context with the diff (https://llvm.org/docs/Phabricator.html#requesting-a-review-via-the-web-interface).

(Phab doesn't have the full repo backing each diff so the context lets us see what the surrounding code is)

[arsenm]

I'm generally of the opinion that anything and everything can go into Triple

llvm/include/llvm/ADT/Triple.h

742

As someone who's never heard of this operating system, this helper name isn't particularly enlightening

[arsenm]

llvm/test/Transforms/SafeStack/AArch64/unreachable.ll

3

New tests should use opaque pointers (has this one somehow missed conversion?)

[jrtc27]

llvm/include/llvm/ADT/Triple.h

250

Keep blank line

270

Keep blank line

742

What if I give aarch64-liteos-gnu?

llvm/include/llvm/BinaryFormat/MinidumpConstants.def

118

What's with the 0x8206 gap?

llvm/test/Transforms/SafeStack/AArch64/abi.ll

3

These diffs don't belong here, the tests pass without them

[DavidSpickett]

llvm/test/Transforms/SafeStack/AArch64/abi.ll

3

This should have a comment if there is some OpenHarmony specific behaviour here.

llvm/test/Transforms/SafeStack/AArch64/unreachable.ll

3

Same here please note why OpenHarmony needs this specific check. Also note that FileCheck %s --check-prefix=OHOSMUSL will only check that prefix, not that plus the CHECK. I don't know if that is what you intended.

llvm/unittests/ADT/TripleTest.cpp

813

Is the "canonical" triple here arm-unknown-liteos-ohos ? I guess you are testing here to make sure that liteos implies ohos if ohos is not in the triple already.

[kpdev42]

Rebase and clean

[kpdev42]

llvm/include/llvm/ADT/Triple.h

742

We currently assume environment for liteos is always ohos. Thus gnu env will be ignored.

[DavidSpickett]

llvm/include/llvm/BinaryFormat/MinidumpConstants.def

118

Is this still relevant?

[kpdev42]

llvm/include/llvm/BinaryFormat/MinidumpConstants.def

118

Actually, no, it was changed from 0x8207 in initial diff to 0x8206 in current one

[DavidSpickett]

LGTM, all comments have been addressed.

Please add [llvm] at the start of the commit title as well. If you are landing it using arc, edit the title here in the web interface first. It has a habit of choosing that over the local version in my experience.

[kpdev42]

In D138202#4154806, @DavidSpickett wrote:

LGTM, all comments have been addressed.

Please add [llvm] at the start of the commit title as well. If you are landing it using arc, edit the title here in the web interface first. It has a habit of choosing that over the local version in my experience.

Sorry, forgot to add this tag, mea culpa. Will add it in next patches. Thank you for the review

llvm/include/llvm/ADT/Triple.h

enum OSType {
     Mesa3D,
     Contiki,
     AMDPAL,     // AMD PAL Runtime
     HermitCore, // HermitCore Unikernel/Multikernel
     Hurd,       // GNU/Hurd
     WASI,       // Experimental WebAssembly OS
     Emscripten,
     ShaderModel, // DirectX ShaderModel
-    LastOSType = ShaderModel
+    LiteOS,
+    LastOSType = LiteOS
   };
   enum EnvironmentType {
     UnknownEnvironment,
 
     GNU,
     GNUABIN32,
     GNUABI64,
     GNUEABI,
enum EnvironmentType {
     MuslX32,
 
     MSVC,
     Itanium,
     Cygnus,
     CoreCLR,
     Simulator, // Simulator variants of other systems, e.g., Apple's iOS
     MacABI, // Mac Catalyst variant of Apple's iOS deployment target.
-    
     // Shader Stages
     // The order of these values matters, and must be kept in sync with the
     // language options enum in Clang. The ordering is enforced in
     // static_asserts in Triple.cpp and in Clang.
     Pixel,
     Vertex,
     Geometry,
     Hull,
     Domain,
     Compute,
     Library,
     RayGeneration,
     Intersection,
     AnyHit,
     ClosestHit,
     Miss,
     Callable,
     Mesh,
     Amplification,
-
-    LastEnvironmentType = Amplification
+    OpenHOS,
+    LastEnvironmentType = OpenHOS
   };
   enum ObjectFormatType {
     UnknownObjectFormat,
 
     COFF,
     DXContainer,
     ELF,
     GOFF,
bool isAndroidVersionLT(unsigned Major) const {
     return Version < VersionTuple(Major);
   }
 
   /// Tests whether the environment is musl-libc
   bool isMusl() const {
     return getEnvironment() == Triple::Musl ||
            getEnvironment() == Triple::MuslEABI ||
            getEnvironment() == Triple::MuslEABIHF ||
-           getEnvironment() == Triple::MuslX32;
+           getEnvironment() == Triple::MuslX32 ||
+           getEnvironment() == Triple::OpenHOS || isOSLiteOS();
   }
 
+  /// Tests whether the target is OHOS
+  /// LiteOS default enviroment is also OHOS, but omited on triple.
+  bool isOHOSFamily() const { return isOpenHOS() || isOSLiteOS(); }
+
+  bool isOpenHOS() const { return getEnvironment() == Triple::OpenHOS; }
+
+  bool isOSLiteOS() const { return getOS() == Triple::LiteOS; }
+
   /// Tests whether the target is DXIL.
   bool isDXIL() const {
     return getArch() == Triple::dxil;
   }
 
   /// Tests whether the target is SPIR (32- or 64-bit).
   bool isSPIR() const {
     return getArch() == Triple::spir || getArch() == Triple::spir64;
public:
   /// handling standard.
   bool isTargetEHABICompatible() const {
     return (isARM() || isThumb()) &&
            (getEnvironment() == Triple::EABI ||
             getEnvironment() == Triple::GNUEABI ||
             getEnvironment() == Triple::MuslEABI ||
             getEnvironment() == Triple::EABIHF ||
             getEnvironment() == Triple::GNUEABIHF ||
+            getEnvironment() == Triple::OpenHOS ||
             getEnvironment() == Triple::MuslEABIHF || isAndroid()) &&
            isOSBinFormatELF();
   }
 
   /// Tests whether the target is T32.
   bool isArmT32() const {
     switch (getSubArch()) {
     case Triple::ARMSubArch_v8m_baseline:

llvm/include/llvm/BinaryFormat/MinidumpConstants.def

 HANDLE_MDMP_PLATFORM(0x8000, Unix) // Generic Unix-ish
 HANDLE_MDMP_PLATFORM(0x8101, MacOSX) // Mac OS X/Darwin
 HANDLE_MDMP_PLATFORM(0x8102, IOS) // iOS
 HANDLE_MDMP_PLATFORM(0x8201, Linux) // Linux
 HANDLE_MDMP_PLATFORM(0x8202, Solaris) // Solaris
 HANDLE_MDMP_PLATFORM(0x8203, Android) // Android
 HANDLE_MDMP_PLATFORM(0x8204, PS3) // PS3
 HANDLE_MDMP_PLATFORM(0x8205, NaCl) // Native Client (NaCl)
+HANDLE_MDMP_PLATFORM(0x8207, OpenHOS)
 
 HANDLE_MDMP_PROTECT(0x01, NoAccess, PAGE_NO_ACCESS)
 HANDLE_MDMP_PROTECT(0x02, ReadOnly, PAGE_READ_ONLY)
 HANDLE_MDMP_PROTECT(0x04, ReadWrite, PAGE_READ_WRITE)
 HANDLE_MDMP_PROTECT(0x08, WriteCopy, PAGE_WRITE_COPY)
 HANDLE_MDMP_PROTECT(0x10, Execute, PAGE_EXECUTE)
 HANDLE_MDMP_PROTECT(0x20, ExecuteRead, PAGE_EXECUTE_READ)
 HANDLE_MDMP_PROTECT(0x40, ExecuteReadWrite, PAGE_EXECUTE_READ_WRITE)

llvm/lib/Support/AArch64TargetParser.cpp

void AArch64::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
   }
 
   for (const auto &Alias: AArch64CPUAliases)
     Values.push_back(Alias.getAlias());
 }
 
 bool AArch64::isX18ReservedByDefault(const Triple &TT) {
   return TT.isAndroid() || TT.isOSDarwin() || TT.isOSFuchsia() ||
-         TT.isOSWindows();
+         TT.isOSWindows() || TT.isOHOSFamily();
 }
 
 // Allows partial match, ex. "v8a" matches "armv8a".
 AArch64::ArchKind AArch64::parseArch(StringRef Arch) {
   Arch = ARM::getCanonicalArchName(Arch);
   if (checkArchVersion(Arch) < 8)
     return ArchKind::INVALID;
 

llvm/lib/Support/ARMTargetParser.cpp

StringRef ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) {
   case Triple::MuslEABIHF:
     return "aapcs-linux";
   case Triple::EABIHF:
   case Triple::EABI:
     return "aapcs";
   default:
     if (TT.isOSNetBSD())
       return "apcs-gnu";
-    if (TT.isOSOpenBSD())
+    if (TT.isOSOpenBSD() || TT.isOHOSFamily())
       return "aapcs-linux";
     return "aapcs";
   }
 }

llvm/lib/Support/Triple.cpp

StringRef Triple::getOSTypeName(OSType Kind) {
   case RTEMS: return "rtems";
   case Solaris: return "solaris";
   case TvOS: return "tvos";
   case WASI: return "wasi";
   case WatchOS: return "watchos";
   case Win32: return "windows";
   case ZOS: return "zos";
   case ShaderModel: return "shadermodel";
+  case LiteOS: return "liteos";
   }
 
   llvm_unreachable("Invalid OSType");
 }
 
 StringRef Triple::getEnvironmentTypeName(EnvironmentType Kind) {
   switch (Kind) {
   case UnknownEnvironment: return "unknown";
StringRef Triple::getEnvironmentTypeName(EnvironmentType Kind) {
   case RayGeneration: return "raygeneration";
   case Intersection: return "intersection";
   case AnyHit: return "anyhit";
   case ClosestHit: return "closesthit";
   case Miss: return "miss";
   case Callable: return "callable";
   case Mesh: return "mesh";
   case Amplification: return "amplification";
+  case OpenHOS: return "ohos";
   }
 
   llvm_unreachable("Invalid EnvironmentType!");
 }
 
 static Triple::ArchType parseBPFArch(StringRef ArchName) {
   if (ArchName.equals("bpf")) {
     if (sys::IsLittleEndianHost)
return StringSwitch<Triple::OSType>(OSName)
     .StartsWith("mesa3d", Triple::Mesa3D)
     .StartsWith("contiki", Triple::Contiki)
     .StartsWith("amdpal", Triple::AMDPAL)
     .StartsWith("hermit", Triple::HermitCore)
     .StartsWith("hurd", Triple::Hurd)
     .StartsWith("wasi", Triple::WASI)
     .StartsWith("emscripten", Triple::Emscripten)
     .StartsWith("shadermodel", Triple::ShaderModel)
+    .StartsWith("liteos", Triple::LiteOS)
     .Default(Triple::UnknownOS);
 }
 
 static Triple::EnvironmentType parseEnvironment(StringRef EnvironmentName) {
   return StringSwitch<Triple::EnvironmentType>(EnvironmentName)
       .StartsWith("eabihf", Triple::EABIHF)
       .StartsWith("eabi", Triple::EABI)
       .StartsWith("gnuabin32", Triple::GNUABIN32)
return StringSwitch<Triple::EnvironmentType>(EnvironmentName)
       .StartsWith("raygeneration", Triple::RayGeneration)
       .StartsWith("intersection", Triple::Intersection)
       .StartsWith("anyhit", Triple::AnyHit)
       .StartsWith("closesthit", Triple::ClosestHit)
       .StartsWith("miss", Triple::Miss)
       .StartsWith("callable", Triple::Callable)
       .StartsWith("mesh", Triple::Mesh)
       .StartsWith("amplification", Triple::Amplification)
+      .StartsWith("ohos", Triple::OpenHOS)
       .Default(Triple::UnknownEnvironment);
 }
 
 static Triple::ObjectFormatType parseFormat(StringRef EnvironmentName) {
   return StringSwitch<Triple::ObjectFormatType>(EnvironmentName)
       // "xcoff" must come before "coff" because of the order-dependendent
       // pattern matching.
       .EndsWith("xcoff", Triple::XCOFF)

llvm/lib/Target/ARM/ARMSubtarget.h

#include "ARMGenSubtargetInfo.inc"
   }
   bool isTargetGNUAEABI() const {
     return (TargetTriple.getEnvironment() == Triple::GNUEABI ||
             TargetTriple.getEnvironment() == Triple::GNUEABIHF) &&
            !isTargetDarwin() && !isTargetWindows();
   }
   bool isTargetMuslAEABI() const {
     return (TargetTriple.getEnvironment() == Triple::MuslEABI ||
-            TargetTriple.getEnvironment() == Triple::MuslEABIHF) &&
+            TargetTriple.getEnvironment() == Triple::MuslEABIHF ||
+            TargetTriple.getEnvironment() == Triple::OpenHOS) &&
            !isTargetDarwin() && !isTargetWindows();
   }
 
   // ARM Targets that support EHABI exception handling standard
   // Darwin uses SjLj. Other targets might need more checks.
   bool isTargetEHABICompatible() const {
     return TargetTriple.isTargetEHABICompatible();
   }

llvm/lib/Target/ARM/ARMTargetMachine.cpp

ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, const Triple &TT,
 
   // Default to triple-appropriate EABI
   if (Options.EABIVersion == EABI::Default ||
       Options.EABIVersion == EABI::Unknown) {
     // musl is compatible with glibc with regard to EABI version
     if ((TargetTriple.getEnvironment() == Triple::GNUEABI ||
          TargetTriple.getEnvironment() == Triple::GNUEABIHF ||
          TargetTriple.getEnvironment() == Triple::MuslEABI ||
-         TargetTriple.getEnvironment() == Triple::MuslEABIHF) &&
+         TargetTriple.getEnvironment() == Triple::MuslEABIHF ||
+         TargetTriple.getEnvironment() == Triple::OpenHOS) &&
         !(TargetTriple.isOSWindows() || TargetTriple.isOSDarwin()))
       this->Options.EABIVersion = EABI::GNU;
     else
       this->Options.EABIVersion = EABI::EABI5;
   }
 
   if (TT.isOSBinFormatMachO()) {
     this->Options.TrapUnreachable = true;

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

SDValue RISCVTargetLowering::getDynamicTLSAddr(GlobalAddressSDNode *N,
 
   return LowerCallTo(CLI).first;
 }
 
 SDValue RISCVTargetLowering::lowerGlobalTLSAddress(SDValue Op,
                                                    SelectionDAG &DAG) const {
   GlobalAddressSDNode *N = cast<GlobalAddressSDNode>(Op);
   assert(N->getOffset() == 0 && "unexpected offset in global node");
+  if (DAG.getTarget().useEmulatedTLS())
+    return LowerToTLSEmulatedModel(N, DAG);
 
   TLSModel::Model Model = getTargetMachine().getTLSModel(N->getGlobal());
 
   if (DAG.getMachineFunction().getFunction().getCallingConv() ==
       CallingConv::GHC)
     report_fatal_error("In GHC calling convention TLS is not supported");
 
   SDValue Addr;

llvm/test/CodeGen/AArch64/arm64-platform-reg.ll

 ; RUN: llc -mtriple=arm64-apple-ios -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE --check-prefix=CHECK-RESERVE-X18
 ; RUN: llc -mtriple=arm64-freebsd-gnu -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE --check-prefix=CHECK-RESERVE-X18
 ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
 ; RUN: llc -mtriple=aarch64-linux-android -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE --check-prefix=CHECK-RESERVE-X18
+; RUN: llc -mtriple=aarch64-linux-ohos -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE --check-prefix=CHECK-RESERVE-X18
 ; RUN: llc -mtriple=aarch64-fuchsia -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE --check-prefix=CHECK-RESERVE-X18
 ; RUN: llc -mtriple=aarch64-windows -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE --check-prefix=CHECK-RESERVE-X18
 
 ; Test reserve-x# options individually.
 ; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x1 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X1
 ; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x2 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X2
 ; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x3 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X3
 ; RUN: llc -mtriple=arm64-linux-gnu -mattr=+reserve-x4 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X4

llvm/test/CodeGen/RISCV/emutls.ll

+; RUN: llc < %s -emulated-tls -mtriple=riscv64-linux-gnu | FileCheck -check-prefix=RISCV64 %s
+; RUN: llc < %s -emulated-tls -mtriple=riscv64-linux-ohos | FileCheck -check-prefix=RISCV64 %s
+
+; RUN: llc < %s -mtriple=riscv64-linux-gnu | FileCheck -check-prefix=NoEMU %s
+; RUN: llc < %s -mtriple=riscv64-linux-ohos | FileCheck -check-prefix=RISCV64 %s
+
+; Copied from X86/emutls.ll
+
+; NoEMU-NOT: __emutls
+
+; Use my_emutls_get_address like __emutls_get_address.
+@my_emutls_v_xyz = external global i8*, align 4
+declare i8* @my_emutls_get_address(i8*)
+
+define dso_local i32 @my_get_xyz() {
+; RISCV64-LABEL: my_get_xyz:
+; RISCV64:         lui a0, %hi(my_emutls_v_xyz)
+; RISCV64-NEXT:    addi a0, a0, %lo(my_emutls_v_xyz)
+; RISCV64-NEXT:    call my_emutls_get_address@plt
+; RISCV64-NEXT:    lw a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %call = call i8* @my_emutls_get_address(i8* bitcast (i8** @my_emutls_v_xyz to i8*))
+  %0 = bitcast i8* %call to i32*
+  %1 = load i32, i32* %0, align 4
+  ret i32 %1
+}
+
+@i1 = dso_local thread_local global i32 15
+@i2 = external thread_local global i32
+@i3 = internal thread_local global i32 15
+@i4 = hidden thread_local global i32 15
+@i5 = external hidden thread_local global i32
+@s1 = dso_local thread_local global i16 15
+@b1 = dso_local thread_local global i8 0
+
+define dso_local i32 @f1() {
+; RISCV64-LABEL: f1:
+; RISCV64:         lui a0, %hi(__emutls_v.i1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lw a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i32, i32* @i1
+  ret i32 %tmp1
+}
+
+define dso_local i32* @f2() {
+; RISCV64-LABEL: f2:
+; RISCV64:         lui a0, %hi(__emutls_v.i1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  ret i32* @i1
+}
+
+define dso_local i32 @f3() nounwind {
+; RISCV64-LABEL: f3:
+; RISCV64:         lui a0, %hi(__emutls_v.i2)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i2)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lw a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i32, i32* @i2
+  ret i32 %tmp1
+}
+
+define dso_local i32* @f4() {
+; RISCV64-LABEL: f4:
+; RISCV64:         lui a0, %hi(__emutls_v.i2)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i2)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  ret i32* @i2
+}
+
+define dso_local i32 @f5() nounwind {
+; RISCV64-LABEL: f5:
+; RISCV64:         lui a0, %hi(__emutls_v.i3)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i3)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lw a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i32, i32* @i3
+  ret i32 %tmp1
+}
+
+define dso_local i32* @f6() {
+; RISCV64-LABEL: f6:
+; RISCV64:         lui a0, %hi(__emutls_v.i3)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i3)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  ret i32* @i3
+}
+
+define dso_local i32 @f7() {
+; RISCV64-LABEL: f7:
+; RISCV64:         lui a0, %hi(__emutls_v.i4)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i4)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lw a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i32, i32* @i4
+  ret i32 %tmp1
+}
+
+define dso_local i32* @f8() {
+; RISCV64-LABEL: f8:
+; RISCV64:         lui a0, %hi(__emutls_v.i4)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i4)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  ret i32* @i4
+}
+
+define dso_local i32 @f9() {
+; RISCV64-LABEL: f9:
+; RISCV64:         lui a0, %hi(__emutls_v.i5)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i5)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lw a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i32, i32* @i5
+  ret i32 %tmp1
+}
+
+define dso_local i32* @f10() {
+; RISCV64-LABEL: f10:
+; RISCV64:         lui a0, %hi(__emutls_v.i5)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i5)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  ret i32* @i5
+}
+
+define dso_local i16 @f11() {
+; RISCV64-LABEL: f11:
+; RISCV64:         lui a0, %hi(__emutls_v.s1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.s1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lh a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i16, i16* @s1
+  ret i16 %tmp1
+}
+
+define dso_local i32 @f12sext() {
+; RISCV64-LABEL: f12sext:
+; RISCV64:         lui a0, %hi(__emutls_v.s1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.s1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lh a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i16, i16* @s1
+  %tmp2 = sext i16 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+define dso_local i32 @f12zext() {
+; RISCV64-LABEL: f12zext:
+; RISCV64:         lui a0, %hi(__emutls_v.s1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.s1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lhu a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i16, i16* @s1
+  %tmp2 = zext i16 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+define dso_local i8 @f13() {
+; RISCV64-LABEL: f13:
+; RISCV64:         lui a0, %hi(__emutls_v.b1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.b1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lb a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i8, i8* @b1
+  ret i8 %tmp1
+}
+
+define dso_local i32 @f14sext() {
+; RISCV64-LABEL: f14sext:
+; RISCV64:         lui a0, %hi(__emutls_v.b1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.b1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lb a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i8, i8* @b1
+  %tmp2 = sext i8 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+define dso_local i32 @f14zext() {
+; RISCV64-LABEL: f14zext:
+; RISCV64:         lui a0, %hi(__emutls_v.b1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.b1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lbu a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i8, i8* @b1
+  %tmp2 = zext i8 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+;;;;;;;;;;;;;; 64-bit __emutls_v. and __emutls_t.
+
+; RISCV64-LABEL: __emutls_v.i1:
+; RISCV64-NEXT: .quad 4
+; RISCV64-NEXT: .quad 4
+; RISCV64-NEXT: .quad 0
+; RISCV64-NEXT: .quad __emutls_t.i1
+
+; RISCV64-LABEL: __emutls_t.i1:
+; RISCV64-NEXT: .word 15
+
+; RISCV64-NOT:   __emutls_v.i2
+
+; RISCV64-LABEL: __emutls_v.i3:
+; RISCV64-NEXT: .quad 4
+; RISCV64-NEXT: .quad 4
+; RISCV64-NEXT: .quad 0
+; RISCV64-NEXT: .quad __emutls_t.i3
+
+; RISCV64-LABEL: __emutls_t.i3:
+; RISCV64-NEXT: .word 15
+
+; RISCV64-LABEL: __emutls_v.i4:
+; RISCV64-NEXT: .quad 4
+; RISCV64-NEXT: .quad 4
+; RISCV64-NEXT: .quad 0
+; RISCV64-NEXT: .quad __emutls_t.i4
+
+; RISCV64-LABEL: __emutls_t.i4:
+; RISCV64-NEXT: .word 15
+
+; RISCV64-NOT:   __emutls_v.i5:
+; RISCV64:      .hidden __emutls_v.i5
+; RISCV64-NOT:   __emutls_v.i5:
+
+; RISCV64-LABEL: __emutls_v.s1:
+; RISCV64-NEXT: .quad 2
+; RISCV64-NEXT: .quad 2
+; RISCV64-NEXT: .quad 0
+; RISCV64-NEXT: .quad __emutls_t.s1
+
+; RISCV64-LABEL: __emutls_t.s1:
+; RISCV64-NEXT: .half 15
+
+; RISCV64-LABEL: __emutls_v.b1:
+; RISCV64-NEXT: .quad 1
+; RISCV64-NEXT: .quad 1
+; RISCV64-NEXT: .quad 0
+; RISCV64-NEXT: .quad 0
+
+; RISCV64-NOT:  __emutls_t.b1

llvm/test/CodeGen/RISCV/emutls_generic.ll

+; RUN: llc < %s -emulated-tls -mtriple=riscv64-linux-gnu -O3 \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+; RUN: llc < %s -emulated-tls -mtriple=riscv64-linux-ohos -relocation-model=pic \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+; RUN: llc < %s -emulated-tls -mtriple=riscv64-linux-ohos -relocation-model=pic -O3 \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+; RUN: llc < %s -emulated-tls -mtriple=riscv64-linux-ohos -O3 \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+
+; RUN: llc < %s -mtriple=riscv64-linux-gnu -O3 \
+; RUN:     | FileCheck -check-prefix=NoEMU %s
+; RUN: llc < %s -mtriple=riscv64-linux-ohos -relocation-model=pic \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+; RUN: llc < %s -mtriple=riscv64-linux-ohos -relocation-model=pic -O3 \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+; RUN: llc < %s -mtriple=riscv64-linux-ohos -O3 \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+
+; NoEMU-NOT: __emutls
+
+; Make sure that TLS symbols are emitted in expected order.
+
+@external_x = external thread_local global i32, align 8
+@external_y = thread_local global i8 7, align 2
+@internal_y = internal thread_local global i64 9, align 16
+
+define i32* @get_external_x() {
+entry:
+  ret i32* @external_x
+}
+
+define i8* @get_external_y() {
+entry:
+  ret i8* @external_y
+}
+
+define i64* @get_internal_y() {
+entry:
+  ret i64* @internal_y
+}
+
+; RISCV64-LABEL:  get_external_x:
+; RISCV64:      __emutls_v.external_x
+; RISCV64:      __emutls_get_address
+; RISCV64-LABEL:  get_external_y:
+; RISCV64:      __emutls_v.external_y
+; RISCV64:      __emutls_get_address
+; RISCV64-LABEL:  get_internal_y:
+; RISCV64:      __emutls_v.internal_y
+; RISCV64:      __emutls_get_address
+; RISCV64-NOT:   __emutls_t.external_x
+; RISCV64-NOT:   __emutls_v.external_x:
+; RISCV64:        .data{{$}}
+; RISCV64:        .globl __emutls_v.external_y
+; RISCV64:        .p2align 3
+; RISCV64-LABEL:  __emutls_v.external_y:
+; RISCV64-NEXT:   .quad 1
+; RISCV64-NEXT:   .quad 2
+; RISCV64-NEXT:   .quad 0
+; RISCV64-NEXT:   .quad __emutls_t.external_y
+; RISCV64-NOT:    __emutls_v.external_x:
+; RISCV64:        .section .r{{o?}}data,
+; RISCV64-LABEL:  __emutls_t.external_y:
+; RISCV64-NEXT:   .byte 7
+; RISCV64:        .data{{$}}
+; RISCV64-NOT:    .globl __emutls_v
+; RISCV64:        .p2align 3
+; RISCV64-LABEL:  __emutls_v.internal_y:
+; RISCV64-NEXT:   .quad 8
+; RISCV64-NEXT:   .quad 16
+; RISCV64-NEXT:   .quad 0
+; RISCV64-NEXT:   .quad __emutls_t.internal_y
+; RISCV64:        .section .r{{o?}}data,
+; RISCV64-LABEL:  __emutls_t.internal_y:
+; RISCV64-NEXT:   .quad 9

llvm/test/Transforms/SafeStack/AArch64/abi.ll

 ; RUN: opt -safe-stack -S -mtriple=aarch64-linux-android < %s -o - | FileCheck %s
+; RUN: opt -safe-stack -S -mtriple=aarch64-linux-ohos < %s -o - | FileCheck %s --check-prefix=OHOS
 
 
 define void @foo() nounwind uwtable safestack {
 entry:
+; OHOS-NOT: call i8* @llvm.thread.pointer()
 ; CHECK: %[[TP:.*]] = call i8* @llvm.thread.pointer()
 ; CHECK: %[[SPA0:.*]] = getelementptr i8, i8* %[[TP]], i32 72
 ; CHECK: %[[SPA:.*]] = bitcast i8* %[[SPA0]] to i8**
 ; CHECK: %[[USP:.*]] = load i8*, i8** %[[SPA]]
 ; CHECK: %[[USST:.*]] = getelementptr i8, i8* %[[USP]], i32 -16
 ; CHECK: store i8* %[[USST]], i8** %[[SPA]]
 
   %a = alloca i8, align 8
   call void @Capture(i8* %a)
 
 ; CHECK: store i8* %[[USP]], i8** %[[SPA]]
   ret void
 }
 
 declare void @Capture(i8*)

llvm/test/Transforms/SafeStack/AArch64/abi_ssp.ll

 ; RUN: opt -safe-stack -S -mtriple=aarch64-linux-android < %s -o - | FileCheck --check-prefixes=TLS,ANDROID %s
+; RUN: opt -safe-stack -S -mtriple=aarch64-linux-ohos < %s -o - | FileCheck --check-prefix=OHOS %s
 ; RUN: opt -safe-stack -S -mtriple=aarch64-unknown-fuchsia < %s -o - | FileCheck --check-prefixes=TLS,FUCHSIA %s
 
 define void @foo() nounwind uwtable safestack sspreq {
 entry:
 ; The first @llvm.thread.pointer is for the unsafe stack pointer, skip it.
 ; TLS: call i8* @llvm.thread.pointer()
 
+; OHOS-NOT: call i8* @llvm.thread.pointer()
 ; TLS: %[[TP2:.*]] = call i8* @llvm.thread.pointer()
 ; ANDROID: %[[B:.*]] = getelementptr i8, i8* %[[TP2]], i32 40
 ; FUCHSIA: %[[B:.*]] = getelementptr i8, i8* %[[TP2]], i32 -16
 ; TLS: %[[C:.*]] = bitcast i8* %[[B]] to i8**
 ; TLS: %[[StackGuard:.*]] = load i8*, i8** %[[C]]
 ; TLS: store i8* %[[StackGuard]], i8** %[[StackGuardSlot:.*]]
   %a = alloca i128, align 16
   call void @Capture(i128* %a)
 
 ; TLS: %[[A:.*]] = load i8*, i8** %[[StackGuardSlot]]
 ; TLS: icmp ne i8* %[[StackGuard]], %[[A]]
   ret void
 }
 
 declare void @Capture(i128*)

llvm/test/Transforms/SafeStack/AArch64/unreachable.ll

 ; RUN: opt -safe-stack -safe-stack-coloring -S -mtriple=aarch64-linux-android < %s -o - | FileCheck %s
+; RUN: opt -safe-stack -safe-stack-coloring -S -mtriple=aarch64-linux-ohos < %s -o - | FileCheck %s --check-prefix=OHOSMUSL
 
 define void @foo() nounwind uwtable safestack {
 entry:
+; OHOSMUSL-NOT: call i8* @llvm.thread.pointer()
 ; CHECK: %[[TP:.*]] = call i8* @llvm.thread.pointer()
 ; CHECK: %[[SPA0:.*]] = getelementptr i8, i8* %[[TP]], i32 72
 ; CHECK: %[[SPA:.*]] = bitcast i8* %[[SPA0]] to i8**
 ; CHECK: %[[USP:.*]] = load i8*, i8** %[[SPA]]
 ; CHECK: %[[USST:.*]] = getelementptr i8, i8* %[[USP]], i32 -16
 ; CHECK: store i8* %[[USST]], i8** %[[SPA]]
 
   %a = alloca i8, align 8

llvm/unittests/ADT/TripleTest.cpp

TEST(TripleTest, ParsedIDs) {
 
   T = Triple("dxil-unknown-shadermodel-amplification");
   EXPECT_EQ(Triple::dxil, T.getArch());
   EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
   EXPECT_EQ(Triple::ShaderModel, T.getOS());
   EXPECT_EQ(Triple::Amplification, T.getEnvironment());
   EXPECT_FALSE(T.supportsCOMDAT());
 
+  T = Triple("arm-unknown-linux-ohos");
+  EXPECT_EQ(Triple::arm, T.getArch());
+  EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+  EXPECT_EQ(Triple::Linux, T.getOS());
+  EXPECT_EQ(Triple::OpenHOS, T.getEnvironment());
+
+  T = Triple("arm-unknown-liteos");
+  EXPECT_EQ(Triple::arm, T.getArch());
+  EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+  EXPECT_EQ(Triple::LiteOS, T.getOS());
+  EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment());
+
   T = Triple("huh");
   EXPECT_EQ(Triple::UnknownArch, T.getArch());
 }
 
 static std::string Join(StringRef A, StringRef B, StringRef C) {
   std::string Str = std::string(A);
   Str += '-';
   Str += B;