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[AsmPrinter] Fix bit pattern for i1 vectors.
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Authored by efriedma on Jul 5 2022, 3:30 PM.

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Summary

Vectors are defined to be tightly packed, regardless of the element type. The AsmPrinter didn't realize this, and was allocating padding between elements.

Fixes https://github.com/llvm/llvm-project/issues/55522 .

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efriedma created this revision.Jul 5 2022, 3:30 PM
Herald added a project: Restricted Project. · View Herald TranscriptJul 5 2022, 3:30 PM
efriedma requested review of this revision.Jul 5 2022, 3:30 PM
Herald added a project: Restricted Project. · View Herald TranscriptJul 5 2022, 3:30 PM
andrewrk accepted this revision.Jul 5 2022, 4:00 PM
This revision is now accepted and ready to land.Jul 5 2022, 4:00 PM

LGTM. I think I've seen this other issues from i1 constant vectors somewhere, but I can't find a reference to them now. 53246 maybe, but I thought there was another one.

llvm/test/CodeGen/AArch64/vector-global-i1.ll
2

This can remove the --check-prefixes=CHECK.

dmgreen accepted this revision.Jul 5 2022, 7:36 PM
This revision was landed with ongoing or failed builds.Jul 6 2022, 12:57 PM
This revision was automatically updated to reflect the committed changes.