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[RISCV][RVV] Add FPRndModeOp to PseudoVFCVT instructions
Needs ReviewPublic

Authored by arcbbb on Mar 31 2022, 8:20 PM.

Details

Summary

Rounding mode rtz & rod are supported by vfcvt statically,
while other rounding modes such as rdn & rup are supported dynamically and controlled by FRM register, which also affects scalar floating-point operations.

This patch adds an additional operand to carry round-mode information in vfcvt pseudos.
Lowering and instruction selection can specify the needed round mode imm. value and let the backend deal with the round mode change at MachineInstr level at later stage.

Diff Detail

Event Timeline

arcbbb created this revision.Mar 31 2022, 8:20 PM
Herald added a project: Restricted Project. · View Herald TranscriptMar 31 2022, 8:20 PM
arcbbb requested review of this revision.Mar 31 2022, 8:20 PM

This patch only creates the interface to specify the round mode in vfcvt pseudos.
How the round mode is changed at MI will be a separate patch.
I think this can make each patch smaller.

Thanks @arcbbb.

Just to understand the design principle behind these patches: adding FRM as Use to the v*cvt instructions (like we did in D121087 ) would not help us to implement floor and ceil. I imagine one option could be adding specific pseudos for round up and round down and then a later pass could set the rounding mode and restore it later. However, this would not give great code generation and it adds even more instructions to our already large number of pseudos. So your approach goes by adding a new operand with the rounding mode, similar to the scalar operations, and in D123371 you propose a pass that adjusts the FRM register.

I hope I got it right :)

llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
99

Could you add a comment explaining what this flag means?

What I understand is that for "vfcvt" instructions we annotate the rounding mode. It'll be commonly dynamic except for cases when we want to explicitly round up or down.

llvm/lib/Target/RISCV/RISCVISelLowering.cpp
9354

It looks like you could factor this with the code below, it is very similar.

arcbbb updated this revision to Diff 426299.May 1 2022, 9:28 AM

Address @rogfer01's comments

arcbbb marked 2 inline comments as done.May 1 2022, 9:31 AM

Thanks @arcbbb.

Just to understand the design principle behind these patches: adding FRM as Use to the v*cvt instructions (like we did in D121087 ) would not help us to implement floor and ceil. I imagine one option could be adding specific pseudos for round up and round down and then a later pass could set the rounding mode and restore it later. However, this would not give great code generation and it adds even more instructions to our already large number of pseudos. So your approach goes by adding a new operand with the rounding mode, similar to the scalar operations, and in D123371 you propose a pass that adjusts the FRM register.

I hope I got it right :)

Many thanks for your summary. It states much better than mine.

llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
99

Thanks for the reminding!

fakepaper56 added inline comments.
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
9385

How about just call hasVLOp and hasSEWOp to avoid the two casts to void?

assert(RISCVII::hasVLOp(TSFlags) && RISCVII::hasSEWOp(TSFlags));
arcbbb marked an inline comment as done.Sep 20 2022, 12:26 AM
arcbbb added inline comments.
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
9385

I'll fix it. Thanks!