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[RISCV] Enable CGP to sink splat operands of VP intrinsics

Authored by frasercrmck on Jan 19 2022, 10:21 AM.



This patch brings better splat-matching to our VP support, by sinking
splat operands of VP intrinsics back into the same block as the VP
operation. The list of VP intrinsics we are interested in matches that
of the regular instructions.

Some optimization is still lacking. For instance, our VL nodes aren't
recognized as commutative, so splats must be on the RHS. Because of
this, we limit our sinking of splats to just the RHS operand for now.
Improvement in this regard can come in another patch.

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Event Timeline

frasercrmck created this revision.Jan 19 2022, 10:21 AM
frasercrmck requested review of this revision.Jan 19 2022, 10:21 AM
Herald added a project: Restricted Project. · View Herald TranscriptJan 19 2022, 10:21 AM
craig.topper added inline comments.Jan 19 2022, 11:00 AM

Do we not handle frsub and frdiv?

frasercrmck added inline comments.Jan 20 2022, 7:01 AM

Ah, yeah, sort of. We don't match them against non-true-masked intrinsics so I must have overlooked them in testing. I've opened D117783 to help keep fsub and fdiv to behave uniformly. I'd probably prefer to wait for that patch but it's probably not a big deal either way.

frasercrmck added inline comments.Jan 20 2022, 7:54 AM

Ah hah, I see what's going on here. Our VL patterns are commutative, but only the unmasked ones. The masked ones use V0 which is a subclass of Register and so is skipped during the commutative NC calculation in CodeGenDAGPatterns's GenerateVariantsOf. Then, since NC != N->getNumChildren(), the commutative variants aren't generated.

I don't fully understand this part about Register leaves but isn't it sufficient to check whether the first 2 or 3 operands aren't Registers (the actual commutable operands) and let the tail operands do as they wish?

This revision is now accepted and ready to land.Jan 20 2022, 9:39 PM